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7e07e469f3
gpio_set_flags_by_mask() should only set the GPIO flags for a pin.
gpio_set_alternate_function() should set all mux modes including
GPIO mode for a pin.
This bug was uncovered when a glitch was observed on EC's
LRESET# pin which reset the LPC bus. The glitch was caused when
the LPC interface was re-initialized during execution of EC RW
image. While programming the EC pins for LPC interface, LRESET#
pin was temporarily converted from LRESET# mode to GPIO mode by
gpio_set_flags_by_mask() before it got set back to LRESET# mode
by gpio_set_alternate_function()
BUG=chrome-os-partner:44993
BRANCH=none
TEST=Manually tested on Kunimitsu FAB3. Flashed a coreboot image
in which LPC SERIRQ is set to quiet mode and Clock Run
is enabled and than confirmed that keyboard is functional.
Change-Id: I25865d38bd6b6b5785e4247831722c5a02032138
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/304146
Reviewed-by: Shawn N <shawnn@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit