Vijay Hiremath 8e4d429172 power: Group Intel x86 power sequencing common code
Grouping the Intel x86 power sequencing common code so that
the future chipset power sequencing implementation can make
use of the existing code.

BUG=chrome-os-partner:59141
BRANCH=none
TEST=make buildall -j
     Manually tested on Reef & Chell.
     System can boot to OS. S3, S5, hibernate are working.

Change-Id: I29dc208eacb3db47c640d028e9551ab3d8d4288c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/402272
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-01-20 22:40:32 -08:00
2017-01-18 22:50:54 -08:00
2016-11-10 21:28:33 -08:00
2016-09-09 19:20:12 -07:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
Description
No description provided
Readme 1.4 GiB
Languages
C 64.7%
Lasso 20.7%
ASL 3.6%
JavaScript 3.2%
C# 2.9%
Other 4.6%