mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-07 16:11:43 +00:00
This is a revised version of passthru which more closely resembles the
kernel interface. It allows multiple read/write messages in a single
transaction, and sends back one accumulated result.
BUG=chrome-os-partner:18778
BRANCH=none
TEST=On link, from root shell:
ectool i2cxfer 0 0xb 6 0x21
Read bytes: 0x05 0x41 0x52 0x52 0x4f 0x57
(I did not actually run this with the updated code)
On pit, in U-Boot:
Read i2c values:
Peach # crosec i2c md 48 0
0000: 00 00 3e 00 12 20 4b bf ff ff 20 00 1e 1e 1e 1f ..>.. K... .....
Peach # crosec i2c md 48 0 20
0000: 00 00 3e 00 12 20 4b bf ff ff 20 00 1e 1e 1e 1f ..>.. K... .....
0010: 1f 1f 1f 1f 1f 1f 20 00 00 07 00 00 00 00 00 00 ...... .........
Update value at offset 10:
Peach # crosec i2c mw 48 10 4
Peach # crosec i2c md 48 0 20
0000: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f ..>....... .....
0010: 04 1f 1f 1f 1f 1f 20 00 00 07 00 00 00 00 00 00 ...... .........
Peach #
On pit, in kernel:
localhost ~ # i2cdetect -y -a -r 20
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- UU -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
localhost ~ # i2cdump -f -y 20 0x48
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f ..>.?.???. .????
10: 1f 1f 0e 1f 1f 0e 20 00 00 07 00 00 00 00 00 00 ?????? ..?......
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
localhost ~ # i2cset -f -y 20 0x48 0x10 0
localhost ~ # i2cdump -f -y 20 0x48
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f ..>.?.???. .????
10: 00 1f 0e 1f 1f 0e 20 00 00 07 00 00 00 00 00 00 .????? ..?......
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
localhost ~ # i2cset -f -y 20 0x48 0x10 0x1f
localhost ~ # i2cdump -f -y 20 0x48
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f ..>.?.???. .????
10: 1f 1f 0e 1f 1f 0e 20 00 00 07 00 00 00 00 00 00 ?????? ..?......
Change-Id: I14d47e1712828f726ac5caddc4beede251570ad3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Updated to simplify protocol:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49958
Commit-Queue: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
381 lines
9.3 KiB
C
381 lines
9.3 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* I2C cross-platform code for Chrome EC */
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#include "clock.h"
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#include "console.h"
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#include "host_command.h"
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#include "i2c.h"
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#include "system.h"
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#include "task.h"
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#include "util.h"
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#include "watchdog.h"
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#define CPUTS(outstr) cputs(CC_I2C, outstr)
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#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
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extern const struct i2c_port_t i2c_ports[I2C_PORTS_USED];
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static struct mutex port_mutex[I2C_PORT_COUNT];
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void i2c_lock(int port, int lock)
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{
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if (lock) {
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#ifdef CHIP_stm32
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/* Don't allow deep sleep when I2C port is locked */
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disable_sleep(SLEEP_MASK_I2C);
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#endif
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mutex_lock(port_mutex + port);
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} else {
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mutex_unlock(port_mutex + port);
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#ifdef CHIP_stm32
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/* Allow deep sleep again after I2C port is unlocked */
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enable_sleep(SLEEP_MASK_I2C);
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#endif
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}
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}
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int i2c_read16(int port, int slave_addr, int offset, int *data)
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{
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int rv;
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uint8_t reg, buf[2];
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reg = offset & 0xff;
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/* I2C read 16-bit word: transmit 8-bit offset, and read 16bits */
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i2c_lock(port, 1);
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rv = i2c_xfer(port, slave_addr, ®, 1, buf, 2, I2C_XFER_SINGLE);
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i2c_lock(port, 0);
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if (rv)
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return rv;
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if (slave_addr & I2C_FLAG_BIG_ENDIAN)
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*data = ((int)buf[0] << 8) | buf[1];
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else
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*data = ((int)buf[1] << 8) | buf[0];
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return EC_SUCCESS;
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}
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int i2c_write16(int port, int slave_addr, int offset, int data)
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{
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int rv;
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uint8_t buf[3];
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buf[0] = offset & 0xff;
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if (slave_addr & I2C_FLAG_BIG_ENDIAN) {
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buf[1] = (data >> 8) & 0xff;
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buf[2] = data & 0xff;
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} else {
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buf[1] = data & 0xff;
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buf[2] = (data >> 8) & 0xff;
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}
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i2c_lock(port, 1);
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rv = i2c_xfer(port, slave_addr, buf, 3, NULL, 0, I2C_XFER_SINGLE);
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i2c_lock(port, 0);
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return rv;
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}
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int i2c_read8(int port, int slave_addr, int offset, int *data)
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{
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int rv;
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/* We use buf[1] here so it's aligned for DMA on STM32 */
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uint8_t reg, buf[1];
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reg = offset;
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i2c_lock(port, 1);
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rv = i2c_xfer(port, slave_addr, ®, 1, buf, 1, I2C_XFER_SINGLE);
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i2c_lock(port, 0);
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if (!rv)
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*data = buf[0];
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return rv;
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}
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int i2c_write8(int port, int slave_addr, int offset, int data)
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{
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int rv;
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uint8_t buf[2];
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buf[0] = offset;
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buf[1] = data;
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i2c_lock(port, 1);
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rv = i2c_xfer(port, slave_addr, buf, 2, 0, 0, I2C_XFER_SINGLE);
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i2c_lock(port, 0);
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return rv;
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}
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/*****************************************************************************/
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/* Host commands */
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/* TODO: replace with single I2C passthru command */
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static int i2c_command_read(struct host_cmd_handler_args *args)
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{
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const struct ec_params_i2c_read *p = args->params;
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struct ec_response_i2c_read *r = args->response;
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int data, rv = -1;
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#ifdef CONFIG_I2C_PASSTHRU_RESTRICTED
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if (system_is_locked())
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return EC_RES_ACCESS_DENIED;
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#endif
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if (p->read_size == 16)
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rv = i2c_read16(p->port, p->addr, p->offset, &data);
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else if (p->read_size == 8)
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rv = i2c_read8(p->port, p->addr, p->offset, &data);
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if (rv)
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return EC_RES_ERROR;
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r->data = data;
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args->response_size = sizeof(*r);
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return EC_RES_SUCCESS;
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}
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DECLARE_HOST_COMMAND(EC_CMD_I2C_READ, i2c_command_read, EC_VER_MASK(0));
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static int i2c_command_write(struct host_cmd_handler_args *args)
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{
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const struct ec_params_i2c_write *p = args->params;
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int rv = -1;
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#ifdef CONFIG_I2C_PASSTHRU_RESTRICTED
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if (system_is_locked())
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return EC_RES_ACCESS_DENIED;
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#endif
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if (p->write_size == 16)
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rv = i2c_write16(p->port, p->addr, p->offset, p->data);
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else if (p->write_size == 8)
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rv = i2c_write8(p->port, p->addr, p->offset, p->data);
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if (rv)
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return EC_RES_ERROR;
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return EC_RES_SUCCESS;
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}
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DECLARE_HOST_COMMAND(EC_CMD_I2C_WRITE, i2c_command_write, EC_VER_MASK(0));
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/* TODO: remove temporary extra debugging for help host-side debugging */
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#ifdef CONFIG_I2C_DEBUG_PASSTHRU
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#define PTHRUPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
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#else
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#define PTHRUPRINTF(format, args...)
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#endif
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/**
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* Perform the voluminous checking required for this message
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*
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* @param args Arguments
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* @return 0 if OK, EC_RES_INVALID_PARAM on error
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*/
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static int check_i2c_params(const struct host_cmd_handler_args *args)
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{
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const struct ec_params_i2c_passthru *params = args->params;
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const struct ec_params_i2c_passthru_msg *msg;
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int read_len = 0, write_len = 0;
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unsigned int size;
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int msgnum;
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if (args->params_size < sizeof(*params)) {
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PTHRUPRINTF("[%T i2c passthru no params, params_size=%d, need at least %d]\n",
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args->params_size, sizeof(*params));
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return EC_RES_INVALID_PARAM;
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}
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size = sizeof(*params) + params->num_msgs * sizeof(*msg);
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if (args->params_size < size) {
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PTHRUPRINTF("[%T i2c passthru params_size=%d, need at least %d]\n",
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args->params_size, size);
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return EC_RES_INVALID_PARAM;
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}
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if (params->port >= I2C_PORT_COUNT) {
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PTHRUPRINTF("[%T i2c passthru invalid port %d]\n",
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params->port);
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return EC_RES_INVALID_PARAM;
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}
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/* Loop and process messages */;
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for (msgnum = 0, msg = params->msg; msgnum < params->num_msgs;
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msgnum++, msg++) {
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unsigned int addr_flags = msg->addr_flags;
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/* Parse slave address if necessary */
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if (addr_flags & EC_I2C_FLAG_10BIT) {
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/* 10-bit addressing not supported yet */
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PTHRUPRINTF("[%T i2c passthru no 10-bit addressing]\n");
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return EC_RES_INVALID_PARAM;
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}
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PTHRUPRINTF("[%T i2c passthru port=%d, %s, addr=0x%02x, len=0x%02x]\n",
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params->port,
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addr_flags & EC_I2C_FLAG_READ ? "read" : "write",
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addr_flags & EC_I2C_ADDR_MASK,
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msg->len);
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if (addr_flags & EC_I2C_FLAG_READ)
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read_len += msg->len;
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else
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write_len += msg->len;
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}
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/* Check there is room for the data */
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if (args->response_max <
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sizeof(struct ec_response_i2c_passthru) + read_len) {
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PTHRUPRINTF("[%T i2c passthru overflow1]\n");
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return EC_RES_INVALID_PARAM;
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}
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/* Must have bytes to write */
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if (args->params_size < size + write_len) {
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PTHRUPRINTF("[%T i2c passthru overflow2]\n");
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return EC_RES_INVALID_PARAM;
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}
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return EC_RES_SUCCESS;
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}
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static int i2c_command_passthru(struct host_cmd_handler_args *args)
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{
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const struct ec_params_i2c_passthru *params = args->params;
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const struct ec_params_i2c_passthru_msg *msg;
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struct ec_response_i2c_passthru *resp = args->response;
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const uint8_t *out;
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int in_len;
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int ret;
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#ifdef CONFIG_I2C_PASSTHRU_RESTRICTED
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if (system_is_locked())
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return EC_RES_ACCESS_DENIED;
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#endif
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ret = check_i2c_params(args);
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if (ret)
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return ret;
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/* Loop and process messages */
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resp->i2c_status = 0;
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out = args->params + sizeof(*params) + params->num_msgs * sizeof(*msg);
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in_len = 0;
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i2c_lock(params->port, 1);
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for (resp->num_msgs = 0, msg = params->msg;
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resp->num_msgs < params->num_msgs;
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resp->num_msgs++, msg++) {
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/* EC uses 8-bit slave address */
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unsigned int addr = (msg->addr_flags & EC_I2C_ADDR_MASK) << 1;
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int xferflags = I2C_XFER_START;
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int read_len = 0, write_len = 0;
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int rv;
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if (msg->addr_flags & EC_I2C_FLAG_READ)
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read_len = msg->len;
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else
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write_len = msg->len;
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/* Set stop bit for last message */
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if (resp->num_msgs == params->num_msgs - 1)
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xferflags |= I2C_XFER_STOP;
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/* Transfer next message */
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PTHRUPRINTF("[%T i2c passthru xfer port=%x, addr=%x, out=%p, write_len=%x, data=%p, read_len=%x, xferflags=%x]\n",
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params->port, addr, out, write_len,
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&resp->data[in_len], read_len, xferflags);
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rv = i2c_xfer(params->port, addr, out, write_len,
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&resp->data[in_len], read_len, xferflags);
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if (rv) {
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/* Driver will have sent a stop bit here */
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if (rv == EC_ERROR_TIMEOUT)
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resp->i2c_status = EC_I2C_STATUS_TIMEOUT;
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else
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resp->i2c_status = EC_I2C_STATUS_NAK;
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break;
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}
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in_len += read_len;
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out += write_len;
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}
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args->response_size = sizeof(*resp) + in_len;
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/* Unlock port */
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i2c_lock(params->port, 0);
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/*
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* Return success even if transfer failed so response is sent. Host
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* will check message status to determine the transfer result.
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*/
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return EC_RES_SUCCESS;
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}
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DECLARE_HOST_COMMAND(EC_CMD_I2C_PASSTHRU, i2c_command_passthru, EC_VER_MASK(0));
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/*****************************************************************************/
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/* Console commands */
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static void scan_bus(int port, const char *desc)
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{
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int a;
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uint8_t tmp;
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ccprintf("Scanning %d %s", port, desc);
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/* Don't scan a busy port, since reads will just fail / time out */
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a = i2c_get_line_levels(port);
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if (a != I2C_LINE_IDLE) {
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ccprintf(": port busy (SDA=%d, SCL=%d)\n",
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(a & I2C_LINE_SDA_HIGH) ? 1 : 0,
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(a & I2C_LINE_SCL_HIGH) ? 1 : 0);
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return;
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}
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i2c_lock(port, 1);
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for (a = 0; a < 0x100; a += 2) {
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watchdog_reload(); /* Otherwise a full scan trips watchdog */
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ccputs(".");
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#if defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
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/*
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* Hope that address 0 exists, because the i2c_xfer()
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* implementation on STM32 can't read a byte without writing
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* one first.
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*
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* TODO: remove when that limitation is fixed.
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*/
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tmp = 0;
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if (!i2c_xfer(port, a, &tmp, 1, &tmp, 1, I2C_XFER_SINGLE))
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#else
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/* Do a single read */
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if (!i2c_xfer(port, a, NULL, 0, &tmp, 1, I2C_XFER_SINGLE))
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#endif
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ccprintf("\n 0x%02x", a);
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}
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i2c_lock(port, 0);
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ccputs("\n");
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}
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static int command_scan(int argc, char **argv)
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{
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int i;
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for (i = 0; i < I2C_PORTS_USED; i++)
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scan_bus(i2c_ports[i].port, i2c_ports[i].name);
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return EC_SUCCESS;
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}
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DECLARE_CONSOLE_COMMAND(i2cscan, command_scan,
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NULL,
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"Scan I2C ports for devices",
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NULL);
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