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9ecf232dbd
On the STM32L UART without a FIFO, the Transmit Register might need some time before pushing its content to the shift register. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on ADV board, verify we are no longer missing most of the carriage return on console. Change-Id: Ic638dc452d6e30a5f127710fc964143d477fa1d6
- EC Lib
This wraps Blizzard driverlib and implements the EC chip interface defined
by Google. See below diagram for architecture.
+--------------------+
| Host BIOS/OS |
+--------------------+
---- host interface ----
+--------------------+
| Google EC features |
+--------------------+
---- chip interface ---- The interface is defined in
src/platform/ec/chip_interface/*.
+--------------------+ But the real implementation is in EC Lib.
| EC Lib |
+--------------------+
| Blizzard low level |
| driver, the |
| driverlib. |
+--------------------+