Kyoung Kim 0183e3cc7f mec1322: keep 32KHz on for ROSC accuracy ...

32KHz osc is necessary to key ROSC in +-2% accuracy.
If 32KHz osc is off/on during the heavy sleep, UART produces
garbage characters to Tx port until its clock to be stabilized.

BUG=none
TEST=Cyan
BRANCH=none

Change-Id: Ie045b9f152eb7dc8d888a2840babefac68081cef
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/288421
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>

2015-07-28 18:53:39 +00:00

..

g

Cr50: Enable TPM-protocol data over the SPI bus

2015-07-25 08:47:37 +00:00

host

cleanup: fix all the header guards

2015-06-18 19:07:00 +00:00

it83xx

it8380dev: fix reset cause

2015-07-22 06:26:20 +00:00

lm4

ADC: Add common priority for the ADC init

2015-07-16 05:15:22 +00:00

mec1322

mec1322: keep 32KHz on for ROSC accuracy

2015-07-28 18:53:39 +00:00

npcx

nuc:

2015-07-25 01:22:32 +00:00

nrf51

cleanup: GPIO: Use common macro for converting mask to GPIO

2015-07-19 20:38:37 +00:00

stm32

stm32: Define second DMA controller present on STM32F3

2015-07-27 22:19:21 +00:00