Ben Lok b147dd7fa6 oak: revise warm reset control for rev3 ...

The AP warm reset pin is changed from rev3 of oak board.
PB3 is stuffed before rev3 and connected to PMIC RESET pin to
reset the AP. For rev3, the AP reset mechanism is changed:
PC3 connects to PMIC SYSRSTB, pull PC3 to low, to reset AP.

BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
   make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
   make -j BOARD=oak
both cases should be built successfully and run "apreset" command.
AP should be reset normally.

Change-Id: I979e93acf755509f8cb7a12dd77eb7c9e7a98ccc
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/289476
Reviewed-by: Rong Chang <rongchang@chromium.org>

2015-08-05 13:32:49 +00:00

..

baytrail.c

power: Move EC_CMD_GSV_PAUSE_IN_S5 handler to common code

2015-05-07 17:25:40 +00:00

braswell.c

mec1322: Power state transition in case of apshutdown

2015-07-28 18:53:32 +00:00

build.mk

Remove obsolete board-specific code

2015-06-10 18:24:05 +00:00

common.c

tasks: Remove most task_start_called() calls.

2015-08-01 02:52:37 +00:00

ec_driven.c

ryu: add a dummy power module for controlling sensors.

2014-11-18 05:19:47 +00:00

gaia.c

Add cprints() and ccprints()

2014-05-21 20:32:17 +00:00

haswell.c

power: Move EC_CMD_GSV_PAUSE_IN_S5 handler to common code

2015-05-07 17:25:40 +00:00

mediatek.c

oak: revise warm reset control for rev3

2015-08-05 13:32:49 +00:00

rockchip.c

Power Button: Wait for power button to be stable when waiting for release

2015-02-10 23:07:14 +00:00

skylake.c

skylake: Inhibit AP power-on until charge current limit is set

2015-08-01 02:52:18 +00:00

tegra.c

tegra: enable EC sleep in S3

2015-06-26 20:17:45 +00:00