Yen Lin b29aba1921 nyan: change power button long press timeout to 10.2 seconds
The worst case of the ONKEY long press timeout of AS3722 PMIC is
10.08 seconds, according to AMS. Increase of such timeout defines
to 10.2 seconds.

BUG=nvbug 1372063
BRANCH=nyan
TEST=verified on Venice2 boards that were failing to turn off power
     with 9 seconds timeout

Change-Id: I65c8ebaab0523874ceff621cdbda72d8b44f4864
Signed-off-by: Yen Lin <yelin@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/177611
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2013-11-23 02:33:43 +00:00
2013-04-29 23:31:28 -07:00
2012-05-11 09:11:52 -07:00
2011-12-08 19:18:06 +00:00

In the most general case, the flash layout looks something like this:

  +---------------------+
  | Reserved for EC use |
  +---------------------+

  +---------------------+
  |     Vblock B        |
  +---------------------+
  |  RW firmware B      |
  +---------------------+

  +---------------------+
  |     Vblock A        |
  +---------------------+
  |  RW firmware A      |
  +---------------------+

  +---------------------+
  |       FMAP          |
  +---------------------+
  |   Public root key   |
  +---------------------+
  |  Read-only firmware |
  +---------------------+


BIOS firmware (and kernel) put the vblock info at the start of each image
where it's easy to find. The Blizzard EC expects the firmware vector table
to come first, so we have to put the vblock at the end. This means we have
to know where to look for it, but that's built into the FMAP and the RO
firmware anyway, so that's not an issue.

The RO firmware doesn't need a vblock of course, but it does need some
reserved space for vboot-related things.

Using SHA256/RSA4096, the vblock is 2468 bytes (0x9a4), while the public
root key is 1064 bytes (0x428) and the current FMAP is 644 bytes (0x284). If
we reserve 4K at the top of each FW image, that should give us plenty of
room for vboot-related stuff.
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