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b47c1fed20
This adds two debugging commands to decode the PINMUX and GPIO routings without having to look at a bunch of hex values. They can easily be removed to save space, but they're kind of handy for now. BUG=chrome-os-partner:49952 BRANCH=none TEST=make buildall, and test on Cr50 Run the "pinmux" and "gpiocfg" commands. Verify that the output reflects the desired configs found in gpio.inc I get this: > pinmux 40060000: DIOM0 5 IN GPIO0_GPIO4 40060008: DIOM1 6 IN GPIO0_GPIO5 40060010: DIOM2 0 IN PU 40060028: DIOA0 70 UART0_TX 40060030: DIOA1 0 IN 40060038: DIOA2 0 IN 40060040: DIOA3 2 IN GPIO0_GPIO1 40060050: DIOA5 0 IN 40060058: DIOA6 0 IN 40060060: DIOA7 3 IN GPIO0_GPIO2 40060088: DIOA12 0 IN 400600a0: DIOB0 33 IN 400600a8: DIOB1 34 IN 400600b0: DIOB2 0 IN 400600b8: DIOB3 74 UART1_TX 400600c0: DIOB4 0 IN PD 400600c8: DIOB5 78 UART2_TX 400600d0: DIOB6 0 IN 400600d8: DIOB7 1 IN GPIO0_GPIO0 400600f8: GPIO0_GPIO0 3 DIOB7 400600fc: GPIO0_GPIO1 22 DIOA3 40060100: GPIO0_GPIO2 18 DIOA7 40060104: GPIO0_GPIO3 20 DIOA5 40060108: GPIO0_GPIO4 30 DIOM0 4006010c: GPIO0_GPIO5 29 DIOM1 40060110: GPIO0_GPIO6 28 DIOM2 40060208: UART0_RX 24 DIOA1 40060218: UART1_RX 8 DIOB2 40060228: UART2_RX 4 DIOB6 > gpiocfg GPIO0_GPIO0: read 0 drive 1 GPIO0_GPIO1: read 0 drive 0 GPIO0_GPIO2: read 0 drive 0 GPIO0_GPIO4: read 0 drive 0 GPIO0_GPIO5: read 0 drive 0 > Note that we skip GPIO0_GPIO3 and GPIO0_GPIO6 because they're neither outputs nor interrupts. All the GPIOs can do that. Change-Id: I93b881bfd93dc100096bbd005a6c31b2669eda2f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329527 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>