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b70183a9bd
This uses the last bank of flash to hold persistent settings, and looks at the write protect GPIO to decide whether to protect the chip at boot (chrome-os-partner:7453). For ease of debugging, I've temporarily hacked this so flash uses the RECOVERYn signal (dut-control goog_rec_mode:on) to enable WP instead of the write protect signal; this works around chrome-os-partner:8580. Also note that if you write protect any blocks even temporarily, you'll need to do a power-on reset to clear them before you can reprogram the flash. See chrome-os-partner:8632. At the EC console, "hibernate 1" will do that, or you can just yank the power. This also fixes a bug in the flash write and erase commands, where they weren't properly detecting failure if you attempted to modify a protected block (missed an interrupt reason...) New "flashwp" console commands work. LPC commands need reworking. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8448 TEST=manual Change-Id: I49c38cc25c793094ae3331a4586fda0761b4bac6
- EC Lib
This wraps Blizzard driverlib and implements the EC chip interface defined
by Google. See below diagram for architecture.
+--------------------+
| Host BIOS/OS |
+--------------------+
---- host interface ----
+--------------------+
| Google EC features |
+--------------------+
---- chip interface ---- The interface is defined in
src/platform/ec/chip_interface/*.
+--------------------+ But the real implementation is in EC Lib.
| EC Lib |
+--------------------+
| Blizzard low level |
| driver, the |
| driverlib. |
+--------------------+