mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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ad8ce3f806
PD charger voltage + current can now be limited with EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the AP transitions out of S0 into S3 / suspend. BUG=chrome-os-partner:43285 TEST=Manual on Samus w/ zinger. - Plug zinger, verify charging at 20V/3A. - `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A - `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A - Plug zinger into other port, verify still charging at 5V/1A - `powerd_dbus_suspend`, verify charging at 20V/3A - `chglim 2000 12000`, verify charging at 12V/2A - `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A - `chglim 1000 20000`, verify charging at 20V/1A - `chglim`, verify charging at 20V/3A BRANCH=ryu Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb Reviewed-on: https://chromium-review.googlesource.com/293954 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
251 lines
7.1 KiB
C
251 lines
7.1 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* ryu board configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* the UART console is on USART2 (PD4/PD5) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 2
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/* By default, enable all console messages excepted USB, lightbar and host */
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#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_USB) | CC_MASK(CC_LIGHTBAR) |\
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CC_MASK(CC_HOSTCMD)))
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/* Optional features */
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#undef CONFIG_CMD_HASH
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT
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#define CONFIG_CHARGE_RAMP_HW
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#define CONFIG_FORCE_CONSOLE_RESUME
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#define CONFIG_STM_HWTIMER32
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#define CONFIG_USB_CHARGER
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_ALT_MODE
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USB_PD_CUSTOM_VDM
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#undef CONFIG_USB_PD_DEBUG_DR
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#define CONFIG_USB_PD_DEBUG_DR PD_ROLE_UFP
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_FLASH_ERASE_CHECK
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#define CONFIG_USB_PD_INTERNAL_COMP
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#define CONFIG_USB_PD_LOGGING
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#define CONFIG_USB_PD_LOG_SIZE 512
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#define CONFIG_USB_PD_PORT_COUNT 1
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#define CONFIG_USB_PD_TCPC
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#define CONFIG_USB_PD_TCPM_STUB
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#define CONFIG_USB_SWITCH_PI3USB9281
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#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 1
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USBC_VCONN
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#define CONFIG_USBC_VCONN_SWAP
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#define CONFIG_ADC
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#define CONFIG_ADC_SAMPLE_TIME 3
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#define CONFIG_HW_CRC
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#define CONFIG_I2C
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#define CONFIG_LID_SWITCH
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#define CONFIG_LID_SWITCH_GPIO_LIST LID_GPIO(GPIO_LID_OPEN)\
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LID_GPIO(GPIO_BASE_PRES_L)
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_MKBP_EVENT
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#define CONFIG_VBOOT_HASH
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#define CONFIG_WATCHDOG_HELP
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#undef CONFIG_TASK_PROFILING
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#define CONFIG_INDUCTIVE_CHARGING
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#undef CONFIG_HIBERNATE
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#undef CONFIG_UART_TX_DMA /* DMAC_CH7 is used by USB PD */
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#define CONFIG_UART_RX_DMA
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#define CONFIG_UART_RX_DMA_CH STM32_DMAC_USART2_RX
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/* Charging/Power configuration */
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#define CONFIG_BATTERY_RYU
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#define CONFIG_BATTERY_BQ27541
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD
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#define CONFIG_BATTERY_REVIVE_DISCONNECT
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_V2
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#define CONFIG_CHARGER_BQ25892
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#define CONFIG_CHARGER_BQ2589X_IR_COMP (BQ2589X_IR_TREG_120C | \
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BQ2589X_IR_VCLAMP_160MV | \
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BQ2589X_IR_BAT_COMP_60MOHM)
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#define CONFIG_CHARGER_BQ2589X_BOOST (BQ2589X_BOOSTV_MV(4998) | \
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BQ2589X_BOOST_LIM_1650MA)
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#define CONFIG_CHARGER_ILIM_PIN_DISABLED
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#define CONFIG_CHARGER_PROFILE_OVERRIDE
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#define CONFIG_CHARGER_INPUT_CURRENT 512
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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#define CONFIG_CHIPSET_TEGRA
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#define CONFIG_PMIC_FW_LONG_PRESS_TIMER
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#define CONFIG_POWER_COMMON
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#define CONFIG_POWER_BUTTON
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#define CONFIG_POWER_BUTTON_ACTIVE_STATE 1
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#define CONFIG_POWER_IGNORE_LID_OPEN
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/* I2C ports configuration */
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#define I2C_PORT_MASTER 0
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#define I2C_PORT_SLAVE 1
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#define I2C_PORT_EC I2C_PORT_SLAVE
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#define I2C_PORT_CHARGER I2C_PORT_MASTER
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#define I2C_PORT_BATTERY I2C_PORT_MASTER
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#define I2C_PORT_LIGHTBAR I2C_PORT_MASTER
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#define I2C_PORT_ACCEL I2C_PORT_MASTER
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#define I2C_PORT_PERICOM I2C_PORT_MASTER
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#define BMM150_I2C_ADDRESS BMM150_ADDR0
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/* slave address for host commands */
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#ifdef HAS_TASK_HOSTCMD
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#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c
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#endif
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/* USART and USB stream drivers */
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#define CONFIG_STREAM_USART
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#define CONFIG_STREAM_USART1
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#define CONFIG_STREAM_USB
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/* USB Configuration */
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#define CONFIG_USB
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#define CONFIG_USB_PID 0x500f
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/* Prevent the USB driver from initializing at boot */
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#define CONFIG_USB_INHIBIT_INIT
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/* USB interface indexes (use define rather than enum to expand them) */
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#define USB_IFACE_CONSOLE 0
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#define USB_IFACE_AP_STREAM 1
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#define USB_IFACE_UNUSED 2 /* former SH UART interface */
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#define USB_IFACE_SPI 3
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#define USB_IFACE_COUNT 4
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_CONSOLE 1
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#define USB_EP_AP_STREAM 2
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#define USB_EP_UNUSED 3 /* former SH UART endpoint */
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#define USB_EP_SPI 4
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#define USB_EP_COUNT 5
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/* Enable console over USB */
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#define CONFIG_USB_CONSOLE
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#define CONFIG_SPI_MASTER
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/* Enable control of SPI over USB */
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#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */
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#define CONFIG_USB_SPI
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/* Enable Case Closed Debugging */
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#define CONFIG_CASE_CLOSED_DEBUG
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/* Enable Accel over SPI */
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#define CONFIG_SPI_ACCEL_PORT 1 /* Second SPI master port */
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#define SPI_ACCEL_PORT_ID 1 /* stored at spi_ports[1] */
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/* Sensor support */
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#define CONFIG_ACCELGYRO_BMI160
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#define CONFIG_MAG_BMI160_BMM150
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#define CONFIG_ACCEL_INTERRUPTS
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#define CONFIG_CMD_ACCELS
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#define CONFIG_CMD_ACCEL_INFO
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/* Size of FIFO queue is determined by Android Hifi sensor requirements:
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* Wake up sensors: Accel @50Hz + Barometer @5Hz + uncal mag @ 10Hz
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* 60s minimum, 3min recommened.
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* FIFO size is in power of 2.
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*/
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#define CONFIG_ACCEL_FIFO 2048
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/* Depends on how fast the AP boots and typical ODRs */
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#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3)
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/* Maximum number of deferrable functions */
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#undef DEFERRABLE_MAX_COUNT
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#define DEFERRABLE_MAX_COUNT 16
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#ifndef __ASSEMBLER__
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int board_get_version(void);
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int board_has_spi_sensors(void);
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/* GPIOs depending on board version */
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#define GPIO_VDDSPI_EN (board_has_spi_sensors() ? GPIO_VDDSPI_EN_0 \
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: GPIO_VDDSPI_EN_OLD)
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#define GPIO_USBC_CC_EN (board_has_spi_sensors() ? GPIO_USBC_CC_EN_0 \
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: GPIO_SPI3_NSS)
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/* Timer selection */
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#define TIM_CLOCK32 5
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#define TIM_WATCHDOG 19
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#include "gpio_signal.h"
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enum power_signal {
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TEGRA_XPSHOLD = 0,
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TEGRA_SUSPEND_ASSERTED,
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/* Number of power signals */
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POWER_SIGNAL_COUNT
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};
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/* ADC signal */
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enum adc_channel {
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ADC_VBUS = 0,
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ADC_CC1_PD,
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ADC_CC2_PD,
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/* Number of ADC channels */
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ADC_CH_COUNT
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};
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_VERSION,
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USB_STR_CONSOLE_NAME,
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USB_STR_AP_STREAM_NAME,
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USB_STR_COUNT
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};
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/* VBUS enable GPIO */
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#define GPIO_USB_C0_5V_EN GPIO_CHGR_OTG
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/* 1.5A Rp */
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#define PD_SRC_VNC PD_SRC_1_5_VNC_MV
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#define PD_SRC_RD_THRESHOLD PD_SRC_1_5_RD_THRESH_MV
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/* start as a sink in case we have no other power supply/battery */
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#define PD_DEFAULT_STATE PD_STATE_SNK_DISCONNECTED
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/* delay for the voltage transition on the power supply, BQ25x spec is 30ms */
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#define PD_POWER_SUPPLY_TURN_ON_DELAY 40000 /* us */
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#define PD_POWER_SUPPLY_TURN_OFF_DELAY 20000 /* us */
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/* delay to turn on/off vconn */
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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/* Define typical operating power and max power */
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#define PD_OPERATING_POWER_MW 10000
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#define PD_MAX_POWER_MW 24000
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#define PD_MAX_CURRENT_MA 3000
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#define PD_MAX_VOLTAGE_MV 12000
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/* The lower the input voltage, the higher the power efficiency. */
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#define PD_PREFER_LOW_VOLTAGE
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/* Set the charge current limit. */
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void board_set_charge_limit(int charge_ma);
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/* PP1800 transition GPIO interrupt handler */
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void pp1800_on_off_evt(enum gpio_signal signal);
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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