mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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6473343075
On panic, reboot properly the CPU rather than just jumping to the reset vector as that might lead to some incorrect initializations. Properly plug the div by 0 to the panic handling. Add a small trace if the debug output is activated. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:29840 TEST=add adhoc code triggering a data abort and see the firmware printing a trace, then rebooting immediatly in a working state. Change-Id: I1d5a98d9113c8ae08e05588a40f941d1ed22cebe Reviewed-on: https://chromium-review.googlesource.com/206268 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
417 lines
17 KiB
ArmAsm
417 lines
17 KiB
ArmAsm
/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Cortex-M CPU initialization
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*/
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#include "config.h"
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.section .text.vecttable
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.macro vector name
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.long \name\()_handler
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.weak \name\()_handler
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.set \name\()_handler, default_handler
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.endm
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.macro vector_irq number
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.if \number < CONFIG_IRQ_COUNT
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vector irq_\()\number
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.endif
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.endm
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/* Exceptions vector */
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vectors:
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.long stack_end @ initial stack pointer
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.long reset @ reset handler
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vector nmi @ NMI handler
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vector hard_fault @ HardFault handler
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vector mpu_fault @ MPU fault handler
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vector bus_fault @ Bus fault handler
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vector usage_fault @ Usage fault handler
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.long 0 @ reserved
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.long 0 @ reserved
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.long 0 @ reserved
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.long 0 @ reserved
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vector svc @ SWI
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vector debug @ Debug handler
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.long 0 @ reserved
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vector pendsv @ PendSV handler
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vector sys_tick @ SysTick handler
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vector_irq 0 @ IRQ 0 handler
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vector_irq 1 @ IRQ 1 handler
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vector_irq 2 @ IRQ 2 handler
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vector_irq 3 @ IRQ 3 handler
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vector_irq 4 @ IRQ 4 handler
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vector_irq 5 @ IRQ 5 handler
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vector_irq 6 @ IRQ 6 handler
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vector_irq 7 @ IRQ 7 handler
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vector_irq 8 @ IRQ 8 handler
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vector_irq 9 @ IRQ 9 handler
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vector_irq 10 @ IRQ 10 handler
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vector_irq 11 @ IRQ 11 handler
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vector_irq 12 @ IRQ 12 handler
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vector_irq 13 @ IRQ 13 handler
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vector_irq 14 @ IRQ 14 handler
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vector_irq 15 @ IRQ 15 handler
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vector_irq 16 @ IRQ 16 handler
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vector_irq 17 @ IRQ 17 handler
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vector_irq 18 @ IRQ 18 handler
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vector_irq 19 @ IRQ 19 handler
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vector_irq 20 @ IRQ 20 handler
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vector_irq 21 @ IRQ 21 handler
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vector_irq 22 @ IRQ 22 handler
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vector_irq 23 @ IRQ 23 handler
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vector_irq 24 @ IRQ 24 handler
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vector_irq 25 @ IRQ 25 handler
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vector_irq 26 @ IRQ 26 handler
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vector_irq 27 @ IRQ 27 handler
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vector_irq 28 @ IRQ 28 handler
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vector_irq 29 @ IRQ 29 handler
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vector_irq 30 @ IRQ 30 handler
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vector_irq 31 @ IRQ 31 handler
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vector_irq 32 @ IRQ 32 handler
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vector_irq 33 @ IRQ 33 handler
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vector_irq 34 @ IRQ 34 handler
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vector_irq 35 @ IRQ 35 handler
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vector_irq 36 @ IRQ 36 handler
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vector_irq 37 @ IRQ 37 handler
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vector_irq 38 @ IRQ 38 handler
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vector_irq 39 @ IRQ 39 handler
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vector_irq 40 @ IRQ 40 handler
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vector_irq 41 @ IRQ 41 handler
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vector_irq 42 @ IRQ 42 handler
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vector_irq 43 @ IRQ 43 handler
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vector_irq 44 @ IRQ 44 handler
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vector_irq 45 @ IRQ 45 handler
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vector_irq 46 @ IRQ 46 handler
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vector_irq 47 @ IRQ 47 handler
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vector_irq 48 @ IRQ 48 handler
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vector_irq 49 @ IRQ 49 handler
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vector_irq 50 @ IRQ 50 handler
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vector_irq 51 @ IRQ 51 handler
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vector_irq 52 @ IRQ 52 handler
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vector_irq 53 @ IRQ 53 handler
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vector_irq 54 @ IRQ 54 handler
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vector_irq 55 @ IRQ 55 handler
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vector_irq 56 @ IRQ 56 handler
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vector_irq 57 @ IRQ 57 handler
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vector_irq 58 @ IRQ 58 handler
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vector_irq 59 @ IRQ 59 handler
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vector_irq 60 @ IRQ 60 handler
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vector_irq 61 @ IRQ 61 handler
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vector_irq 62 @ IRQ 62 handler
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vector_irq 63 @ IRQ 63 handler
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vector_irq 64 @ IRQ 64 handler
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vector_irq 65 @ IRQ 65 handler
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vector_irq 66 @ IRQ 66 handler
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vector_irq 67 @ IRQ 67 handler
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vector_irq 68 @ IRQ 68 handler
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vector_irq 69 @ IRQ 69 handler
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vector_irq 70 @ IRQ 70 handler
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vector_irq 71 @ IRQ 71 handler
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vector_irq 72 @ IRQ 72 handler
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vector_irq 73 @ IRQ 73 handler
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vector_irq 74 @ IRQ 74 handler
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vector_irq 75 @ IRQ 75 handler
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vector_irq 76 @ IRQ 76 handler
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vector_irq 77 @ IRQ 77 handler
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vector_irq 78 @ IRQ 78 handler
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vector_irq 79 @ IRQ 79 handler
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vector_irq 80 @ IRQ 80 handler
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vector_irq 81 @ IRQ 81 handler
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vector_irq 82 @ IRQ 82 handler
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vector_irq 83 @ IRQ 83 handler
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vector_irq 84 @ IRQ 84 handler
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vector_irq 85 @ IRQ 85 handler
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vector_irq 86 @ IRQ 86 handler
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vector_irq 87 @ IRQ 87 handler
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vector_irq 88 @ IRQ 88 handler
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vector_irq 89 @ IRQ 89 handler
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vector_irq 90 @ IRQ 90 handler
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vector_irq 91 @ IRQ 91 handler
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vector_irq 92 @ IRQ 92 handler
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vector_irq 93 @ IRQ 93 handler
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vector_irq 94 @ IRQ 94 handler
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vector_irq 95 @ IRQ 95 handler
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vector_irq 96 @ IRQ 96 handler
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vector_irq 97 @ IRQ 97 handler
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vector_irq 98 @ IRQ 98 handler
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vector_irq 99 @ IRQ 99 handler
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vector_irq 100 @ IRQ 100 handler
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vector_irq 101 @ IRQ 101 handler
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vector_irq 102 @ IRQ 102 handler
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vector_irq 103 @ IRQ 103 handler
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vector_irq 104 @ IRQ 104 handler
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vector_irq 105 @ IRQ 105 handler
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vector_irq 106 @ IRQ 106 handler
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vector_irq 107 @ IRQ 107 handler
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vector_irq 108 @ IRQ 108 handler
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vector_irq 109 @ IRQ 109 handler
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vector_irq 110 @ IRQ 110 handler
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vector_irq 111 @ IRQ 111 handler
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vector_irq 112 @ IRQ 112 handler
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vector_irq 113 @ IRQ 113 handler
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vector_irq 114 @ IRQ 114 handler
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vector_irq 115 @ IRQ 115 handler
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vector_irq 116 @ IRQ 116 handler
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vector_irq 117 @ IRQ 117 handler
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vector_irq 118 @ IRQ 118 handler
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vector_irq 119 @ IRQ 119 handler
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vector_irq 120 @ IRQ 120 handler
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vector_irq 121 @ IRQ 121 handler
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vector_irq 122 @ IRQ 122 handler
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vector_irq 123 @ IRQ 123 handler
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vector_irq 124 @ IRQ 124 handler
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vector_irq 125 @ IRQ 125 handler
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vector_irq 126 @ IRQ 126 handler
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vector_irq 127 @ IRQ 127 handler
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vector_irq 128 @ IRQ 128 handler
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vector_irq 129 @ IRQ 129 handler
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vector_irq 130 @ IRQ 130 handler
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vector_irq 131 @ IRQ 131 handler
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vector_irq 132 @ IRQ 132 handler
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vector_irq 133 @ IRQ 133 handler
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vector_irq 134 @ IRQ 134 handler
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vector_irq 135 @ IRQ 135 handler
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vector_irq 136 @ IRQ 136 handler
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vector_irq 137 @ IRQ 137 handler
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vector_irq 138 @ IRQ 138 handler
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vector_irq 139 @ IRQ 139 handler
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vector_irq 140 @ IRQ 140 handler
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vector_irq 141 @ IRQ 141 handler
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vector_irq 142 @ IRQ 142 handler
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vector_irq 143 @ IRQ 143 handler
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vector_irq 144 @ IRQ 144 handler
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vector_irq 145 @ IRQ 145 handler
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vector_irq 146 @ IRQ 146 handler
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vector_irq 147 @ IRQ 147 handler
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vector_irq 148 @ IRQ 148 handler
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vector_irq 149 @ IRQ 149 handler
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vector_irq 150 @ IRQ 150 handler
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vector_irq 151 @ IRQ 151 handler
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vector_irq 152 @ IRQ 152 handler
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vector_irq 153 @ IRQ 153 handler
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vector_irq 154 @ IRQ 154 handler
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vector_irq 155 @ IRQ 155 handler
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vector_irq 156 @ IRQ 156 handler
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vector_irq 157 @ IRQ 157 handler
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vector_irq 158 @ IRQ 158 handler
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vector_irq 159 @ IRQ 159 handler
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vector_irq 160 @ IRQ 160 handler
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vector_irq 161 @ IRQ 161 handler
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vector_irq 162 @ IRQ 162 handler
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vector_irq 163 @ IRQ 163 handler
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vector_irq 164 @ IRQ 164 handler
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vector_irq 165 @ IRQ 165 handler
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vector_irq 166 @ IRQ 166 handler
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vector_irq 167 @ IRQ 167 handler
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vector_irq 168 @ IRQ 168 handler
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vector_irq 169 @ IRQ 169 handler
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vector_irq 170 @ IRQ 170 handler
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vector_irq 171 @ IRQ 171 handler
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vector_irq 172 @ IRQ 172 handler
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vector_irq 173 @ IRQ 173 handler
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vector_irq 174 @ IRQ 174 handler
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vector_irq 175 @ IRQ 175 handler
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vector_irq 176 @ IRQ 176 handler
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vector_irq 177 @ IRQ 177 handler
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vector_irq 178 @ IRQ 178 handler
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vector_irq 179 @ IRQ 179 handler
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vector_irq 180 @ IRQ 180 handler
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vector_irq 181 @ IRQ 181 handler
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vector_irq 182 @ IRQ 182 handler
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vector_irq 183 @ IRQ 183 handler
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vector_irq 184 @ IRQ 184 handler
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vector_irq 185 @ IRQ 185 handler
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vector_irq 186 @ IRQ 186 handler
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vector_irq 187 @ IRQ 187 handler
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vector_irq 188 @ IRQ 188 handler
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vector_irq 189 @ IRQ 189 handler
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vector_irq 190 @ IRQ 190 handler
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vector_irq 191 @ IRQ 191 handler
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vector_irq 192 @ IRQ 192 handler
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vector_irq 193 @ IRQ 193 handler
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vector_irq 194 @ IRQ 194 handler
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vector_irq 195 @ IRQ 195 handler
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vector_irq 196 @ IRQ 196 handler
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vector_irq 197 @ IRQ 197 handler
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vector_irq 198 @ IRQ 198 handler
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vector_irq 199 @ IRQ 199 handler
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vector_irq 200 @ IRQ 200 handler
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vector_irq 201 @ IRQ 201 handler
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vector_irq 202 @ IRQ 202 handler
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vector_irq 203 @ IRQ 203 handler
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vector_irq 204 @ IRQ 204 handler
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vector_irq 205 @ IRQ 205 handler
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vector_irq 206 @ IRQ 206 handler
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vector_irq 207 @ IRQ 207 handler
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vector_irq 208 @ IRQ 208 handler
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vector_irq 209 @ IRQ 209 handler
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vector_irq 210 @ IRQ 210 handler
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vector_irq 211 @ IRQ 211 handler
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vector_irq 212 @ IRQ 212 handler
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vector_irq 213 @ IRQ 213 handler
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vector_irq 214 @ IRQ 214 handler
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vector_irq 215 @ IRQ 215 handler
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vector_irq 216 @ IRQ 216 handler
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vector_irq 217 @ IRQ 217 handler
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vector_irq 218 @ IRQ 218 handler
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vector_irq 219 @ IRQ 219 handler
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vector_irq 220 @ IRQ 220 handler
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vector_irq 221 @ IRQ 221 handler
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vector_irq 222 @ IRQ 222 handler
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vector_irq 223 @ IRQ 223 handler
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vector_irq 224 @ IRQ 224 handler
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vector_irq 225 @ IRQ 225 handler
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vector_irq 226 @ IRQ 226 handler
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vector_irq 227 @ IRQ 227 handler
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vector_irq 228 @ IRQ 228 handler
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vector_irq 229 @ IRQ 229 handler
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vector_irq 230 @ IRQ 230 handler
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vector_irq 231 @ IRQ 231 handler
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vector_irq 232 @ IRQ 232 handler
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vector_irq 233 @ IRQ 233 handler
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vector_irq 234 @ IRQ 234 handler
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vector_irq 235 @ IRQ 235 handler
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vector_irq 236 @ IRQ 236 handler
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vector_irq 237 @ IRQ 237 handler
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vector_irq 238 @ IRQ 238 handler
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vector_irq 239 @ IRQ 239 handler
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vector_irq 240 @ IRQ 240 handler
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vector_irq 241 @ IRQ 241 handler
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vector_irq 242 @ IRQ 242 handler
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vector_irq 243 @ IRQ 243 handler
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vector_irq 244 @ IRQ 244 handler
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vector_irq 245 @ IRQ 245 handler
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vector_irq 246 @ IRQ 246 handler
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vector_irq 247 @ IRQ 247 handler
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vector_irq 248 @ IRQ 248 handler
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vector_irq 249 @ IRQ 249 handler
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vector_irq 250 @ IRQ 250 handler
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vector_irq 251 @ IRQ 251 handler
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vector_irq 252 @ IRQ 252 handler
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vector_irq 253 @ IRQ 253 handler
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vector_irq 254 @ IRQ 254 handler
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.text
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.syntax unified
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.code 16
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.global reset
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.thumb_func
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reset:
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/*
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* Ensure we're in privileged mode with main stack. Necessary if
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* we've jumped directly here from another image after task_start().
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*/
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#ifdef CONFIG_FPU
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mov r0, #(1 << 2) @ priv. mode / main stack / floating point on
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#else
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mov r0, #0 @ priv. mode / main stack / no floating point
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#endif
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msr control, r0
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isb @ ensure the write is done
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/* Set the vector table on our current code */
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ldr r1, =vectors
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ldr r2, =0xE000ED08 /* VTABLE register in SCB*/
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str r1, [r2]
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/* Clear BSS */
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mov r0, #0
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ldr r1,_bss_start
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ldr r2,_bss_end
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bss_loop:
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cmp r1, r2
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it lt
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strlt r0, [r1], #4
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blt bss_loop
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#ifndef COMPILE_FOR_RAM
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/* Copy initialized data to Internal RAM */
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ldr r0,_ro_end
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ldr r1,_data_start
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ldr r2,_data_end
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data_loop:
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ldr r3, [r0], #4
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cmp r1, r2
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it lt
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strlt r3, [r1], #4
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blt data_loop
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#endif
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/*
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* Set stack pointer. Already done by Cortex-M hardware, but re-doing
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* this here allows software to jump directly to the reset vector.
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*/
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ldr r0, =stack_end
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mov sp, r0
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#ifdef CONFIG_FPU
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/* Enable FPU */
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/* CPACR is located at address 0xE000ED88 */
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ldr r0, =0xE000ED88
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/* Read CPACR */
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ldr r1, [r0]
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/* Set bits 20-23 to enable CP10 and CP11 coprocessors */
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orr r1, r1, #(0xF << 20)
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/* Write back the modified value to the CPACR */
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str r1, [r0] /* wait for store to complete */
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dsb
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/* reset pipeline now the FPU is enabled */
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isb
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#endif /* CONFIG_FPU */
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#ifdef CONFIG_DEBUG_DISABLE_WRITE_BUFFER
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/* Disable write buffer used for default memory map accesses */
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ldr r0, =0xE000E008 /* Load address of ACTLR */
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ldr r1, [r0] /* Read ACTLR */
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orr r1, r1, #2 /* Set DISDEFWBUF bit */
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str r1, [r0] /* Write back ACTLR */
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dsb /* Wait for store to complete */
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isb /* Reset pipeline */
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#endif /* CONFIG_DEBUG_DISABLE_WRITE_BUFFER */
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/* Jump to C code */
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bl main
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/* That should not return. If it does, loop forever. */
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fini_loop:
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b fini_loop
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/* Default exception handler */
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.thumb_func
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default_handler:
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b exception_panic
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.align 2
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_bss_start:
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.long __bss_start
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_bss_end:
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.long __bss_end
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_data_start:
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.long __data_start
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_data_end:
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.long __data_end
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_ro_end:
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.long __ro_end
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/* Dummy functions to avoid linker complaints */
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.global __aeabi_unwind_cpp_pr0
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.global __aeabi_unwind_cpp_pr1
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.global __aeabi_unwind_cpp_pr2
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__aeabi_unwind_cpp_pr0:
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__aeabi_unwind_cpp_pr1:
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__aeabi_unwind_cpp_pr2:
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bx lr
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/* Reserve space for system stack */
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.section .bss.system_stack
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stack_start:
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.space CONFIG_STACK_SIZE, 0
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stack_end:
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.global stack_end
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