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Support saving panic data for nds32 core. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console commands 'crash' and 'panicinfo'. 2. ectool command 'panicinfo' crash assert ASSERTION FAILURE '0' in command_crash() at common/panic_output.c:162 === EXCEP: ITYPE=1 === R0 00000000 R1 000000a2 R2 00000060 R3 00000000 R4 00080c40 R5 00000000 R6 dead6663 R7 000000a2 R8 00000002 R9 00000000 R10 00081960 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080c60 IPC 000007a2 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_ASSERT Software panic info 0xa2 Rebooting... panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=1 === R0 00000000 R1 000000a2 R2 00000060 R3 00000000 R4 00080c40 R5 00000000 R6 dead6663 R7 000000a2 R8 00000002 R9 00000000 R10 00081960 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080c60 IPC 000007a2 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_ASSERT Software panic info 0xa2 > crash divzero === EXCEP: ITYPE=10003 === R0 00000000 R1 00f02705 R2 00000060 R3 00081a09 R4 00000000 R5 00000000 R6 00000001 R7 00080cc0 R8 00000002 R9 00000000 R10 00081961 R15 00000000 FP 00000000 GP 000818d8 LP 00009bce SP 00080c90 IPC 00009bee IPSW 70009 SWID of ITYPE: 1 Exception type: General exception [Arithmetic] Exception is caused by a data memory access Rebooting... panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=10003 === R0 00000000 R1 00f02705 R2 00000060 R3 00081a09 R4 00000000 R5 00000000 R6 00000001 R7 00080cc0 R8 00000002 R9 00000000 R10 00081961 R15 00000000 FP 00000000 GP 000818d8 LP 00009bce SP 00080c90 IPC 00009bee IPSW 70009 SWID of ITYPE: 1 Exception type: General exception [Arithmetic] Exception is caused by a data memory access > crash stack +1+2+3+4+5+6+7+8+9+10+11+12+13+14+15+16+17 Stack overflow in CONSOLE task! === EXCEP: ITYPE=8 === R0 00000002 R1 00000002 R2 00000060 R3 00080458 R4 0000ebdd R5 00000000 R6 dead6661 R7 00000002 R8 00000bc8 R9 00000002 R10 00000000 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080448 IPC 00000a92 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_STACK_OVERFLOW Software panic info 0x2 Rebooting... panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=8 === R0 00000002 R1 00000002 R2 00000060 R3 00080458 R4 0000ebdd R5 00000000 R6 dead6661 R7 00000002 R8 00000bc8 R9 00000002 R10 00000000 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080448 IPC 00000a92 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_STACK_OVERFLOW Software panic info 0x2 > crash watchdog Pre-watchdog warning! IPC: 00009c6c panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=0 === R0 00000000 R1 00000000 R2 00000000 R3 00000000 R4 00000000 R5 00000000 R6 dead6664 R7 00000000 R8 00000000 R9 00000000 R10 00000000 R15 00000000 FP 00000000 GP 00000000 LP 00000000 SP 00000000 IPC 00009c6c IPSW 00000 SWID of ITYPE: 0 Software panic reason PANIC_SW_WATCHDOG Software panic info 0x0 > Change-Id: I3d491ecd0789335db4633f9bf2ca09cf85503ed9 Reviewed-on: https://chromium-review.googlesource.com/303286 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
174 lines
4.7 KiB
C
174 lines
4.7 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Panic handling, including displaying a message on the panic reporting
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* device, which is currently the UART.
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*/
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#ifndef __CROS_EC_PANIC_H
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#define __CROS_EC_PANIC_H
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#include "software_panic.h"
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#include <stdarg.h>
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/* ARM Cortex-Mx registers saved on panic */
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struct cortex_panic_data {
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uint32_t regs[12]; /* psp, ipsr, msp, r4-r11, lr(=exc_return).
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* In version 1, that was uint32_t regs[11] =
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* psp, ipsr, lr, r4-r11
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*/
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uint32_t frame[8]; /* r0-r3, r12, lr, pc, xPSR */
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uint32_t mmfs;
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uint32_t bfar;
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uint32_t mfar;
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uint32_t shcsr;
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uint32_t hfsr;
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uint32_t dfsr;
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};
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/* NDS32 N8 registers saved on panic */
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struct nds32_n8_panic_data {
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uint32_t itype;
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uint32_t regs[16]; /* r0-r10, r15, fp, gp, lp, sp */
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uint32_t ipc;
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uint32_t ipsw;
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};
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/* Data saved across reboots */
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struct panic_data {
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uint8_t arch; /* Architecture (PANIC_ARCH_*) */
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uint8_t struct_version; /* Structure version (currently 2) */
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uint8_t flags; /* Flags (PANIC_DATA_FLAG_*) */
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uint8_t reserved; /* Reserved; set 0 */
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/* core specific panic data */
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union {
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struct cortex_panic_data cm; /* Cortex-Mx registers */
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struct nds32_n8_panic_data nds_n8; /* NDS32 N8 registers */
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};
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/*
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* These fields go at the END of the struct so we can find it at the
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* end of memory.
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*/
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uint32_t struct_size; /* Size of this struct */
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uint32_t magic; /* PANIC_SAVE_MAGIC if valid */
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};
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#define PANIC_DATA_MAGIC 0x21636e50 /* "Pnc!" */
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enum panic_arch {
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PANIC_ARCH_CORTEX_M = 1, /* Cortex-M architecture */
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PANIC_ARCH_NDS32_N8 = 2, /* NDS32 N8 architecture */
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};
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/*
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* Panic data goes at the end of RAM. This is safe because we don't context
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* switch away from the panic handler before rebooting, and stacks and data
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* start at the beginning of RAM.
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*/
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#define PANIC_DATA_PTR ((struct panic_data *)\
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(CONFIG_RAM_BASE + CONFIG_RAM_SIZE - sizeof(struct panic_data)))
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/* Flags for panic_data.flags */
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/* panic_data.frame is valid */
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#define PANIC_DATA_FLAG_FRAME_VALID (1 << 0)
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/* Already printed at console */
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#define PANIC_DATA_FLAG_OLD_CONSOLE (1 << 1)
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/* Already returned via host command */
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#define PANIC_DATA_FLAG_OLD_HOSTCMD (1 << 2)
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/* Already reported via host event */
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#define PANIC_DATA_FLAG_OLD_HOSTEVENT (1 << 3)
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/**
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* Write a string to the panic reporting device
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*
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* This function will not return until the string has left the UART
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* data register. Any previously queued UART traffic is displayed first.
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*
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* @param ch Character to write
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*/
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void panic_puts(const char *s);
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/**
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* Very basic printf() for use in panic situations
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*
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* See panic_vprintf() for full details
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*
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* @param format printf-style format string
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* @param ... Arguments to process
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*/
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void panic_printf(const char *format, ...);
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/*
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* Print saved panic information
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*
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* @param pdata pointer to saved panic data
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*/
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void panic_data_print(const struct panic_data *pdata);
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/**
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* Report an assertion failure and reset
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*
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* @param msg Assertion expression or other message
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* @param func Function name where assertion happened
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* @param fname File name where assertion happened
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* @param linenum Line number where assertion happened
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*/
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#ifdef CONFIG_DEBUG_ASSERT_BRIEF
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void panic_assert_fail(const char *fname, int linenum);
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#else
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void panic_assert_fail(const char *msg, const char *func, const char *fname,
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int linenum);
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#endif
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/**
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* Display a custom panic message and reset
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*
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* @param msg Panic message
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*/
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void panic(const char *msg);
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/**
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* Display a default message and reset
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*/
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void panic_reboot(void);
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#ifdef CONFIG_SOFTWARE_PANIC
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/**
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* Store a panic log and halt the system for a software-related reason, such as
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* stack overflow or assertion failure.
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*/
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void software_panic(uint32_t reason, uint32_t info);
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/**
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* Log a panic in the panic log, but don't halt the system. Normally
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* called on the subsequent reboot after panic detection.
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*/
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void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception);
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/**
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* Retrieve the currently stored panic reason + info.
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*/
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void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception);
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#endif
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/**
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* Enable/disable bus fault handler
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*
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* @param ignored Non-zero if ignoring bus fault
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*/
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void ignore_bus_fault(int ignored);
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/**
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* Return a pointer to the saved data from a previous panic.
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*
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* @param pointer to the panic data, or NULL if none available (for example,
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* the last reboot was not caused by a panic).
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*/
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struct panic_data *panic_get_data(void);
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#endif /* __CROS_EC_PANIC_H */
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