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0ed9b91d4c
since we add debounce time (50 ms) for SUSPEND & POWER GOOD signal
after oak rev3 (commit e58a913b). It will causes the chipset_reset
function failure, because PMIC_COLD_RESET_L_HOLD_TIME is short.
PMIC_COLD_RESET_L_HOLD_TIME should be greater than 100 ms
[SUSPEND_DEBOUNCE_TIME (50 ms) + POWER_DEBOUNCE_TIME (50 ms)].
So, revise PMIC_COLD_RESET_L_HOLD_TIME to 120ms.
And, using hook to avoid blocking the EC console when executing
"apreset" EC console command.
BRANCH=none
BUG=chrome-os-partner:44955
TEST=manual
Run EC console command, after AP enter S0:
> apreset
AP should be reset normally.
Change-Id: I04e31aef8be3092ad39b5f1b1c2b75b78b4d1d7b
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/299625
Reviewed-by: Rong Chang <rongchang@chromium.org>