Alec Berg cb3e0ca786 stm32f05x: Use correct erase block size of 1kB ...

Change erase block size to the correct 1kB.

BUG=chrome-os-partner:41959
BRANCH=none
TEST=with following CL, test software sync to PD MCU on
glados.

Change-Id: I6252e6344e50f00249ab105a90febd15599c936f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/307042
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

2015-10-19 15:15:36 -07:00

..

g

Cr50: enable modificaton of flash bank 1

2015-10-17 08:18:46 -07:00

host

cleanup: Put chip-specific configs in config_chip.h

2015-09-21 10:04:35 -07:00

it83xx

nds32: fix panic

2015-10-07 17:51:36 -07:00

lm4

cleanup: Put chip-specific configs in config_chip.h

2015-09-21 10:04:35 -07:00

mec1322

mec1322: i2c: Simplify clk duty cycle calculations

2015-10-15 21:40:33 -07:00

npcx

nuc: Enable JTAG directly by NPCX_ENABLE_JTAG definition

2015-10-17 04:56:09 -07:00

nrf51

cleanup: Put chip-specific configs in config_chip.h

2015-09-21 10:04:35 -07:00

stm32

stm32f05x: Use correct erase block size of 1kB

2015-10-19 15:15:36 -07:00