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Following steps need to be followed for SCI/SMI generation: 1. If automatic mode is being used, set SCIE/SMIE bit in HIPMIE register during lpc_init. This step needs to be performed only once. 2. If SCI/SMI generation is required, set ST1/ST2 bit in HIPMST register during update_host_event_status. 3. In lpc_generate_sci/smi, if automatic mode is being used, set SCIB/SMIB bit in HIPMIC register. BUG=chrome-os-partner:55489 BRANCH=None TEST=lidclose behavior verified in kernel. Change-Id: Ib6e0ee32bc06a8c51297010ac4843a7de45a99bd Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/371059 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly