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91ca05cf3a
Ryu sensor hub has asymectric RO/RW images. The first one is very limited (not i2c master, no sensor drivers, gesture recognition). Image size is alter to offer more space for the RW firmware image, compiled with ryu_sh board. To write RO image and basic RW image: flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w /tmp/ryu_sh_loader/ec.bin To write the expected RW image: flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w -i EC_RW:/tmp/ryu_sh/ec.bin BRANCH=ToT BUG=chrome-os-partner:33908 CQ-DEPEND=CL:231970,CL:233233 TEST=load on Ryu, confirmed limited operation. Change-Id: Ib976e2b048935adfb9b2b072c071db5be2bc1c09 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/231984 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
81 lines
1.8 KiB
C
81 lines
1.8 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* ryu sensor board configuration */
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#ifndef __BOARD_H
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#define __BOARD_H
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* the UART console is on USART1 (PA9/PA10) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 1
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/*
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* The RO firmware image size is limited to 40K to
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* leave more space to the RW image.
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*/
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#undef CONFIG_FW_IMAGE_SIZE
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#define CONFIG_FW_IMAGE_SIZE (40*1024)
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#undef CONFIG_FW_INCLUDE_RO
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/* By default, enable all console messages */
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#define CC_DEFAULT CC_ALL
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/* Optional features */
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#undef CONFIG_EXTPOWER
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#undef CONFIG_HIBERNATE
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#define CONFIG_ACCELGYRO_LSM6DS0
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#define CONFIG_STM_HWTIMER32
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#define CONFIG_I2C
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#define CONFIG_BOARD_PRE_INIT
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#undef CONFIG_LID_SWITCH
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#undef CONFIG_CMD_POWER_AP
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#define CONFIG_POWER_COMMON
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#define CONFIG_CHIPSET_ECDRIVEN
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#define CONFIG_CMD_ACCELS
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#define CONFIG_CMD_ACCEL_INFO
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#define CONFIG_VBOOT_HASH
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#undef CONFIG_WATCHDOG_HELP
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/* I2C ports configuration */
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#define I2C_PORT_MASTER 1
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#define I2C_PORT_SLAVE 0
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#define I2C_PORT_EC I2C_PORT_SLAVE
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#define I2C_PORT_ACCEL I2C_PORT_MASTER
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#define I2C_PORT_COMPASS I2C_PORT_MASTER
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/* slave address for host commands */
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#ifdef HAS_TASK_HOSTCMD
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#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3e
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#endif
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/*
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* Write protect is active high, but given WP line is not implemented,
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* the memory is not write protected.
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*/
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#define CONFIG_WP_ACTIVE_HIGH
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 2
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#define TIM_ADC 3
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#include "gpio_signal.h"
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enum power_signal {
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ECDRIVEN_SUSPEND_ASSERTED,
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/* Number of power signals */
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POWER_SIGNAL_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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#endif /* __BOARD_H */
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