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d64de2bb1b903214ce19951918910a9f9ff10abf
The smart battery status register holds some useful info. This displays it along with all the other stuff. This decodes the alarm and status bits, but not the error code, since that field is only valid immediately after a failed i2c transaction (that's how the battery indicates error). Since we do all sorts of automatic battery probing in other threads, that value will never be reliable when we run the "battery" console command. BUG=none BRANCH=none TEST=manual Run "battery". You should see a new line amongst the output: Status: 0x00c0 DCHG INIT Change-Id: I5e684198af2cf7767f89786c91a7d946ad95d4c2 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175659
In the most general case, the flash layout looks something like this: +---------------------+ | Reserved for EC use | +---------------------+ +---------------------+ | Vblock B | +---------------------+ | RW firmware B | +---------------------+ +---------------------+ | Vblock A | +---------------------+ | RW firmware A | +---------------------+ +---------------------+ | FMAP | +---------------------+ | Public root key | +---------------------+ | Read-only firmware | +---------------------+ BIOS firmware (and kernel) put the vblock info at the start of each image where it's easy to find. The Blizzard EC expects the firmware vector table to come first, so we have to put the vblock at the end. This means we have to know where to look for it, but that's built into the FMAP and the RO firmware anyway, so that's not an issue. The RO firmware doesn't need a vblock of course, but it does need some reserved space for vboot-related things. Using SHA256/RSA4096, the vblock is 2468 bytes (0x9a4), while the public root key is 1064 bytes (0x428) and the current FMAP is 644 bytes (0x284). If we reserve 4K at the top of each FW image, that should give us plenty of room for vboot-related stuff.
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