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To avoid FIFO errors - the fifo becomes full will we wait for the AP to read the vectors, increase the i2c speed between EC and AP. Target 1Mhz, 400KHz observed due to a limitation of the Tegra I2C controller. BRANCH=smaug TEST=Verify with analyzer that speed is now 400KHz. The duty cycle is still not right. Check that FIFO underrun do not happen during tests. BUG=chrome-os-partner:40280,chrome-os-partner:39233,chrome-os-partner:39900 Change-Id: Id6c2dfb10c34a919ec99a58bc0082207f7748b7e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/284613 Reviewed-by: Alec Berg <alecaberg@chromium.org>