Files
OpenCellular/common/firmware_image.lds.S
Rong Chang 9ca4586129 common: Add support for flash with regions of different size
Add support to handle devices with flash regions of different sizes.

BRANCH=none
TEST=compile
BUG=b:38018926

Change-Id: I8f842abaa50de724df60dd7e19f9e97cb9660367
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/264031
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
2017-06-02 16:59:36 -07:00

76 lines
2.3 KiB
ArmAsm

/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "config.h"
#include "rwsig.h"
OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
OUTPUT_ARCH(BFD_ARCH)
MEMORY
{
FLASH (rx) : ORIGIN = CONFIG_PROGRAM_MEMORY_BASE, LENGTH = CONFIG_FLASH_SIZE
}
SECTIONS
{
#if defined(NPCX_RO_HEADER)
/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header
* or some struture which doesn't belong to FW */
.image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_PROTECTED_STORAGE_OFF\
) {
#else
.image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) {
#endif
*(.image.RO)
} > FLASH =0xff
#ifdef CONFIG_RWSIG_TYPE_RWSIG
.image.RO.key : AT(CONFIG_RO_PUBKEY_ADDR) {
*(.image.RO.key)
} > FLASH =0xff
#endif
#ifdef CONFIG_ROLLBACK
.image.ROLLBACK : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_ROLLBACK_OFF) {
*(.image.ROLLBACK)
} > FLASH =0xff
#endif
#ifdef CONFIG_SHAREDLIB
.image.libsharedobjs : AT(CONFIG_PROGRAM_MEMORY_BASE + \
CONFIG_SHAREDLIB_MEM_OFF) {
*(.image.libsharedobjs)
} > FLASH =0xff
#endif
#if defined(NPCX_RO_HEADER)
/* npcx uses *STORAGE_OFF to plan the layout of flash image */
.image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_WRITABLE_STORAGE_OFF \
+ CONFIG_RW_STORAGE_OFF) {
#elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF)
/* This is applicable to ECs in which RO and RW execution is
mapped to the same location but we still have to generate an ec.bin with RO
and RW images at different Flash offset */
.image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF + \
CONFIG_RO_SIZE) {
#else
.image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF) {
#endif
*(.image.RW)
} > FLASH =0xff
#ifdef CONFIG_RWSIG_TYPE_RWSIG
.image.RW.sign : AT(CONFIG_RW_SIG_ADDR) {
*(.image.RW.sign)
} > FLASH =0xff
#endif
#ifdef CONFIG_RW_B_MEM_OFF
.image.RW_B : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_B_MEM_OFF) {
*(.image.RW_B)
} > FLASH =0xff
#endif
.padding : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_SIZE - 1) {
BYTE(0xff);
} > FLASH =0xff
}