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During the resume sequence of S0ix EC can receive host commands early in the resume path when LPC is still disabled in EC. Host messages will be lost if the LPC interface with the kernel is down. Clock control was programed to 2 which means ring oscillator is shut down after completion of everty LPC transaction.To restart the oscillator EC should enable a wake interrupt on LPC LFRAME number and this mode can cause an increase in the time to respond to the LPC transactions. Keeping LPC always on shows minimal power impact as per datasheet Pg.390. The impact is < 0.45mW. BUG=chrome-os-partner:50627 TEST=Enter into S0ix and exit reliably. BRANCH=firmware-glados-7820.B Change-Id: I670b9b45c3a85c9bca249312a73a25dca52b313a Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/332333 Reviewed-by: Shobhit Srivastava <shobhit.srivastava@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org> (cherry picked from commit c03fd6e0eaa6ecd3205214f901facb9896a798b4) Reviewed-on: https://chromium-review.googlesource.com/332791
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly