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Randall Spangler e42cd379de Print repeated port 80 writes, for coreboot/uboot debugging

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7972
TEST=boot main processor; look for repeated sequential port 80 writes

Change-Id: I07b247130945296ce73177a342e0b2cf5645f4fb

2012-02-09 11:00:11 -08:00

board

Print repeated port 80 writes, for coreboot/uboot debugging

2012-02-09 11:00:11 -08:00

chip

stm32l: use USART1 as console

2012-02-08 17:03:30 -08:00

common

Print repeated port 80 writes, for coreboot/uboot debugging

2012-02-09 11:00:11 -08:00

core/cortex-m

Remove useless header includes

2012-01-26 01:32:30 +00:00

include

Merge "Add tmp006 object temperature calculation"

2012-02-08 17:59:11 -08:00

test

fix test compilation for STM32L

2012-02-02 22:02:06 +00:00

util

stm32l: add a tool to flash the SoC using the serial monitor

2012-02-06 20:05:33 +00:00

.gitignore

Initial sources import 3/3

2011-12-07 19:10:02 +00:00

Makefile

Add board configuration flags in board.h

2012-02-06 14:45:20 -08:00

Makefile.rules

Honor V=1 build flag when building tests recursively

2012-02-02 22:02:18 +00:00

Makefile.toolchain

Move OS files to a CPU specific directory

2012-01-25 22:50:07 +00:00

PRESUBMIT.cfg

fix pre-submit hook

2011-12-08 19:18:06 +00:00

README

Initial commit

2011-10-20 15:15:01 +08:00

README

- EC Lib

This wraps Blizzard driverlib and implements the EC chip interface defined
by Google. See below diagram for architecture.


  +--------------------+
  |   Host BIOS/OS     |
  +--------------------+

 ---- host interface ----

  +--------------------+
  | Google EC features |
  +--------------------+

 ---- chip interface ----  The interface is defined in
                           src/platform/ec/chip_interface/*.
  +--------------------+   But the real implementation is in EC Lib.
  |       EC Lib       |
  +--------------------+
  | Blizzard low level |
  |   driver, the      |
  |   driverlib.       |
  +--------------------+

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