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The check for hard reset complete was missing. Because of this, the USB PD protocol state machine would get stuck in state 36 PD_STATE_HARD_RESET_SEND waiting for the pd_task to be woken following the tx_complete. Instead it would always trip the 100 msec timeout. BRANCH=none BUG=chrome-os-partner:58738 TEST=manual Without this CL, connect to a Guppy TypeC charger and observe: > C0 st3 [101.946607 event set 0x00200000] C0 st15 C0 st3 C0 st6 C0 st36 [102.466846 New chg p0] [102.470376 Ramp reset: st1] [102.470905 CL: p0 s2 i2000 v5000] [103.543623 AC on] After adding the fix for checking hard reset done: > C0 st3 [32.880946 event set 0x00200000] C0 st15 C0 st3 C0 st6 C0 st36 [33.410038 New chg p0] C0 st37 [33.415641 Ramp reset: st1] [33.416160 CL: p0 s2 i2000 v5000] C0 HARD RST TX C0 st5 C0 st36 C0 st37 C0 HARD RST TX C0 st5 [34.489611 AC on] [34.489965 event set 0x00000008] [34.520457 event set 0x00400000] [34.520876 charge_request(8688mV, 4608mA)] C0 st6 [35.419391 Ramp p0 st2 500mA 0mA] Change-Id: I6822983002fa387c85f7e55af5fe1e142c7b88e2 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404878 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly