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5b1c4868d7
The original ec_npcxspiflash lfw is used by the openocd to program SPI flash via Servo JTAG. In order to support UUT mode to program SPI flash, this CL modified the lfw with the following changes: 1. Rename the lfw ec_npcxflash to npcx_monitor to unify the naming. 2. The npcx_monitor will read the first 4 bytes from the area of monitor header. If the monitor identifies the first 4 bytes is a UUT tag, it will read parameters(SPI_OFFSET/IMAGE_SIZE) from the relative offset of monitor header. Otherwise, it will read parameter from the general register r0/r1 which will be restored by openocd script in advance. 3. Add monitor_hdr.c to generate the monitor header binary files (monitor_hdr_ro.bin/monitor_hdr_rw.bin)) automatically after compiled. The memory layout to restore the reuqired binaries are listed below: ec firmware(RO/RW) - the start address of Code RAM area. monitor header - 0x200C3000 npcx_monitor - 0x200C3020 BRANCH=none BUG=none TEST=No build errors for "make buildall". TEST=Follow instructions in CL:826763; make sure the ec firmware is updated and ec can boot up. CQ-DEPEND=CL:828341 Change-Id: I5de997a4dee5449d578972e2f929c6e08c5dff67 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/826909 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>