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725bef1b3b
This code is a port of the sample loader application included in the
FPGA update. Only the pieces relevant to straight verification and
boot were ported.
The loader generates a hash, inputs to which are the image body, state
of fuses and state of flash INFO region, and the output is the value,
which will unlock the region for execution, if it is correct.
Only one image load is attempted, the image is supposed to be located
in the flash at the offset of CONFIG_RW_MEM_OFF.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=with the rest of the patches applied the RO image successfully
verifies and starts up the RW image.
Change-Id: I26e1fbdaeb8b23d519c1a328526a3422231bb322
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311316
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "debug_printf.h"
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#include "link_defs.h"
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#include "registers.h"
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#include "setup.h"
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/* Is there a system wide function for this? */
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void halt(void)
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{
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while (1)
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;
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}
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void checkBuildVersion(void)
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{
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uint32_t last_sync = GREG32(SWDP, P4_LAST_SYNC);
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if (last_sync == GC_SWDP_P4_LAST_SYNC_DEFAULT)
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return;
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debug_printf("compiled for %u, not willing to run on %u\n",
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GC_SWDP_P4_LAST_SYNC_DEFAULT, last_sync);
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halt();
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}
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void unlockFlashForRW(void)
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{
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uint32_t text_end = ((uint32_t)(&__ro_end) +
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(uint32_t)(&__data_end) -
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(uint32_t)(&__data_start) +
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CONFIG_FLASH_BANK_SIZE)
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& ~(CONFIG_FLASH_BANK_SIZE - 1);
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GREG32(GLOBALSEC, FLASH_REGION1_BASE_ADDR) = text_end;
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GREG32(GLOBALSEC, FLASH_REGION1_SIZE) =
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CONFIG_FLASH_SIZE - text_end - 1;
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GWRITE_FIELD(GLOBALSEC, FLASH_REGION1_CTRL, EN, 1);
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GWRITE_FIELD(GLOBALSEC, FLASH_REGION1_CTRL, RD_EN, 1);
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GWRITE_FIELD(GLOBALSEC, FLASH_REGION1_CTRL, WR_EN, 0);
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}
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void disarmRAMGuards(void)
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{
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GWRITE_FIELD(GLOBALSEC, CPU0_D_REGION0_CTRL, EN, 1);
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GWRITE_FIELD(GLOBALSEC, CPU0_D_REGION0_CTRL, RD_EN, 1);
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GWRITE_FIELD(GLOBALSEC, CPU0_D_REGION0_CTRL, WR_EN, 1);
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GWRITE_FIELD(GLOBALSEC, CPU0_D_REGION1_CTRL, EN, 1);
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GWRITE_FIELD(GLOBALSEC, CPU0_D_REGION1_CTRL, RD_EN, 1);
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GWRITE_FIELD(GLOBALSEC, CPU0_D_REGION1_CTRL, WR_EN, 1);
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}
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