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ONLPv2 Support.

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This commit is contained in:
Jeffrey Townsend
2018-08-07 20:25:06 +00:00
parent 1706289eeb
commit 05fc140490
5 changed files with 58 additions and 140 deletions
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1
packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/onlp/builds/lib/Makefile
View File

@@ -21,6 +21,5 @@
#
#
############################################################
ARCH := amd64
PLATFORM := x86-64-accton-as7712-32x
include $(ONL)/packages/base/any/onlp/builds/platform/libonlp-platform.mk

82
packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/onlp/builds/src/module/src/attributei.c
View File

@@ -5,68 +5,40 @@
#include "platform_lib.h"
int
onlp_attributei_supported(onlp_oid_t id, const char* attribute)
onlp_attributei_onie_info_get(onlp_oid_t oid, onlp_onie_info_t* rp)
{
if(!strcmp(attribute, ONLP_ATTRIBUTE_ONIE_INFO) ||
!strcmp(attribute, ONLP_ATTRIBUTE_ASSET_INFO)) {
if(oid != ONLP_OID_CHASSIS) {
return ONLP_STATUS_E_UNSUPPORTED;
}
if(rp == NULL) {
return 1;
}
return 0;
return onlp_onie_decode_file(rp, IDPROM_PATH);
}
int
onlp_attributei_get(onlp_oid_t id, const char* attribute,
void** value)
onlp_attributei_asset_info_get(onlp_oid_t oid, onlp_asset_info_t* rp)
{
if(oid != ONLP_OID_CHASSIS) {
return ONLP_STATUS_E_UNSUPPORTED;
}
if(rp == NULL) {
return 1;
}
int rv;
if(!strcmp(attribute, ONLP_ATTRIBUTE_ONIE_INFO)) {
onlp_onie_info_t* oip = aim_zmalloc(sizeof(*oip));
if(ONLP_SUCCESS(rv = onlp_onie_decode_file(oip, IDPROM_PATH))) {
*value = oip;
}
else {
aim_free(oip);
}
return rv;
int v[3] = {0};
rp->oid = oid;
if(ONLP_SUCCESS(rv = onlp_file_read_int(v, "/sys/bus/i2c/devices/4-0060/version")) &&
ONLP_SUCCESS(rv = onlp_file_read_int(v+1, "/sys/bus/i2c/devices/5-0062/version")) &&
ONLP_SUCCESS(rv = onlp_file_read_int(v+2, "/sys/bus/i2c/devices/6-0064/version"))) {
rp->firmware_revision =
aim_fstrdup("%d.%d.%d", v[0], v[1], v[2]);
}
if(!strcmp(attribute, ONLP_ATTRIBUTE_ASSET_INFO)) {
onlp_asset_info_t* aip = aim_zmalloc(sizeof(*aip));
aip->oid = id;
int v[3] = {0};
if(ONLP_SUCCESS(rv = onlp_file_read_int(v, "/sys/bus/i2c/devices/4-0060/version")) &&
ONLP_SUCCESS(rv = onlp_file_read_int(v+1, "/sys/bus/i2c/devices/5-0062/version")) &&
ONLP_SUCCESS(rv = onlp_file_read_int(v+2, "/sys/bus/i2c/devices/6-0064/version"))) {
aip->firmware_revision =
aim_fstrdup("%d.%d.%d", v[0], v[1], v[2]);
*value = aip;
}
else {
aim_free(aip);
}
return rv;
}
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_attributei_free(onlp_oid_t id, const char* attribute, void* value)
{
if(!strcmp(attribute, ONLP_ATTRIBUTE_ONIE_INFO)) {
onlp_onie_info_free(value);
aim_free(value);
return 0;
}
if(!strcmp(attribute, ONLP_ATTRIBUTE_ASSET_INFO)) {
onlp_asset_info_free(value);
aim_free(value);
return 0;
}
return ONLP_STATUS_E_UNSUPPORTED;
return rv;
}

8
packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/onlp/builds/src/module/src/chassisi.c
View File

@@ -2,13 +2,11 @@
#include "platform_lib.h"
int
onlp_chassisi_hdr_get(onlp_oid_t oid, onlp_oid_hdr_t* hdr)
onlp_chassisi_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* hdr)
{
int i;
onlp_oid_t* e = hdr->coids;
hdr->id = oid;
ONLP_OID_STATUS_FLAG_SET(hdr, PRESENT);
ONLP_OID_STATUS_FLAG_SET(hdr, OPERATIONAL);
@@ -44,7 +42,7 @@ onlp_chassisi_hdr_get(onlp_oid_t oid, onlp_oid_hdr_t* hdr)
}
int
onlp_chassisi_info_get(onlp_oid_t oid, onlp_chassis_info_t* info)
onlp_chassisi_info_get(onlp_oid_id_t id, onlp_chassis_info_t* info)
{
return onlp_chassisi_hdr_get(oid, &info->hdr);
return onlp_chassisi_hdr_get(id, &info->hdr);
}

25
packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/onlp/builds/src/module/src/sfpi.c
View File

@@ -28,11 +28,12 @@
#define MUX_START_INDEX 18
#define NUM_OF_SFP_PORT 32
static const int port_bus_index[NUM_OF_SFP_PORT] = {
4, 5, 6, 7, 9, 8, 11, 10,
0, 1, 2, 3, 12, 13, 14, 15,
16, 17, 18, 19, 28, 29, 30, 31,
20, 21, 22, 23, 24, 25, 26, 27
static const onlp_oid_id_t port_bus_index[NUM_OF_SFP_PORT] = {
4, 5, 6, 7, 9, 8, 11, 10,
0, 1, 2, 3, 12, 13, 14, 15,
16, 17, 18, 19, 28, 29, 30, 31,
20, 21, 22, 23, 24, 25, 26, 27
};
#define PORT_BUS_INDEX(port) (port_bus_index[port]+MUX_START_INDEX)
@@ -42,7 +43,7 @@ static const int port_bus_index[NUM_OF_SFP_PORT] = {
#define MODULE_PRESENT_ALL_ATTR "/sys/bus/i2c/devices/4-0060/module_present_all"
int
onlp_sfpi_type_get(int port, onlp_sfp_type_t* rtype)
onlp_sfpi_type_get(onlp_oid_id_t port, onlp_sfp_type_t* rtype)
{
*rtype = ONLP_SFP_TYPE_QSFP28;
return 0;
@@ -65,7 +66,7 @@ onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
}
int
onlp_sfpi_is_present(int port)
onlp_sfpi_is_present(onlp_oid_id_t port)
{
/*
* Return 1 if present.
@@ -125,7 +126,7 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
}
int
onlp_sfpi_dev_read(int port, int devaddr, int addr,
onlp_sfpi_dev_read(onlp_oid_id_t port, int devaddr, int addr,
uint8_t* dst, int size)
{
int bus = PORT_BUS_INDEX(port);
@@ -133,28 +134,28 @@ onlp_sfpi_dev_read(int port, int devaddr, int addr,
}
int
onlp_sfpi_dev_readb(int port, int devaddr, int addr)
onlp_sfpi_dev_readb(onlp_oid_id_t port, int devaddr, int addr)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writeb(int port, int devaddr, int addr, uint8_t value)
onlp_sfpi_dev_writeb(onlp_oid_id_t port, int devaddr, int addr, uint8_t value)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_readw(int port, int devaddr, int addr)
onlp_sfpi_dev_readw(onlp_oid_id_t port, int devaddr, int addr)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writew(int port, int devaddr, int addr, uint16_t value)
onlp_sfpi_dev_writew(onlp_oid_id_t port, int devaddr, int addr, uint16_t value)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);

82
packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/onlp/builds/src/module/src/thermali.c
View File

@@ -26,13 +26,6 @@
#include <onlp/platformi/base.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
enum onlp_thermal_id
{
THERMAL_RESERVED = 0,
@@ -67,70 +60,25 @@ static char* cpu_coretemp_files[] =
};
/* Static values */
static onlp_thermal_info_t linfo[] = {
static onlp_thermal_info_t thermal_info_table__[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", ONLP_OID_CHASSIS,
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BOARD), "Chassis Thermal Sensor 1", ONLP_OID_CHASSIS,
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BOARD), "Chassis Thermal Sensor 2", ONLP_OID_CHASSIS,
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BOARD), "Chassis Thermal Sensor 3", ONLP_OID_CHASSIS,
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BOARD), "Chassis Thermal Sensor 4", ONLP_OID_CHASSIS,
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU1), "PSU-1 Thermal Sensor 1", ONLP_PSU_ID_CREATE(PSU1_ID),
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU2), "PSU-2 Thermal Sensor 1", ONLP_PSU_ID_CREATE(PSU2_ID),
.status = ONLP_OID_STATUS_FLAG_PRESENT },
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
}
ONLP_CHASSIS_THERMAL_INFO_ENTRY_INIT(THERMAL_CPU_CORE, "CPU Core"),
ONLP_CHASSIS_THERMAL_INFO_ENTRY_INIT(THERMAL_1_ON_MAIN_BOARD, "Chassis Thermal Sensor 1"),
ONLP_CHASSIS_THERMAL_INFO_ENTRY_INIT(THERMAL_2_ON_MAIN_BOARD, "Chassis Thermal Sensor 2"),
ONLP_CHASSIS_THERMAL_INFO_ENTRY_INIT(THERMAL_3_ON_MAIN_BOARD, "Chassis Thermal Sensor 3"),
ONLP_CHASSIS_THERMAL_INFO_ENTRY_INIT(THERMAL_4_ON_MAIN_BOARD, "Chassis Thermal Sensor 4"),
ONLP_PSU_THERMAL_INFO_ENTRY_INIT(THERMAL_1_ON_PSU1, "PSU-1 Thermal Sensor 1", PSU1_ID),
ONLP_PSU_THERMAL_INFO_ENTRY_INIT(THERMAL_1_ON_PSU2, "PSU-2 Thermal Sensor 1", PSU2_ID),
};
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
onlp_thermali_info_get(onlp_oid_id_t id, onlp_thermal_info_t* info)
{
int local_id;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[local_id];
if(local_id == THERMAL_CPU_CORE) {
int rv = onlp_file_read_int_max(&info->mcelsius, cpu_coretemp_files);
return rv;
ONLP_OID_INFO_ASSIGN(id, thermal_info_table__, info);
if(id == THERMAL_CPU_CORE) {
return onlp_file_read_int_max(&info->mcelsius, cpu_coretemp_files);
}
else {
return onlp_file_read_int(&info->mcelsius, devfiles__[id]);
}
return onlp_file_read_int(&info->mcelsius, devfiles__[local_id]);
}