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Merge branch 'master' of github.com:opencomputeproject/OpenNetworkLinux

Browse Source
This commit is contained in:
Carl D. Roth
2018-02-28 17:51:58 -08:00
parent 55615155b3 867ac4152f
commit 11f4db412a
165 changed files with 11534 additions and 9929 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
builds/any/installer/installer.sh.in
View File

@@ -578,7 +578,7 @@ if test -f "$postinst"; then
fi
installer_unzip $installer_zip postinstall.sh || :
if test -f preinstall.sh; then
if test -f postinstall.sh; then
chmod +x postinstall.sh
./postinstall.sh $rootdir
fi

1
builds/any/rootfs/jessie/common/amd64-base-packages.yml
View File

@@ -11,5 +11,6 @@
- hw-management
- sx-kernel
- onl-kernel-3.16-lts-x86-64-all-modules
- onl-kernel-4.9-lts-x86-64-all-modules
- efibootmgr
- gdisk

4
packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config
View File

@@ -2450,7 +2450,7 @@ CONFIG_HID_GENERIC=y
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CP2112 is not set
CONFIG_HID_CP2112=y
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
@@ -2561,7 +2561,7 @@ CONFIG_USB_UHCI_HCD=y
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
CONFIG_USB_ACM=y
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set

196
packages/base/any/kernels/3.16-lts/patches/driver-hid-cp2112-mods.patch Normal file
View File

@@ -0,0 +1,196 @@
diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
index bc37acd..fee4c66 100644
--- a/drivers/hid/hid-cp2112.c
+++ b/drivers/hid/hid-cp2112.c
@@ -156,6 +156,7 @@ struct cp2112_device {
wait_queue_head_t wait;
u8 read_data[61];
u8 read_length;
+ u8 hwversion;
int xfer_status;
atomic_t read_avail;
atomic_t xfer_avail;
@@ -427,6 +428,156 @@ static int cp2112_write_req(void *buf, u8 slave_address, u8 command, u8 *data,
return data_length + 4;
}
+static int cp2112_i2c_write_req(void *buf, u8 slave_address, u8 *data,
+ u8 data_length)
+{
+ struct cp2112_write_req_report *report = buf;
+
+ if (data_length > sizeof(report->data))
+ return -EINVAL;
+
+ report->report = CP2112_DATA_WRITE_REQUEST;
+ report->slave_address = slave_address << 1;
+ report->length = data_length;
+ memcpy(report->data, data, data_length);
+ return data_length + 3;
+}
+
+static int cp2112_i2c_write_read_req(void *buf, u8 slave_address,
+ u8 *addr, int addr_length,
+ int read_length)
+{
+ struct cp2112_write_read_req_report *report = buf;
+
+ if (read_length < 1 || read_length > 512 ||
+ addr_length > sizeof(report->target_address))
+ return -EINVAL;
+
+ report->report = CP2112_DATA_WRITE_READ_REQUEST;
+ report->slave_address = slave_address << 1;
+ report->length = cpu_to_be16(read_length);
+ report->target_address_length = addr_length;
+ memcpy(report->target_address, addr, addr_length);
+ return addr_length + 5;
+}
+
+static int cp2112_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
+{
+ struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
+ struct hid_device *hdev = dev->hdev;
+ u8 buf[64];
+ ssize_t count;
+ ssize_t read_length = 0;
+ u8 *read_buf = NULL;
+ unsigned int retries;
+ int ret;
+
+ hid_dbg(hdev, "I2C %d messages\n", num);
+
+ if (num == 1) {
+ if (msgs->flags & I2C_M_RD) {
+ hid_dbg(hdev, "I2C read %#04x len %d\n",
+ msgs->addr, msgs->len);
+ read_length = msgs->len;
+ read_buf = msgs->buf;
+ count = cp2112_read_req(buf, msgs->addr, msgs->len);
+ } else {
+ hid_dbg(hdev, "I2C write %#04x len %d\n",
+ msgs->addr, msgs->len);
+ count = cp2112_i2c_write_req(buf, msgs->addr,
+ msgs->buf, msgs->len);
+ }
+ if (count < 0)
+ return count;
+ } else if (dev->hwversion > 1 && /* no repeated start in rev 1 */
+ num == 2 &&
+ msgs[0].addr == msgs[1].addr &&
+ !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
+ hid_dbg(hdev, "I2C write-read %#04x wlen %d rlen %d\n",
+ msgs[0].addr, msgs[0].len, msgs[1].len);
+ read_length = msgs[1].len;
+ read_buf = msgs[1].buf;
+ count = cp2112_i2c_write_read_req(buf, msgs[0].addr,
+ msgs[0].buf, msgs[0].len, msgs[1].len);
+ if (count < 0)
+ return count;
+ } else {
+ hid_err(hdev,
+ "Multi-message I2C transactions not supported\n");
+ return -EOPNOTSUPP;
+ }
+
+ ret = hid_hw_power(hdev, PM_HINT_FULLON);
+ if (ret < 0) {
+ hid_err(hdev, "power management error: %d\n", ret);
+ return ret;
+ }
+
+ ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
+ if (ret < 0) {
+ hid_warn(hdev, "Error starting transaction: %d\n", ret);
+ goto power_normal;
+ }
+
+ for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
+ ret = cp2112_xfer_status(dev);
+ if (-EBUSY == ret)
+ continue;
+ if (ret < 0)
+ goto power_normal;
+ break;
+ }
+
+ if (XFER_STATUS_RETRIES <= retries) {
+ hid_warn(hdev, "Transfer timed out, cancelling.\n");
+ buf[0] = CP2112_CANCEL_TRANSFER;
+ buf[1] = 0x01;
+
+ ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
+ if (ret < 0)
+ hid_warn(hdev, "Error cancelling transaction: %d\n",
+ ret);
+
+ ret = -ETIMEDOUT;
+ goto power_normal;
+ }
+
+ for (count = 0; count < read_length;) {
+ ret = cp2112_read(dev, read_buf + count, read_length - count);
+ if (ret < 0)
+ goto power_normal;
+ if (ret == 0) {
+ hid_err(hdev, "read returned 0\n");
+ ret = -EIO;
+ goto power_normal;
+ }
+ count += ret;
+ if (count > read_length) {
+ /*
+ * The hardware returned too much data.
+ * This is mostly harmless because cp2112_read()
+ * has a limit check so didn't overrun our
+ * buffer. Nevertheless, we return an error
+ * because something is seriously wrong and
+ * it shouldn't go unnoticed.
+ */
+ hid_err(hdev, "long read: %d > %zd\n",
+ ret, read_length - count + ret);
+ ret = -EIO;
+ goto power_normal;
+ }
+ }
+
+ /* return the number of transferred messages */
+ ret = num;
+
+power_normal:
+ hid_hw_power(hdev, PM_HINT_NORMAL);
+ hid_dbg(hdev, "I2C transfer finished: %d\n", ret);
+ return ret;
+}
+
static int cp2112_xfer(struct i2c_adapter *adap, u16 addr,
unsigned short flags, char read_write, u8 command,
int size, union i2c_smbus_data *data)
@@ -593,7 +744,8 @@ power_normal:
static u32 cp2112_functionality(struct i2c_adapter *adap)
{
- return I2C_FUNC_SMBUS_BYTE |
+ return I2C_FUNC_I2C |
+ I2C_FUNC_SMBUS_BYTE |
I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA |
I2C_FUNC_SMBUS_BLOCK_DATA |
@@ -603,6 +755,7 @@ static u32 cp2112_functionality(struct i2c_adapter *adap)
}
static const struct i2c_algorithm smbus_algorithm = {
+ .master_xfer = cp2112_i2c_xfer,
.smbus_xfer = cp2112_xfer,
.functionality = cp2112_functionality,
};
@@ -925,6 +1078,7 @@ static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id)
dev->adap.dev.parent = &hdev->dev;
snprintf(dev->adap.name, sizeof(dev->adap.name),
"CP2112 SMBus Bridge on hiddev%d", hdev->minor);
+ dev->hwversion = buf[2];
init_waitqueue_head(&dev->wait);
hid_device_io_start(hdev);

1
packages/base/any/kernels/3.16-lts/patches/series
View File

@@ -26,4 +26,5 @@ platform-powerpc-dni-7448-r0.patch
platform-powerpc-quanta-lb9-r0.patch
driver-support-intel-igb-bcm50210-phy.patch
driver-igb-netberg-aurora.patch
driver-hid-cp2112-mods.patch
gcc-no-pie.patch

142
packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config
View File

@@ -794,7 +794,7 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
CONFIG_NET_IPIP=y
# CONFIG_NET_IPGRE_DEMUX is not set
CONFIG_NET_IP_TUNNEL=y
CONFIG_IP_MROUTE=y
@@ -844,7 +844,7 @@ CONFIG_INET6_ESP=y
# CONFIG_IPV6_MIP6 is not set
# CONFIG_IPV6_ILA is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_TUNNEL=y
CONFIG_INET6_XFRM_MODE_TRANSPORT=y
CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
@@ -853,10 +853,11 @@ CONFIG_INET6_XFRM_MODE_BEET=y
CONFIG_IPV6_SIT=y
# CONFIG_IPV6_SIT_6RD is not set
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
CONFIG_IPV6_TUNNEL=y
# CONFIG_IPV6_FOU is not set
# CONFIG_IPV6_FOU_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
CONFIG_IPV6_MULTIPLE_TABLES=y
# CONFIG_IPV6_SUBTREES is not set
# CONFIG_IPV6_MROUTE is not set
CONFIG_NETLABEL=y
CONFIG_NETWORK_SECMARK=y
@@ -1111,6 +1112,7 @@ CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
CONFIG_RFKILL=y
CONFIG_RFKILL_LEDS=y
CONFIG_RFKILL_INPUT=y
# CONFIG_RFKILL_GPIO is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
@@ -1221,9 +1223,9 @@ CONFIG_VIRTIO_BLK=y
#
# EEPROM support
#
CONFIG_EEPROM_AT24=m
# CONFIG_EEPROM_AT25 is not set
# CONFIG_EEPROM_LEGACY is not set
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_EEPROM_LEGACY=y
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_EEPROM_93XX46 is not set
@@ -1232,6 +1234,7 @@ CONFIG_EEPROM_AT24=m
#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
# CONFIG_SENSORS_LIS3_I2C is not set
#
@@ -1471,9 +1474,9 @@ CONFIG_NET_CORE=y
CONFIG_NETCONSOLE=y
CONFIG_NETPOLL=y
CONFIG_NET_POLL_CONTROLLER=y
# CONFIG_TUN is not set
CONFIG_TUN=y
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
CONFIG_VETH=y
CONFIG_VIRTIO_NET=y
# CONFIG_NLMON is not set
# CONFIG_ARCNET is not set
@@ -1854,8 +1857,11 @@ CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_GPIO_POLLED is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
@@ -1886,6 +1892,7 @@ CONFIG_MOUSE_PS2_FOCALTECH=y
# CONFIG_MOUSE_CYAPA is not set
# CONFIG_MOUSE_ELAN_I2C is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MOUSE_GPIO is not set
# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_MOUSE_SYNAPTICS_USB is not set
CONFIG_INPUT_JOYSTICK=y
@@ -1925,7 +1932,9 @@ CONFIG_TOUCHSCREEN_PROPERTIES=y
# CONFIG_TOUCHSCREEN_AD7877 is not set
# CONFIG_TOUCHSCREEN_AD7879 is not set
# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
# CONFIG_TOUCHSCREEN_BU21013 is not set
# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
@@ -1933,6 +1942,7 @@ CONFIG_TOUCHSCREEN_PROPERTIES=y
# CONFIG_TOUCHSCREEN_EETI is not set
# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_ILI210X is not set
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_EKTF2127 is not set
@@ -1959,10 +1969,14 @@ CONFIG_TOUCHSCREEN_PROPERTIES=y
# CONFIG_TOUCHSCREEN_TSC2004 is not set
# CONFIG_TOUCHSCREEN_TSC2005 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
# CONFIG_TOUCHSCREEN_RM_TS is not set
# CONFIG_TOUCHSCREEN_SILEAD is not set
# CONFIG_TOUCHSCREEN_SIS_I2C is not set
# CONFIG_TOUCHSCREEN_ST1232 is not set
# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
# CONFIG_TOUCHSCREEN_SX8654 is not set
# CONFIG_TOUCHSCREEN_TPS6507X is not set
# CONFIG_TOUCHSCREEN_ZFORCE is not set
# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_AD714X is not set
@@ -1972,6 +1986,10 @@ CONFIG_INPUT_MISC=y
# CONFIG_INPUT_MMA8450 is not set
# CONFIG_INPUT_MPU3050 is not set
# CONFIG_INPUT_APANEL is not set
# CONFIG_INPUT_GP2A is not set
# CONFIG_INPUT_GPIO_BEEPER is not set
# CONFIG_INPUT_GPIO_TILT_POLLED is not set
# CONFIG_INPUT_GPIO_DECODER is not set
# CONFIG_INPUT_ATLAS_BTNS is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
@@ -1981,10 +1999,12 @@ CONFIG_INPUT_MISC=y
# CONFIG_INPUT_CM109 is not set
# CONFIG_INPUT_UINPUT is not set
# CONFIG_INPUT_PCF8574 is not set
# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
# CONFIG_INPUT_ADXL34X is not set
# CONFIG_INPUT_IMS_PCU is not set
# CONFIG_INPUT_CMA3000 is not set
# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set
# CONFIG_INPUT_DRV260X_HAPTICS is not set
# CONFIG_INPUT_DRV2665_HAPTICS is not set
# CONFIG_INPUT_DRV2667_HAPTICS is not set
# CONFIG_RMI4_CORE is not set
@@ -2073,6 +2093,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_IFX6X60 is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
@@ -2126,7 +2147,9 @@ CONFIG_I2C_MUX=y
#
# Multiplexer I2C Chip support
#
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_GPIO is not set
CONFIG_I2C_MUX_PCA9541=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_REG=y
CONFIG_I2C_MUX_MLXCPLD=y
CONFIG_I2C_HELPER_AUTO=y
@@ -2164,7 +2187,9 @@ CONFIG_I2C_ISMT=y
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_CBUS_GPIO is not set
# CONFIG_I2C_DESIGNWARE_PCI is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_PXA_PCI is not set
@@ -2201,6 +2226,8 @@ CONFIG_SPI_MASTER=y
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_CADENCE is not set
# CONFIG_SPI_DESIGNWARE is not set
# CONFIG_SPI_GPIO is not set
# CONFIG_SPI_OC_TINY is not set
# CONFIG_SPI_PXA2XX is not set
# CONFIG_SPI_PXA2XX_PCI is not set
# CONFIG_SPI_ROCKCHIP is not set
@@ -2243,7 +2270,69 @@ CONFIG_PTP_1588_CLOCK=y
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
# CONFIG_GPIOLIB is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_ACPI=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
#
# Memory mapped GPIO drivers
#
# CONFIG_GPIO_AMDPT is not set
# CONFIG_GPIO_DWAPB is not set
# CONFIG_GPIO_GENERIC_PLATFORM is not set
# CONFIG_GPIO_ICH is not set
# CONFIG_GPIO_LYNXPOINT is not set
# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_VX855 is not set
# CONFIG_GPIO_ZX is not set
#
# Port-mapped I/O GPIO drivers
#
# CONFIG_GPIO_F7188X is not set
# CONFIG_GPIO_IT87 is not set
# CONFIG_GPIO_SCH is not set
# CONFIG_GPIO_SCH311X is not set
#
# I2C GPIO expanders
#
# CONFIG_GPIO_ADP5588 is not set
# CONFIG_GPIO_MAX7300 is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set
# CONFIG_GPIO_TPIC2810 is not set
# CONFIG_GPIO_TS4900 is not set
#
# MFD GPIO expanders
#
#
# PCI GPIO expanders
#
# CONFIG_GPIO_AMD8111 is not set
# CONFIG_GPIO_BT8XX is not set
# CONFIG_GPIO_ML_IOH is not set
# CONFIG_GPIO_RDC321X is not set
#
# SPI GPIO expanders
#
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MC33880 is not set
# CONFIG_GPIO_PISOSR is not set
#
# SPI or I2C GPIO expanders
#
#
# USB GPIO expanders
#
# CONFIG_W1 is not set
# CONFIG_POWER_AVS is not set
# CONFIG_POWER_RESET is not set
@@ -2261,9 +2350,15 @@ CONFIG_POWER_SUPPLY=y
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_CHARGER_MAX8903 is not set
# CONFIG_CHARGER_LP8727 is not set
# CONFIG_CHARGER_GPIO is not set
# CONFIG_CHARGER_BQ2415X is not set
# CONFIG_CHARGER_BQ24190 is not set
# CONFIG_CHARGER_BQ24257 is not set
# CONFIG_CHARGER_BQ24735 is not set
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_CHARGER_RT9455 is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
@@ -2308,6 +2403,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_G760A is not set
# CONFIG_SENSORS_G762 is not set
# CONFIG_SENSORS_GPIO_FAN is not set
# CONFIG_SENSORS_HIH6130 is not set
# CONFIG_SENSORS_IBMAEM is not set
# CONFIG_SENSORS_IBMPEX is not set
@@ -2378,6 +2474,7 @@ CONFIG_SENSORS_TPS53679=y
CONFIG_SENSORS_UCD9000=y
CONFIG_SENSORS_UCD9200=y
# CONFIG_SENSORS_ZL6100 is not set
# CONFIG_SENSORS_SHT15 is not set
# CONFIG_SENSORS_SHT21 is not set
# CONFIG_SENSORS_SHT3x is not set
# CONFIG_SENSORS_SHTC1 is not set
@@ -2495,6 +2592,7 @@ CONFIG_WATCHDOG=y
# CONFIG_MACHZ_WDT is not set
# CONFIG_SBC_EPX_C3_WATCHDOG is not set
# CONFIG_NI903X_WDT is not set
# CONFIG_MEN_A21_WDT is not set
#
# PCI-based Watchdog Cards
@@ -2530,6 +2628,7 @@ CONFIG_BCMA_POSSIBLE=y
CONFIG_MFD_CORE=y
# CONFIG_MFD_AS3711 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_MFD_CROS_EC is not set
@@ -2545,8 +2644,10 @@ CONFIG_MFD_CORE=y
# CONFIG_MFD_MC13XXX_SPI is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_LPC_ICH is not set
CONFIG_LPC_SCH=y
# CONFIG_INTEL_SOC_PMIC is not set
# CONFIG_MFD_INTEL_LPSS_ACPI is not set
# CONFIG_MFD_INTEL_LPSS_PCI is not set
# CONFIG_MFD_JANZ_CMODIO is not set
@@ -2584,6 +2685,7 @@ CONFIG_LPC_SCH=y
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS65010 is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
@@ -2591,6 +2693,7 @@ CONFIG_LPC_SCH=y
# CONFIG_MFD_TI_LP873X is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TPS80031 is not set
@@ -2723,6 +2826,7 @@ CONFIG_FB_EFI=y
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_VIA is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
@@ -2752,6 +2856,7 @@ CONFIG_BACKLIGHT_GENERIC=y
# CONFIG_BACKLIGHT_ADP8860 is not set
# CONFIG_BACKLIGHT_ADP8870 is not set
# CONFIG_BACKLIGHT_LM3639 is not set
# CONFIG_BACKLIGHT_GPIO is not set
# CONFIG_BACKLIGHT_LV5207LP is not set
# CONFIG_BACKLIGHT_BD6107 is not set
# CONFIG_VGASTATE is not set
@@ -2941,6 +3046,7 @@ CONFIG_HID_A4TECH=y
# CONFIG_HID_ACRUX is not set
CONFIG_HID_APPLE=y
# CONFIG_HID_APPLEIR is not set
# CONFIG_HID_ASUS is not set
# CONFIG_HID_AUREAL is not set
CONFIG_HID_BELKIN=y
# CONFIG_HID_BETOP_FF is not set
@@ -2949,6 +3055,7 @@ CONFIG_HID_CHICONY=y
# CONFIG_HID_CORSAIR is not set
# CONFIG_HID_PRODIKEYS is not set
# CONFIG_HID_CMEDIA is not set
CONFIG_HID_CP2112=y
CONFIG_HID_CYPRESS=y
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
@@ -3023,7 +3130,7 @@ CONFIG_USB_HIDDEV=y
#
# I2C HID support
#
# CONFIG_I2C_HID is not set
CONFIG_I2C_HID=y
#
# Intel ISH HID support
@@ -3073,7 +3180,7 @@ CONFIG_USB_UHCI_HCD=y
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
@@ -3154,6 +3261,7 @@ CONFIG_USB_STORAGE=y
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_GADGET is not set
# CONFIG_USB_LED_TRIG is not set
@@ -3171,7 +3279,9 @@ CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_LM3530 is not set
# CONFIG_LEDS_LM3642 is not set
# CONFIG_LEDS_PCA9532 is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_LP3944 is not set
# CONFIG_LEDS_LP3952 is not set
# CONFIG_LEDS_LP5521 is not set
# CONFIG_LEDS_LP5523 is not set
# CONFIG_LEDS_LP5562 is not set
@@ -3183,6 +3293,7 @@ CONFIG_LEDS_CLASS=y
# CONFIG_LEDS_DAC124S085 is not set
# CONFIG_LEDS_BD2802 is not set
# CONFIG_LEDS_INTEL_SS4200 is not set
# CONFIG_LEDS_LT3593 is not set
# CONFIG_LEDS_TCA6507 is not set
# CONFIG_LEDS_TLC591XX is not set
# CONFIG_LEDS_LM355x is not set
@@ -3206,6 +3317,7 @@ CONFIG_LEDS_TRIGGER_TIMER=y
# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
# CONFIG_LEDS_TRIGGER_CPU is not set
# CONFIG_LEDS_TRIGGER_GPIO is not set
# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
#
@@ -3619,6 +3731,7 @@ CONFIG_MAX1363=y
# Humidity sensors
#
# CONFIG_AM2315 is not set
# CONFIG_DHT11 is not set
# CONFIG_HDC100X is not set
# CONFIG_HTU21 is not set
# CONFIG_SI7005 is not set
@@ -3670,6 +3783,8 @@ CONFIG_MAX1363=y
#
# Magnetometer sensors
#
# CONFIG_AK8975 is not set
# CONFIG_AK09911 is not set
# CONFIG_BMC150_MAGN_I2C is not set
# CONFIG_BMC150_MAGN_SPI is not set
# CONFIG_MAG3110 is not set
@@ -4156,6 +4271,7 @@ CONFIG_PROBE_EVENTS=y
# CONFIG_RING_BUFFER_BENCHMARK is not set
# CONFIG_RING_BUFFER_STARTUP_TEST is not set
# CONFIG_TRACE_ENUM_MAP_FILE is not set
CONFIG_TRACING_EVENTS_GPIO=y
#
# Runtime Testing

2
packages/platforms-closed

Submodule packages/platforms-closed updated: 751d0b2a60...5a031a2f0f

1154
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/x86-64-accton-as5712-54x-cpld.c
View File

File diff suppressed because it is too large Load Diff

13
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/x86-64-accton-as5712-54x-fan.c
View File

@@ -131,8 +131,8 @@ static ssize_t fan_set_duty_cycle(struct device *dev,
static ssize_t fan_show_value(struct device *dev,
struct device_attribute *da, char *buf);
extern int as5712_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5712_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as5712_54x_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5712_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
/*******************/
@@ -258,12 +258,12 @@ static const struct attribute_group accton_as5712_54x_fan_group = {
static int accton_as5712_54x_fan_read_value(u8 reg)
{
return as5712_54x_i2c_cpld_read(0x60, reg);
return as5712_54x_cpld_read(0x60, reg);
}
static int accton_as5712_54x_fan_write_value(u8 reg, u8 value)
{
return as5712_54x_i2c_cpld_write(0x60, reg, value);
return as5712_54x_cpld_write(0x60, reg, value);
}
static void accton_as5712_54x_fan_update_device(struct device *dev)
@@ -394,11 +394,6 @@ static int __init accton_as5712_54x_fan_init(void)
{
int ret;
extern int platform_accton_as5712_54x(void);
if(!platform_accton_as5712_54x()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as5712_54x_fan_driver);
if (ret < 0) {
goto exit;

12
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/x86-64-accton-as5712-54x-leds.c
View File

@@ -29,8 +29,8 @@
#include <linux/leds.h>
#include <linux/slab.h>
extern int as5712_54x_i2c_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as5712_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as5712_54x_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as5712_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern void led_classdev_unregister(struct led_classdev *led_cdev);
extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev);
@@ -220,12 +220,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
static int accton_as5712_54x_led_read_value(u8 reg)
{
return as5712_54x_i2c_cpld_read(0x60, reg);
return as5712_54x_cpld_read(0x60, reg);
}
static int accton_as5712_54x_led_write_value(u8 reg, u8 value)
{
return as5712_54x_i2c_cpld_write(0x60, reg, value);
return as5712_54x_cpld_write(0x60, reg, value);
}
static void accton_as5712_54x_led_update(void)
@@ -552,10 +552,6 @@ static int __init accton_as5712_54x_led_init(void)
{
int ret;
extern int platform_accton_as5712_54x(void);
if(!platform_accton_as5712_54x()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as5712_54x_led_driver);
if (ret < 0) {
goto exit;

21
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/x86-64-accton-as5712-54x-psu.c
View File

@@ -43,7 +43,7 @@ static ssize_t show_index(struct device *dev, struct device_attribute *da, char
static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
static int as5712_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
extern int as5712_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5712_54x_cpld_read(unsigned short cpld_addr, u8 reg);
static int as5712_54x_psu_model_name_get(struct device *dev);
/* Addresses scanned
@@ -329,7 +329,7 @@ static struct as5712_54x_psu_data *as5712_54x_psu_update_device(struct device *d
/* Read psu status */
status = as5712_54x_i2c_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET);
status = as5712_54x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET);
if (status < 0) {
dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status);
@@ -349,24 +349,9 @@ exit:
return data;
}
static int __init as5712_54x_psu_init(void)
{
extern int platform_accton_as5712_54x(void);
if(!platform_accton_as5712_54x()) {
return -ENODEV;
}
return i2c_add_driver(&as5712_54x_psu_driver);
}
static void __exit as5712_54x_psu_exit(void)
{
i2c_del_driver(&as5712_54x_psu_driver);
}
module_i2c_driver(as5712_54x_psu_driver);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("accton as5712_54x_psu driver");
MODULE_LICENSE("GPL");
module_init(as5712_54x_psu_init);
module_exit(as5712_54x_psu_exit);

1882
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/x86-64-accton-as5712-54x-sfp.c
View File

File diff suppressed because it is too large Load Diff

214
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/onlp/builds/src/module/src/sfpi.c
View File

@@ -24,20 +24,24 @@
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <fcntl.h> /* For O_RDWR && open */
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <onlplib/i2c.h>
#include "platform_lib.h"
#include <onlplib/file.h>
#include "x86_64_accton_as5712_54x_int.h"
#include "x86_64_accton_as5712_54x_log.h"
#define MAX_SFP_PATH 64
static char sfp_node_path[MAX_SFP_PATH] = {0};
#define CPLD_MUX_BUS_START_INDEX 2
static int front_port_to_cpld_mux_index(int port)
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
#define MODULE_PRESENT_FORMAT "/sys/bus/i2c/devices/0-00%d/module_present_%d"
#define MODULE_RXLOS_FORMAT "/sys/bus/i2c/devices/0-00%d/module_rx_los_%d"
#define MODULE_TXFAULT_FORMAT "/sys/bus/i2c/devices/0-00%d/module_tx_fault_%d"
#define MODULE_TXDISABLE_FORMAT "/sys/bus/i2c/devices/0-00%d/module_tx_disable_%d"
#define MODULE_PRESENT_ALL_ATTR_CPLD2 "/sys/bus/i2c/devices/0-0061/module_present_all"
#define MODULE_PRESENT_ALL_ATTR_CPLD3 "/sys/bus/i2c/devices/0-0062/module_present_all"
#define MODULE_RXLOS_ALL_ATTR_CPLD2 "/sys/bus/i2c/devices/0-0061/module_rx_los_all"
#define MODULE_RXLOS_ALL_ATTR_CPLD3 "/sys/bus/i2c/devices/0-0062/module_rx_los_all"
static int front_port_bus_index(int port)
{
int rport = 0;
@@ -63,38 +67,6 @@ static int front_port_to_cpld_mux_index(int port)
return (rport + CPLD_MUX_BUS_START_INDEX);
}
static int
as5712_54x_sfp_node_read_int(char *node_path, int *value, int data_len)
{
int ret = 0;
char buf[8] = {0};
*value = 0;
ret = deviceNodeReadString(node_path, buf, sizeof(buf), data_len);
if (ret == 0) {
*value = atoi(buf);
}
return ret;
}
static char*
as5712_54x_sfp_get_port_path_addr(int port, int addr, char *node_name)
{
sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-00%d/%s",
front_port_to_cpld_mux_index(port), addr,
node_name);
return sfp_node_path;
}
static char*
as5712_54x_sfp_get_port_path(int port, char *node_name)
{
return as5712_54x_sfp_get_port_path_addr(port, 50, node_name);
}
/************************************************************
*
* SFPI Entry Points
@@ -203,10 +175,10 @@ onlp_sfpi_is_present(int port)
* Return < 0 if error.
*/
int present;
char* path = as5712_54x_sfp_get_port_path(port, "sfp_is_present");
if (as5712_54x_sfp_node_read_int(path, &present, 1) != 0) {
AIM_LOG_INFO("Unable to read present status from port(%d)\r\n", port);
int addr = (port < 24) ? 61 : 62;
if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -217,29 +189,35 @@ int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[7];
char* path;
FILE* fp;
path = as5712_54x_sfp_get_port_path(0, "sfp_is_present_all");
fp = fopen(path, "r");
/* Read present status of port 0~23 */
fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD2, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD2.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3,
bytes+4,
bytes+5,
bytes+6
);
int count = fscanf(fp, "%x %x %x", bytes+0, bytes+1, bytes+2);
fclose(fp);
if(count != AIM_ARRAYSIZE(bytes)) {
if(count != 3) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD2.");
return ONLP_STATUS_E_INTERNAL;
}
/* Read present status of port 24~53 */
fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD3, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD3.");
return ONLP_STATUS_E_INTERNAL;
}
count = fscanf(fp, "%x %x %x %x", bytes+3, bytes+4, bytes+5, bytes+6);
fclose(fp);
if(count != 4) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD3.");
return ONLP_STATUS_E_INTERNAL;
}
@@ -268,33 +246,39 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[7];
char* path;
uint32_t bytes[6];
uint32_t *ptr = bytes;
FILE* fp;
path = as5712_54x_sfp_get_port_path(0, "sfp_rx_los_all");
fp = fopen(path, "r");
/* Read present status of port 0~23 */
int addr, i = 0;
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_rx_los_all device file.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3,
bytes+4,
bytes+5
);
fclose(fp);
if(count != 6) {
AIM_LOG_ERROR("Unable to read all fields from the sfp_rx_los_all device file.");
return ONLP_STATUS_E_INTERNAL;
for (addr = 61; addr <= 62; addr++) {
if (addr == 61) {
fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD2, "r");
}
else {
fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD3, "r");
}
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_rx_los_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
fclose(fp);
if(count != 3) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the module_rx_los_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
ptr += count;
}
/* Convert to 64 bit integer in port order */
int i = 0;
i = 0;
uint64_t rx_los_all = 0 ;
for(i = 5; i >= 0; i--) {
rx_los_all <<= 8;
@@ -315,18 +299,22 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
char* path = as5712_54x_sfp_get_port_path(port, "sfp_eeprom");
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int size = 0;
memset(data, 0, 256);
if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, front_port_bus_index(port)) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
if (size != 256) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -336,11 +324,26 @@ onlp_sfpi_eeprom_read(int port, uint8_t data[256])
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
char* path = as5712_54x_sfp_get_port_path_addr(port, 51, "sfp_eeprom");
memset(data, 0, 256);
FILE* fp;
char file[64] = {0};
sprintf(file, PORT_EEPROM_FORMAT, front_port_bus_index(port));
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
if (fseek(fp, 256, SEEK_CUR) != 0) {
fclose(fp);
AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
int ret = fread(data, 1, 256, fp);
fclose(fp);
if (ret != 256) {
AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -350,28 +353,28 @@ onlp_sfpi_dom_read(int port, uint8_t data[256])
int
onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
{
int bus = front_port_to_cpld_mux_index(port);
int bus = front_port_bus_index(port);
return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
{
int bus = front_port_to_cpld_mux_index(port);
int bus = front_port_bus_index(port);
return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
{
int bus = front_port_to_cpld_mux_index(port);
int bus = front_port_bus_index(port);
return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
{
int bus = front_port_to_cpld_mux_index(port);
int bus = front_port_bus_index(port);
return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
@@ -384,13 +387,13 @@ onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
return ONLP_STATUS_E_UNSUPPORTED;
}
int addr = (port < 24) ? 61 : 62;
switch(control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
{
char* path = as5712_54x_sfp_get_port_path(port, "sfp_tx_disable");
if (deviceNodeWriteInt(path, value, 0) != 0) {
if (onlp_file_write_int(value, MODULE_TXDISABLE_FORMAT, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -412,19 +415,18 @@ int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int rv;
char* path = NULL;
if (port < 0 || port >= 48) {
return ONLP_STATUS_E_UNSUPPORTED;
}
int addr = (port < 24) ? 61 : 62;
switch(control)
{
case ONLP_SFP_CONTROL_RX_LOS:
{
path = as5712_54x_sfp_get_port_path(port, "sfp_rx_loss");
if (as5712_54x_sfp_node_read_int(path, value, 1) != 0) {
if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read rx_loss status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -436,9 +438,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
case ONLP_SFP_CONTROL_TX_FAULT:
{
path = as5712_54x_sfp_get_port_path(port, "sfp_tx_fault");
if (as5712_54x_sfp_node_read_int(path, value, 1) != 0) {
if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -450,9 +450,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
case ONLP_SFP_CONTROL_TX_DISABLE:
{
path = as5712_54x_sfp_get_port_path(port, "sfp_tx_disable");
if (as5712_54x_sfp_node_read_int(path, value, 0) != 0) {
if (onlp_file_read_int(value, MODULE_TXDISABLE_FORMAT, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}

24
packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/python/x86_64_accton_as5712_54x_r0/__init__.py
View File

@@ -9,9 +9,10 @@ class OnlPlatform_x86_64_accton_as5712_54x_r0(OnlPlatformAccton,
SYS_OBJECT_ID=".5712.54"
def baseconfig(self):
self.insmod('optoe')
self.insmod('cpr_4011_4mxx')
self.insmod("ym2651y")
for m in [ 'cpld', 'fan', 'psu', 'leds', 'sfp' ]:
for m in [ 'cpld', 'fan', 'psu', 'leds' ]:
self.insmod("x86-64-accton-as5712-54x-%s.ko" % m)
########### initialize I2C bus 0 ###########
@@ -25,15 +26,22 @@ class OnlPlatform_x86_64_accton_as5712_54x_r0(OnlPlatformAccton,
)
# initialize SFP devices
for port in range(1, 49):
self.new_i2c_device('as5712_54x_port%d' % port, 0x50, port+1)
self.new_i2c_device('optoe2', 0x50, port+1)
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+1), shell=True)
# Initialize QSFP devices
self.new_i2c_device('as5712_54x_port49', 0x50, 50)
self.new_i2c_device('as5712_54x_port52', 0x50, 51)
self.new_i2c_device('as5712_54x_port50', 0x50, 52)
self.new_i2c_device('as5712_54x_port53', 0x50, 53)
self.new_i2c_device('as5712_54x_port51', 0x50, 54)
self.new_i2c_device('as5712_54x_port54', 0x50, 55)
self.new_i2c_device('optoe1', 0x50, 50)
self.new_i2c_device('optoe1', 0x50, 51)
self.new_i2c_device('optoe1', 0x50, 52)
self.new_i2c_device('optoe1', 0x50, 53)
self.new_i2c_device('optoe1', 0x50, 54)
self.new_i2c_device('optoe1', 0x50, 55)
subprocess.call('echo port49 > /sys/bus/i2c/devices/50-0050/port_name', shell=True)
subprocess.call('echo port52 > /sys/bus/i2c/devices/51-0050/port_name', shell=True)
subprocess.call('echo port50 > /sys/bus/i2c/devices/52-0050/port_name', shell=True)
subprocess.call('echo port53 > /sys/bus/i2c/devices/53-0050/port_name', shell=True)
subprocess.call('echo port51 > /sys/bus/i2c/devices/54-0050/port_name', shell=True)
subprocess.call('echo port54 > /sys/bus/i2c/devices/55-0050/port_name', shell=True)
########### initialize I2C bus 1 ###########
self.new_i2c_devices(

457
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/x86-64-accton-as5812-54t-cpld.c Normal file
View File

@@ -0,0 +1,457 @@
/*
* A hwmon driver for the as5812_54t_cpld
*
* Copyright (C) 2013 Accton Technology Corporation.
* Brandon Chuang <brandon_chuang@accton.com.tw>
*
* Based on ad7414.c
* Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/list.h>
static LIST_HEAD(cpld_client_list);
static struct mutex list_lock;
struct cpld_client_node {
struct i2c_client *client;
struct list_head list;
};
#define I2C_RW_RETRY_COUNT 10
#define I2C_RW_RETRY_INTERVAL 60 /* ms */
static ssize_t show_present(struct device *dev, struct device_attribute *da,
char *buf);
static ssize_t show_present_all(struct device *dev, struct device_attribute *da,
char *buf);
static ssize_t access(struct device *dev, struct device_attribute *da,
const char *buf, size_t count);
static ssize_t show_version(struct device *dev, struct device_attribute *da,
char *buf);
static int as5812_54t_cpld_read_internal(struct i2c_client *client, u8 reg);
static int as5812_54t_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value);
struct as5812_54t_cpld_data {
struct device *hwmon_dev;
struct mutex update_lock;
};
/* Addresses scanned for as5812_54t_cpld
*/
static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index
enum as5812_54t_cpld_sysfs_attributes {
CPLD_VERSION,
ACCESS,
MODULE_PRESENT_ALL,
/* transceiver attributes */
TRANSCEIVER_PRESENT_ATTR_ID(49),
TRANSCEIVER_PRESENT_ATTR_ID(50),
TRANSCEIVER_PRESENT_ATTR_ID(51),
TRANSCEIVER_PRESENT_ATTR_ID(52),
TRANSCEIVER_PRESENT_ATTR_ID(53),
TRANSCEIVER_PRESENT_ATTR_ID(54),
};
/* sysfs attributes for hwmon
*/
/* transceiver attributes */
#define DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \
static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_present, NULL, MODULE_PRESENT_##index)
#define DECLARE_TRANSCEIVER_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr
static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION);
static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS);
/* transceiver attributes */
static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL);
DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(49);
DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(50);
DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(51);
DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(52);
DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(53);
DECLARE_TRANSCEIVER_SENSOR_DEVICE_ATTR(54);
static struct attribute *as5812_54t_cpld_attributes[] = {
&sensor_dev_attr_version.dev_attr.attr,
&sensor_dev_attr_access.dev_attr.attr,
/* transceiver attributes */
&sensor_dev_attr_module_present_all.dev_attr.attr,
DECLARE_TRANSCEIVER_ATTR(49),
DECLARE_TRANSCEIVER_ATTR(50),
DECLARE_TRANSCEIVER_ATTR(51),
DECLARE_TRANSCEIVER_ATTR(52),
DECLARE_TRANSCEIVER_ATTR(53),
DECLARE_TRANSCEIVER_ATTR(54),
NULL
};
static const struct attribute_group as5812_54t_cpld_group = {
.attrs = as5812_54t_cpld_attributes,
};
static ssize_t show_present_all(struct device *dev, struct device_attribute *da,
char *buf)
{
int status;
u8 value = 0;
u8 reg = 0x22;
struct i2c_client *client = to_i2c_client(dev);
struct as5812_54t_cpld_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
status = as5812_54t_cpld_read_internal(client, reg);
if (status < 0) {
goto exit;
}
value = ~(u8)status;
value &= 0x3F;
mutex_unlock(&data->update_lock);
/* Return values 49 -> 54 in order */
return sprintf(buf, "%.2x\n", value);
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t show_present(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct as5812_54t_cpld_data *data = i2c_get_clientdata(client);
int status = 0;
u8 reg = 0, mask = 0;
reg = 0x22;
mask = 0x1 << (attr->index - MODULE_PRESENT_49);
mutex_lock(&data->update_lock);
status = as5812_54t_cpld_read_internal(client, reg);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", !(status & mask));
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t show_version(struct device *dev, struct device_attribute *da,
char *buf)
{
u8 reg = 0, mask = 0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct as5812_54t_cpld_data *data = i2c_get_clientdata(client);
int status = 0;
switch (attr->index) {
case CPLD_VERSION:
reg = 0x1;
mask = 0xFF;
break;
default:
break;
}
mutex_lock(&data->update_lock);
status = as5812_54t_cpld_read_internal(client, reg);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", (status & mask));
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t access(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int status;
u32 addr, val;
struct i2c_client *client = to_i2c_client(dev);
struct as5812_54t_cpld_data *data = i2c_get_clientdata(client);
if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) {
return -EINVAL;
}
if (addr > 0xFF || val > 0xFF) {
return -EINVAL;
}
mutex_lock(&data->update_lock);
status = as5812_54t_cpld_write_internal(client, addr, val);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return count;
exit:
mutex_unlock(&data->update_lock);
return status;
}
static int as5812_54t_cpld_read_internal(struct i2c_client *client, u8 reg)
{
int status = 0, retry = I2C_RW_RETRY_COUNT;
while (retry) {
status = i2c_smbus_read_byte_data(client, reg);
if (unlikely(status < 0)) {
msleep(I2C_RW_RETRY_INTERVAL);
retry--;
continue;
}
break;
}
return status;
}
static int as5812_54t_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value)
{
int status = 0, retry = I2C_RW_RETRY_COUNT;
while (retry) {
status = i2c_smbus_write_byte_data(client, reg, value);
if (unlikely(status < 0)) {
msleep(I2C_RW_RETRY_INTERVAL);
retry--;
continue;
}
break;
}
return status;
}
static void as5812_54t_cpld_add_client(struct i2c_client *client)
{
struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
if (!node) {
dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr);
return;
}
node->client = client;
mutex_lock(&list_lock);
list_add(&node->list, &cpld_client_list);
mutex_unlock(&list_lock);
}
static void as5812_54t_cpld_remove_client(struct i2c_client *client)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int found = 0;
mutex_lock(&list_lock);
list_for_each(list_node, &cpld_client_list)
{
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client == client) {
found = 1;
break;
}
}
if (found) {
list_del(list_node);
kfree(cpld_node);
}
mutex_unlock(&list_lock);
}
static int as5812_54t_cpld_probe(struct i2c_client *client,
const struct i2c_device_id *dev_id)
{
int status;
struct as5812_54t_cpld_data *data = NULL;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr);
status = -EIO;
goto exit;
}
data = kzalloc(sizeof(struct as5812_54t_cpld_data), GFP_KERNEL);
if (!data) {
status = -ENOMEM;
goto exit;
}
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
dev_info(&client->dev, "chip found\n");
/* Register sysfs hooks */
status = sysfs_create_group(&client->dev.kobj, &as5812_54t_cpld_group);
if (status) {
goto exit_free;
}
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
status = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
as5812_54t_cpld_add_client(client);
dev_info(&client->dev, "%s: cpld '%s'\n",
dev_name(data->hwmon_dev), client->name);
return 0;
exit_remove:
sysfs_remove_group(&client->dev.kobj, &as5812_54t_cpld_group);
exit_free:
kfree(data);
exit:
return status;
}
static int as5812_54t_cpld_remove(struct i2c_client *client)
{
struct as5812_54t_cpld_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &as5812_54t_cpld_group);
kfree(data);
as5812_54t_cpld_remove_client(client);
return 0;
}
int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int ret = -EPERM;
mutex_lock(&list_lock);
list_for_each(list_node, &cpld_client_list)
{
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client->addr == cpld_addr) {
ret = i2c_smbus_read_byte_data(cpld_node->client, reg);
break;
}
}
mutex_unlock(&list_lock);
return ret;
}
EXPORT_SYMBOL(as5812_54t_cpld_read);
int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int ret = -EIO;
mutex_lock(&list_lock);
list_for_each(list_node, &cpld_client_list)
{
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client->addr == cpld_addr) {
ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value);
break;
}
}
mutex_unlock(&list_lock);
return ret;
}
EXPORT_SYMBOL(as5812_54t_cpld_write);
static const struct i2c_device_id as5812_54t_cpld_id[] = {
{ "as5812_54t_cpld", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, as5812_54t_cpld_id);
static struct i2c_driver as5812_54t_cpld_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "as5812_54t_cpld",
},
.probe = as5812_54t_cpld_probe,
.remove = as5812_54t_cpld_remove,
.id_table = as5812_54t_cpld_id,
.address_list = normal_i2c,
};
static int __init as5812_54t_cpld_init(void)
{
mutex_init(&list_lock);
return i2c_add_driver(&as5812_54t_cpld_driver);
}
static void __exit as5812_54t_cpld_exit(void)
{
i2c_del_driver(&as5812_54t_cpld_driver);
}
module_init(as5812_54t_cpld_init);
module_exit(as5812_54t_cpld_exit);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("as5812_54t_cpld driver");
MODULE_LICENSE("GPL");

15
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/x86-64-accton-as5812-54t-fan.c
View File

@@ -131,8 +131,8 @@ static ssize_t fan_set_duty_cycle(struct device *dev,
static ssize_t fan_show_value(struct device *dev,
struct device_attribute *da, char *buf);
extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
/*******************/
@@ -258,12 +258,12 @@ static const struct attribute_group accton_as5812_54t_fan_group = {
static int accton_as5812_54t_fan_read_value(u8 reg)
{
return accton_i2c_cpld_read(0x60, reg);
return as5812_54t_cpld_read(0x60, reg);
}
static int accton_as5812_54t_fan_write_value(u8 reg, u8 value)
{
return accton_i2c_cpld_write(0x60, reg, value);
return as5812_54t_cpld_write(0x60, reg, value);
}
static void accton_as5812_54t_fan_update_device(struct device *dev)
@@ -394,12 +394,7 @@ static int __init accton_as5812_54t_fan_init(void)
{
int ret;
extern int platform_accton_as5812_54t(void);
if (!platform_accton_as5812_54t()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as5812_54t_fan_driver);
ret = platform_driver_register(&accton_as5812_54t_fan_driver);
if (ret < 0) {
goto exit;
}

15
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/x86-64-accton-as5812-54t-leds.c
View File

@@ -29,8 +29,8 @@
#include <linux/leds.h>
#include <linux/slab.h>
extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern void led_classdev_unregister(struct led_classdev *led_cdev);
extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev);
@@ -223,12 +223,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
static int accton_as5812_54t_led_read_value(u8 reg)
{
return accton_i2c_cpld_read(0x60, reg);
return as5812_54t_cpld_read(0x60, reg);
}
static int accton_as5812_54t_led_write_value(u8 reg, u8 value)
{
return accton_i2c_cpld_write(0x60, reg, value);
return as5812_54t_cpld_write(0x60, reg, value);
}
static void accton_as5812_54t_led_update(void)
@@ -555,12 +555,7 @@ static int __init accton_as5812_54t_led_init(void)
{
int ret;
extern int platform_accton_as5812_54t(void);
if (!platform_accton_as5812_54t()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as5812_54t_led_driver);
ret = platform_driver_register(&accton_as5812_54t_led_driver);
if (ret < 0) {
goto exit;
}

22
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/x86-64-accton-as5812-54t-psu.c
View File

@@ -43,7 +43,7 @@ static ssize_t show_index(struct device *dev, struct device_attribute *da, char
static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
static int as5812_54t_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg);
static int as5812_54t_psu_model_name_get(struct device *dev);
/* Addresses scanned
@@ -328,7 +328,7 @@ static struct as5812_54t_psu_data *as5812_54t_psu_update_device(struct device *d
data->valid = 0;
/* Read psu status */
status = accton_i2c_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET);
status = as5812_54t_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET);
if (status < 0) {
dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status);
@@ -348,25 +348,9 @@ exit:
return data;
}
static int __init as5812_54t_psu_init(void)
{
extern int platform_accton_as5812_54t(void);
if (!platform_accton_as5812_54t()) {
return -ENODEV;
}
return i2c_add_driver(&as5812_54t_psu_driver);
}
static void __exit as5812_54t_psu_exit(void)
{
i2c_del_driver(&as5812_54t_psu_driver);
}
module_i2c_driver(as5812_54t_psu_driver);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("accton as5812_54t_psu driver");
MODULE_LICENSE("GPL");
module_init(as5812_54t_psu_init);
module_exit(as5812_54t_psu_exit);

1502
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/x86-64-accton-as5812-54t-sfp.c
View File

File diff suppressed because it is too large Load Diff

131
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/onlp/builds/src/module/src/sfpi.c
View File

@@ -25,80 +25,23 @@
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <fcntl.h> /* For O_RDWR && open */
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include "platform_lib.h"
#define MAX_SFP_PATH 64
static char sfp_node_path[MAX_SFP_PATH] = {0};
#define MUX_START_INDEX 2
#define NUM_OF_SFP_PORT 6
static const int port_bus_index[NUM_OF_SFP_PORT] = {
2, 4, 1, 3, 5, 0
};
static int front_port_to_cpld_mux_index(int port)
{
int rport = 0;
#define PORT_BUS_INDEX(port) (port_bus_index[port-48]+MUX_START_INDEX)
#define PORT_FORMAT "/sys/bus/i2c/devices/%d-0050/%s"
switch (port)
{
case 48:
rport = 2;
break;
case 49:
rport = 4;
break;
case 50:
rport = 1;
break;
case 51:
rport = 3;
break;
case 52:
rport = 5;
break;
case 53:
rport = 0;
break;
default:
break;
}
return (rport + MUX_START_INDEX);
}
static int
as5812_54t_sfp_node_read_int(char *node_path, int *value, int data_len)
{
int ret = 0;
char buf[8] = {0};
*value = 0;
ret = deviceNodeReadString(node_path, buf, sizeof(buf), data_len);
if (ret == 0) {
*value = atoi(buf);
}
return ret;
}
static char*
as5812_54t_sfp_get_port_path_addr(int port, int addr, char *node_name)
{
sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-00%d/%s",
front_port_to_cpld_mux_index(port), addr,
node_name);
return sfp_node_path;
}
static char*
as5812_54t_sfp_get_port_path(int port, char *node_name)
{
return as5812_54t_sfp_get_port_path_addr(port, 50, node_name);
}
#define MODULE_PRESENT_FORMAT "/sys/bus/i2c/devices/0-0060/module_present_%d"
#define MODULE_PRESENT_ALL_ATTR "/sys/bus/i2c/devices/0-0060/module_present_all"
#define VALIDATE_PORT(p) { if ((p < 48) || (p > 53)) return ONLP_STATUS_E_PARAM; }
/************************************************************
*
@@ -136,10 +79,9 @@ onlp_sfpi_is_present(int port)
* Return < 0 if error.
*/
int present;
char* path = as5812_54t_sfp_get_port_path(port, "sfp_is_present");
if (as5812_54t_sfp_node_read_int(path, &present, 1) != 0) {
AIM_LOG_INFO("Unable to read present status from port(%d)\r\n", port);
if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -150,11 +92,9 @@ int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[1];
char* path;
FILE* fp;
path = as5812_54t_sfp_get_port_path(0, "sfp_is_present_all");
fp = fopen(path, "r");
fp = fopen(MODULE_PRESENT_ALL_ATTR, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
@@ -188,24 +128,23 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
return ONLP_STATUS_OK;
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
char* path = as5812_54t_sfp_get_port_path(port, "sfp_eeprom");
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int size = 0;
memset(data, 0, 256);
if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
if(onlp_file_read(data, 256, &size, PORT_FORMAT, PORT_BUS_INDEX(port), "eeprom") != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -213,29 +152,35 @@ onlp_sfpi_eeprom_read(int port, uint8_t data[256])
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
{
char* path = as5812_54t_sfp_get_port_path_addr(port, 51, "sfp_eeprom");
memset(data, 0, 256);
if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
VALIDATE_PORT(port);
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
{
return ONLP_STATUS_E_UNSUPPORTED;
VALIDATE_PORT(port);
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
{
return ONLP_STATUS_E_UNSUPPORTED;
VALIDATE_PORT(port);
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
{
VALIDATE_PORT(port);
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int

21
packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/python/x86_64_accton_as5812_54t_r0/__init__.py
View File

@@ -10,25 +10,28 @@ class OnlPlatform_x86_64_accton_as5812_54t_r0(OnlPlatformAccton,
def baseconfig(self):
########### initialize I2C bus 0 ###########
self.insmod("accton_i2c_cpld")
self.insmod("optoe")
self.insmod("cpr_4011_4mxx")
self.insmod("ym2651y")
for m in [ "sfp", "psu", "fan", "leds" ]:
for m in [ "cpld", "psu", "fan", "leds" ]:
self.insmod("x86-64-accton-as5812-54t-%s" % m)
# initialize CPLDs
self.new_i2c_device('accton_i2c_cpld', 0x60, 0)
self.new_i2c_device('as5812_54t_cpld', 0x60, 0)
# initiate multiplexer (PCA9548)
self.new_i2c_device('pca9548', 0x71, 0)
# Initialize QSFP devices
self.new_i2c_device('as5812_54t_port49', 0x50, 4)
self.new_i2c_device('as5812_54t_port50', 0x50, 6)
self.new_i2c_device('as5812_54t_port51', 0x50, 3)
self.new_i2c_device('as5812_54t_port52', 0x50, 5)
self.new_i2c_device('as5812_54t_port53', 0x50, 7)
self.new_i2c_device('as5812_54t_port54', 0x50, 2)
for bus in range(2, 8):
self.new_i2c_device('optoe1', 0x50, bus)
subprocess.call('echo port54 > /sys/bus/i2c/devices/2-0050/port_name', shell=True)
subprocess.call('echo port51 > /sys/bus/i2c/devices/3-0050/port_name', shell=True)
subprocess.call('echo port49 > /sys/bus/i2c/devices/4-0050/port_name', shell=True)
subprocess.call('echo port52 > /sys/bus/i2c/devices/5-0050/port_name', shell=True)
subprocess.call('echo port50 > /sys/bus/i2c/devices/6-0050/port_name', shell=True)
subprocess.call('echo port53 > /sys/bus/i2c/devices/7-0050/port_name', shell=True)
########### initialize I2C bus 1 ###########
self.new_i2c_devices(

1098
packages/platforms/accton/x86-64/x86-64-accton-as5912-54x/modules/builds/x86-64-accton-as5912-54x-cpld.c Normal file
View File

File diff suppressed because it is too large Load Diff

8
packages/platforms/accton/x86-64/x86-64-accton-as5912-54x/modules/builds/x86-64-accton-as5912-54x-leds.c
View File

@@ -38,8 +38,8 @@
#define DEBUG_PRINT(fmt, args...)
#endif
extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as5912_54x_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5912_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
struct accton_as5912_54x_led_data {
struct platform_device *pdev;
@@ -148,12 +148,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
static int accton_as5912_54x_led_read_value(u8 reg)
{
return accton_i2c_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
return as5912_54x_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
}
static int accton_as5912_54x_led_write_value(u8 reg, u8 value)
{
return accton_i2c_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
return as5912_54x_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
}
static void accton_as5912_54x_led_update(void)

4
packages/platforms/accton/x86-64/x86-64-accton-as5912-54x/modules/builds/x86-64-accton-as5912-54x-psu.c
View File

@@ -37,7 +37,7 @@
static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
static int as5912_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as5912_54x_cpld_read(unsigned short cpld_addr, u8 reg);
/* Addresses scanned
*/
@@ -234,7 +234,7 @@ static struct as5912_54x_psu_data *as5912_54x_psu_update_device(struct device *d
dev_dbg(&client->dev, "Starting as5912_54x update\n");
/* Read psu status */
status = accton_i2c_cpld_read(0x60, 0x2);
status = as5912_54x_cpld_read(0x60, 0x2);
if (status < 0) {
dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status);

1874
packages/platforms/accton/x86-64/x86-64-accton-as5912-54x/modules/builds/x86-64-accton-as5912-54x-sfp.c
View File

File diff suppressed because it is too large Load Diff

218
packages/platforms/accton/x86-64/x86-64-accton-as5912-54x/onlp/builds/src/module/src/sfpi.c
View File

@@ -24,29 +24,21 @@
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include "platform_lib.h"
#include "x86_64_accton_as5912_54x_int.h"
#include "x86_64_accton_as5912_54x_log.h"
#define NUM_OF_SFP_PORT 54
#define MAX_SFP_PATH 64
static char sfp_node_path[MAX_SFP_PATH] = {0};
#define FRONT_PORT_BUS_INDEX(port) (port+26)
#define PORT_BUS_INDEX(port) (port+26)
static char*
sfp_get_port_path_addr(int port, int addr, char *node_name)
{
sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-00%d/%s",
FRONT_PORT_BUS_INDEX(port), addr, node_name);
return sfp_node_path;
}
static char*
sfp_get_port_path(int port, char *node_name)
{
return sfp_get_port_path_addr(port, 50, node_name);
}
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
#define MODULE_PRESENT_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_present_%d"
#define MODULE_RXLOS_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_rx_los_%d"
#define MODULE_TXFAULT_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_tx_fault_%d"
#define MODULE_TXDISABLE_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_tx_disable_%d"
#define MODULE_PRESENT_ALL_ATTR "/sys/bus/i2c/devices/%d-00%d/module_present_all"
#define MODULE_RXLOS_ALL_ATTR_CPLD1 "/sys/bus/i2c/devices/4-0060/module_rx_los_all"
#define MODULE_RXLOS_ALL_ATTR_CPLD2 "/sys/bus/i2c/devices/5-0062/module_rx_los_all"
/************************************************************
*
@@ -67,8 +59,8 @@ onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
* Ports {0, 54}
*/
int p;
for(p = 0; p < NUM_OF_SFP_PORT; p++) {
for(p = 0; p < 54; p++) {
AIM_BITMAP_SET(bmap, p);
}
@@ -84,9 +76,12 @@ onlp_sfpi_is_present(int port)
* Return < 0 if error.
*/
int present;
char *path = sfp_get_port_path(port, "sfp_is_present");
int bus, addr;
if (onlp_file_read_int(&present, path) < 0) {
addr = (port < 24) ? 60 : 62;
bus = (addr == 60) ? 4 : 5;
if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -97,33 +92,45 @@ onlp_sfpi_is_present(int port)
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[7];
char* path;
uint32_t bytes[7], *ptr = NULL;
FILE* fp;
int addr;
AIM_BITMAP_CLR_ALL(dst);
ptr = bytes;
path = sfp_get_port_path(0, "sfp_is_present_all");
fp = fopen(path, "r");
for (addr = 60; addr <= 62; addr+=2) {
/* Read present status of port 0~53 */
int count = 0;
char file[64] = {0};
int bus = (addr == 60) ? 4 : 5;
sprintf(file, MODULE_PRESENT_ALL_ATTR, bus, addr);
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD(0x%d).", addr);
return ONLP_STATUS_E_INTERNAL;
}
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3,
bytes+4,
bytes+5,
bytes+6
);
fclose(fp);
if(count != AIM_ARRAYSIZE(bytes)) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
return ONLP_STATUS_E_INTERNAL;
if (addr == 60) { /* CPLD1 */
count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
fclose(fp);
if(count != 3) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD(0x%d).", addr);
return ONLP_STATUS_E_INTERNAL;
}
}
else { /* CPLD2 */
count = fscanf(fp, "%x %x %x %x", ptr+0, ptr+1, ptr+2, ptr+3);
fclose(fp);
if(count != 4) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD(0x%d).", addr);
return ONLP_STATUS_E_INTERNAL;
}
}
ptr += count;
}
/* Mask out non-existant QSFP ports */
@@ -150,34 +157,40 @@ int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[6];
char* path;
uint32_t *ptr = bytes;
FILE* fp;
path = sfp_get_port_path(0, "sfp_rx_los_all");
fp = fopen(path, "r");
/* Read present status of port 0~23 */
int addr, i = 0;
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_rx_los_all device file.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3,
bytes+4,
bytes+5
);
fclose(fp);
if(count != 6) {
AIM_LOG_ERROR("Unable to read all fields from the sfp_rx_los_all device file.");
return ONLP_STATUS_E_INTERNAL;
for (addr = 60; addr <= 62; addr+=2) {
if (addr == 60) {
fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD1, "r");
}
else {
fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD2, "r");
}
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_rx_los_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
fclose(fp);
if(count != 3) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the module_rx_los_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
ptr += count;
}
/* Convert to 64 bit integer in port order */
int i = 0;
i = 0;
uint64_t rx_los_all = 0 ;
for(i = 5; i >= 0; i--) {
for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
rx_los_all <<= 8;
rx_los_all |= bytes[i];
}
@@ -194,32 +207,51 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
char* path = sfp_get_port_path(port, "sfp_eeprom");
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int size = 0;
memset(data, 0, 256);
if (onlp_file_read_binary(path, (char*)data, 256, 256) != 0) {
if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port)) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
if (size != 256) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
char* path = sfp_get_port_path_addr(port, 51, "sfp_eeprom");
memset(data, 0, 256);
FILE* fp;
char file[64] = {0};
sprintf(file, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port));
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
if (onlp_file_read_binary(path, (char*)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
if (fseek(fp, 256, SEEK_CUR) != 0) {
fclose(fp);
AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
int ret = fread(data, 1, 256, fp);
fclose(fp);
if (ret != 256) {
AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -231,13 +263,18 @@ onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
int rv;
if (port < 0 || port >= 48) {
return ONLP_STATUS_E_UNSUPPORTED;
}
int addr = (port < 24) ? 60 : 62;
int bus = (addr == 60) ? 4 : 5;
switch(control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
{
char* path = sfp_get_port_path(port, "sfp_tx_disable");
if (onlp_file_write_integer(path, value) != 0) {
if (onlp_file_write_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -259,16 +296,20 @@ int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int rv;
char* path = NULL;
if (port < 0 || port >= 48) {
return ONLP_STATUS_E_UNSUPPORTED;
}
int addr = (port < 24) ? 60 : 62;
int bus = (addr == 60) ? 4 : 5;
switch(control)
{
case ONLP_SFP_CONTROL_RX_LOS:
{
path = sfp_get_port_path(port, "sfp_rx_los");
if (onlp_file_read_int(value, path) < 0) {
AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port);
if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read rx_loss status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else {
@@ -279,9 +320,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
case ONLP_SFP_CONTROL_TX_FAULT:
{
path = sfp_get_port_path(port, "sfp_tx_fault");
if (onlp_file_read_int(value, path) < 0) {
if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -293,9 +332,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
case ONLP_SFP_CONTROL_TX_DISABLE:
{
path = sfp_get_port_path(port, "sfp_tx_disable");
if (onlp_file_read_int(value, path) < 0) {
if (onlp_file_read_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -312,12 +349,9 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
return rv;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

15
packages/platforms/accton/x86-64/x86-64-accton-as5912-54x/platform-config/r0/src/python/x86_64_accton_as5912_54x_r0/__init__.py
View File

@@ -8,9 +8,9 @@ class OnlPlatform_x86_64_accton_as5912_54x_r0(OnlPlatformAccton,
SYS_OBJECT_ID=".5912.54"
def baseconfig(self):
self.insmod("accton_i2c_cpld")
self.insmod('optoe')
self.insmod("ym2651y")
for m in [ "sfp", "psu", "fan", "leds" ]:
for m in [ "cpld", "psu", "fan", "leds" ]:
self.insmod("x86-64-accton-as5912-54x-%s" % m)
########### initialize I2C bus 0 ###########
@@ -29,8 +29,8 @@ class OnlPlatform_x86_64_accton_as5912_54x_r0(OnlPlatformAccton,
('lm75', 0x4b, 3),
# initialize CPLDs
('accton_i2c_cpld', 0x60, 4),
('accton_i2c_cpld', 0x62, 5),
('as5912_54x_cpld1', 0x60, 4),
('as5912_54x_cpld2', 0x62, 5),
]
)
@@ -69,11 +69,14 @@ class OnlPlatform_x86_64_accton_as5912_54x_r0(OnlPlatformAccton,
# initialize SFP devices
for port in range(1, 49):
self.new_i2c_device('as5912_54x_port%d' % port, 0x50, port+25)
self.new_i2c_device('optoe2', 0x50, port+25)
# initialize QSFP devices
for port in range(49, 55):
self.new_i2c_device('as5912_54x_port%d' % port, 0x50, port+25)
self.new_i2c_device('optoe1', 0x50, port+25)
for port in range(1, 55):
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+25), shell=True)
return True

570
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/x86-64-accton-as6712-32x-cpld.c
View File

@@ -32,36 +32,20 @@
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/dmi.h>
#include <linux/version.h>
#include <linux/stat.h>
#include <linux/hwmon-sysfs.h>
#include <linux/delay.h>
static struct dmi_system_id as6712_dmi_table[] = {
{
.ident = "Accton AS6712",
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "Accton"),
DMI_MATCH(DMI_PRODUCT_NAME, "AS6712"),
},
},
{
.ident = "Accton AS6712",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Accton"),
DMI_MATCH(DMI_PRODUCT_NAME, "AS6712"),
},
},
};
int platform_accton_as6712_32x(void)
{
return dmi_check_system(as6712_dmi_table);
}
EXPORT_SYMBOL(platform_accton_as6712_32x);
#define I2C_RW_RETRY_COUNT 10
#define I2C_RW_RETRY_INTERVAL 60 /* ms */
#define NUM_OF_CPLD1_CHANS 0x0
#define NUM_OF_CPLD2_CHANS 0x10
#define NUM_OF_CPLD3_CHANS 0x10
#define NUM_OF_ALL_CPLD_CHANS (NUM_OF_CPLD2_CHANS + NUM_OF_CPLD3_CHANS)
#define CPLD_CHANNEL_SELECT_REG 0x2
#define CPLD_DESELECT_CHANNEL 0xFF
#define ACCTON_I2C_CPLD_MUX_MAX_NCHANS NUM_OF_CPLD3_CHANS
static LIST_HEAD(cpld_client_list);
@@ -78,10 +62,13 @@ enum cpld_mux_type {
as6712_32x_cpld1
};
struct accton_i2c_cpld_mux {
struct as6712_32x_cpld_data {
enum cpld_mux_type type;
struct i2c_adapter *virt_adaps[ACCTON_I2C_CPLD_MUX_MAX_NCHANS];
u8 last_chan; /* last register value */
struct device *hwmon_dev;
struct mutex update_lock;
};
struct chip_desc {
@@ -105,53 +92,298 @@ static const struct chip_desc chips[] = {
}
};
static const struct i2c_device_id accton_i2c_cpld_mux_id[] = {
static const struct i2c_device_id as6712_32x_cpld_mux_id[] = {
{ "as6712_32x_cpld1", as6712_32x_cpld1 },
{ "as6712_32x_cpld2", as6712_32x_cpld2 },
{ "as6712_32x_cpld3", as6712_32x_cpld3 },
{ }
};
MODULE_DEVICE_TABLE(i2c, accton_i2c_cpld_mux_id);
MODULE_DEVICE_TABLE(i2c, as6712_32x_cpld_mux_id);
#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index
#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index
#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index
#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index
enum as6712_32x_cpld_sysfs_attributes {
CPLD_VERSION,
ACCESS,
MODULE_PRESENT_ALL,
MODULE_RXLOS_ALL,
/* transceiver attributes */
TRANSCEIVER_PRESENT_ATTR_ID(1),
TRANSCEIVER_PRESENT_ATTR_ID(2),
TRANSCEIVER_PRESENT_ATTR_ID(3),
TRANSCEIVER_PRESENT_ATTR_ID(4),
TRANSCEIVER_PRESENT_ATTR_ID(5),
TRANSCEIVER_PRESENT_ATTR_ID(6),
TRANSCEIVER_PRESENT_ATTR_ID(7),
TRANSCEIVER_PRESENT_ATTR_ID(8),
TRANSCEIVER_PRESENT_ATTR_ID(9),
TRANSCEIVER_PRESENT_ATTR_ID(10),
TRANSCEIVER_PRESENT_ATTR_ID(11),
TRANSCEIVER_PRESENT_ATTR_ID(12),
TRANSCEIVER_PRESENT_ATTR_ID(13),
TRANSCEIVER_PRESENT_ATTR_ID(14),
TRANSCEIVER_PRESENT_ATTR_ID(15),
TRANSCEIVER_PRESENT_ATTR_ID(16),
TRANSCEIVER_PRESENT_ATTR_ID(17),
TRANSCEIVER_PRESENT_ATTR_ID(18),
TRANSCEIVER_PRESENT_ATTR_ID(19),
TRANSCEIVER_PRESENT_ATTR_ID(20),
TRANSCEIVER_PRESENT_ATTR_ID(21),
TRANSCEIVER_PRESENT_ATTR_ID(22),
TRANSCEIVER_PRESENT_ATTR_ID(23),
TRANSCEIVER_PRESENT_ATTR_ID(24),
TRANSCEIVER_PRESENT_ATTR_ID(25),
TRANSCEIVER_PRESENT_ATTR_ID(26),
TRANSCEIVER_PRESENT_ATTR_ID(27),
TRANSCEIVER_PRESENT_ATTR_ID(28),
TRANSCEIVER_PRESENT_ATTR_ID(29),
TRANSCEIVER_PRESENT_ATTR_ID(30),
TRANSCEIVER_PRESENT_ATTR_ID(31),
TRANSCEIVER_PRESENT_ATTR_ID(32),
};
/* sysfs attributes for hwmon
*/
static ssize_t show_status(struct device *dev, struct device_attribute *da,
char *buf);
static ssize_t show_present_all(struct device *dev, struct device_attribute *da,
char *buf);
static ssize_t access(struct device *dev, struct device_attribute *da,
const char *buf, size_t count);
static ssize_t show_version(struct device *dev, struct device_attribute *da,
char *buf);
static int as6712_32x_cpld_read_internal(struct i2c_client *client, u8 reg);
static int as6712_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value);
/* transceiver attributes */
#define DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(index) \
static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index)
#define DECLARE_TRANSCEIVER_PRESENT_ATTR(index) &sensor_dev_attr_module_present_##index.dev_attr.attr
static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION);
static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS);
/* transceiver attributes */
static SENSOR_DEVICE_ATTR(module_present_all, S_IRUGO, show_present_all, NULL, MODULE_PRESENT_ALL);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(1);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(2);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(3);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(4);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(5);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(6);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(7);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(8);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(9);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(10);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(11);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(12);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(13);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(14);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(15);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(16);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(17);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(18);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(19);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(20);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(21);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(22);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(23);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(24);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(25);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(26);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(27);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(28);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(29);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(30);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(31);
DECLARE_TRANSCEIVER_PRESENT_SENSOR_DEVICE_ATTR(32);
static struct attribute *as6712_32x_cpld1_attributes[] = {
&sensor_dev_attr_version.dev_attr.attr,
&sensor_dev_attr_access.dev_attr.attr,
NULL
};
static const struct attribute_group as6712_32x_cpld1_group = {
.attrs = as6712_32x_cpld1_attributes,
};
static struct attribute *as6712_32x_cpld2_attributes[] = {
&sensor_dev_attr_version.dev_attr.attr,
&sensor_dev_attr_access.dev_attr.attr,
/* transceiver attributes */
&sensor_dev_attr_module_present_all.dev_attr.attr,
DECLARE_TRANSCEIVER_PRESENT_ATTR(1),
DECLARE_TRANSCEIVER_PRESENT_ATTR(2),
DECLARE_TRANSCEIVER_PRESENT_ATTR(3),
DECLARE_TRANSCEIVER_PRESENT_ATTR(4),
DECLARE_TRANSCEIVER_PRESENT_ATTR(5),
DECLARE_TRANSCEIVER_PRESENT_ATTR(6),
DECLARE_TRANSCEIVER_PRESENT_ATTR(7),
DECLARE_TRANSCEIVER_PRESENT_ATTR(8),
DECLARE_TRANSCEIVER_PRESENT_ATTR(9),
DECLARE_TRANSCEIVER_PRESENT_ATTR(10),
DECLARE_TRANSCEIVER_PRESENT_ATTR(11),
DECLARE_TRANSCEIVER_PRESENT_ATTR(12),
DECLARE_TRANSCEIVER_PRESENT_ATTR(13),
DECLARE_TRANSCEIVER_PRESENT_ATTR(14),
DECLARE_TRANSCEIVER_PRESENT_ATTR(15),
DECLARE_TRANSCEIVER_PRESENT_ATTR(16),
NULL
};
static const struct attribute_group as6712_32x_cpld2_group = {
.attrs = as6712_32x_cpld2_attributes,
};
static struct attribute *as6712_32x_cpld3_attributes[] = {
&sensor_dev_attr_version.dev_attr.attr,
&sensor_dev_attr_access.dev_attr.attr,
/* transceiver attributes */
&sensor_dev_attr_module_present_all.dev_attr.attr,
DECLARE_TRANSCEIVER_PRESENT_ATTR(17),
DECLARE_TRANSCEIVER_PRESENT_ATTR(18),
DECLARE_TRANSCEIVER_PRESENT_ATTR(19),
DECLARE_TRANSCEIVER_PRESENT_ATTR(20),
DECLARE_TRANSCEIVER_PRESENT_ATTR(21),
DECLARE_TRANSCEIVER_PRESENT_ATTR(22),
DECLARE_TRANSCEIVER_PRESENT_ATTR(23),
DECLARE_TRANSCEIVER_PRESENT_ATTR(24),
DECLARE_TRANSCEIVER_PRESENT_ATTR(25),
DECLARE_TRANSCEIVER_PRESENT_ATTR(26),
DECLARE_TRANSCEIVER_PRESENT_ATTR(27),
DECLARE_TRANSCEIVER_PRESENT_ATTR(28),
DECLARE_TRANSCEIVER_PRESENT_ATTR(29),
DECLARE_TRANSCEIVER_PRESENT_ATTR(30),
DECLARE_TRANSCEIVER_PRESENT_ATTR(31),
DECLARE_TRANSCEIVER_PRESENT_ATTR(32),
NULL
};
static const struct attribute_group as6712_32x_cpld3_group = {
.attrs = as6712_32x_cpld3_attributes,
};
static ssize_t show_present_all(struct device *dev, struct device_attribute *da,
char *buf)
{
int i, status;
u8 values[2] = {0};
u8 regs[] = {0xA, 0xB};
struct i2c_client *client = to_i2c_client(dev);
struct as6712_32x_cpld_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
for (i = 0; i < ARRAY_SIZE(regs); i++) {
status = as6712_32x_cpld_read_internal(client, regs[i]);
if (status < 0) {
goto exit;
}
values[i] = ~(u8)status;
}
mutex_unlock(&data->update_lock);
/* Return values 1 -> 32 in order */
return sprintf(buf, "%.2x %.2x\n", values[0], values[1]);
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t show_status(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct as6712_32x_cpld_data *data = i2c_get_clientdata(client);
int status = 0;
u8 reg = 0, mask = 0;
switch (attr->index) {
case MODULE_PRESENT_1 ... MODULE_PRESENT_8:
reg = 0xA;
mask = 0x1 << (attr->index - MODULE_PRESENT_1);
break;
case MODULE_PRESENT_9 ... MODULE_PRESENT_16:
reg = 0xB;
mask = 0x1 << (attr->index - MODULE_PRESENT_9);
break;
case MODULE_PRESENT_17 ... MODULE_PRESENT_24:
reg = 0xA;
mask = 0x1 << (attr->index - MODULE_PRESENT_17);
break;
case MODULE_PRESENT_25 ... MODULE_PRESENT_32:
reg = 0xB;
mask = 0x1 << (attr->index - MODULE_PRESENT_25);
break;
default:
return 0;
}
mutex_lock(&data->update_lock);
status = as6712_32x_cpld_read_internal(client, reg);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", !(status & mask));
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t access(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int status;
u32 addr, val;
struct i2c_client *client = to_i2c_client(dev);
struct as6712_32x_cpld_data *data = i2c_get_clientdata(client);
if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) {
return -EINVAL;
}
if (addr > 0xFF || val > 0xFF) {
return -EINVAL;
}
mutex_lock(&data->update_lock);
status = as6712_32x_cpld_write_internal(client, addr, val);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return count;
exit:
mutex_unlock(&data->update_lock);
return status;
}
/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
for this as they will try to lock adapter a second time */
static int accton_i2c_cpld_mux_reg_write(struct i2c_adapter *adap,
static int as6712_32x_cpld_mux_reg_write(struct i2c_adapter *adap,
struct i2c_client *client, u8 val)
{
#if 0
int ret = -ENODEV;
//if (adap->algo->master_xfer) {
if (0)
struct i2c_msg msg;
char buf[2];
msg.addr = client->addr;
msg.flags = 0;
msg.len = 2;
buf[0] = 0x2;
buf[1] = val;
msg.buf = buf;
ret = adap->algo->master_xfer(adap, &msg, 1);
}
else {
union i2c_smbus_data data;
ret = adap->algo->smbus_xfer(adap, client->addr,
client->flags,
I2C_SMBUS_WRITE,
0x2, I2C_SMBUS_BYTE, &data);
}
return ret;
#else
unsigned long orig_jiffies;
unsigned short flags;
unsigned short flags;
union i2c_smbus_data data;
int try;
s32 res = -EIO;
data.byte = val;
flags = client->flags;
data.byte = val;
flags = client->flags;
flags &= I2C_M_TEN | I2C_CLIENT_PEC;
if (adap->algo->smbus_xfer) {
@@ -159,49 +391,48 @@ static int accton_i2c_cpld_mux_reg_write(struct i2c_adapter *adap,
orig_jiffies = jiffies;
for (res = 0, try = 0; try <= adap->retries; try++) {
res = adap->algo->smbus_xfer(adap, client->addr, flags,
I2C_SMBUS_WRITE, 0x2,
I2C_SMBUS_BYTE_DATA, &data);
I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG,
I2C_SMBUS_BYTE_DATA, &data);
if (res != -EAGAIN)
break;
if (time_after(jiffies,
orig_jiffies + adap->timeout))
orig_jiffies + adap->timeout))
break;
}
}
return res;
#endif
return res;
}
static int accton_i2c_cpld_mux_select_chan(struct i2c_adapter *adap,
static int as6712_32x_cpld_mux_select_chan(struct i2c_adapter *adap,
void *client, u32 chan)
{
struct accton_i2c_cpld_mux *data = i2c_get_clientdata(client);
struct as6712_32x_cpld_data *data = i2c_get_clientdata(client);
u8 regval;
int ret = 0;
regval = chan;
regval = chan;
/* Only select the channel if its different from the last channel */
if (data->last_chan != regval) {
ret = accton_i2c_cpld_mux_reg_write(adap, client, regval);
ret = as6712_32x_cpld_mux_reg_write(adap, client, regval);
data->last_chan = regval;
}
return ret;
}
static int accton_i2c_cpld_mux_deselect_mux(struct i2c_adapter *adap,
static int as6712_32x_cpld_mux_deselect_mux(struct i2c_adapter *adap,
void *client, u32 chan)
{
struct accton_i2c_cpld_mux *data = i2c_get_clientdata(client);
struct as6712_32x_cpld_data *data = i2c_get_clientdata(client);
/* Deselect active channel */
data->last_chan = chips[data->type].deselectChan;
return accton_i2c_cpld_mux_reg_write(adap, client, data->last_chan);
return as6712_32x_cpld_mux_reg_write(adap, client, data->last_chan);
}
static void accton_i2c_cpld_add_client(struct i2c_client *client)
static void as6712_32x_cpld_add_client(struct i2c_client *client)
{
struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
@@ -217,9 +448,9 @@ static void accton_i2c_cpld_add_client(struct i2c_client *client)
mutex_unlock(&list_lock);
}
static void accton_i2c_cpld_remove_client(struct i2c_client *client)
static void as6712_32x_cpld_remove_client(struct i2c_client *client)
{
struct list_head *list_node = NULL;
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int found = 0;
@@ -243,101 +474,128 @@ static void accton_i2c_cpld_remove_client(struct i2c_client *client)
mutex_unlock(&list_lock);
}
static ssize_t show_cpld_version(struct device *dev, struct device_attribute *attr, char *buf)
static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf)
{
u8 reg = 0x1;
struct i2c_client *client;
int len;
int val = 0;
struct i2c_client *client = to_i2c_client(dev);
val = i2c_smbus_read_byte_data(client, 0x1);
client = to_i2c_client(dev);
len = sprintf(buf, "%d", i2c_smbus_read_byte_data(client, reg));
return len;
if (val < 0) {
dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val);
}
return sprintf(buf, "%d", val);
}
static struct device_attribute ver = __ATTR(version, 0600, show_cpld_version, NULL);
/*
* I2C init/probing/exit functions
*/
static int accton_i2c_cpld_mux_probe(struct i2c_client *client,
static int as6712_32x_cpld_mux_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
int chan=0;
struct accton_i2c_cpld_mux *data;
struct as6712_32x_cpld_data *data;
int ret = -ENODEV;
const struct attribute_group *group = NULL;
if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
goto err;
goto exit;
data = kzalloc(sizeof(struct accton_i2c_cpld_mux), GFP_KERNEL);
data = kzalloc(sizeof(struct as6712_32x_cpld_data), GFP_KERNEL);
if (!data) {
ret = -ENOMEM;
goto err;
goto exit;
}
i2c_set_clientdata(client, data);
#if 0
/* Write the mux register at addr to verify
* that the mux is in fact present.
*/
if (i2c_smbus_write_byte(client, 0) < 0) {
dev_warn(&client->dev, "probe failed\n");
goto exit_free;
}
#endif
mutex_init(&data->update_lock);
data->type = id->driver_data;
if (data->type == as6712_32x_cpld2 || data->type == as6712_32x_cpld3) {
data->last_chan = chips[data->type].deselectChan; /* force the first selection */
/* Now create an adapter for each channel */
/* Now create an adapter for each channel */
for (chan = 0; chan < chips[data->type].nchans; chan++) {
data->virt_adaps[chan] = i2c_add_mux_adapter(adap, &client->dev, client, 0, chan,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)
I2C_CLASS_HWMON | I2C_CLASS_SPD,
#endif
accton_i2c_cpld_mux_select_chan,
accton_i2c_cpld_mux_deselect_mux);
data->virt_adaps[chan] = i2c_add_mux_adapter(adap, &client->dev, client, 0, chan, 0,
as6712_32x_cpld_mux_select_chan,
as6712_32x_cpld_mux_deselect_mux);
if (data->virt_adaps[chan] == NULL) {
ret = -ENODEV;
dev_err(&client->dev, "failed to register multiplexed adapter %d\n", chan);
goto virt_reg_failed;
goto exit_mux_register;
}
}
dev_info(&client->dev, "registered %d multiplexed busses for I2C mux %s\n",
chan, client->name);
dev_info(&client->dev, "registered %d multiplexed busses for I2C mux %s\n",
chan, client->name);
}
accton_i2c_cpld_add_client(client);
/* Register sysfs hooks */
switch (data->type) {
case as6712_32x_cpld1:
group = &as6712_32x_cpld1_group;
break;
case as6712_32x_cpld2:
group = &as6712_32x_cpld2_group;
break;
case as6712_32x_cpld3:
group = &as6712_32x_cpld3_group;
break;
default:
break;
}
ret = sysfs_create_file(&client->dev.kobj, &ver.attr);
if (ret)
goto virt_reg_failed;
if (group) {
ret = sysfs_create_group(&client->dev.kobj, group);
if (ret) {
goto exit_mux_register;
}
}
as6712_32x_cpld_add_client(client);
return 0;
virt_reg_failed:
exit_mux_register:
for (chan--; chan >= 0; chan--) {
i2c_del_mux_adapter(data->virt_adaps[chan]);
}
kfree(data);
err:
kfree(data);
exit:
return ret;
}
}
static int accton_i2c_cpld_mux_remove(struct i2c_client *client)
static int as6712_32x_cpld_mux_remove(struct i2c_client *client)
{
struct accton_i2c_cpld_mux *data = i2c_get_clientdata(client);
struct as6712_32x_cpld_data *data = i2c_get_clientdata(client);
const struct chip_desc *chip = &chips[data->type];
int chan;
const struct attribute_group *group = NULL;
sysfs_remove_file(&client->dev.kobj, &ver.attr);
as6712_32x_cpld_remove_client(client);
/* Remove sysfs hooks */
switch (data->type) {
case as6712_32x_cpld1:
group = &as6712_32x_cpld1_group;
break;
case as6712_32x_cpld2:
group = &as6712_32x_cpld2_group;
break;
case as6712_32x_cpld3:
group = &as6712_32x_cpld3_group;
break;
default:
break;
}
if (group) {
sysfs_remove_group(&client->dev.kobj, group);
}
for (chan = 0; chan < chip->nchans; ++chan) {
if (data->virt_adaps[chan]) {
@@ -347,12 +605,47 @@ static int accton_i2c_cpld_mux_remove(struct i2c_client *client)
}
kfree(data);
accton_i2c_cpld_remove_client(client);
return 0;
}
int as6712_32x_i2c_cpld_read(unsigned short cpld_addr, u8 reg)
static int as6712_32x_cpld_read_internal(struct i2c_client *client, u8 reg)
{
int status = 0, retry = I2C_RW_RETRY_COUNT;
while (retry) {
status = i2c_smbus_read_byte_data(client, reg);
if (unlikely(status < 0)) {
msleep(I2C_RW_RETRY_INTERVAL);
retry--;
continue;
}
break;
}
return status;
}
static int as6712_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value)
{
int status = 0, retry = I2C_RW_RETRY_COUNT;
while (retry) {
status = i2c_smbus_write_byte_data(client, reg, value);
if (unlikely(status < 0)) {
msleep(I2C_RW_RETRY_INTERVAL);
retry--;
continue;
}
break;
}
return status;
}
int as6712_32x_cpld_read(unsigned short cpld_addr, u8 reg)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
@@ -365,8 +658,8 @@ int as6712_32x_i2c_cpld_read(unsigned short cpld_addr, u8 reg)
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client->addr == cpld_addr) {
ret = i2c_smbus_read_byte_data(cpld_node->client, reg);
break;
ret = as6712_32x_cpld_read_internal(cpld_node->client, reg);
break;
}
}
@@ -374,9 +667,9 @@ int as6712_32x_i2c_cpld_read(unsigned short cpld_addr, u8 reg)
return ret;
}
EXPORT_SYMBOL(as6712_32x_i2c_cpld_read);
EXPORT_SYMBOL(as6712_32x_cpld_read);
int as6712_32x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value)
int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
@@ -389,8 +682,8 @@ int as6712_32x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value)
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client->addr == cpld_addr) {
ret = i2c_smbus_write_byte_data(cpld_node->client, reg, value);
break;
ret = as6712_32x_cpld_write_internal(cpld_node->client, reg, value);
break;
}
}
@@ -398,32 +691,33 @@ int as6712_32x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value)
return ret;
}
EXPORT_SYMBOL(as6712_32x_i2c_cpld_write);
EXPORT_SYMBOL(as6712_32x_cpld_write);
static struct i2c_driver accton_i2c_cpld_mux_driver = {
static struct i2c_driver as6712_32x_cpld_mux_driver = {
.driver = {
.name = "as6712_32x_cpld",
.owner = THIS_MODULE,
},
.probe = accton_i2c_cpld_mux_probe,
.remove = accton_i2c_cpld_mux_remove,
.id_table = accton_i2c_cpld_mux_id,
.probe = as6712_32x_cpld_mux_probe,
.remove = as6712_32x_cpld_mux_remove,
.id_table = as6712_32x_cpld_mux_id,
};
static int __init accton_i2c_cpld_mux_init(void)
static int __init as6712_32x_cpld_mux_init(void)
{
mutex_init(&list_lock);
return i2c_add_driver(&accton_i2c_cpld_mux_driver);
return i2c_add_driver(&as6712_32x_cpld_mux_driver);
}
static void __exit accton_i2c_cpld_mux_exit(void)
static void __exit as6712_32x_cpld_mux_exit(void)
{
i2c_del_driver(&accton_i2c_cpld_mux_driver);
i2c_del_driver(&as6712_32x_cpld_mux_driver);
}
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("Accton I2C CPLD mux driver");
MODULE_LICENSE("GPL");
module_init(accton_i2c_cpld_mux_init);
module_exit(accton_i2c_cpld_mux_exit);
module_init(as6712_32x_cpld_mux_init);
module_exit(as6712_32x_cpld_mux_exit);

13
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/x86-64-accton-as6712-32x-fan.c
View File

@@ -138,8 +138,8 @@ static ssize_t fan_set_duty_cycle(struct device *dev,
static ssize_t fan_show_value(struct device *dev,
struct device_attribute *da, char *buf);
extern int as6712_32x_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as6712_32x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as6712_32x_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
/*******************/
@@ -258,12 +258,12 @@ static const struct attribute_group accton_as6712_32x_fan_group = {
static int accton_as6712_32x_fan_read_value(u8 reg)
{
return as6712_32x_i2c_cpld_read(0x60, reg);
return as6712_32x_cpld_read(0x60, reg);
}
static int accton_as6712_32x_fan_write_value(u8 reg, u8 value)
{
return as6712_32x_i2c_cpld_write(0x60, reg, value);
return as6712_32x_cpld_write(0x60, reg, value);
}
static void accton_as6712_32x_fan_update_device(struct device *dev)
@@ -396,11 +396,6 @@ static struct platform_driver accton_as6712_32x_fan_driver = {
static int __init accton_as6712_32x_fan_init(void)
{
int ret;
extern int platform_accton_as6712_32x(void);
if(!platform_accton_as6712_32x()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as6712_32x_fan_driver);
if (ret < 0) {

13
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/x86-64-accton-as6712-32x-leds.c
View File

@@ -29,8 +29,8 @@
#include <linux/leds.h>
#include <linux/slab.h>
extern int as6712_32x_i2c_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as6712_32x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as6712_32x_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern void led_classdev_unregister(struct led_classdev *led_cdev);
extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev);
@@ -239,12 +239,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
static int accton_as6712_32x_led_read_value(u8 reg)
{
return as6712_32x_i2c_cpld_read(0x60, reg);
return as6712_32x_cpld_read(0x60, reg);
}
static int accton_as6712_32x_led_write_value(u8 reg, u8 value)
{
return as6712_32x_i2c_cpld_write(0x60, reg, value);
return as6712_32x_cpld_write(0x60, reg, value);
}
static void accton_as6712_32x_led_update(void)
@@ -571,11 +571,6 @@ static int __init accton_as6712_32x_led_init(void)
{
int ret;
extern int platform_accton_as6712_32x(void);
if(!platform_accton_as6712_32x()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as6712_32x_led_driver);
if (ret < 0) {
goto exit;

21
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/x86-64-accton-as6712-32x-psu.c
View File

@@ -42,7 +42,7 @@ static ssize_t show_index(struct device *dev, struct device_attribute *da, char
static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
static int as6712_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
extern int as6712_32x_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as6712_32x_cpld_read(unsigned short cpld_addr, u8 reg);
static int as6712_32x_psu_model_name_get(struct device *dev);
/* Addresses scanned
@@ -336,7 +336,7 @@ static struct as6712_32x_psu_data *as6712_32x_psu_update_device(struct device *d
data->valid = 0;
/* Read psu status */
status = as6712_32x_i2c_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET);
status = as6712_32x_cpld_read(PSU_STATUS_I2C_ADDR, PSU_STATUS_I2C_REG_OFFSET);
if (status < 0) {
dev_dbg(&client->dev, "cpld reg (0x%x) err %d\n", PSU_STATUS_I2C_ADDR, status);
@@ -356,24 +356,9 @@ exit:
return data;
}
static int __init as6712_32x_psu_init(void)
{
extern int platform_accton_as6712_32x(void);
if(!platform_accton_as6712_32x()) {
return -ENODEV;
}
return i2c_add_driver(&as6712_32x_psu_driver);
}
static void __exit as6712_32x_psu_exit(void)
{
i2c_del_driver(&as6712_32x_psu_driver);
}
module_i2c_driver(as6712_32x_psu_driver);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("as6712_32x_psu driver");
MODULE_LICENSE("GPL");
module_init(as6712_32x_psu_init);
module_exit(as6712_32x_psu_exit);

1532
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/x86-64-accton-as6712-32x-sfp.c
View File

File diff suppressed because it is too large Load Diff

104
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/onlp/builds/src/module/src/sfpi.c
View File

@@ -24,44 +24,17 @@
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include "x86_64_accton_as6712_32x_int.h"
#include "x86_64_accton_as6712_32x_log.h"
#include <fcntl.h> /* For O_RDWR && open */
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#define PORT_BUS_INDEX(port) (port+2)
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
#define MODULE_PRESENT_FORMAT "/sys/bus/i2c/devices/0-00%d/module_present_%d"
#define MODULE_PRESENT_ALL_ATTR_CPLD2 "/sys/bus/i2c/devices/0-0062/module_present_all"
#define MODULE_PRESENT_ALL_ATTR_CPLD3 "/sys/bus/i2c/devices/0-0064/module_present_all"
#include "platform_lib.h"
#define MAX_SFP_PATH 64
static char sfp_node_path[MAX_SFP_PATH] = {0};
#define FRONT_PORT_TO_CPLD_MUX_INDEX(port) (port+2)
static int
as6712_32x_sfp_node_read_int(char *node_path, int *value, int data_len)
{
int ret = 0;
char buf[8];
*value = 0;
ret = deviceNodeReadString(node_path, buf, sizeof(buf), data_len);
if (ret == 0) {
*value = atoi(buf);
}
return ret;
}
static char*
as6712_32x_sfp_get_port_path(int port, char *node_name)
{
sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-0050/%s",
FRONT_PORT_TO_CPLD_MUX_INDEX(port),
node_name);
return sfp_node_path;
}
/************************************************************
*
@@ -100,9 +73,9 @@ onlp_sfpi_is_present(int port)
* Return < 0 if error.
*/
int present;
char* path = as6712_32x_sfp_get_port_path(port, "sfp_is_present");
if (as6712_32x_sfp_node_read_int(path, &present, 1) != 0) {
int addr = (port < 16) ? 62 : 64;
if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
@@ -114,27 +87,34 @@ int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[4];
char* path;
uint32_t *ptr = bytes;
FILE* fp;
path = as6712_32x_sfp_get_port_path(0, "sfp_is_present_all");
fp = fopen(path, "r");
/* Read present status of port 0~31 */
int addr;
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3
);
fclose(fp);
if(count != AIM_ARRAYSIZE(bytes)) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
return ONLP_STATUS_E_INTERNAL;
for (addr = 62; addr <= 64; addr+=2) {
if (addr == 62) {
fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD2, "r");
}
else {
fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD3, "r");
}
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x", ptr+0, ptr+1);
fclose(fp);
if(count != 2) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the module_present_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
ptr += count;
}
/* Convert to 64 bit integer in port order */
@@ -163,21 +143,25 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
char* path = as6712_32x_sfp_get_port_path(port, "sfp_eeprom");
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int size = 0;
memset(data, 0, 256);
if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port)) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
if (size != 256) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}

8
packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/python/x86_64_accton_as6712_32x_r0/__init__.py
View File

@@ -8,9 +8,10 @@ class OnlPlatform_x86_64_accton_as6712_32x_r0(OnlPlatformAccton,
SYS_OBJECT_ID=".6712.32"
def baseconfig(self):
self.insmod('optoe')
self.insmod('cpr_4011_4mxx')
self.insmod("ym2651y")
for m in [ 'cpld', 'fan', 'psu', 'leds', 'sfp' ]:
for m in [ 'cpld', 'fan', 'psu', 'leds' ]:
self.insmod("x86-64-accton-as6712-32x-%s.ko" % m)
########### initialize I2C bus 0 ###########
@@ -25,9 +26,8 @@ class OnlPlatform_x86_64_accton_as6712_32x_r0(OnlPlatformAccton,
# initialize QSFP port 1~32
for port in range(1, 33):
self.new_i2c_device('as6712_32x_port%d' % port,
0x50,
port+1)
self.new_i2c_device('optoe1', 0x50, port+1)
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+1), shell=True)
########### initialize I2C bus 1 ###########
self.new_i2c_devices(

1262
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/modules/builds/x86-64-accton-as7312-54x-cpld.c
View File

File diff suppressed because it is too large Load Diff

20
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/modules/builds/x86-64-accton-as7312-54x-fan.c
View File

@@ -36,8 +36,6 @@ static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *d
static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da,
const char *buf, size_t count);
extern int as7312_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as7312_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
/* fan related data, the index should match sysfs_fan_attributes
*/
@@ -467,23 +465,7 @@ static struct i2c_driver as7312_54x_fan_driver = {
.address_list = normal_i2c,
};
static int __init as7312_54x_fan_init(void)
{
extern int platform_accton_as7312_54x(void);
if (!platform_accton_as7312_54x()) {
return -ENODEV;
}
return i2c_add_driver(&as7312_54x_fan_driver);
}
static void __exit as7312_54x_fan_exit(void)
{
i2c_del_driver(&as7312_54x_fan_driver);
}
module_init(as7312_54x_fan_init);
module_exit(as7312_54x_fan_exit);
module_i2c_driver(as7312_54x_fan_driver);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("as7312_54x_fan driver");

13
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/modules/builds/x86-64-accton-as7312-54x-leds.c
View File

@@ -30,8 +30,8 @@
#include <linux/slab.h>
#include <linux/dmi.h>
extern int as7312_54x_i2c_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as7312_54x_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern int as7312_54x_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
extern void led_classdev_unregister(struct led_classdev *led_cdev);
extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev);
@@ -175,12 +175,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
static int accton_as7312_54x_led_read_value(u8 reg)
{
return as7312_54x_i2c_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
return as7312_54x_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
}
static int accton_as7312_54x_led_write_value(u8 reg, u8 value)
{
return as7312_54x_i2c_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
return as7312_54x_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
}
static void accton_as7312_54x_led_update(void)
@@ -397,11 +397,6 @@ static int __init accton_as7312_54x_led_init(void)
{
int ret;
extern int platform_accton_as7312_54x(void);
if (!platform_accton_as7312_54x()) {
return -ENODEV;
}
ret = platform_driver_register(&accton_as7312_54x_led_driver);
if (ret < 0) {
goto exit;

22
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/modules/builds/x86-64-accton-as7312-54x-psu.c
View File

@@ -37,7 +37,7 @@
static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
static int as7312_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
extern int as7312_54x_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int as7312_54x_cpld_read(unsigned short cpld_addr, u8 reg);
/* Addresses scanned
*/
@@ -234,7 +234,7 @@ static struct as7312_54x_psu_data *as7312_54x_psu_update_device(struct device *d
dev_dbg(&client->dev, "Starting as7312_54x update\n");
/* Read psu status */
status = as7312_54x_i2c_cpld_read(0x60, 0x2);
status = as7312_54x_cpld_read(0x60, 0x2);
if (status < 0) {
dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status);
@@ -269,23 +269,7 @@ static struct as7312_54x_psu_data *as7312_54x_psu_update_device(struct device *d
return data;
}
static int __init as7312_54x_psu_init(void)
{
extern int platform_accton_as7312_54x(void);
if (!platform_accton_as7312_54x()) {
return -ENODEV;
}
return i2c_add_driver(&as7312_54x_psu_driver);
}
static void __exit as7312_54x_psu_exit(void)
{
i2c_del_driver(&as7312_54x_psu_driver);
}
module_init(as7312_54x_psu_init);
module_exit(as7312_54x_psu_exit);
module_i2c_driver(as7312_54x_psu_driver);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("as7312_54x_psu driver");

1884
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/modules/builds/x86-64-accton-as7312-54x-sfp.c
View File

File diff suppressed because it is too large Load Diff

254
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/onlp/builds/src/module/src/sfpi.c
View File

@@ -2,7 +2,7 @@
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
* Copyright 2013 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
@@ -24,30 +24,21 @@
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <fcntl.h>
#include <unistd.h>
#include "platform_lib.h"
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include "x86_64_accton_as7312_54x_int.h"
#include "x86_64_accton_as7312_54x_log.h"
#define NUM_OF_SFP_PORT 54
#define MAX_SFP_PATH 64
static char sfp_node_path[MAX_SFP_PATH] = {0};
#define FRONT_PORT_BUS_INDEX(port) (port+18)
#define PORT_BUS_INDEX(port) (port+18)
static char*
sfp_get_port_path_addr(int port, int addr, char *node_name)
{
sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-00%d/%s",
FRONT_PORT_BUS_INDEX(port), addr, node_name);
return sfp_node_path;
}
static char*
sfp_get_port_path(int port, char *node_name)
{
return sfp_get_port_path_addr(port, 50, node_name);
}
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
#define MODULE_PRESENT_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_present_%d"
#define MODULE_RXLOS_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_rx_los_%d"
#define MODULE_TXFAULT_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_tx_fault_%d"
#define MODULE_TXDISABLE_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_tx_disable_%d"
#define MODULE_PRESENT_ALL_ATTR "/sys/bus/i2c/devices/%d-00%d/module_present_all"
#define MODULE_RXLOS_ALL_ATTR_CPLD2 "/sys/bus/i2c/devices/5-0062/module_rx_los_all"
#define MODULE_RXLOS_ALL_ATTR_CPLD3 "/sys/bus/i2c/devices/6-0064/module_rx_los_all"
/************************************************************
*
@@ -57,7 +48,7 @@ sfp_get_port_path(int port, char *node_name)
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
/* Called at initialization time */
return ONLP_STATUS_OK;
}
@@ -68,8 +59,8 @@ onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
* Ports {0, 54}
*/
int p;
for(p = 0; p < NUM_OF_SFP_PORT; p++) {
for(p = 0; p < 54; p++) {
AIM_BITMAP_SET(bmap, p);
}
@@ -85,55 +76,68 @@ onlp_sfpi_is_present(int port)
* Return < 0 if error.
*/
int present;
char *path = sfp_get_port_path(port, "sfp_is_present");
int bus, addr;
if (onlp_file_read_int(&present, path) < 0) {
addr = (port < 24 || (port >= 48 && port <= 51)) ? 62 : 64;
bus = (addr == 62) ? 5 : 6;
if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return present;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[7];
char* path;
uint32_t bytes[8], *ptr = NULL;
FILE* fp;
int addr;
AIM_BITMAP_CLR_ALL(dst);
ptr = bytes;
path = sfp_get_port_path(0, "sfp_is_present_all");
fp = fopen(path, "r");
for (addr = 62; addr <= 64; addr+=2) {
/* Read present status of port 0~53 */
char file[64] = {0};
int bus = (addr == 62) ? 5 : 6;
sprintf(file, MODULE_PRESENT_ALL_ATTR, bus, addr);
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD3.");
return ONLP_STATUS_E_INTERNAL;
}
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3,
bytes+4,
bytes+5,
bytes+6
);
fclose(fp);
if(count != AIM_ARRAYSIZE(bytes)) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
return ONLP_STATUS_E_INTERNAL;
int count = fscanf(fp, "%x %x %x %x", ptr+0, ptr+1, ptr+2, ptr+3);
fclose(fp);
if(count != 4) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD3.");
return ONLP_STATUS_E_INTERNAL;
}
ptr += count;
}
/* Mask out non-existant QSFP ports */
bytes[6] &= 0x3F;
bytes[3] &= 0xF;
bytes[7] &= 0x3;
/* Convert to 64 bit integer in port order */
int i = 0;
uint64_t presence_all = 0 ;
for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
presence_all |= bytes[7];
presence_all <<= 4;
presence_all |= bytes[3];
for(i = 6; i >= 4; i--) {
presence_all <<= 8;
presence_all |= bytes[i];
}
for(i = 2; i >= 0; i--) {
presence_all <<= 8;
presence_all |= bytes[i];
}
@@ -151,32 +155,38 @@ int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[6];
char* path;
uint32_t *ptr = bytes;
FILE* fp;
path = sfp_get_port_path(0, "sfp_rx_los_all");
fp = fopen(path, "r");
/* Read present status of port 0~23 */
int addr, i = 0;
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the sfp_rx_los_all device file.");
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x %x %x %x",
bytes+0,
bytes+1,
bytes+2,
bytes+3,
bytes+4,
bytes+5
);
fclose(fp);
if(count != 6) {
AIM_LOG_ERROR("Unable to read all fields from the sfp_rx_los_all device file.");
return ONLP_STATUS_E_INTERNAL;
for (addr = 62; addr <= 64; addr+=2) {
if (addr == 62) {
fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD2, "r");
}
else {
fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD3, "r");
}
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the module_rx_los_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
int count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
fclose(fp);
if(count != 3) {
/* Likely a CPLD read timeout. */
AIM_LOG_ERROR("Unable to read all fields from the module_rx_los_all device file of CPLD(0x%d)", addr);
return ONLP_STATUS_E_INTERNAL;
}
ptr += count;
}
/* Convert to 64 bit integer in port order */
int i = 0;
i = 0;
uint64_t rx_los_all = 0 ;
for(i = 5; i >= 0; i--) {
rx_los_all <<= 8;
@@ -195,50 +205,102 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
char* path = sfp_get_port_path(port, "sfp_eeprom");
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int size = 0;
memset(data, 0, 256);
if (onlp_file_read_binary(path, (char*)data, 256, 256) != 0) {
if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port)) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
if (size != 256) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
char* path = sfp_get_port_path_addr(port, 51, "sfp_eeprom");
memset(data, 0, 256);
FILE* fp;
char file[64] = {0};
sprintf(file, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port));
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
if (onlp_file_read_binary(path, (char*)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
if (fseek(fp, 256, SEEK_CUR) != 0) {
fclose(fp);
AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
int ret = fread(data, 1, 256, fp);
fclose(fp);
if (ret != 256) {
AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
{
int bus = PORT_BUS_INDEX(port);
return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
int rv;
if (port < 0 || port >= 48) {
return ONLP_STATUS_E_UNSUPPORTED;
}
int addr = (port < 24) ? 62 : 64;
int bus = (addr == 62) ? 5 : 6;
switch(control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
{
char* path = sfp_get_port_path(port, "sfp_tx_disable");
if (onlp_file_write_integer(path, value) != 0) {
if (onlp_file_write_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -260,16 +322,20 @@ int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int rv;
char* path = NULL;
if (port < 0 || port >= 48) {
return ONLP_STATUS_E_UNSUPPORTED;
}
int addr = (port < 24) ? 62 : 64;
int bus = (addr == 62) ? 5 : 6;
switch(control)
{
case ONLP_SFP_CONTROL_RX_LOS:
{
path = sfp_get_port_path(port, "sfp_rx_los");
if (onlp_file_read_int(value, path) < 0) {
AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port);
if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read rx_loss status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else {
@@ -280,9 +346,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
case ONLP_SFP_CONTROL_TX_FAULT:
{
path = sfp_get_port_path(port, "sfp_tx_fault");
if (onlp_file_read_int(value, path) < 0) {
if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -294,9 +358,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
case ONLP_SFP_CONTROL_TX_DISABLE:
{
path = sfp_get_port_path(port, "sfp_tx_disable");
if (onlp_file_read_int(value, path) < 0) {
if (onlp_file_read_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
@@ -313,11 +375,9 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
return rv;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

76
packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/platform-config/r0/src/python/x86_64_accton_as7312_54x_r0/__init__.py
View File

@@ -9,8 +9,9 @@ class OnlPlatform_x86_64_accton_as7312_54x_r0(OnlPlatformAccton,
SYS_OBJECT_ID=".7312.54"
def baseconfig(self):
self.insmod('optoe')
self.insmod('ym2651y')
for m in [ 'cpld', 'fan', 'psu', 'leds', 'sfp' ]:
for m in [ 'cpld', 'fan', 'psu', 'leds' ]:
self.insmod("x86-64-accton-as7312-54x-%s.ko" % m)
########### initialize I2C bus 0 ###########
@@ -31,9 +32,9 @@ class OnlPlatform_x86_64_accton_as7312_54x_r0(OnlPlatformAccton,
self.new_i2c_devices([
# initialize CPLD
('accton_i2c_cpld', 0x60, 4),
('accton_i2c_cpld', 0x62, 5),
('accton_i2c_cpld', 0x64, 6),
('as7312_54x_cpld1', 0x60, 4),
('as7312_54x_cpld2', 0x62, 5),
('as7312_54x_cpld3', 0x64, 6),
])
self.new_i2c_device('pca9548', 0x71, 0)
@@ -67,63 +68,14 @@ class OnlPlatform_x86_64_accton_as7312_54x_r0(OnlPlatformAccton,
)
# initialize QSFP port 1~54
self.new_i2c_devices(
[
('as7312_54x_port1', 0x50, 18),
('as7312_54x_port2', 0x50, 19),
('as7312_54x_port3', 0x50, 20),
('as7312_54x_port4', 0x50, 21),
('as7312_54x_port5', 0x50, 22),
('as7312_54x_port6', 0x50, 23),
('as7312_54x_port7', 0x50, 24),
('as7312_54x_port8', 0x50, 25),
('as7312_54x_port9', 0x50, 26),
('as7312_54x_port10', 0x50, 27),
('as7312_54x_port11', 0x50, 28),
('as7312_54x_port12', 0x50, 29),
('as7312_54x_port13', 0x50, 30),
('as7312_54x_port14', 0x50, 31),
('as7312_54x_port15', 0x50, 32),
('as7312_54x_port16', 0x50, 33),
('as7312_54x_port17', 0x50, 34),
('as7312_54x_port18', 0x50, 35),
('as7312_54x_port19', 0x50, 36),
('as7312_54x_port20', 0x50, 37),
('as7312_54x_port21', 0x50, 38),
('as7312_54x_port22', 0x50, 39),
('as7312_54x_port23', 0x50, 40),
('as7312_54x_port24', 0x50, 41),
('as7312_54x_port25', 0x50, 42),
('as7312_54x_port26', 0x50, 43),
('as7312_54x_port27', 0x50, 44),
('as7312_54x_port28', 0x50, 45),
('as7312_54x_port29', 0x50, 46),
('as7312_54x_port30', 0x50, 47),
('as7312_54x_port31', 0x50, 48),
('as7312_54x_port32', 0x50, 49),
('as7312_54x_port33', 0x50, 50),
('as7312_54x_port34', 0x50, 51),
('as7312_54x_port35', 0x50, 52),
('as7312_54x_port36', 0x50, 53),
('as7312_54x_port37', 0x50, 54),
('as7312_54x_port38', 0x50, 55),
('as7312_54x_port39', 0x50, 56),
('as7312_54x_port40', 0x50, 57),
('as7312_54x_port41', 0x50, 58),
('as7312_54x_port42', 0x50, 59),
('as7312_54x_port43', 0x50, 60),
('as7312_54x_port44', 0x50, 61),
('as7312_54x_port45', 0x50, 62),
('as7312_54x_port46', 0x50, 63),
('as7312_54x_port47', 0x50, 64),
('as7312_54x_port48', 0x50, 65),
('as7312_54x_port49', 0x50, 66),
('as7312_54x_port50', 0x50, 67),
('as7312_54x_port51', 0x50, 68),
('as7312_54x_port52', 0x50, 69),
('as7312_54x_port53', 0x50, 70),
('as7312_54x_port54', 0x50, 71),
]
)
for port in range(1, 49):
self.new_i2c_device('optoe2', 0x50, port+17)
for port in range(49, 55):
self.new_i2c_device('optoe1', 0x50, port+17)
for port in range(1, 55):
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+17), shell=True)
self.new_i2c_device('24c02', 0x57, 1)
return True

3
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/.gitignore vendored Normal file
View File

@@ -0,0 +1,3 @@
*x86*64*accton*wedge100*32x*.mk
onlpdump.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/modules/Makefile Normal file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/modules/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-wedge100-32x

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-accton-wedge100-32x ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

2
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/Makefile Normal file
View File

@@ -0,0 +1,2 @@
FILTER=src
include $(ONL)/make/subdirs.mk

45
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/lib/Makefile Normal file
View File

@@ -0,0 +1,45 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-accton-wedge100-32x
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_accton_wedge100_32x onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-accton-wedge100-32x.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

46
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/onlpdump/Makefile Normal file
View File

@@ -0,0 +1,46 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_accton_wedge100_32x onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/.module Normal file
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name: x86_64_accton_wedge100_32x

9
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###############################################################################
#
#
#
###############################################################################
include ../../init.mk
MODULE := x86_64_accton_wedge100_32x
AUTOMODULE := x86_64_accton_wedge100_32x
include $(BUILDER)/definemodule.mk

6
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###############################################################################
#
# x86_64_accton_wedge100_32x README
#
###############################################################################

9
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###############################################################################
#
# x86_64_accton_wedge100_32x Autogeneration
#
###############################################################################
x86_64_accton_wedge100_32x_AUTO_DEFS := module/auto/x86_64_accton_wedge100_32x.yml
x86_64_accton_wedge100_32x_AUTO_DIRS := module/inc/x86_64_accton_wedge100_32x module/src
include $(BUILDER)/auto.mk

50
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###############################################################################
#
# X86_64_ACCTON_WEDGE100_32X Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB
- X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION:
doc: "Assume chassis fan direction is the same as the PSU fan direction."
default: 0
definitions:
cdefs:
X86_64_ACCTON_WEDGE100_32X_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_accton_wedge100_32x_config
portingmacro:
X86_64_ACCTON_WEDGE100_32X:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/inc/x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x.x Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

137
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/inc/x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h Normal file
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/**************************************************************************//**
*
* @file
* @brief x86_64_accton_wedge100_32x Configuration Header
*
* @addtogroup x86_64_accton_wedge100_32x-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_WEDGE100_32X_CONFIG_H__
#define __X86_64_ACCTON_WEDGE100_32X_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_INCLUDE_CUSTOM_CONFIG
#include <x86_64_accton_wedge100_32x_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_ACCTON_WEDGE100_32X_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
*
* Assume chassis fan direction is the same as the PSU fan direction. */
#ifndef X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
#define X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_accton_wedge100_32x_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_accton_wedge100_32x_config_settings_t;
/** Configuration settings table. */
/** x86_64_accton_wedge100_32x_config_settings table. */
extern x86_64_accton_wedge100_32x_config_settings_t x86_64_accton_wedge100_32x_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_accton_wedge100_32x_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_accton_wedge100_32x_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_ACCTON_WEDGE100_32X_CONFIG_HEADER).header> */
#include "x86_64_accton_wedge100_32x_porting.h"
#endif /* __X86_64_ACCTON_WEDGE100_32X_CONFIG_H__ */
/* @} */

26
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/inc/x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_dox.h Normal file
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/**************************************************************************//**
*
* x86_64_accton_wedge100_32x Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_WEDGE100_32X_DOX_H__
#define __X86_64_ACCTON_WEDGE100_32X_DOX_H__
/**
* @defgroup x86_64_accton_wedge100_32x x86_64_accton_wedge100_32x - x86_64_accton_wedge100_32x Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_accton_wedge100_32x-x86_64_accton_wedge100_32x Public Interface
* @defgroup x86_64_accton_wedge100_32x-config Compile Time Configuration
* @defgroup x86_64_accton_wedge100_32x-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_ACCTON_WEDGE100_32X_DOX_H__ */

107
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/inc/x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_porting.h Normal file
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/**************************************************************************//**
*
* @file
* @brief x86_64_accton_wedge100_32x Porting Macros.
*
* @addtogroup x86_64_accton_wedge100_32x-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_WEDGE100_32X_PORTING_H__
#define __X86_64_ACCTON_WEDGE100_32X_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef x86_64_accton_wedge100_32x_MALLOC
#if defined(GLOBAL_MALLOC)
#define x86_64_accton_wedge100_32x_MALLOC GLOBAL_MALLOC
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_MALLOC malloc
#else
#error The macro x86_64_accton_wedge100_32x_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_FREE
#if defined(GLOBAL_FREE)
#define x86_64_accton_wedge100_32x_FREE GLOBAL_FREE
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_FREE free
#else
#error The macro x86_64_accton_wedge100_32x_FREE is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_MEMSET
#if defined(GLOBAL_MEMSET)
#define x86_64_accton_wedge100_32x_MEMSET GLOBAL_MEMSET
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_MEMSET memset
#else
#error The macro x86_64_accton_wedge100_32x_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define x86_64_accton_wedge100_32x_MEMCPY GLOBAL_MEMCPY
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_MEMCPY memcpy
#else
#error The macro x86_64_accton_wedge100_32x_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define x86_64_accton_wedge100_32x_STRNCPY GLOBAL_STRNCPY
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_STRNCPY strncpy
#else
#error The macro x86_64_accton_wedge100_32x_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define x86_64_accton_wedge100_32x_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_VSNPRINTF vsnprintf
#else
#error The macro x86_64_accton_wedge100_32x_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define x86_64_accton_wedge100_32x_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_SNPRINTF snprintf
#else
#error The macro x86_64_accton_wedge100_32x_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_accton_wedge100_32x_STRLEN
#if defined(GLOBAL_STRLEN)
#define x86_64_accton_wedge100_32x_STRLEN GLOBAL_STRLEN
#elif X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB == 1
#define x86_64_accton_wedge100_32x_STRLEN strlen
#else
#error The macro x86_64_accton_wedge100_32x_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_ACCTON_WEDGE100_32X_PORTING_H__ */
/* @} */

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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_accton_wedge100_32x_INCLUDES := -I $(THIS_DIR)inc
x86_64_accton_wedge100_32x_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_accton_wedge100_32x_DEPENDMODULE_ENTRIES := init:x86_64_accton_wedge100_32x ucli:x86_64_accton_wedge100_32x

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###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_accton_wedge100_32x_ucli.c

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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlplib/file.h>
#include <onlp/platformi/fani.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define MAX_FAN_SPEED 15400
#define BIT(i) (1 << (i))
enum fan_id {
FAN_1_ON_FAN_BOARD = 1,
FAN_2_ON_FAN_BOARD,
FAN_3_ON_FAN_BOARD,
FAN_4_ON_FAN_BOARD,
FAN_5_ON_FAN_BOARD,
};
#define FAN_BOARD_PATH "/sys/bus/i2c/devices/8-0033/"
#define CHASSIS_FAN_INFO(fid) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fid##_ON_FAN_BOARD), "Chassis Fan - "#fid, 0 },\
0x0,\
ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,\
0,\
0,\
ONLP_FAN_MODE_INVALID,\
}
/* Static fan information */
onlp_fan_info_t finfo[] = {
{ }, /* Not used */
CHASSIS_FAN_INFO(1),
CHASSIS_FAN_INFO(2),
CHASSIS_FAN_INFO(3),
CHASSIS_FAN_INFO(4),
CHASSIS_FAN_INFO(5)
};
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
int value = 0, fid;
char path[64] = {0};
VALIDATE(id);
fid = ONLP_OID_ID_GET(id);
*info = finfo[fid];
/* get fan present status
*/
sprintf(path, "%s""fantray_present", FAN_BOARD_PATH);
if (bmc_file_read_int(&value, path, 16) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
if (value & BIT(fid-1)) {
return ONLP_STATUS_OK;
}
info->status |= ONLP_FAN_STATUS_PRESENT;
/* get front fan rpm
*/
sprintf(path, "%s""fan%d_input", FAN_BOARD_PATH, fid*2 - 1);
if (bmc_file_read_int(&value, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
info->rpm = value;
/* get rear fan rpm
*/
sprintf(path, "%s""fan%d_input", FAN_BOARD_PATH, fid*2);
if (bmc_file_read_int(&value, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
/* take the min value from front/rear fan speed
*/
if (info->rpm > value) {
info->rpm = value;
}
/* set fan status based on rpm
*/
if (!info->rpm) {
info->status |= ONLP_FAN_STATUS_FAILED;
return ONLP_STATUS_OK;
}
/* get speed percentage from rpm
*/
info->percentage = (info->rpm * 100)/MAX_FAN_SPEED;
/* set fan direction
*/
info->status |= ONLP_FAN_STATUS_F2B;
return ONLP_STATUS_OK;
}
/*
* This function sets the speed of the given fan in RPM.
*
* This function will only be called if the fan supprots the RPM_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int p)
{
char cmd[32] = {0};
sprintf(cmd, "set_fan_speed.sh %d", p);
if (bmc_send_command(cmd) < 0) {
AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
*
* This function is only relevant if the fan OID supports both direction
* capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2013 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include <onlp/platformi/ledi.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
/* LED related data
*/
enum onlp_led_id
{
LED_RESERVED = 0,
LED_SYS1,
LED_SYS2
};
typedef struct led_address_s {
enum onlp_led_id id;
uint8_t bus;
uint8_t devaddr;
uint8_t offset;
} led_address_t;
typedef struct led_mode_info_s {
onlp_led_mode_t mode;
uint8_t regval;
} led_mode_info_t;
static led_address_t led_addr[] =
{
{ }, /* Not used */
{LED_SYS1, 0, 0x32, 0x3e},
{LED_SYS2, 0, 0x32, 0x3f},
};
static led_mode_info_t led_mode_info[] =
{
{ONLP_LED_MODE_OFF, 0x0},
{ONLP_LED_MODE_OFF, 0x8},
{ONLP_LED_MODE_RED, 0x1},
{ONLP_LED_MODE_RED_BLINKING, 0x9},
{ONLP_LED_MODE_GREEN, 0x2},
{ONLP_LED_MODE_GREEN_BLINKING, 0xa},
{ONLP_LED_MODE_BLUE, 0x4},
{ONLP_LED_MODE_BLUE_BLINKING, 0xc},
};
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t linfo[] =
{
{ }, /* Not used */
{
{ ONLP_LED_ID_CREATE(LED_SYS1), "Chassis LED 1 (SYS LED 1)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING |
ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING |
ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING,
},
{
{ ONLP_LED_ID_CREATE(LED_SYS2), "Chassis LED 1 (SYS LED 2)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING |
ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING |
ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING,
},
};
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
return ONLP_STATUS_OK;
}
static int
reg_value_to_onlp_led_mode(enum onlp_led_id id, int value)
{
int i;
for (i = 0; i < AIM_ARRAYSIZE(led_mode_info); i++) {
if (value != led_mode_info[i].regval) {
continue;
}
return led_mode_info[i].mode;
}
return ONLP_LED_MODE_AUTO;
}
static int
onlp_led_mode_to_reg_value(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
{
int i;
for (i = 0; i < AIM_ARRAYSIZE(led_mode_info); i++) {
if (onlp_led_mode != led_mode_info[i].mode) {
continue;
}
return led_mode_info[i].regval;
}
return 0;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int lid, value;
VALIDATE(id);
lid = ONLP_OID_ID_GET(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[ONLP_OID_ID_GET(id)];
value = onlp_i2c_readb(led_addr[lid].bus, led_addr[lid].devaddr, led_addr[lid].offset, ONLP_I2C_F_FORCE);
if (value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
info->mode = reg_value_to_onlp_led_mode(lid, value);
/* Set the on/off status */
if (info->mode != ONLP_LED_MODE_OFF) {
info->status |= ONLP_LED_STATUS_ON;
}
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
VALIDATE(id);
if (!on_or_off) {
return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
}
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int lid, value;
VALIDATE(id);
lid = ONLP_OID_ID_GET(id);
value = onlp_led_mode_to_reg_value(lid, mode);
if (onlp_i2c_writeb(led_addr[lid].bus, led_addr[lid].devaddr, led_addr[lid].offset, value, ONLP_I2C_F_FORCE) < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* Generic LED ioctl interface.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

9
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/make.mk Normal file
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###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_accton_wedge100_32x
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

250
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/platform_lib.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2017 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <termios.h>
#include <unistd.h>
#include <fcntl.h>
#include <onlplib/file.h>
#include <onlp/onlp.h>
#include "platform_lib.h"
#define TTY_DEVICE "/dev/ttyACM0"
#define TTY_PROMPT "@bmc:"
#define TTY_I2C_TIMEOUT 60000
#define TTY_BMC_LOGIN_TIMEOUT 1000000
#define TTY_RETRY 10
#define MAXIMUM_TTY_BUFFER_LENGTH 1024
#define MAXIMUM_TTY_STRING_LENGTH (MAXIMUM_TTY_BUFFER_LENGTH - 1)
static int tty_fd = -1;
static char tty_buf[MAXIMUM_TTY_BUFFER_LENGTH] = {0};
static int tty_open(void)
{
int i = 20;
struct termios attr;
if (tty_fd > -1) {
return 0;
}
do {
if ((tty_fd = open(TTY_DEVICE, O_RDWR | O_NOCTTY | O_NDELAY)) > -1) {
tcgetattr(tty_fd, &attr);
attr.c_cflag = B57600 | CS8 | CLOCAL | CREAD;
attr.c_iflag = IGNPAR;
attr.c_oflag = 0;
attr.c_lflag = 0;
attr.c_cc[VMIN] = (unsigned char)
((MAXIMUM_TTY_STRING_LENGTH > 0xFF) ? 0xFF : MAXIMUM_TTY_STRING_LENGTH);
attr.c_cc[VTIME] = 0;
cfsetospeed(&attr, B57600);
cfsetispeed(&attr, B57600);
tcsetattr(tty_fd, TCSANOW, &attr);
return 0;
}
i--;
usleep(100000);
} while (i > 0);
return -1;
}
static int tty_close(void)
{
close(tty_fd);
tty_fd = -1;
return 0;
}
static int tty_exec_buf(unsigned long udelay, const char *str)
{
if (tty_fd < 0)
return -1;
write(tty_fd, tty_buf, strlen(tty_buf)+1);
usleep(udelay);
read(tty_fd, tty_buf, MAXIMUM_TTY_BUFFER_LENGTH);
return (strstr(tty_buf, str) != NULL) ? 0 : -1;
}
static int tty_login(void)
{
int i = 10;
for (i = 1; i <= TTY_RETRY; i++) {
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "\r\r");
if (!tty_exec_buf(0, TTY_PROMPT)) {
return 0;
}
if (strstr(tty_buf, "bmc login:") != NULL)
{
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "root\r");
if (!tty_exec_buf(TTY_BMC_LOGIN_TIMEOUT, "Password:")) {
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "0penBmc\r");
if (!tty_exec_buf(TTY_BMC_LOGIN_TIMEOUT, TTY_PROMPT)) {
return 0;
}
}
}
usleep(50000);
}
return -1;
}
int bmc_send_command(char *cmd)
{
int i, ret = 0;
for (i = 1; i <= TTY_RETRY; i++) {
if (tty_open() != 0) {
printf("ERROR: Cannot open TTY device\n");
continue;
}
if (tty_login() != 0) {
//printf("ERROR: Cannot login TTY device\n");
tty_close();
continue;
}
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "%s", cmd);
ret = tty_exec_buf(TTY_I2C_TIMEOUT * i, TTY_PROMPT);
tty_close();
if (ret != 0) {
printf("ERROR: bmc_send_command timed out\n");
continue;
}
return 0;
}
AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd);
return -1;
}
int
bmc_command_read_int(int* value, char *cmd, int base)
{
int len;
int i;
char *prev_str = NULL;
char *current_str= NULL;
if (bmc_send_command(cmd) < 0) {
return ONLP_STATUS_E_INTERNAL;
}
len = (int)strlen(cmd);
prev_str = strstr(tty_buf, cmd);
if (prev_str == NULL) {
return -1;
}
for (i = 1; i <= TTY_RETRY; i++) {
current_str = strstr(prev_str + len, cmd);
if(current_str == NULL) {
*value = strtoul(prev_str + len, NULL, base);
break;
}else {
prev_str = current_str;
continue;
}
}
return 0;
}
int
bmc_file_read_int(int* value, char *file, int base)
{
char cmd[64] = {0};
snprintf(cmd, sizeof(cmd), "cat %s\r\n", file);
return bmc_command_read_int(value, cmd, base);
}
int
bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr)
{
int ret = 0, value;
char cmd[64] = {0};
snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x 0x%02x\r\n", bus, devaddr, addr);
ret = bmc_command_read_int(&value, cmd, 16);
return (ret < 0) ? ret : value;
}
int
bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value)
{
char cmd[64] = {0};
snprintf(cmd, sizeof(cmd), "i2cset -f -y %d 0x%x 0x%02x 0x%x\r\n", bus, devaddr, addr, value);
return bmc_send_command(cmd);
}
int
bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr)
{
int ret = 0, value;
char cmd[64] = {0};
snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x 0x%02x w\r\n", bus, devaddr, addr);
ret = bmc_command_read_int(&value, cmd, 16);
return (ret < 0) ? ret : value;
}
int
bmc_i2c_readraw(uint8_t bus, uint8_t devaddr, uint8_t addr, char* data, int data_size)
{
int data_len, i = 0;
char cmd[64] = {0};
char *str = NULL;
snprintf(cmd, sizeof(cmd), "i2craw -w 0x%x -r 0 %d 0x%02x\r\n", addr, bus, devaddr);
if (bmc_send_command(cmd) < 0) {
AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd);
return ONLP_STATUS_E_INTERNAL;
}
str = strstr(tty_buf, "Received:\r\n ");
if (str == NULL) {
return -1;
}
/* first byte is data length */
str += strlen("Received:\r\n ");;
data_len = strtoul(str, NULL, 16);
if (data_size < data_len) {
data_len = data_size;
}
for (i = 0; (i < data_len) && (str != NULL); i++) {
str = strstr(str, " ") + 1; /* Jump to next token */
data[i] = strtoul(str, NULL, 16);
}
data[i] = 0;
return 0;
}

69
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __PLATFORM_LIB_H__
#define __PLATFORM_LIB_H__
#include "x86_64_accton_wedge100_32x_log.h"
#define DEBUG_MODE 0
#if (DEBUG_MODE == 1)
#define DEBUG_PRINT(fmt, args...) \
printf("%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args)
#else
#define DEBUG_PRINT(fmt, args...)
#endif
#define CHASSIS_FAN_COUNT 5
#define CHASSIS_THERMAL_COUNT 8
#define CHASSIS_LED_COUNT 2
#define CHASSIS_PSU_COUNT 2
#define IDPROM_PATH "/sys/class/i2c-adapter/i2c-39/39-0050/eeprom"
enum onlp_thermal_id
{
THERMAL_RESERVED = 0,
THERMAL_CPU_CORE,
THERMAL_1_ON_MAIN_BROAD,
THERMAL_2_ON_MAIN_BROAD,
THERMAL_3_ON_MAIN_BROAD,
THERMAL_4_ON_MAIN_BROAD,
THERMAL_5_ON_MAIN_BROAD,
THERMAL_6_ON_MAIN_BROAD,
THERMAL_7_ON_MAIN_BROAD,
};
int bmc_send_command(char *cmd);
int bmc_file_read_int(int* value, char *file, int base);
int bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr);
int bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value);
int bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr);
int bmc_i2c_readraw(uint8_t bus, uint8_t devaddr, uint8_t addr, char* data, int data_size);
#endif /* __PLATFORM_LIB_H__ */

176
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include <onlp/platformi/psui.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define PSU1_ID 1
#define PSU2_ID 2
/*
* Get all information about the given PSU oid.
*/
static onlp_psu_info_t pinfo[] =
{
{ }, /* Not used */
{
{ ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 },
},
{
{ ONLP_PSU_ID_CREATE(PSU2_ID), "PSU-2", 0 },
}
};
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
static int
twos_complement_to_int(uint16_t data, uint8_t valid_bit, int mask)
{
uint16_t valid_data = data & mask;
bool is_negative = valid_data >> (valid_bit - 1);
return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
}
static int
pmbus_parse_literal_format(uint16_t value)
{
int exponent, mantissa, multiplier = 1000;
exponent = twos_complement_to_int(value >> 11, 5, 0x1f);
mantissa = twos_complement_to_int(value & 0x7ff, 11, 0x7ff);
return (exponent >= 0) ? (mantissa << exponent) * multiplier :
(mantissa * multiplier) / (1 << -exponent);
}
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int pid, value, addr;
uint8_t mask = 0;
VALIDATE(id);
pid = ONLP_OID_ID_GET(id);
*info = pinfo[pid]; /* Set the onlp_oid_hdr_t */
/* Get the present status
*/
mask = 1 << ((pid-1) * 4);
value = onlp_i2c_readb(0, 0x32, 0x10, ONLP_I2C_F_FORCE);
if (value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
if (value & mask) {
info->status &= ~ONLP_PSU_STATUS_PRESENT;
return ONLP_STATUS_OK;
}
info->status |= ONLP_PSU_STATUS_PRESENT;
info->caps = ONLP_PSU_CAPS_AC;
/* Get power good status
*/
mask = 1 << ((pid-1) * 4 + 1);
if (!(value & mask)) {
info->status |= ONLP_PSU_STATUS_FAILED;
return ONLP_STATUS_OK;
}
/* Get input output power status
*/
value = (pid == PSU1_ID) ? 0x2 : 0x1; /* mux channel for psu */
if (bmc_i2c_writeb(7, 0x70, 0, value) < 0) {
return ONLP_STATUS_E_INTERNAL;
}
/* Read vin */
addr = (pid == PSU1_ID) ? 0x59 : 0x5a;
value = bmc_i2c_readw(7, addr, 0x88);
if (value >= 0) {
info->mvin = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_VIN;
}
/* Read iin */
value = bmc_i2c_readw(7, addr, 0x89);
if (value >= 0) {
info->miin = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_IIN;
}
/* Get pin */
if ((info->caps & ONLP_PSU_CAPS_VIN) && (info->caps & ONLP_PSU_CAPS_IIN)) {
info->mpin = info->mvin * info->miin / 1000;
info->caps |= ONLP_PSU_CAPS_PIN;
}
/* Read iout */
value = bmc_i2c_readw(7, addr, 0x8c);
if (value >= 0) {
info->miout = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_IOUT;
}
/* Read pout */
value = bmc_i2c_readw(7, addr, 0x96);
if (value >= 0) {
info->mpout = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_POUT;
}
/* Get vout */
if ((info->caps & ONLP_PSU_CAPS_IOUT) && (info->caps & ONLP_PSU_CAPS_POUT) && info->miout != 0) {
info->mvout = info->mpout / info->miout * 1000;
info->caps |= ONLP_PSU_CAPS_VOUT;
}
/* Get model name */
return bmc_i2c_readraw(7, addr, 0x9a, info->model, sizeof(info->model));
}
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

216
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2016 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlplib/i2c.h>
#include <onlp/platformi/sfpi.h>
#include <onlplib/file.h>
#include "platform_lib.h"
#include "x86_64_accton_wedge100_32x_log.h"
#define BIT(i) (1 << (i))
#define NUM_OF_SFP_PORT 32
static const int sfp_bus_index[] = {
2, 1, 4, 3, 6, 5, 8, 7,
10, 9, 12, 11, 14, 13, 16, 15,
18, 17, 20, 19, 22, 21, 24, 23,
26, 25, 28, 27, 30, 29, 32, 31
};
/************************************************************
*
* SFPI Entry Points
*
***********************************************************/
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
return ONLP_STATUS_OK;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
/*
* Ports {0, 32}
*/
int p;
AIM_BITMAP_CLR_ALL(bmap);
for(p = 0; p < NUM_OF_SFP_PORT; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
static uint8_t
onlp_sfpi_reg_val_to_port_sequence(uint8_t value, int revert)
{
int i;
uint8_t ret = 0;
for (i = 0; i < 8; i++) {
if (i % 2) {
ret |= (value & BIT(i)) >> 1;
}
else {
ret |= (value & BIT(i)) << 1;
}
}
return revert ? ~ret : ret;
}
int
onlp_sfpi_is_present(int port)
{
/*
* Return 1 if present.
* Return 0 if not present.
* Return < 0 if error.
*/
int present;
int bus = (port < 16) ? 35 : 36;
int addr = (port < 16) ? 0x22 : 0x23; /* pca9535 slave address */
int offset;
if (port < 8 || (port >= 16 && port <= 23)) {
offset = 0;
}
else {
offset = 1;
}
present = onlp_i2c_readb(bus, addr, offset, ONLP_I2C_F_FORCE);
if (present < 0) {
return ONLP_STATUS_E_INTERNAL;
}
present = onlp_sfpi_reg_val_to_port_sequence(present, 0);
return !(present & BIT(port % 8));
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
int i;
uint8_t bytes[4] = {0};
for (i = 0; i < AIM_ARRAYSIZE(bytes); i++) {
int bus = (i < 2) ? 35 : 36;
int addr = (i < 2) ? 0x22 : 0x23; /* pca9535 slave address */
int offset = (i % 2);
bytes[i] = onlp_i2c_readb(bus, addr, offset, ONLP_I2C_F_FORCE);
if (bytes[i] < 0) {
return ONLP_STATUS_E_INTERNAL;
}
bytes[i] = onlp_sfpi_reg_val_to_port_sequence(bytes[i], 1);
}
/* Convert to 32 bit integer in port order */
i = 0;
uint32_t presence_all = 0 ;
for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
presence_all <<= 8;
presence_all |= bytes[i];
}
/* Populate bitmap */
for(i = 0; presence_all; i++) {
AIM_BITMAP_MOD(dst, i, (presence_all & 1));
presence_all >>= 1;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
return ONLP_STATUS_OK;
}
static int
sfpi_eeprom_read(int port, uint8_t devaddr, uint8_t data[256])
{
int i;
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
memset(data, 0, 256);
for (i = 0; i < 128; i++) {
int bus = sfp_bus_index[port];
int val = onlp_i2c_readw(bus, devaddr, i*2, ONLP_I2C_F_FORCE);
if (val < 0) {
return ONLP_STATUS_E_INTERNAL;
}
data[i] = val & 0xff;
data[i+1] = (val >> 8) & 0xff;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
return sfpi_eeprom_read(port, 0x50, data);
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
return sfpi_eeprom_read(port, 0x51, data);
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

114
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/sysi.c Normal file
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@@ -0,0 +1,114 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <unistd.h>
#include <fcntl.h>
#include <onlplib/file.h>
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlp/platformi/psui.h>
#include "platform_lib.h"
#include "x86_64_accton_wedge100_32x_int.h"
#include "x86_64_accton_wedge100_32x_log.h"
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-accton-wedge100-32x-r0";
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
uint8_t* rdata = aim_zmalloc(256);
if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
if(*size == 256) {
*data = rdata;
return ONLP_STATUS_OK;
}
}
aim_free(rdata);
*size = 0;
return ONLP_STATUS_E_INTERNAL;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
int i;
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/* 8 Thermal sensors on the chassis */
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* 2 LEDs on the chassis */
for (i = 1; i <= CHASSIS_LED_COUNT; i++) {
*e++ = ONLP_LED_ID_CREATE(i);
}
/* 2 PSUs on the chassis */
for (i = 1; i <= CHASSIS_PSU_COUNT; i++) {
*e++ = ONLP_PSU_ID_CREATE(i);
}
/* 5 Fans on the chassis */
for (i = 1; i <= CHASSIS_FAN_COUNT; i++) {
*e++ = ONLP_FAN_ID_CREATE(i);
}
return 0;
}
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
return ONLP_STATUS_OK;
}
void
onlp_sysi_platform_info_free(onlp_platform_info_t* pi)
{
}
int
onlp_sysi_platform_manage_fans(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_leds(void)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

141
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/thermali.c Normal file
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@@ -0,0 +1,141 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Thermal Sensor Platform Implementation.
*
***********************************************************/
#include <onlplib/file.h>
#include <onlp/platformi/thermali.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define THERMAL_PATH_FORMAT "/sys/bus/i2c/drivers/lm75/%s/temp1_input"
static char* directory[] = /* must map with onlp_thermal_id */
{
NULL,
NULL, /* CPU_CORE files */
"3-0048",
"3-0049",
"3-004a",
"3-004b",
"3-004c",
"8-0048",
"8-0049",
};
static char* cpu_coretemp_files[] =
{
"/sys/devices/platform/coretemp.0*temp2_input",
"/sys/devices/platform/coretemp.0*temp3_input",
"/sys/devices/platform/coretemp.0*temp4_input",
"/sys/devices/platform/coretemp.0*temp5_input",
NULL,
};
/* Static values */
static onlp_thermal_info_t linfo[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BROAD), "TMP75-1", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BROAD), "TMP75-2", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BROAD), "TMP75-3", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BROAD), "TMP75-4", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_MAIN_BROAD), "TMP75-5", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_6_ON_MAIN_BROAD), "TMP75-6", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_7_ON_MAIN_BROAD), "TMP75-7", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int tid;
char path[64] = {0};
VALIDATE(id);
tid = ONLP_OID_ID_GET(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[tid];
if (THERMAL_CPU_CORE == tid) {
return onlp_file_read_int_max(&info->mcelsius, cpu_coretemp_files);
}
/* get path */
sprintf(path, THERMAL_PATH_FORMAT, directory[tid]);
if (bmc_file_read_int(&info->mcelsius, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}

80
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_config.c Normal file
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@@ -0,0 +1,80 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
/* <auto.start.cdefs(x86_64_accton_wedge100_32x_CONFIG_HEADER).source> */
#define __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(_x) __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(_x)
x86_64_accton_wedge100_32x_config_settings_t x86_64_accton_wedge100_32x_config_settings[] =
{
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_LOGGING(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_STDLIB(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_UCLI(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
{ __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) },
#else
{ X86_64_ACCTON_WEDGE100_32X_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_accton_wedge100_32x_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_accton_wedge100_32x_config_STRINGIFY_VALUE
#undef __x86_64_accton_wedge100_32x_config_STRINGIFY_NAME
const char*
x86_64_accton_wedge100_32x_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_accton_wedge100_32x_config_settings[i].name; i++) {
if(strcmp(x86_64_accton_wedge100_32x_config_settings[i].name, setting)) {
return x86_64_accton_wedge100_32x_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_accton_wedge100_32x_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_accton_wedge100_32x_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_accton_wedge100_32x_config_settings[i].name, x86_64_accton_wedge100_32x_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_ACCTON_WEDGE100_32X_CONFIG_HEADER).source> */

10
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_enums.c Normal file
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@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

12
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_int.h Normal file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
* x86_64_accton_wedge100_32x Internal Header
*
*****************************************************************************/
#ifndef __x86_64_accton_wedge100_32x_INT_H__
#define __x86_64_accton_wedge100_32x_INT_H__
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
#endif /* __x86_64_accton_wedge100_32x_INT_H__ */

18
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_log.c Normal file
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@@ -0,0 +1,18 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
#include "x86_64_accton_wedge100_32x_log.h"
/*
* x86_64_accton_wedge100_32x log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_ACCTON_WEDGE100_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_log.h Normal file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __x86_64_accton_wedge100_32x_LOG_H__
#define __x86_64_accton_wedge100_32x_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_accton_wedge100_32x
#include <AIM/aim_log.h>
#endif /* __x86_64_accton_wedge100_32x_LOG_H__ */

24
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_module.c Normal file
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@@ -0,0 +1,24 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
#include "x86_64_accton_wedge100_32x_log.h"
static int
datatypes_init__(void)
{
#define x86_64_accton_wedge100_32x_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x.x>
return 0;
}
void __x86_64_accton_wedge100_32x_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

50
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/onlp/builds/src/module/src/x86_64_accton_wedge100_32x_ucli.c Normal file
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@@ -0,0 +1,50 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100_32x/x86_64_accton_wedge100_32x_config.h>
#if x86_64_accton_wedge100_32x_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_accton_wedge100_32x_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_accton_wedge100_32x)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_accton_wedge100_32x_ucli_module__ =
{
"x86_64_accton_wedge100_32x_ucli",
NULL,
x86_64_accton_wedge100_32x_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_accton_wedge100_32x_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_accton_wedge100_32x_ucli_module__);
n = ucli_node_create("x86_64_accton_wedge100_32x", NULL, &x86_64_accton_wedge100_32x_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_accton_wedge100_32x"));
return n;
}
#else
void*
x86_64_accton_wedge100_32x_ucli_node_create(void)
{
return NULL;
}
#endif

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/platform-config/Makefile Normal file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/platform-config/r0/Makefile Normal file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/platform-config/r0/PKG.yml Normal file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-wedge100-32x REVISION=r0

35
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/platform-config/r0/src/lib/x86-64-accton-wedge100-32x-r0.yml Normal file
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@@ -0,0 +1,35 @@
---
######################################################################
#
# platform-config for WEDGE
#
######################################################################
x86-64-accton-wedge100-32x-r0:
grub:
serial: >-
--unit=0
--speed=57600
--word=8
--parity=0
--stop=1
kernel:
<<: *kernel-3-16
args: >-
nopat
console=ttyS0,57600n8
rd_NO_MD
rd_NO_LUKS
intel_iommu=off
noapic
##network
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:14.0

23
packages/platforms/accton/x86-64/x86-64-accton-wedge100-32x/platform-config/r0/src/python/x86_64_accton_wedge100_32x_r0/__init__.py Normal file
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@@ -0,0 +1,23 @@
from onl.platform.base import *
from onl.platform.accton import *
class OnlPlatform_x86_64_accton_wedge100_32x_r0(OnlPlatformAccton,
OnlPlatformPortConfig_32x100):
MODEL="Wedge-100-32X"
PLATFORM="x86-64-accton-wedge100-32x-r0"
SYS_OBJECT_ID=".100.32.1"
def baseconfig(self):
########### initialize I2C bus 0 ###########
self.new_i2c_devices([
# initialize multiplexer (PCA9548)
('pca9548', 0x70, 0),
('pca9548', 0x71, 0),
('pca9548', 0x72, 0),
('pca9548', 0x73, 0),
('pca9548', 0x74, 0),
('24c64', 0x50, 39),
])
return True

3
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@@ -0,0 +1,3 @@
*x86*64*accton*wedge100*32x*.mk
onlpdump.mk

17
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@@ -1,16 +1 @@
variables:
platform: x86-64-accton-wedge100s-32x-r0
install: /lib/platform-config/${platform}/onl
common:
version: 1.0.0
arch: amd64
copyright: Copyright 2013, 2014, 2015 Big Switch Networks
maintainer: support@bigswitch.com
support: opennetworklinux@googlegroups.com
comment: dummy package for ONLP on Wedge
packages:
- name: onlp-${platform}
summary: ONLP Package for the ${platform} platform.
changelog: initial version
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-accton-wedge100s-32x ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

2
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FILTER=src
include $(ONL)/make/subdirs.mk

44
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-accton-wedge100s-32x
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_accton_wedge100s_32x onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-accton-wedge100s-32x.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_accton_wedge100s_32x onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

1
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@@ -0,0 +1 @@
name: x86_64_accton_wedge100s_32x

1
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name: x86_64_accton_wedge100s_32x

9
packages/platforms/accton/x86-64/x86-64-accton-wedge100s-32x/onlp/builds/src/x86_64_accton_wedge100s_32x/Makefile Normal file
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@@ -0,0 +1,9 @@
###############################################################################
#
#
#
###############################################################################
include $(ONL)/make/config.mk
MODULE := x86_64_accton_wedge100s_32x
AUTOMODULE := x86_64_accton_wedge100s_32x
include $(BUILDER)/definemodule.mk

6
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@@ -0,0 +1,6 @@
###############################################################################
#
# x86_64_accton_wedge100s_32x README
#
###############################################################################

9
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###############################################################################
#
# x86_64_accton_wedge100s_32x Autogeneration
#
###############################################################################
x86_64_accton_wedge100s_32x_AUTO_DEFS := module/auto/x86_64_accton_wedge100s_32x.yml
x86_64_accton_wedge100s_32x_AUTO_DIRS := module/inc/x86_64_accton_wedge100s_32x module/src
include $(BUILDER)/auto.mk

47
packages/platforms/accton/x86-64/x86-64-accton-wedge100s-32x/onlp/builds/src/x86_64_accton_wedge100s_32x/module/auto/x86_64_accton_wedge100s_32x.yml Normal file
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@@ -0,0 +1,47 @@
###############################################################################
#
# x86_64_accton_wedge100s_32x Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB
- X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
definitions:
cdefs:
X86_64_ACCTON_WEDGE100S_32X_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_accton_wedge100s_32x_config
portingmacro:
X86_64_ACCTON_WEDGE100S_32X:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/accton/x86-64/x86-64-accton-wedge100s-32x/onlp/builds/src/x86_64_accton_wedge100s_32x/module/inc/x86_64_accton_wedge100s_32x/x86_64_accton_wedge100s_32x.x Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_wedge100s_32x/x86_64_accton_wedge100s_32x_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

127
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/**************************************************************************//**
*
* @file
* @brief x86_64_accton_wedge100s_32x Configuration Header
*
* @addtogroup x86_64_accton_wedge100s_32x-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_WEDGE100S_32X_CONFIG_H__
#define __X86_64_ACCTON_WEDGE100S_32X_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_ACCTON_WEDGE100S_32X_INCLUDE_CUSTOM_CONFIG
#include <x86_64_accton_wedge100s_32x_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_ACCTON_WEDGE100S_32X_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_LOGGING
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_BITS_DEFAULT
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_UCLI
#define X86_64_ACCTON_WEDGE100S_32X_CONFIG_INCLUDE_UCLI 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_accton_wedge100s_32x_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_accton_wedge100s_32x_config_settings_t;
/** Configuration settings table. */
/** x86_64_accton_wedge100s_32x_config_settings table. */
extern x86_64_accton_wedge100s_32x_config_settings_t x86_64_accton_wedge100s_32x_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_accton_wedge100s_32x_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_accton_wedge100s_32x_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_ACCTON_WEDGE100S_32X_CONFIG_HEADER).header> */
#include "x86_64_accton_wedge100s_32x_porting.h"
#endif /* __X86_64_ACCTON_WEDGE100S_32X_CONFIG_H__ */
/* @} */

26
packages/platforms/accton/x86-64/x86-64-accton-wedge100s-32x/onlp/builds/src/x86_64_accton_wedge100s_32x/module/inc/x86_64_accton_wedge100s_32x/x86_64_accton_wedge100s_32x_dox.h Normal file
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/**************************************************************************//**
*
* x86_64_accton_wedge100s_32x Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_WEDGE100S_32X_DOX_H__
#define __X86_64_ACCTON_WEDGE100S_32X_DOX_H__
/**
* @defgroup x86_64_accton_wedge100s_32x x86_64_accton_wedge100s_32x - x86_64_accton_wedge100s_32x Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_accton_wedge100s_32x-x86_64_accton_wedge100s_32x Public Interface
* @defgroup x86_64_accton_wedge100s_32x-config Compile Time Configuration
* @defgroup x86_64_accton_wedge100s_32x-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_ACCTON_WEDGE100S_32X_DOX_H__ */

107
packages/platforms/accton/x86-64/x86-64-accton-wedge100s-32x/onlp/builds/src/x86_64_accton_wedge100s_32x/module/inc/x86_64_accton_wedge100s_32x/x86_64_accton_wedge100s_32x_porting.h Normal file
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/**************************************************************************//**
*
* @file
* @brief x86_64_accton_wedge100s_32x Porting Macros.
*
* @addtogroup x86_64_accton_wedge100s_32x-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_WEDGE100S_32X_PORTING_H__
#define __X86_64_ACCTON_WEDGE100S_32X_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_MALLOC
#if defined(GLOBAL_MALLOC)
#define X86_64_ACCTON_WEDGE100S_32X_MALLOC GLOBAL_MALLOC
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_MALLOC malloc
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_FREE
#if defined(GLOBAL_FREE)
#define X86_64_ACCTON_WEDGE100S_32X_FREE GLOBAL_FREE
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_FREE free
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_FREE is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_MEMSET
#if defined(GLOBAL_MEMSET)
#define X86_64_ACCTON_WEDGE100S_32X_MEMSET GLOBAL_MEMSET
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_MEMSET memset
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define X86_64_ACCTON_WEDGE100S_32X_MEMCPY GLOBAL_MEMCPY
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_MEMCPY memcpy
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define X86_64_ACCTON_WEDGE100S_32X_STRNCPY GLOBAL_STRNCPY
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_STRNCPY strncpy
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define X86_64_ACCTON_WEDGE100S_32X_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_VSNPRINTF vsnprintf
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define X86_64_ACCTON_WEDGE100S_32X_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_SNPRINTF snprintf
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_WEDGE100S_32X_STRLEN
#if defined(GLOBAL_STRLEN)
#define X86_64_ACCTON_WEDGE100S_32X_STRLEN GLOBAL_STRLEN
#elif X86_64_ACCTON_WEDGE100S_32X_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_WEDGE100S_32X_STRLEN strlen
#else
#error The macro X86_64_ACCTON_WEDGE100S_32X_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_ACCTON_WEDGE100S_32X_PORTING_H__ */
/* @} */

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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_accton_wedge100s_32x_INCLUDES := -I $(THIS_DIR)inc
x86_64_accton_wedge100s_32x_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_accton_wedge100s_32x_DEPENDMODULE_ENTRIES := init:x86_64_accton_wedge100s_32x ucli:x86_64_accton_wedge100s_32x

9
packages/platforms/accton/x86-64/x86-64-accton-wedge100s-32x/onlp/builds/src/x86_64_accton_wedge100s_32x/module/src/Makefile Normal file
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###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_accton_wedge100s_32x_ucli.c

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@@ -0,0 +1,222 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlplib/file.h>
#include <onlp/platformi/fani.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define MAX_FAN_SPEED 15400
#define BIT(i) (1 << (i))
enum fan_id {
FAN_1_ON_FAN_BOARD = 1,
FAN_2_ON_FAN_BOARD,
FAN_3_ON_FAN_BOARD,
FAN_4_ON_FAN_BOARD,
FAN_5_ON_FAN_BOARD,
};
#define FAN_BOARD_PATH "/sys/bus/i2c/devices/8-0033/"
#define CHASSIS_FAN_INFO(fid) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fid##_ON_FAN_BOARD), "Chassis Fan - "#fid, 0 },\
0x0,\
ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,\
0,\
0,\
ONLP_FAN_MODE_INVALID,\
}
/* Static fan information */
onlp_fan_info_t finfo[] = {
{ }, /* Not used */
CHASSIS_FAN_INFO(1),
CHASSIS_FAN_INFO(2),
CHASSIS_FAN_INFO(3),
CHASSIS_FAN_INFO(4),
CHASSIS_FAN_INFO(5)
};
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
int value = 0, fid;
char path[64] = {0};
VALIDATE(id);
fid = ONLP_OID_ID_GET(id);
*info = finfo[fid];
/* get fan present status
*/
sprintf(path, "%s""fantray_present", FAN_BOARD_PATH);
if (bmc_file_read_int(&value, path, 16) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
if (value & BIT(fid-1)) {
return ONLP_STATUS_OK;
}
info->status |= ONLP_FAN_STATUS_PRESENT;
/* get front fan rpm
*/
sprintf(path, "%s""fan%d_input", FAN_BOARD_PATH, fid*2 - 1);
if (bmc_file_read_int(&value, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
info->rpm = value;
/* get rear fan rpm
*/
sprintf(path, "%s""fan%d_input", FAN_BOARD_PATH, fid*2);
if (bmc_file_read_int(&value, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
/* take the min value from front/rear fan speed
*/
if (info->rpm > value) {
info->rpm = value;
}
/* set fan status based on rpm
*/
if (!info->rpm) {
info->status |= ONLP_FAN_STATUS_FAILED;
return ONLP_STATUS_OK;
}
/* get speed percentage from rpm
*/
info->percentage = (info->rpm * 100)/MAX_FAN_SPEED;
/* set fan direction
*/
info->status |= ONLP_FAN_STATUS_F2B;
return ONLP_STATUS_OK;
}
/*
* This function sets the speed of the given fan in RPM.
*
* This function will only be called if the fan supprots the RPM_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int p)
{
char cmd[32] = {0};
sprintf(cmd, "set_fan_speed.sh %d", p);
if (bmc_send_command(cmd) < 0) {
AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
*
* This function is only relevant if the fan OID supports both direction
* capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

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