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Merge pull request #397 from cytsai0409/master

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[Ingrasys] Add support for S9280-64X with Barefoot ASIC and 64 QSFP ports
This commit is contained in:
Jeffrey Townsend
2018-06-13 15:55:12 -07:00
committed by GitHub
parent 78f99449d4 75b22334bb
commit 28f465b093
47 changed files with 6448 additions and 0 deletions
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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/.gitignore vendored Executable file
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onlpdump.mk

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/Makefile Executable file
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include $(ONL)/make/pkg.mk

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/Makefile Executable file
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include $(ONL)/make/pkg.mk

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/PKG.yml Executable file
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!include $ONL_TEMPLATES/platform-modules.yml ARCH=amd64 VENDOR=ingrasys BASENAME=x86-64-ingrasys-s9280-64x KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/builds/.gitignore vendored Normal file
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lib

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/builds/Makefile Normal file
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KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64
KMODULES := $(wildcard *.c)
VENDOR := ingrasys
BASENAME := x86-64-ingrasys-s9280-64x
ARCH := x86_64
include $(ONL)/make/kmodule.mk

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/builds/ingrasys_s9280_64x_i2c_cpld.c Normal file
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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/builds/ingrasys_s9280_64x_i2c_cpld.h Normal file
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/* header file for i2c cpld driver of ingrasys_s9280_64x
*
* Copyright (C) 2017 Ingrasys Technology Corporation.
* Leo Lin <feng.lee.usa@ingrasys.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef INGRASYS_S9280_64X_I2C_CPLD_H
#define INGRASYS_S9280_64X_I2C_CPLD_H
/* CPLD device index value */
enum cpld_id {
cpld1,
cpld2,
cpld3,
cpld4,
cpld5
};
enum LED_BLINK {
BLINK,
NOBLINK,
};
enum LED_YELLOW {
YELLOW_OFF,
YELLOW_ON,
};
enum LED_GREEN {
GREEN_OFF,
GREEN_ON,
};
/* port number on CPLD */
#define CPLD_1_PORT_NUM 12
#define CPLD_2_PORT_NUM 13
/* QSFP port number */
#define QSFP_MAX_PORT_NUM 64
#define QSFP_MIN_PORT_NUM 1
/* SFP+ port number */
#define SFP_MAX_PORT_NUM 2
#define SFP_MIN_PORT_NUM 1
/* CPLD registers */
#define CPLD_BOARD_TYPE_REG 0x0
#define CPLD_EXT_BOARD_TYPE_REG 0x7
#define CPLD_VERSION_REG 0x1
#define CPLD_ID_REG 0x2
#define CPLD_QSFP_PORT_STATUS_BASE_REG 0x20
#define CPLD_QSFP_PORT_CONFIG_BASE_REG 0x30
#define CPLD_QSFP_PORT_INTERRUPT_REG 0x40
#define CPLD_SFP_PORT_STATUS_REG 0x2F
#define CPLD_SFP_PORT_CONFIG_REG 0x3F
#define CPLD_QSFP_PORT_INTERRUPT_REG 0x40
#define CPLD_10GMUX_CONFIG_REG 0x41
#define CPLD_BMC_STATUS_REG 0x42
#define CPLD_BMC_WATCHDOG_REG 0x43
#define CPLD_USB_STATUS_REG 0x44
#define CPLD_RESET_CONTROL_REG 0x4A
#define CPLD_SFP_LED_REG 0x80
#define CPLD_SFP_LED_BLINK_REG 0x90
#define CPLD_QSFP_LED_BASE_REG 0x80
#define CPLD_QSFP_LED_BLINK_BASE_REG 0x90
#define CPLD_RTMR_RESET_REG 0x4B
/* bit definition for register value */
enum CPLD_QSFP_PORT_STATUS_BITS {
CPLD_QSFP_PORT_STATUS_INT_BIT,
CPLD_QSFP_PORT_STATUS_ABS_BIT,
};
enum CPLD_QSFP_PORT_CONFIG_BITS {
CPLD_QSFP_PORT_CONFIG_RESET_BIT,
CPLD_QSFP_PORT_CONFIG_RESERVE_BIT,
CPLD_QSFP_PORT_CONFIG_LPMODE_BIT,
};
enum CPLD_SFP_PORT_STATUS_BITS {
CPLD_SFP0_PORT_STATUS_PRESENT_BIT,
CPLD_SFP0_PORT_STATUS_TXFAULT_BIT,
CPLD_SFP0_PORT_STATUS_RXLOS_BIT,
CPLD_SFP_PORT_STATUS_DUMMY,
CPLD_SFP1_PORT_STATUS_PRESENT_BIT,
CPLD_SFP1_PORT_STATUS_TXFAULT_BIT,
CPLD_SFP1_PORT_STATUS_RXLOS_BIT,
};
enum CPLD_SFP_PORT_CONFIG_BITS {
CPLD_SFP0_PORT_CONFIG_TXDIS_BIT,
CPLD_SFP0_PORT_CONFIG_RS_BIT,
CPLD_SFP0_PORT_CONFIG_TS_BIT,
CPLD_SFP_PORT_CONFIG_DUMMY,
CPLD_SFP1_PORT_CONFIG_TXDIS_BIT,
CPLD_SFP1_PORT_CONFIG_RS_BIT,
CPLD_SFP1_PORT_CONFIG_TS_BIT,
};
enum CPLD_10GMUX_CONFIG_BITS {
CPLD_10GMUX_CONFIG_ENSMB_BIT,
CPLD_10GMUX_CONFIG_ENINPUT_BIT,
CPLD_10GMUX_CONFIG_SEL1_BIT,
CPLD_10GMUX_CONFIG_SEL0_BIT,
};
enum CPLD_BMC_WATCHDOG_BITS {
CPLD_10GMUX_CONFIG_ENTIMER_BIT,
CPLD_10GMUX_CONFIG_TIMEOUT_BIT,
};
enum CPLD_RESET_CONTROL_BITS {
CPLD_RESET_CONTROL_SWRST_BIT,
CPLD_RESET_CONTROL_CP2104RST_BIT,
CPLD_RESET_CONTROL_82P33814RST_BIT,
CPLD_RESET_CONTROL_BMCRST_BIT,
};
enum CPLD_SFP_LED_BITS {
CPLD_SFP_LED_SFP0_GREEN_BIT,
CPLD_SFP_LED_SFP0_YELLOW_BIT,
CPLD_SFP_LED_SFP1_GREEN_BIT,
CPLD_SFP_LED_SFP1_YELLOW_BIT,
};
enum CPLD_SFP_LED_BLINK_BITS {
CPLD_SFP_LED_BLINK_SFP0_BIT,
CPLD_SFP_LED_BLINK_SFP1_BIT,
};
enum CPLD_QSFP_LED_BITS {
CPLD_QSFP_LED_CHAN_0_GREEN_BIT,
CPLD_QSFP_LED_CHAN_0_YELLOW_BIT,
CPLD_QSFP_LED_CHAN_1_GREEN_BIT,
CPLD_QSFP_LED_CHAN_1_YELLOW_BIT,
CPLD_QSFP_LED_CHAN_2_GREEN_BIT,
CPLD_QSFP_LED_CHAN_2_YELLOW_BIT,
CPLD_QSFP_LED_CHAN_3_GREEN_BIT,
CPLD_QSFP_LED_CHAN_3_YELLOW_BIT,
};
enum CPLD_QSFP_LED_BLINK_BITS {
CPLD_QSFP_LED_BLINK_X_CHAN0_BIT,
CPLD_QSFP_LED_BLINK_X_CHAN1_BIT,
CPLD_QSFP_LED_BLINK_X_CHAN2_BIT,
CPLD_QSFP_LED_BLINK_X_CHAN3_BIT,
CPLD_QSFP_LED_BLINK_XPLUS_CHAN0_BIT,
CPLD_QSFP_LED_BLINK_XPLUS_CHAN1_BIT,
CPLD_QSFP_LED_BLINK_XPLUS_CHAN2_BIT,
CPLD_QSFP_LED_BLINK_XPLUS_CHAN3_BIT,
};
/* bit field structure for register value */
struct cpld_reg_board_type_t {
u8 build_rev:2;
u8 hw_rev:2;
u8 board_id:4;
};
struct cpld_reg_version_t {
u8 revision:6;
u8 release:1;
u8 reserve:1;
};
struct cpld_reg_id_t {
u8 id:3;
u8 release:5;
};
/* common manipulation */
#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u)
#define READ_BIT(val, bit) ((0u == (val & (1<<bit))) ? 0u : 1u)
#define SET_BIT(val, bit) (val |= (1 << bit))
#define CLEAR_BIT(val, bit) (val &= ~(1 << bit))
#define TOGGLE_BIT(val, bit) (val ^= (1 << bit))
#define _BIT(n) (1<<(n))
#define _BIT_MASK(len) (BIT(len)-1)
/* bitfield of register manipulation */
#define READ_BF(bf_struct, val, bf_name, bf_value) \
(bf_value = ((struct bf_struct *)&val)->bf_name)
#define READ_BF_1(bf_struct, val, bf_name, bf_value) \
bf_struct bf; \
bf.data = val; \
bf_value = bf.bf_name
#define BOARD_TYPE_BUILD_REV_GET(val, res) \
READ_BF(cpld_reg_board_type_t, val, build_rev, res)
#define BOARD_TYPE_HW_REV_GET(val, res) \
READ_BF(cpld_reg_board_type_t, val, hw_rev, res)
#define BOARD_TYPE_BOARD_ID_GET(val, res) \
READ_BF(cpld_reg_board_type_t, val, board_id, res)
#define CPLD_VERSION_REV_GET(val, res) \
READ_BF(cpld_reg_version_t, val, revision, res)
#define CPLD_VERSION_REL_GET(val, res) \
READ_BF(cpld_reg_version_t, val, release, res)
#define CPLD_ID_ID_GET(val, res) \
READ_BF(cpld_reg_id_t, val, id, res)
#define CPLD_ID_REL_GET(val, res) \
READ_BF(cpld_reg_id_t, val, release, res)
/* SFP/QSFP port led registers manipulation */
#define SFP_LED_TO_CPLD_IDX(sfp_port) cpld1
#define SFP_LED_REG(sfp_port) CPLD_SFP_LED_REG
#define SFP_LED_BLINK_REG(sfp_port) CPLD_SFP_LED_BLINK_REG
#define QSFP_LED_TO_CPLD_IDX(qsfp_port) \
((qsfp_port - 1) / 16 + 2)
#define QSFP_LED_REG(qsfp_port) \
((qsfp_port - 1) % 16 + CPLD_QSFP_LED_BASE_REG)
#define QSFP_LED_BLINK_REG(qsfp_port) \
(((qsfp_port - 1) % 16) / 2 + CPLD_QSFP_LED_BLINK_BASE_REG)
/* QSFP/SFP port status registers manipulation */
#define QSFP_TO_CPLD_IDX(qsfp_port, cpld_index, cpld_port) \
{ \
if (QSFP_MIN_PORT_NUM <= qsfp_port && qsfp_port <= CPLD_1_PORT_NUM) { \
cpld_index = cpld1; \
cpld_port = qsfp_port - 1; \
} else if (CPLD_1_PORT_NUM < qsfp_port \
&& qsfp_port <= QSFP_MAX_PORT_NUM) { \
cpld_index = cpld2 + (qsfp_port - 1 - CPLD_1_PORT_NUM) \
/ CPLD_2_PORT_NUM; \
cpld_port = (qsfp_port - 1 - CPLD_1_PORT_NUM) % \
CPLD_2_PORT_NUM; \
} else { \
cpld_index = 0; \
cpld_port = 0; \
} \
}
#define QSFP_PORT_STATUS_REG(cpld_port) \
(CPLD_QSFP_PORT_STATUS_BASE_REG + cpld_port)
#define QSFP_PORT_CONFIG_REG(cpld_port) \
(CPLD_QSFP_PORT_CONFIG_BASE_REG + cpld_port)
#define QSFP_PORT_INT_BIT_GET(port_status_value) \
READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_INT_BIT)
#define QSFP_PORT_ABS_BIT_GET(port_status_value) \
READ_BIT(port_status_value, CPLD_QSFP_PORT_STATUS_ABS_BIT)
#define QSFP_PORT_RESET_BIT_GET(port_config_value) \
READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT)
#define QSFP_PORT_LPMODE_BIT_GET(port_config_value) \
READ_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT)
#define QSFP_PORT_RESET_BIT_SET(port_config_value) \
SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT)
#define QSFP_PORT_RESET_BIT_CLEAR(port_config_value) \
CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_RESET_BIT)
#define QSFP_PORT_LPMODE_BIT_SET(port_config_value) \
SET_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT)
#define QSFP_PORT_LPMODE_BIT_CLEAR(port_config_value) \
CLEAR_BIT(port_config_value, CPLD_QSFP_PORT_CONFIG_LPMODE_BIT)
#define SFP_PORT_PRESENT_BIT_GET(sfp_port, port_status_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
READ_BIT(port_status_value, CPLD_SFP0_PORT_STATUS_PRESENT_BIT); \
} else { \
READ_BIT(port_status_value, CPLD_SFP1_PORT_STATUS_PRESENT_BIT); \
}
#define SFP_PORT_TXFAULT_BIT_GET(sfp_port, port_status_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
READ_BIT(port_status_value, CPLD_SFP0_PORT_STATUS_TXFAULT_BIT); \
} else { \
READ_BIT(port_status_value, CPLD_SFP1_PORT_STATUS_TXFAULT_BIT); \
}
#define SFP_PORT_RXLOS_BIT_GET(sfp_port, port_status_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
READ_BIT(port_status_value, CPLD_SFP0_PORT_STATUS_RXLOS_BIT); \
} else { \
READ_BIT(port_status_value, CPLD_SFP1_PORT_STATUS_RXLOS_BIT); \
}
#define SFP_PORT_TXDIS_BIT_GET(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TXDIS_BIT); \
} else { \
READ_BIT(port_config_value, CPLD_SFP1_PORT_STATUS_RXLOS_BIT); \
}
#define SFP_PORT_RS_BIT_GET(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_RS_BIT); \
} else { \
READ_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_RS_BIT); \
}
#define SFP_PORT_TS_BIT_GET(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \
} else { \
READ_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \
}
#define SFP_PORT_TXDIS_BIT_SET(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
SET_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TXDIS_BIT); \
} else { \
SET_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TXDIS_BIT); \
}
#define SFP_PORT_TXDIS_BIT_CLEAR(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
CLEAR_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TXDIS_BIT); \
} else { \
CLEAR_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TXDIS_BIT); \
}
#define SFP_PORT_RS_BIT_SET(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
SET_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_RS_BIT); \
} else { \
SET_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_RS_BIT); \
}
#define SFP_PORT_RS_BIT_CLEAR(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
CLEAR_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_RS_BIT); \
} else { \
CLEAR_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_RS_BIT); \
}
#define SFP_PORT_TS_BIT_SET(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
SET_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \
} else { \
SET_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TS_BIT); \
}
#define SFP_PORT_TS_BIT_CLEAR(sfp_port, port_config_value) \
if (sfp_port == SFP_MIN_PORT_NUM) { \
CLEAR_BIT(port_config_value, CPLD_SFP0_PORT_CONFIG_TS_BIT); \
} else { \
CLEAR_BIT(port_config_value, CPLD_SFP1_PORT_CONFIG_TS_BIT); \
}
/* CPLD access functions */
extern int ingrasys_i2c_cpld_get_qsfp_port_status_val(u8 port_num);
extern int ingrasys_i2c_cpld_get_qsfp_port_config_val(u8 port_num);
extern int ingrasys_i2c_cpld_set_qsfp_port_config_val(u8 port_num, u8 reg_val);
extern int ingrasys_i2c_cpld_get_sfp_port_status_val(void);
extern int ingrasys_i2c_cpld_get_sfp_port_config_val(void);
extern int ingrasys_i2c_cpld_set_sfp_port_config_val(u8 reg_val);
extern u8 fp_port_to_phy_port(u8 fp_port);
#endif

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packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/builds/ingrasys_s9280_64x_platform.h Normal file
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#ifndef _S9230_64X_PLATFORM_H
#define _S9230_64X_PLATFORM_H
#include <linux/i2c.h>
// remove debug before release
#define DEBUG
enum bus_order {
I2C_BUS_MAIN,
MUX_9548_0_CH0,
MUX_9548_0_CH1,
MUX_9548_0_CH2,
MUX_9548_0_CH3,
MUX_9548_0_CH4,
MUX_9548_0_CH5,
MUX_9548_0_CH6,
MUX_9548_0_CH7,
MUX_9548_1_CH0,
MUX_9548_1_CH1,
MUX_9548_1_CH2,
MUX_9548_1_CH3,
MUX_9548_1_CH4,
MUX_9548_1_CH5,
MUX_9548_1_CH6,
MUX_9548_1_CH7,
MUX_9548_2_CH0,
MUX_9548_2_CH1,
MUX_9548_2_CH2,
MUX_9548_2_CH3,
MUX_9548_2_CH4,
MUX_9548_2_CH5,
MUX_9548_2_CH6,
MUX_9548_2_CH7,
MUX_9546_0_CH0,
MUX_9546_0_CH1,
MUX_9546_0_CH2,
MUX_9546_0_CH3,
MUX_9546_1_CH0,
MUX_9546_1_CH1,
MUX_9546_1_CH2,
MUX_9546_1_CH3,
MUX_9548_11_CH0,
MUX_9548_11_CH1,
MUX_9548_11_CH2,
MUX_9548_11_CH3,
MUX_9548_11_CH4,
MUX_9548_11_CH5,
MUX_9548_11_CH6,
MUX_9548_11_CH7,
MUX_9548_3_CH0,
MUX_9548_3_CH1,
MUX_9548_3_CH2,
MUX_9548_3_CH3,
MUX_9548_3_CH4,
MUX_9548_3_CH5,
MUX_9548_3_CH6,
MUX_9548_3_CH7,
MUX_9548_4_CH0,
MUX_9548_4_CH1,
MUX_9548_4_CH2,
MUX_9548_4_CH3,
MUX_9548_4_CH4,
MUX_9548_4_CH5,
MUX_9548_4_CH6,
MUX_9548_4_CH7,
MUX_9548_5_CH0,
MUX_9548_5_CH1,
MUX_9548_5_CH2,
MUX_9548_5_CH3,
MUX_9548_5_CH4,
MUX_9548_5_CH5,
MUX_9548_5_CH6,
MUX_9548_5_CH7,
MUX_9548_6_CH0,
MUX_9548_6_CH1,
MUX_9548_6_CH2,
MUX_9548_6_CH3,
MUX_9548_6_CH4,
MUX_9548_6_CH5,
MUX_9548_6_CH6,
MUX_9548_6_CH7,
MUX_9548_7_CH0,
MUX_9548_7_CH1,
MUX_9548_7_CH2,
MUX_9548_7_CH3,
MUX_9548_7_CH4,
MUX_9548_7_CH5,
MUX_9548_7_CH6,
MUX_9548_7_CH7,
MUX_9548_8_CH0,
MUX_9548_8_CH1,
MUX_9548_8_CH2,
MUX_9548_8_CH3,
MUX_9548_8_CH4,
MUX_9548_8_CH5,
MUX_9548_8_CH6,
MUX_9548_8_CH7,
MUX_9548_9_CH0,
MUX_9548_9_CH1,
MUX_9548_9_CH2,
MUX_9548_9_CH3,
MUX_9548_9_CH4,
MUX_9548_9_CH5,
MUX_9548_9_CH6,
MUX_9548_9_CH7,
MUX_9548_10_CH0,
MUX_9548_10_CH1,
MUX_9548_10_CH2,
MUX_9548_10_CH3,
MUX_9548_10_CH4,
MUX_9548_10_CH5,
MUX_9548_10_CH6,
MUX_9548_10_CH7,
};
#define I2C_ADDR_MUX_9555_0 (0x20)
#define I2C_ADDR_MUX_9555_1 (0x24)
#define I2C_ADDR_MUX_9555_2 (0x25)
#define I2C_ADDR_MUX_9555_3 (0x26)
#define I2C_ADDR_MUX_9539_0 (0x76)
#define I2C_ADDR_MUX_9539_1 (0x76)
#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN)
#define I2C_BUS_SYS_LED (MUX_9548_1_CH1)
#define I2C_BUS_PSU_STATUS (I2C_BUS_MAIN)
#define I2C_ADDR_PSU_STATUS (I2C_ADDR_MUX_9555_2)
#define NUM_OF_I2C_MUX (11)
#define NUM_OF_CPLD (5)
#define NUM_OF_QSFP_PORT (64)
#define NUM_OF_SFP_PORT (2)
#define QSFP_EEPROM_I2C_ADDR (0x50)
enum gpio_reg {
REG_PORT0_IN,
REG_PORT1_IN,
REG_PORT0_OUT,
REG_PORT1_OUT,
REG_PORT0_POL,
REG_PORT1_POL,
REG_PORT0_DIR,
REG_PORT1_DIR,
};
struct ing_i2c_board_info {
int ch;
int size;
struct i2c_board_info *board_info;
};
struct i2c_init_data {
__u16 ch;
__u16 addr;
__u8 reg;
__u8 value;
};
#endif

552
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/modules/builds/ingrasys_s9280_64x_psu.c Normal file
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@@ -0,0 +1,552 @@
/*
* S9280-64x PSU driver
*
* Copyright (C) 2017 Ingrasys, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#ifndef _S9230_64X_PLATFORM_H
#define _S9230_64X_PLATFORM_H
#include <linux/i2c.h>
// remove debug before release
#define DEBUG
enum bus_order {
I2C_BUS_MAIN,
MUX_9548_0_CH0,
MUX_9548_0_CH1,
MUX_9548_0_CH2,
MUX_9548_0_CH3,
MUX_9548_0_CH4,
MUX_9548_0_CH5,
MUX_9548_0_CH6,
MUX_9548_0_CH7,
MUX_9548_1_CH0,
MUX_9548_1_CH1,
MUX_9548_1_CH2,
MUX_9548_1_CH3,
MUX_9548_1_CH4,
MUX_9548_1_CH5,
MUX_9548_1_CH6,
MUX_9548_1_CH7,
MUX_9548_2_CH0,
MUX_9548_2_CH1,
MUX_9548_2_CH2,
MUX_9548_2_CH3,
MUX_9548_2_CH4,
MUX_9548_2_CH5,
MUX_9548_2_CH6,
MUX_9548_2_CH7,
MUX_9546_0_CH0,
MUX_9546_0_CH1,
MUX_9546_0_CH2,
MUX_9546_0_CH3,
MUX_9546_1_CH0,
MUX_9546_1_CH1,
MUX_9546_1_CH2,
MUX_9546_1_CH3,
MUX_9548_11_CH0,
MUX_9548_11_CH1,
MUX_9548_11_CH2,
MUX_9548_11_CH3,
MUX_9548_11_CH4,
MUX_9548_11_CH5,
MUX_9548_11_CH6,
MUX_9548_11_CH7,
MUX_9548_3_CH0,
MUX_9548_3_CH1,
MUX_9548_3_CH2,
MUX_9548_3_CH3,
MUX_9548_3_CH4,
MUX_9548_3_CH5,
MUX_9548_3_CH6,
MUX_9548_3_CH7,
MUX_9548_4_CH0,
MUX_9548_4_CH1,
MUX_9548_4_CH2,
MUX_9548_4_CH3,
MUX_9548_4_CH4,
MUX_9548_4_CH5,
MUX_9548_4_CH6,
MUX_9548_4_CH7,
MUX_9548_5_CH0,
MUX_9548_5_CH1,
MUX_9548_5_CH2,
MUX_9548_5_CH3,
MUX_9548_5_CH4,
MUX_9548_5_CH5,
MUX_9548_5_CH6,
MUX_9548_5_CH7,
MUX_9548_6_CH0,
MUX_9548_6_CH1,
MUX_9548_6_CH2,
MUX_9548_6_CH3,
MUX_9548_6_CH4,
MUX_9548_6_CH5,
MUX_9548_6_CH6,
MUX_9548_6_CH7,
MUX_9548_7_CH0,
MUX_9548_7_CH1,
MUX_9548_7_CH2,
MUX_9548_7_CH3,
MUX_9548_7_CH4,
MUX_9548_7_CH5,
MUX_9548_7_CH6,
MUX_9548_7_CH7,
MUX_9548_8_CH0,
MUX_9548_8_CH1,
MUX_9548_8_CH2,
MUX_9548_8_CH3,
MUX_9548_8_CH4,
MUX_9548_8_CH5,
MUX_9548_8_CH6,
MUX_9548_8_CH7,
MUX_9548_9_CH0,
MUX_9548_9_CH1,
MUX_9548_9_CH2,
MUX_9548_9_CH3,
MUX_9548_9_CH4,
MUX_9548_9_CH5,
MUX_9548_9_CH6,
MUX_9548_9_CH7,
MUX_9548_10_CH0,
MUX_9548_10_CH1,
MUX_9548_10_CH2,
MUX_9548_10_CH3,
MUX_9548_10_CH4,
MUX_9548_10_CH5,
MUX_9548_10_CH6,
MUX_9548_10_CH7,
};
#define I2C_ADDR_MUX_9555_0 (0x20)
#define I2C_ADDR_MUX_9555_1 (0x24)
#define I2C_ADDR_MUX_9555_2 (0x25)
#define I2C_ADDR_MUX_9555_3 (0x26)
#define I2C_ADDR_MUX_9539_0 (0x76)
#define I2C_ADDR_MUX_9539_1 (0x76)
#define I2C_BUS_FAN_STATUS (I2C_BUS_MAIN)
#define I2C_BUS_SYS_LED (MUX_9548_1_CH1)
#define I2C_BUS_PSU_STATUS (I2C_BUS_MAIN)
#define I2C_ADDR_PSU_STATUS (I2C_ADDR_MUX_9555_2)
#define NUM_OF_I2C_MUX (11)
#define NUM_OF_CPLD (5)
#define NUM_OF_QSFP_PORT (64)
#define NUM_OF_SFP_PORT (2)
#define QSFP_EEPROM_I2C_ADDR (0x50)
enum gpio_reg {
REG_PORT0_IN,
REG_PORT1_IN,
REG_PORT0_OUT,
REG_PORT1_OUT,
REG_PORT0_POL,
REG_PORT1_POL,
REG_PORT0_DIR,
REG_PORT1_DIR,
};
struct ing_i2c_board_info {
int ch;
int size;
struct i2c_board_info *board_info;
};
struct i2c_init_data {
__u16 ch;
__u16 addr;
__u8 reg;
__u8 value;
};
#endif
static ssize_t show_psu_eeprom(struct device *dev,
struct device_attribute *da,
char *buf);
static struct s9280_psu_data *s9280_psu_update_status(struct device *dev);
static struct s9280_psu_data *s9280_psu_update_eeprom(struct device *dev);
static int s9280_psu_read_block(struct i2c_client *client,
u8 command,
u8 *data,
int data_len);
#define DRIVER_NAME "psu"
// Addresses scanned
static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END };
/* PSU EEPROM SIZE */
#define EEPROM_SZ 256
#define READ_EEPROM 1
#define NREAD_EEPROM 0
static struct i2c_client pca9555_client;
/* pca9555 gpio pin mapping */
#define PSU2_PWROK 0
#define PSU2_PRSNT_L 1
#define PSU2_PWRON_L 2
#define PSU1_PWROK 3
#define PSU1_PRSNT_L 4
#define PSU1_PWRON_L 5
#define TMP_75_INT_L 6
/* Driver Private Data */
struct s9280_psu_data {
struct mutex lock;
char valid; /* !=0 if registers are valid */
unsigned long last_updated; /* In jiffies */
u8 index; /* PSU index */
s32 status; /* IO expander value */
char eeprom[EEPROM_SZ]; /* psu eeprom data */
char psuABS; /* PSU absent */
char psuPG; /* PSU power good */
};
enum psu_index
{
s9280_psu1,
s9280_psu2
};
/*
* display power good attribute
*/
static ssize_t
show_psu_pg(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct s9280_psu_data *data = s9280_psu_update_status(dev);
unsigned int value;
mutex_lock(&data->lock);
value = data->psuPG;
mutex_unlock(&data->lock);
return sprintf(buf, "%d\n", value);
}
/*
* display power absent attribute
*/
static ssize_t
show_psu_abs(struct device *dev,
struct device_attribute *devattr,
char *buf)
{
struct s9280_psu_data *data = s9280_psu_update_status(dev);
unsigned int value;
mutex_lock(&data->lock);
value = data->psuABS;
mutex_unlock(&data->lock);
return sprintf(buf, "%d\n", value);
}
/*
* sysfs attributes for psu
*/
static DEVICE_ATTR(psu_pg, S_IRUGO, show_psu_pg, NULL);
static DEVICE_ATTR(psu_abs, S_IRUGO, show_psu_abs, NULL);
static DEVICE_ATTR(psu_eeprom, S_IRUGO, show_psu_eeprom, NULL);
static struct attribute *s9280_psu_attributes[] = {
&dev_attr_psu_pg.attr,
&dev_attr_psu_abs.attr,
&dev_attr_psu_eeprom.attr,
NULL
};
/*
* display psu eeprom content
*/
static ssize_t
show_psu_eeprom(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct s9280_psu_data *data = s9280_psu_update_eeprom(dev);
memcpy(buf, (char *)data->eeprom, EEPROM_SZ);
return EEPROM_SZ;
}
static const struct attribute_group s9280_psu_group = {
.attrs = s9280_psu_attributes,
};
/*
* check gpio expander is accessible
*/
static int
pca9555_detect(struct i2c_client *client)
{
if (i2c_smbus_read_byte_data(client, REG_PORT0_DIR) < 0) {
return -ENODEV;
}
return 0;
}
/*
* client init
*/
static void
i2c_devices_client_address_init(struct i2c_client *client)
{
pca9555_client = *client;
/* get i2c adapter for the target */
pca9555_client.adapter = i2c_get_adapter(I2C_BUS_PSU_STATUS);
/* get the i2c addr for the target */
pca9555_client.addr = I2C_ADDR_PSU_STATUS;
}
static int
s9280_psu_probe(struct i2c_client *client,
const struct i2c_device_id *dev_id)
{
struct s9280_psu_data *data;
int status, err;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
status = -EIO;
goto exit;
}
data = kzalloc(sizeof(struct s9280_psu_data), GFP_KERNEL);
if (!data) {
status = -ENOMEM;
goto exit;
}
memset(data, 0, sizeof(struct s9280_psu_data));
i2c_set_clientdata(client, data);
data->valid = 0;
data->index = dev_id->driver_data;
mutex_init(&data->lock);
i2c_devices_client_address_init(client);
err = pca9555_detect(&pca9555_client);
if (err) {
return err;
}
dev_info(&client->dev, "chip found\n");
/* Register sysfs hooks */
status = sysfs_create_group(&client->dev.kobj, &s9280_psu_group);
if (status) {
goto exit_free;
}
return 0;
exit_free:
kfree(data);
exit:
return status;
}
static int
s9280_psu_remove(struct i2c_client *client)
{
struct s9280_psu_data *data = i2c_get_clientdata(client);
sysfs_remove_group(&client->dev.kobj, &s9280_psu_group);
kfree(data);
/* free i2c adapter */
i2c_put_adapter(pca9555_client.adapter);
return 0;
}
/*
* psu eeprom read utility
*/
static int
s9280_psu_read_block(struct i2c_client *client,
u8 command,
u8 *data,
int data_len)
{
int i=0, ret=0;
int blk_max = 32; //max block read size
/* read eeprom, 32 * 8 = 256 bytes */
for (i=0; i < EEPROM_SZ/blk_max; i++) {
ret = i2c_smbus_read_i2c_block_data(client, (i*blk_max), blk_max,
data + (i*blk_max));
if (ret < 0) {
return ret;
}
}
return ret;
}
/*
* update eeprom content
*/
static struct s9280_psu_data
*s9280_psu_update_eeprom(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct s9280_psu_data *data = i2c_get_clientdata(client);
s32 status = 0;
int psu_pwrok = 0;
int psu_prsnt_l = 0;
mutex_lock(&data->lock);
if (time_after(jiffies, data->last_updated + 300 * HZ)
|| !data->valid) {
/* Read psu status */
status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN);
data->status = status;
/*read psu status from io expander*/
if (data->index == s9280_psu1) {
psu_pwrok = PSU1_PWROK;
psu_prsnt_l = PSU1_PRSNT_L;
} else {
psu_pwrok = PSU2_PWROK;
psu_prsnt_l = PSU2_PRSNT_L;
}
data->psuPG = (status >> psu_pwrok) & 0x1;
data->psuABS = (status >> psu_prsnt_l) & 0x1;
/* Read eeprom */
if (!data->psuABS) {
//clear local eeprom data
memset(data->eeprom, 0, EEPROM_SZ);
//read eeprom
status = s9280_psu_read_block(client, 0, data->eeprom,
ARRAY_SIZE(data->eeprom));
if (status < 0) {
memset(data->eeprom, 0, EEPROM_SZ);
dev_err(&client->dev, "Read eeprom failed, status=(%d)\n", status);
} else {
data->valid = 1;
}
} else {
memset(data->eeprom, 0, EEPROM_SZ);
}
data->last_updated = jiffies;
}
mutex_unlock(&data->lock);
return data;
}
/*
* update psu status
*/
static struct s9280_psu_data
*s9280_psu_update_status(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct s9280_psu_data *data = i2c_get_clientdata(client);
s32 status = 0;
int psu_pwrok = 0;
int psu_prsnt_l = 0;
mutex_lock(&data->lock);
/* Read psu status */
status = i2c_smbus_read_word_data(&(pca9555_client), REG_PORT0_IN);
data->status = status;
/*read psu status from io expander*/
if (data->index == s9280_psu1) {
psu_pwrok = PSU1_PWROK;
psu_prsnt_l = PSU1_PRSNT_L;
} else {
psu_pwrok = PSU2_PWROK;
psu_prsnt_l = PSU2_PRSNT_L;
}
data->psuPG = (status >> psu_pwrok) & 0x1;
data->psuABS = (status >> psu_prsnt_l) & 0x1;
mutex_unlock(&data->lock);
return data;
}
static const struct i2c_device_id s9280_psu_id[] = {
{ "psu1", s9280_psu1 },
{ "psu2", s9280_psu2 },
{}
};
MODULE_DEVICE_TABLE(i2c, s9280_psu_id);
static struct i2c_driver s9280_psu_driver = {
.driver = {
.name = DRIVER_NAME,
},
.probe = s9280_psu_probe,
.remove = s9280_psu_remove,
.id_table = s9280_psu_id,
.address_list = normal_i2c,
};
static int __init s9280_psu_init(void)
{
return i2c_add_driver(&s9280_psu_driver);
}
static void __exit s9280_psu_exit(void)
{
i2c_del_driver(&s9280_psu_driver);
}
module_init(s9280_psu_init);
module_exit(s9280_psu_exit);
MODULE_AUTHOR("Leo Lin <feng.lee.usa@ingrasys.com>");
MODULE_DESCRIPTION("S9280-64X psu driver");
MODULE_LICENSE("GPL");

1
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/PKG.yml Executable file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-ingrasys-s9280-64x ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

2
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/Makefile Executable file
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@@ -0,0 +1,2 @@
FILTER=src
include $(ONL)/make/subdirs.mk

45
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/lib/Makefile Executable file
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@@ -0,0 +1,45 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-ingrasys-s9280-64x
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_ingrasys_s9280_64x onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-ingrasys-s9280-64x.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

45
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/onlpdump/Makefile Executable file
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@@ -0,0 +1,45 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_ingrasys_s9280_64x onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

2
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/.gitignore vendored Executable file
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@@ -0,0 +1,2 @@
/x86_64_ingrasys_s9280_64x.mk
/doc

1
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/.module Executable file
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@@ -0,0 +1 @@
name: x86_64_ingrasys_s9280_64x

10
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/Makefile Executable file
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@@ -0,0 +1,10 @@
############################################################
#
#
#
############################################################
include $(ONL)/make/config.mk
MODULE := x86_64_ingrasys_s9280_64x
AUTOMODULE := x86_64_ingrasys_s9280_64x
include $(BUILDER)/definemodule.mk

7
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/auto/make.mk Executable file
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@@ -0,0 +1,7 @@
#
# x86_64_ingrasys_s9280_64x Autogeneration
#
###############################################################################
x86-64-ingrasys-s9280-64x_AUTO_DEFS := module/auto/x86-64-ingrasys-s9280-64x.yml
x86-64-ingrasys-s9280-64x_AUTO_DIRS := module/inc/x86-64-ingrasys-s9280-64x module/src
include $(BUILDER)/auto.mk

47
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/auto/x86-64-ingrasys-s9280-64x.yml Executable file
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@@ -0,0 +1,47 @@
###############################################################################
#
# X86_64_INGRASYS_S9280_64X Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_INGRASYS_S9280_64X_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_INGRASYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_INGRASYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_INGRASYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_INGRASYS_S9280_64X_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_INGRASYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_INGRASYS_S9280_64X_CONFIG_PORTING_STDLIB
- X86_64_INGRASYS_S9280_64X_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
definitions:
cdefs:
X86_64_INGRASYS_S9280_64X_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_ingrasys_s9280_64x_config
portingmacro:
X86_64_INGRASYS_S9280_64X:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

34
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/inc/x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x.x Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

162
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/inc/x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
/**************************************************************************//**
*
* @file
* @brief x86_64_ingrasys_s9280_64x Configuration Header
*
* @addtogroup x86_64_ingrasys_s9280_64x-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_INGRAYSYS_S9280_64X_CONFIG_H__
#define __X86_64_INGRAYSYS_S9280_64X_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_INCLUDE_CUSTOM_CONFIG
#include <x86_64_ingrasys_s9280_64x_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_INGRAYSYS_S9280_64X_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT
*
* SFP Count. */
#ifndef X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT
#define X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_ingrasys_s9280_64x_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_ingrasys_s9280_64x_config_settings_t;
/** Configuration settings table. */
/** x86_64_ingrasys_s9280_64x_config_settings table. */
extern x86_64_ingrasys_s9280_64x_config_settings_t x86_64_ingrasys_s9280_64x_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_ingrasys_s9280_64x_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_ingrasys_s9280_64x_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_INGRAYSYS_S9280_64X_CONFIG_HEADER).header> */
#include "x86_64_ingrasys_s9280_64x_porting.h"
#endif /* __X86_64_INGRAYSYS_S9280_64X_CONFIG_H__ */
/* @} */

26
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/inc/x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_dox.h Executable file
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/**************************************************************************//**
*
* x86_64_ingrasys_s9280_64x Doxygen Header
*
*****************************************************************************/
#ifndef __x86_64_ingrasys_s9280_64x_DOX_H__
#define __x86_64_ingrasys_s9280_64x_DOX_H__
/**
* @defgroup x86_64_ingrasys_s9280_64x x86_64_ingrasys_s9280_64x - x86_64_ingrasys_s9280_64x Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_ingrasys_s9280_64x-x86_64_ingrasys_s9280_64x Public Interface
* @defgroup x86_64_ingrasys_s9280_64x-config Compile Time Configuration
* @defgroup x86_64_ingrasys_s9280_64x-porting Porting Macros
*
* @}
*
*/
#endif /* __x86_64_ingrasys_s9280_64x_DOX_H__ */

106
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/inc/x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_porting.h Executable file
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/********************************************************//**
*
* @file
* @brief x86_64_Ingrasys_s9280_64x Porting Macros.
*
* @addtogroup x86_64_Ingrasys_s9280_64x-porting
* @{
*
***********************************************************/
#ifndef __X86_64_INGRAYSYS_S9280_64X_PORTING_H__
#define __X86_64_INGRAYSYS_S9280_64X_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_MALLOC
#if defined(GLOBAL_MALLOC)
#define X86_64_INGRAYSYS_S9280_64X_MALLOC GLOBAL_MALLOC
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_MALLOC malloc
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_FREE
#if defined(GLOBAL_FREE)
#define X86_64_INGRAYSYS_S9280_64X_FREE GLOBAL_FREE
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_FREE free
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_FREE is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_MEMSET
#if defined(GLOBAL_MEMSET)
#define X86_64_INGRAYSYS_S9280_64X_MEMSET GLOBAL_MEMSET
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_MEMSET memset
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define X86_64_INGRAYSYS_S9280_64X_MEMCPY GLOBAL_MEMCPY
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_MEMCPY memcpy
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define X86_64_INGRAYSYS_S9280_64X_STRNCPY GLOBAL_STRNCPY
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_STRNCPY strncpy
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define X86_64_INGRAYSYS_S9280_64X_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_VSNPRINTF vsnprintf
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define X86_64_INGRAYSYS_S9280_64X_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_SNPRINTF snprintf
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_INGRAYSYS_S9280_64X_STRLEN
#if defined(GLOBAL_STRLEN)
#define X86_64_INGRAYSYS_S9280_64X_STRLEN GLOBAL_STRLEN
#elif X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB == 1
#define X86_64_INGRAYSYS_S9280_64X_STRLEN strlen
#else
#error The macro X86_64_INGRAYSYS_S9280_64X_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_INGRAYSYS_S9280_64X_PORTING_H__ */
/* @} */

29
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/make.mk Executable file
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014, 2015 Big Switch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_ingrasys_s9280_64x_INCLUDES := -I $(THIS_DIR)inc
x86_64_ingrasys_s9280_64x_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_ingrasys_s9280_64x_DEPENDMODULE_ENTRIES := init:x86_64_ingrasys_s9280_64x ucli:x86_64_ingrasys_s9280_64x

30
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/Makefile Executable file
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@@ -0,0 +1,30 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014, 2015 Big Switch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
# Local source generation targets.
#
############################################################
include ../../../../init.mk
ucli:
$(SUBMODULE_BIGCODE)/tools/uclihandlers.py x86_64_ingrasys_s9280_64x_ucli.c

272
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/fani.c Executable file
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@@ -0,0 +1,272 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlp/platformi/fani.h>
#include "x86_64_ingrasys_s9280_64x_int.h"
#include <onlplib/file.h>
#include <onlplib/i2c.h>
#include "platform_lib.h"
onlp_fan_info_t fan_info[] = {
{ }, /* Not used */
{
{ FAN_OID_FAN1, "FANTRAY 1", 0 },
ONLP_FAN_STATUS_PRESENT,
ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,
0,
0,
ONLP_FAN_MODE_INVALID,
},
{
{ FAN_OID_FAN2, "FANTRAY 2", 0 },
ONLP_FAN_STATUS_PRESENT,
ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,
0,
0,
ONLP_FAN_MODE_INVALID,
},
{
{ FAN_OID_FAN3, "FANTRAY 3", 0 },
ONLP_FAN_STATUS_PRESENT,
ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,
0,
0,
ONLP_FAN_MODE_INVALID,
},
{
{ FAN_OID_FAN4, "FANTRAY 4", 0 },
ONLP_FAN_STATUS_PRESENT,
ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,
0,
0,
ONLP_FAN_MODE_INVALID,
},
{
{ FAN_OID_PSU_FAN1, "PSU-1 FAN", 0 },
ONLP_FAN_STATUS_PRESENT,
},
{
{ FAN_OID_PSU_FAN2, "PSU-2 FAN", 0 },
ONLP_FAN_STATUS_PRESENT,
}
};
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
int sys_fan_present_get(onlp_fan_info_t* info, int id)
{
int rv, fan_presence, i2c_bus, offset, fan_reg_mask;
/* get fan presence*/
i2c_bus = I2C_BUS_FANTRAY_LED;
switch (id)
{
case FAN_ID_FAN1:
offset = 0;
fan_reg_mask = FAN_1_PRESENT_MASK;
break;
case FAN_ID_FAN2:
offset = 0;
fan_reg_mask = FAN_2_PRESENT_MASK;
break;
case FAN_ID_FAN3:
offset = 1;
fan_reg_mask = FAN_3_PRESENT_MASK;
break;
case FAN_ID_FAN4:
offset = 1;
fan_reg_mask = FAN_4_PRESENT_MASK;
break;
default:
return ONLP_STATUS_E_INVALID;
}
rv = onlp_i2c_readb(i2c_bus, FAN_GPIO_ADDR, offset, ONLP_I2C_F_FORCE);
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
fan_presence = (rv & fan_reg_mask) ? 0 : 1;
if (!fan_presence) {
info->status &= ~ONLP_FAN_STATUS_PRESENT;
} else {
info->status |= ONLP_FAN_STATUS_PRESENT;
}
return ONLP_STATUS_OK;
}
int
sys_fan_info_get(onlp_fan_info_t* info, int id)
{
int rv, fan_status, fan_rpm, perc_val, percentage;
int max_fan_speed = 10000;
fan_status = 0;
fan_rpm = 0;
rv = sys_fan_present_get(info, id);
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
rv = onlp_file_read_int(&fan_status, SYS_FAN_PREFIX "fan%d_alarm", 2 * id - 1);
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
/* fan status > 1, means failure */
if (fan_status > 0) {
info->status |= ONLP_FAN_STATUS_FAILED;
return ONLP_STATUS_OK;
}
rv = onlp_file_read_int(&fan_rpm, SYS_FAN_PREFIX "fan%d_input", 2 * id - 1);
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
info->rpm = fan_rpm;
/* get speed percentage*/
switch (id)
{
case FAN_ID_FAN1:
case FAN_ID_FAN2:
case FAN_ID_FAN3:
case FAN_ID_FAN4:
rv = onlp_file_read_int(&perc_val, SYS_FAN_PREFIX "pwm%d",
FAN_CTRL_SET2);
break;
default:
return ONLP_STATUS_E_INVALID;
}
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
percentage = (info->rpm*100)/max_fan_speed;
info->percentage = percentage;
return ONLP_STATUS_OK;
}
int
sys_fan_rpm_percent_set(int perc)
{
int rc;
rc = onlp_file_write_int(perc, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET2);
if (rc < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int percentage)
{
int fid, perc_val, rc;
fid = ONLP_OID_ID_GET(id);
/*
* Set fan speed
* Driver accept value in range between 128 and 255.
* Value 128 is 50%.
* Value 200 is 80%.
* Value 255 is 100%.
*/
if (percentage == 100) {
perc_val = 255;
} else if (percentage == 80) {
perc_val = 200;
} else if (percentage == 50) {
perc_val = 128;
} else {
return ONLP_STATUS_E_INVALID;
}
switch (fid)
{
case FAN_ID_FAN1:
case FAN_ID_FAN2:
case FAN_ID_FAN3:
case FAN_ID_FAN4:
rc = sys_fan_rpm_percent_set(perc_val);
break;
default:
return ONLP_STATUS_E_INVALID;
}
return rc;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv)
{
int fan_id ,rc;
fan_id = ONLP_OID_ID_GET(id);
*rv = fan_info[fan_id];
rv->caps |= ONLP_FAN_CAPS_GET_RPM;
switch (fan_id) {
case FAN_ID_FAN1:
case FAN_ID_FAN2:
case FAN_ID_FAN3:
case FAN_ID_FAN4:
rc = sys_fan_info_get(rv, fan_id);
break;
case FAN_ID_PSU_FAN1:
case FAN_ID_PSU_FAN2:
rc = psu_fan_info_get(rv, fan_id);
break;
default:
return ONLP_STATUS_E_INTERNAL;
break;
}
return rc;
}

223
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/ledi.c Executable file
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@@ -0,0 +1,223 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
***********************************************************/
#include <onlp/platformi/ledi.h>
#include <stdio.h>
#include <sys/mman.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include "platform_lib.h"
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t led_info[] =
{
{ }, /* Not used */
{
{ LED_OID_SYSTEM, "Chassis LED 1 (SYS LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN,
},
{
{ LED_OID_FAN, "Chassis LED 2 (FAN LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ LED_OID_PSU1, "Chassis LED 3 (PSU1 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ LED_OID_PSU2, "Chassis LED 4 (PSU2 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ LED_OID_FAN_TRAY1, "Rear LED 1 (FAN TRAY1 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ LED_OID_FAN_TRAY2, "Rear LED 2 (FAN TRAY2 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ LED_OID_FAN_TRAY3, "Rear LED 3 (FAN TRAY3 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ LED_OID_FAN_TRAY4, "Rear LED 4 (FAN TRAY4 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
}
};
extern int sys_fan_info_get(onlp_fan_info_t* info, int id);
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int led_id, pw_exist, pw_good, rc, fan_id;
onlp_fan_info_t fan_info;
char *sys_psu_prefix = NULL;
memset(&fan_info, 0, sizeof(onlp_fan_info_t));
led_id = ONLP_OID_ID_GET(id);
*info = led_info[led_id];
if (id == LED_OID_PSU1 || id == LED_OID_PSU2) {
if (id == LED_OID_PSU1) {
sys_psu_prefix = SYS_PSU1_PREFIX;
} else {
sys_psu_prefix = SYS_PSU2_PREFIX;
}
/* check psu status */
if ((rc = psu_present_get(&pw_exist, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if ((rc = psu_pwgood_get(&pw_good, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
/* psu not present */
if (pw_exist != PSU_STATUS_PRESENT) {
info->status &= ~ONLP_LED_STATUS_ON;
info->mode = ONLP_LED_MODE_OFF;
} else if (pw_good != PSU_STATUS_POWER_GOOD) {
info->status |= ONLP_LED_STATUS_ON;
info->mode |= ONLP_LED_MODE_ORANGE;
} else {
info->status |= ONLP_LED_STATUS_ON;
info->mode |= ONLP_LED_MODE_GREEN;
}
} else if (id == LED_OID_FAN) {
info->status |= ONLP_LED_STATUS_ON;
info->mode |= ONLP_LED_MODE_GREEN;
for (fan_id=FAN_ID_FAN1; fan_id<=FAN_ID_FAN4; ++fan_id) {
rc = sys_fan_info_get(&fan_info, fan_id);
if (rc != ONLP_STATUS_OK || fan_info.status & ONLP_FAN_STATUS_FAILED) {
info->mode &= ~ONLP_LED_MODE_GREEN;
info->mode |= ONLP_LED_MODE_ORANGE;
break;
}
}
} else if (id == LED_OID_SYSTEM) {
info->status |= ONLP_LED_STATUS_ON;
info->mode |= ONLP_LED_MODE_GREEN;
} else {
info->status |= ONLP_LED_STATUS_ON;
info->mode |= ONLP_LED_MODE_ON;
}
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
if (!on_or_off) {
return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
}
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int led_id, rc;
led_id = ONLP_OID_ID_GET(id);
switch (led_id) {
case LED_SYSTEM_LED:
rc = system_led_set(mode);
break;
case LED_FAN_LED:
rc = fan_led_set(mode);
break;
case LED_PSU1_LED:
rc = psu1_led_set(mode);
break;
case LED_PSU2_LED:
rc = psu2_led_set(mode);
break;
case LED_FAN_TRAY1:
case LED_FAN_TRAY2:
case LED_FAN_TRAY3:
case LED_FAN_TRAY4:
rc = fan_tray_led_set(id, mode);
break;
default:
return ONLP_STATUS_E_INTERNAL;
break;
}
return rc;
}
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_OK;
}

29
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/make.mk Executable file
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@@ -0,0 +1,29 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014, 2015 Big Switch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
LIBRARY := x86_64_ingrasys_s9280_64x
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
#$(LIBRARY)_LAST := 1
include $(BUILDER)/lib.mk

576
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/platform_lib.c Executable file
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@@ -0,0 +1,576 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2013 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <errno.h>
#include <string.h>
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <onlp/onlp.h>
#include <onlplib/file.h>
#include <onlplib/i2c.h>
#include <AIM/aim.h>
#include "platform_lib.h"
int
psu_thermal_get(onlp_thermal_info_t* info, int thermal_id)
{
int pw_exist, pw_good;
int offset, i2c_bus, rc;
int value, buf;
unsigned int y_value = 0;
unsigned char n_value = 0;
unsigned int temp = 0;
char result[32];
char *sys_psu_prefix = NULL;
if (thermal_id == THERMAL_ID_PSU1_1) {
i2c_bus = I2C_BUS_PSU1;
offset = PSU_THERMAL1_OFFSET;
sys_psu_prefix = SYS_PSU1_PREFIX;
} else if (thermal_id == THERMAL_ID_PSU1_2) {
i2c_bus = I2C_BUS_PSU1;
offset = PSU_THERMAL2_OFFSET;
sys_psu_prefix = SYS_PSU1_PREFIX;
} else if (thermal_id == THERMAL_ID_PSU2_1) {
i2c_bus = I2C_BUS_PSU2;
offset = PSU_THERMAL1_OFFSET;
sys_psu_prefix = SYS_PSU2_PREFIX;
} else if (thermal_id == THERMAL_ID_PSU2_2) {
i2c_bus = I2C_BUS_PSU2;
offset = PSU_THERMAL2_OFFSET;
sys_psu_prefix = SYS_PSU2_PREFIX;
}
/* check psu status */
if ((rc = psu_present_get(&pw_exist, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if (pw_exist != PSU_STATUS_PRESENT) {
info->mcelsius = 0;
info->status &= ~ONLP_THERMAL_STATUS_PRESENT;
return ONLP_STATUS_OK;
} else {
info->status |= ONLP_THERMAL_STATUS_PRESENT;
}
if ((rc = psu_pwgood_get(&pw_good, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if (pw_good != PSU_STATUS_POWER_GOOD) {
info->mcelsius = 0;
return ONLP_STATUS_OK;
}
value = onlp_i2c_readw(i2c_bus, PSU_REG, offset, ONLP_I2C_F_FORCE);
y_value = (value & 0x07FF);
if ((value & 0x8000)&&(y_value)) {
n_value = 0xF0 + (((value) >> 11) & 0x0F);
n_value = (~n_value) +1;
temp = (unsigned int)(1<<n_value);
if (temp)
snprintf(result, sizeof(result), "%d.%04d", y_value/temp, ((y_value%temp)*10000)/temp);
} else {
n_value = (((value) >> 11) & 0x0F);
snprintf(result, sizeof(result), "%d", (y_value*(1<<n_value)));
}
buf = atof((const char *)result);
info->mcelsius = (int)(buf * 1000);
return ONLP_STATUS_OK;
}
int
psu_fan_info_get(onlp_fan_info_t* info, int id)
{
int pw_exist, pw_good;
int i2c_bus, rc;
unsigned int tmp_fan_rpm, fan_rpm;
char *sys_psu_prefix = NULL;
if (id == FAN_ID_PSU_FAN1) {
i2c_bus = I2C_BUS_PSU1;
sys_psu_prefix = SYS_PSU1_PREFIX;
} else if (id == FAN_ID_PSU_FAN2) {
i2c_bus = I2C_BUS_PSU2;
sys_psu_prefix = SYS_PSU2_PREFIX;
} else {
return ONLP_STATUS_E_INTERNAL;
}
/* check psu status */
if ((rc = psu_present_get(&pw_exist, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if (pw_exist != PSU_STATUS_PRESENT) {
info->rpm = 0;
info->status &= ~ONLP_FAN_STATUS_PRESENT;
return ONLP_STATUS_OK;
} else {
info->status |= ONLP_FAN_STATUS_PRESENT;
}
if ((rc = psu_pwgood_get(&pw_good, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if (pw_good != PSU_STATUS_POWER_GOOD) {
info->rpm = 0;
return ONLP_STATUS_OK;
}
tmp_fan_rpm = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_FAN_RPM_OFFSET, ONLP_I2C_F_FORCE);
fan_rpm = (unsigned int)tmp_fan_rpm;
fan_rpm = (fan_rpm & 0x07FF) * (1 << ((fan_rpm >> 11) & 0x1F));
info->rpm = (int)fan_rpm;
return ONLP_STATUS_OK;
}
int
psu_vout_get(onlp_psu_info_t* info, int i2c_bus)
{
int v_value = 0;
int n_value = 0;
unsigned int temp = 0;
char result[32];
double dvalue;
memset(result, 0, sizeof(result));
n_value = onlp_i2c_readb(i2c_bus, PSU_REG, PSU_VOUT_OFFSET1, ONLP_I2C_F_FORCE);
if (n_value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
v_value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_VOUT_OFFSET2, ONLP_I2C_F_FORCE);
if (v_value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
if (n_value & 0x10) {
n_value = 0xF0 + (n_value & 0x0F);
n_value = (~n_value) +1;
temp = (unsigned int)(1<<n_value);
if (temp)
snprintf(result, sizeof(result), "%d.%04d", v_value/temp, ((v_value%temp)*10000)/temp);
} else {
snprintf(result, sizeof(result), "%d", (v_value*(1<<n_value)));
}
dvalue = atof((const char *)result);
if (dvalue > 0.0) {
info->caps |= ONLP_PSU_CAPS_VOUT;
info->mvout = (int)(dvalue * 1000);
}
return ONLP_STATUS_OK;
}
int
psu_iout_get(onlp_psu_info_t* info, int i2c_bus)
{
int value;
unsigned int y_value = 0;
unsigned char n_value = 0;
unsigned int temp = 0;
char result[32];
memset(result, 0, sizeof(result));
double dvalue;
value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_IOUT_OFFSET, ONLP_I2C_F_FORCE);
if (value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
y_value = (value & 0x07FF);
if ((value & 0x8000)&&(y_value))
{
n_value = 0xF0 + (((value) >> 11) & 0x0F);
n_value = (~n_value) +1;
temp = (unsigned int)(1<<n_value);
if (temp) {
snprintf(result, sizeof(result), "%d.%04d", y_value/temp, ((y_value%temp)*10000)/temp);
}
} else {
n_value = (((value) >> 11) & 0x0F);
snprintf(result, sizeof(result), "%d", (y_value*(1<<n_value)));
}
dvalue = atof((const char *)result);
if (dvalue > 0.0) {
info->caps |= ONLP_PSU_CAPS_IOUT;
info->miout = (int)(dvalue * 1000);
}
return ONLP_STATUS_OK;
}
int
psu_pout_get(onlp_psu_info_t* info, int i2c_bus)
{
int value;
unsigned int y_value = 0;
unsigned char n_value = 0;
unsigned int temp = 0;
char result[32];
memset(result, 0, sizeof(result));
double dvalue;
value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_POUT_OFFSET, ONLP_I2C_F_FORCE);
if (value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
y_value = (value & 0x07FF);
if ((value & 0x8000)&&(y_value))
{
n_value = 0xF0 + (((value) >> 11) & 0x0F);
n_value = (~n_value) +1;
temp = (unsigned int)(1<<n_value);
if (temp) {
snprintf(result, sizeof(result), "%d.%04d", y_value/temp, ((y_value%temp)*10000)/temp);
}
} else {
n_value = (((value) >> 11) & 0x0F);
snprintf(result, sizeof(result), "%d", (y_value*(1<<n_value)));
}
dvalue = atof((const char *)result);
if (dvalue > 0.0) {
info->caps |= ONLP_PSU_CAPS_POUT;
info->mpout = (int)(dvalue * 1000);
}
return ONLP_STATUS_OK;
}
int
psu_pin_get(onlp_psu_info_t* info, int i2c_bus)
{
int value;
unsigned int y_value = 0;
unsigned char n_value = 0;
unsigned int temp = 0;
char result[32];
memset(result, 0, sizeof(result));
double dvalue;
value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_PIN_OFFSET, ONLP_I2C_F_FORCE);
if (value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
y_value = (value & 0x07FF);
if ((value & 0x8000)&&(y_value))
{
n_value = 0xF0 + (((value) >> 11) & 0x0F);
n_value = (~n_value) +1;
temp = (unsigned int)(1<<n_value);
if (temp) {
snprintf(result, sizeof(result), "%d.%04d", y_value/temp, ((y_value%temp)*10000)/temp);
}
} else {
n_value = (((value) >> 11) & 0x0F);
snprintf(result, sizeof(result), "%d", (y_value*(1<<n_value)));
}
dvalue = atof((const char *)result);
if (dvalue > 0.0) {
info->caps |= ONLP_PSU_CAPS_PIN;
info->mpin = (int)(dvalue * 1000);
}
return ONLP_STATUS_OK;
}
int
psu_eeprom_get(onlp_psu_info_t* info, int id)
{
uint8_t data[256];
char eeprom_path[128];
int data_len, i, rc;
memset(data, 0, sizeof(data));
memset(eeprom_path, 0, sizeof(eeprom_path));
if (id == PSU_ID_PSU1) {
rc = onlp_file_read(data, sizeof(data), &data_len, PSU1_EEPROM_PATH);
} else {
rc = onlp_file_read(data, sizeof(data), &data_len, PSU2_EEPROM_PATH);
}
if (rc == ONLP_STATUS_OK)
{
i = 11;
/* Manufacturer Name */
data_len = (data[i]&0x0f);
i++;
i += data_len;
/* Product Name */
data_len = (data[i]&0x0f);
i++;
memcpy(info->model, (char *) &(data[i]), data_len);
i += data_len;
/* Product part,model number */
data_len = (data[i]&0x0f);
i++;
i += data_len;
/* Product Version */
data_len = (data[i]&0x0f);
i++;
i += data_len;
/* Product Serial Number */
data_len = (data[i]&0x0f);
i++;
memcpy(info->serial, (char *) &(data[i]), data_len);
} else {
strcpy(info->model, "Missing");
strcpy(info->serial, "Missing");
}
return ONLP_STATUS_OK;
}
int
psu_present_get(int *pw_exist, char *sys_psu_prefix)
{
int rv, psu_pres;
rv = onlp_file_read_int(&psu_pres, "%spsu_abs", sys_psu_prefix);
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
*pw_exist = (psu_pres ? 0 : 1);
return ONLP_STATUS_OK;
}
int
psu_pwgood_get(int *pw_good, char *sys_psu_prefix)
{
int rv, psu_pwgood;
rv = onlp_file_read_int(&psu_pwgood, "%spsu_pg", sys_psu_prefix);
if (rv < 0) {
return ONLP_STATUS_E_INTERNAL;
}
*pw_good = (psu_pwgood ? 1 : 0);
return ONLP_STATUS_OK;
}
int
system_led_set(onlp_led_mode_t mode)
{
int rc;
if(mode == ONLP_LED_MODE_GREEN) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET, LED_SYS_AND_MASK,
LED_SYS_GMASK, ONLP_I2C_F_FORCE);
}
else if(mode == ONLP_LED_MODE_ORANGE) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET, LED_SYS_AND_MASK,
LED_SYS_YMASK, ONLP_I2C_F_FORCE);
} else {
return ONLP_STATUS_E_INTERNAL;
}
if (rc < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
fan_led_set(onlp_led_mode_t mode)
{
int rc;
if(mode == ONLP_LED_MODE_GREEN) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET, LED_FAN_AND_MASK,
LED_FAN_GMASK, ONLP_I2C_F_FORCE);
}
else if(mode == ONLP_LED_MODE_ORANGE) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET, LED_FAN_AND_MASK,
LED_FAN_YMASK, ONLP_I2C_F_FORCE);
}
else if(mode == ONLP_LED_MODE_OFF) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET, LED_FAN_AND_MASK,
LED_FAN_OFFMASK, ONLP_I2C_F_FORCE);
} else {
return ONLP_STATUS_E_INTERNAL;
}
if (rc < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
psu1_led_set(onlp_led_mode_t mode)
{
int rc;
if(mode == ONLP_LED_MODE_GREEN) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET,
LED_PSU1_AND_MASK, LED_PSU1_GMASK,
ONLP_I2C_F_FORCE);
} else if(mode == ONLP_LED_MODE_ORANGE) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET,
LED_PSU1_AND_MASK, LED_PSU1_YMASK,
ONLP_I2C_F_FORCE);
} else if(mode == ONLP_LED_MODE_OFF) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET,
LED_PSU1_AND_MASK, LED_PSU1_OFFMASK,
ONLP_I2C_F_FORCE);
} else {
return ONLP_STATUS_E_INTERNAL;
}
if (rc < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
psu2_led_set(onlp_led_mode_t mode)
{
int rc;
if(mode == ONLP_LED_MODE_GREEN) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET,
LED_PSU2_AND_MASK, LED_PSU2_GMASK,
ONLP_I2C_F_FORCE);
} else if(mode == ONLP_LED_MODE_ORANGE) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET,
LED_PSU2_AND_MASK, LED_PSU2_YMASK,
ONLP_I2C_F_FORCE);
} else if(mode == ONLP_LED_MODE_OFF) {
rc = onlp_i2c_modifyb(I2C_BUS_SYS_LED, LED_REG, LED_OFFSET,
LED_PSU2_AND_MASK, LED_PSU2_OFFMASK,
ONLP_I2C_F_FORCE);
} else {
return ONLP_STATUS_E_INTERNAL;
}
if (rc < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
fan_tray_led_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int rc, temp_id;
int fan_tray_id, offset;
temp_id = ONLP_OID_ID_GET(id);
switch (temp_id) {
case 5:
fan_tray_id = 1;
offset = 2;
break;
case 6:
fan_tray_id = 2;
offset = 2;
break;
case 7:
fan_tray_id = 3;
offset = 3;
break;
case 8:
fan_tray_id = 4;
offset = 3;
break;
default:
return ONLP_STATUS_E_INTERNAL;
break;
}
if (fan_tray_id == 1 || fan_tray_id == 3) {
if (mode == ONLP_LED_MODE_GREEN) {
rc = onlp_i2c_modifyb(I2C_BUS_FANTRAY_LED, FAN_GPIO_ADDR, offset, 0xFC,
0x01, ONLP_I2C_F_FORCE);
} else if (mode == ONLP_LED_MODE_ORANGE) {
rc = onlp_i2c_modifyb(I2C_BUS_FANTRAY_LED, FAN_GPIO_ADDR, offset, 0xFC,
0x02, ONLP_I2C_F_FORCE);
}
} else if (fan_tray_id == 2 || fan_tray_id == 4) {
if (mode == ONLP_LED_MODE_GREEN) {
rc = onlp_i2c_modifyb(I2C_BUS_FANTRAY_LED, FAN_GPIO_ADDR, offset, 0xCF,
0x10, ONLP_I2C_F_FORCE);
} else if (mode == ONLP_LED_MODE_ORANGE) {
rc = onlp_i2c_modifyb(I2C_BUS_FANTRAY_LED, FAN_GPIO_ADDR, offset, 0xCF,
0x20, ONLP_I2C_F_FORCE);
}
}
if (rc < 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
sysi_platform_info_get(onlp_platform_info_t* pi)
{
int cpld_release, cpld_version, cpld_rev;
int bus_i;
for(bus_i=I2C_BUS_CPLD1; bus_i <= I2C_BUS_CPLD5; ++bus_i) {
cpld_rev = onlp_i2c_readb(bus_i, CPLD_REG, CPLD_VER_OFFSET, ONLP_I2C_F_FORCE);
if (cpld_rev < 0) {
return ONLP_STATUS_E_INTERNAL;
}
cpld_release = (((cpld_rev) >> 6 & 0x01));
cpld_version = (((cpld_rev) & 0x3F));
pi->cpld_versions = aim_fstrdup(
"CPLD is %d version(0:RD 1:Release), Revision is 0x%02x\n",
cpld_release, cpld_version);
}
return ONLP_STATUS_OK;
}

311
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/platform_lib.h Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2013 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __PLATFORM_LIB_H__
#define __PLATFORM_LIB_H__
#include <onlp/fan.h>
#include <onlp/psu.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/sysi.h>
#include "x86_64_ingrasys_s9280_64x_int.h"
#include "x86_64_ingrasys_s9280_64x_log.h"
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
#define SYS_CPU_TEMP_PREFIX "/sys/class/hwmon/hwmon0/"
#define SYS_REAR_PANEL_TEMP_PREFIX "/sys/class/hwmon/hwmon2/"
#define SYS_REAR_MAC_TEMP_PREFIX "/sys/class/hwmon/hwmon3/"
#define SYS_MB_ASIC_TEMP_PREFIX "/sys/class/hwmon/hwmon4/"
#define SYS_FRONT_PANEL_PREFIX "/sys/class/hwmon/hwmon5/"
#define SYS_FRONT_MAC_PREFIX "/sys/class/hwmon/hwmon6/"
#define SYS_BMC_BOARD_PREFIX "/sys/class/hwmon/hwmon7/"
#define SYS_CPU_BOARD_PREFIX "/sys/class/hwmon/hwmon8/"
#define SYS_FAN_PREFIX "/sys/class/hwmon/hwmon1/device/"
#define SYS_PSU1_PREFIX "/sys/bus/i2c/devices/i2c-18/18-0050/"
#define SYS_PSU2_PREFIX "/sys/bus/i2c/devices/i2c-17/17-0050/"
#define SYS_EEPROM_PATH "/sys/bus/i2c/devices/0-0051/eeprom"
#define PSU1_EEPROM_PATH "/sys/bus/i2c/devices/18-0050/psu_eeprom"
#define PSU2_EEPROM_PATH "/sys/bus/i2c/devices/17-0050/psu_eeprom"
#define PSU_STATUS_PRESENT 1
#define PSU_STATUS_POWER_GOOD 1
#define FAN_PRESENT 0
#define FAN_CTRL_SET1 1
#define FAN_CTRL_SET2 2
#define BOARD_THERMAL_NUM 6
#define SYS_FAN_NUM 4
#define PORT_NUM 66
#define THERMAL_NUM 16
#define LED_NUM 4
#define FAN_NUM 6
#define THERMAL_SHUTDOWN_DEFAULT 105000
#define THERMAL_ERROR_DEFAULT 95000
#define THERMAL_ERROR_FAN_PERC 100
#define THERMAL_WARNING_DEFAULT 77000
#define THERMAL_WARNING_FAN_PERC 80
#define THERMAL_NORMAL_DEFAULT 72000
#define THERMAL_NORMAL_FAN_PERC 50
/* I2C bus */
#define I2C_BUS_0 0
#define I2C_BUS_1 1
#define I2C_BUS_2 2
#define I2C_BUS_3 3
#define I2C_BUS_4 4
#define I2C_BUS_5 5
#define I2C_BUS_10 10 /* SYS_LED */
#define I2C_BUS_17 (17) /* PSU2 */
#define I2C_BUS_18 (18) /* PSU1 */
#define I2C_BUS_PSU1 I2C_BUS_18 /* PSU1 */
#define I2C_BUS_PSU2 I2C_BUS_17 /* PSU2 */
#define I2C_BUS_SYS_LED I2C_BUS_10 /* SYS LED */
#define I2C_BUS_FANTRAY_LED I2C_BUS_0 /* FANTRAY LED */
#define I2C_BUS_CPLD1 I2C_BUS_1 /* CPLD 1 */
#define I2C_BUS_CPLD2 I2C_BUS_2 /* CPLD 2 */
#define I2C_BUS_CPLD3 I2C_BUS_3 /* CPLD 3 */
#define I2C_BUS_CPLD4 I2C_BUS_4 /* CPLD 4 */
#define I2C_BUS_CPLD5 I2C_BUS_5 /* CPLD 5 */
/* PSU */
#define PSU_MUX_MASK 0x01
#define PSU_THERMAL1_OFFSET 0x8D
#define PSU_THERMAL2_OFFSET 0x8E
#define PSU_THERMAL_REG 0x58
#define PSU_FAN_RPM_REG 0x58
#define PSU_FAN_RPM_OFFSET 0x90
#define PSU_REG 0x58
#define PSU_VOUT_OFFSET1 0x20
#define PSU_VOUT_OFFSET2 0x8B
#define PSU_IOUT_OFFSET 0x8C
#define PSU_POUT_OFFSET 0x96
#define PSU_PIN_OFFSET 0x97
#define PSU_STATE_REG 0x25
#define PSU1_PRESENT_OFFSET 0x04
#define PSU2_PRESENT_OFFSET 0x01
#define PSU1_PWGOOD_OFFSET 0x03
#define PSU2_PWGOOD_OFFSET 0x00
/* LED */
#define LED_REG 0x76
#define LED_OFFSET 0x02
#define LED_PWOK_OFFSET 0x03
#define LED_SYS_AND_MASK 0x7F
#define LED_SYS_GMASK 0x80
#define LED_SYS_YMASK 0x00
#define LED_FAN_AND_MASK 0x9F
#define LED_FAN_GMASK 0x40
#define LED_FAN_YMASK 0x60
#define LED_FAN_OFFMASK 0x00
#define LED_PSU2_AND_MASK 0xF9
#define LED_PSU2_GMASK 0x04
#define LED_PSU2_YMASK 0x06
#define LED_PSU2_OFFMASK 0x00
#define LED_PSU1_AND_MASK 0xE7
#define LED_PSU1_GMASK 0x10
#define LED_PSU1_YMASK 0x18
#define LED_PSU1_OFFMASK 0x00
#define LED_SYS_ON_MASK 0x00
#define LED_SYS_OFF_MASK 0x33
/* SYS */
#define CPLD_REG 0x33
#define CPLD_VER_OFFSET 0x01
/* QSFP */
#define QSFP_PRES_REG1 0x20
#define QSFP_PRES_REG2 0x21
#define QSFP_PRES_OFFSET1 0x00
#define QSFP_PRES_OFFSET2 0x01
/* FANTRAY */
#define FAN_GPIO_ADDR 0x20
#define FAN_1_PRESENT_MASK 0x04
#define FAN_2_PRESENT_MASK 0x40
#define FAN_3_PRESENT_MASK 0x04
#define FAN_4_PRESENT_MASK 0x40
/* CPLD */
//#define CPLDx_I2C_ADDR 0x21
#define QSFP_EEPROM_I2C_ADDR 0x50
#define CPLD1_PORTS 12
#define CPLDx_PORTS 13
#define CPLD_OFFSET 1
#define CPLD_PRES_BIT 1
#define CPLD_SFP1_PRES_BIT 1
#define CPLD_SFP2_PRES_BIT 4
#define CPLD_QSFP_REG_PATH "/sys/bus/i2c/devices/%d-00%02x/%s_%d"
#define CPLD_SFP_REG_PATH "/sys/bus/i2c/devices/%d-00%02x/%s"
#define CPLD_QSFP_PORT_STATUS_KEY "cpld_qsfp_port_status"
#define CPLD_SFP_PORT_STATUS_KEY "cpld_sfp_port_status"
/** led_oid */
typedef enum led_oid_e {
LED_OID_SYSTEM = ONLP_LED_ID_CREATE(1),
LED_OID_FAN = ONLP_LED_ID_CREATE(2),
LED_OID_PSU1 = ONLP_LED_ID_CREATE(3),
LED_OID_PSU2 = ONLP_LED_ID_CREATE(4),
LED_OID_FAN_TRAY1 = ONLP_LED_ID_CREATE(5),
LED_OID_FAN_TRAY2 = ONLP_LED_ID_CREATE(6),
LED_OID_FAN_TRAY3 = ONLP_LED_ID_CREATE(7),
LED_OID_FAN_TRAY4 = ONLP_LED_ID_CREATE(8),
} led_oid_t;
/** led_id */
typedef enum led_id_e {
LED_SYSTEM_LED = 1,
LED_FAN_LED = 2,
LED_PSU1_LED = 3,
LED_PSU2_LED = 4,
LED_FAN_TRAY1 = 5,
LED_FAN_TRAY2 = 6,
LED_FAN_TRAY3 = 7,
LED_FAN_TRAY4 = 8,
} led_id_t;
/** Thermal_oid */
typedef enum thermal_oid_e {
THERMAL_OID_CPU1 = ONLP_THERMAL_ID_CREATE(1),
THERMAL_OID_CPU2 = ONLP_THERMAL_ID_CREATE(2),
THERMAL_OID_CPU3 = ONLP_THERMAL_ID_CREATE(3),
THERMAL_OID_CPU4 = ONLP_THERMAL_ID_CREATE(4),
THERMAL_OID_REAR_PANEL = ONLP_THERMAL_ID_CREATE(5),
THERMAL_OID_REAR_MAC = ONLP_THERMAL_ID_CREATE(6),
THERMAL_OID_MB = ONLP_THERMAL_ID_CREATE(7),
THERMAL_OID_ASIC = ONLP_THERMAL_ID_CREATE(8),
THERMAL_OID_FRONT_PANEL = ONLP_THERMAL_ID_CREATE(9),
THERMAL_OID_FRONT_MAC = ONLP_THERMAL_ID_CREATE(10),
THERMAL_OID_BMC_BOARD = ONLP_THERMAL_ID_CREATE(11),
THERMAL_OID_CPU_BOARD = ONLP_THERMAL_ID_CREATE(12),
THERMAL_OID_PSU1_1 = ONLP_THERMAL_ID_CREATE(13),
THERMAL_OID_PSU1_2 = ONLP_THERMAL_ID_CREATE(14),
THERMAL_OID_PSU2_1 = ONLP_THERMAL_ID_CREATE(15),
THERMAL_OID_PSU2_2 = ONLP_THERMAL_ID_CREATE(16),
} thermal_oid_t;
/** thermal_id */
typedef enum thermal_id_e {
THERMAL_ID_CPU1 = 1,
THERMAL_ID_CPU2 = 2,
THERMAL_ID_CPU3 = 3,
THERMAL_ID_CPU4 = 4,
THERMAL_ID_REAR_PANEL = 5,
THERMAL_ID_REAR_MAC = 6,
THERMAL_ID_MB = 7,
THERMAL_ID_ASIC = 8,
THERMAL_ID_FRONT_PANEL = 9,
THERMAL_ID_FRONT_MAC = 10,
THERMAL_ID_BMC_BOARD = 11,
THERMAL_ID_CPU_BOARD = 12,
THERMAL_ID_PSU1_1 = 13,
THERMAL_ID_PSU1_2 = 14,
THERMAL_ID_PSU2_1 = 15,
THERMAL_ID_PSU2_2 = 16,
} thermal_id_t;
/* Shortcut for CPU thermal threshold value. */
#define THERMAL_THRESHOLD_INIT_DEFAULTS \
{ THERMAL_WARNING_DEFAULT, \
THERMAL_ERROR_DEFAULT, \
THERMAL_SHUTDOWN_DEFAULT }
/** Fan_oid */
typedef enum fan_oid_e {
FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1),
FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2),
FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3),
FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4),
FAN_OID_PSU_FAN1 = ONLP_FAN_ID_CREATE(5),
FAN_OID_PSU_FAN2 = ONLP_FAN_ID_CREATE(6)
} fan_oid_t;
/** fan_id */
typedef enum fan_id_e {
FAN_ID_FAN1 = 1,
FAN_ID_FAN2 = 2,
FAN_ID_FAN3 = 3,
FAN_ID_FAN4 = 4,
FAN_ID_PSU_FAN1 = 5,
FAN_ID_PSU_FAN2 = 6
} fan_id_t;
/** led_oid */
typedef enum psu_oid_e {
PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1),
PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2)
} psu_oid_t;
/** fan_id */
typedef enum psu_id_e {
PSU_ID_PSU1 = 1,
PSU_ID_PSU2 = 2
} psu_id_t;
int psu_thermal_get(onlp_thermal_info_t* info, int id);
int psu_fan_info_get(onlp_fan_info_t* info, int id);
int psu_vout_get(onlp_psu_info_t* info, int i2c_bus);
int psu_iout_get(onlp_psu_info_t* info, int i2c_bus);
int psu_pout_get(onlp_psu_info_t* info, int i2c_bus);
int psu_pin_get(onlp_psu_info_t* info, int i2c_bus);
int psu_eeprom_get(onlp_psu_info_t* info, int id);
int psu_present_get(int *pw_exist, char *sys_psu_prefix);
int psu_pwgood_get(int *pw_good, char *sys_psu_prefix);
int psu2_led_set(onlp_led_mode_t mode);
int psu1_led_set(onlp_led_mode_t mode);
int fan_led_set(onlp_led_mode_t mode);
int system_led_set(onlp_led_mode_t mode);
int fan_tray_led_set(onlp_oid_t id, onlp_led_mode_t mode);
int sysi_platform_info_get(onlp_platform_info_t* pi);
#endif /* __PLATFORM_LIB_H__ */

156
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/psui.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/psui.h>
#include <onlplib/file.h>
#include "platform_lib.h"
static onlp_psu_info_t pinfo[] =
{
{ }, /* Not used */
{
{
PSU_OID_PSU1,
"PSU-1",
0,
{
FAN_OID_PSU_FAN1,
},
}
},
{
{
PSU_OID_PSU2,
"PSU-2",
0,
{
FAN_OID_PSU_FAN2,
},
}
}
};
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
int
psu_status_info_get(int id, onlp_psu_info_t *info)
{
int pw_exist, pw_good;
int rc, i2c_bus;
char *sys_psu_prefix = NULL;
if (id == PSU_ID_PSU1) {
i2c_bus = I2C_BUS_PSU1;
sys_psu_prefix = SYS_PSU1_PREFIX;
} else if (id == PSU_ID_PSU2) {
i2c_bus = I2C_BUS_PSU2;
sys_psu_prefix = SYS_PSU2_PREFIX;
} else {
return ONLP_STATUS_E_INTERNAL;
}
/* Get power present status */
if ((rc = psu_present_get(&pw_exist, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if (pw_exist != PSU_STATUS_PRESENT) {
info->status &= ~ONLP_PSU_STATUS_PRESENT;
info->status |= ONLP_PSU_STATUS_FAILED;
return ONLP_STATUS_OK;
}
info->status |= ONLP_PSU_STATUS_PRESENT;
/* Get power good status */
if ((rc = psu_pwgood_get(&pw_good, sys_psu_prefix))
!= ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
if (pw_good != PSU_STATUS_POWER_GOOD) {
info->status |= ONLP_PSU_STATUS_UNPLUGGED;
return ONLP_STATUS_OK;
} else {
info->status &= ~ONLP_PSU_STATUS_UNPLUGGED;
}
/* Get power eeprom status */
if ((rc = psu_eeprom_get(info, id)) != ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
/* Get power iout status */
if ((rc = psu_iout_get(info, i2c_bus)) != ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
/* Get power pout status */
if ((rc = psu_pout_get(info, i2c_bus)) != ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
/* Get power pin status */
if ((rc = psu_pin_get(info, i2c_bus)) != ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
/* Get power vout status */
if ((rc = psu_vout_get(info, i2c_bus)) != ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int pid;
pid = ONLP_OID_ID_GET(id);
memset(info, 0, sizeof(onlp_psu_info_t));
/* Set the onlp_oid_hdr_t */
*info = pinfo[pid];
switch (pid) {
case PSU_ID_PSU1:
case PSU_ID_PSU2:
return psu_status_info_get(pid, info);
break;
default:
return ONLP_STATUS_E_UNSUPPORTED;
break;
}
return ONLP_STATUS_OK;
}

190
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/sfpi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
***********************************************************/
#include <sys/types.h>
#include <sys/stat.h>
#include <stdio.h>
#include <stdlib.h>
#include <onlplib/sfp.h>
#include <onlplib/file.h>
#include <onlp/platformi/sfpi.h>
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
#include "x86_64_ingrasys_s9280_64x_log.h"
#include "platform_lib.h"
static int _fp2phy_port_mapping[64] = {
0, 1, 4, 5, 8,
9, 12, 13, 16, 17,
20, 21, 24, 25, 28,
29, 32, 33, 36, 37,
40, 41, 44, 45, 48,
49, 52, 53, 56, 57,
60, 61, 2, 3, 6,
7, 10, 11, 14, 15,
18, 19, 22, 23, 26,
27, 30, 31, 34, 35,
38, 39, 42, 43, 46,
47, 50, 51, 54, 55,
58, 59, 62, 63};
static void
qsfp_to_cpld_index(int phy_port, int *cpld_id, int *cpld_port_index)
{
if (phy_port < CPLD1_PORTS) {
*cpld_id = 0;
*cpld_port_index = phy_port + 1;
} else {
*cpld_id = 1 + (phy_port - CPLD1_PORTS) / CPLDx_PORTS;
*cpld_port_index = ((phy_port - CPLD1_PORTS) % CPLDx_PORTS) + 1;
}
return;
}
int
onlp_sfpi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
int p;
for(p = 1; p <= PORT_NUM; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_is_present(int port)
{
int status, phy_port;
int i2c_id, cpld_id, cpld_port_index;
char reg_path[128];
int value, mask;
uint8_t data[8];
int data_len;
if (port >= 1 && port <=64) {
phy_port = _fp2phy_port_mapping[port-1];
qsfp_to_cpld_index(phy_port, &cpld_id, &cpld_port_index);
i2c_id = CPLD_OFFSET + cpld_id;
mask = 1 << CPLD_PRES_BIT;
snprintf(reg_path, 128, CPLD_QSFP_REG_PATH, i2c_id, CPLD_REG, CPLD_QSFP_PORT_STATUS_KEY, cpld_port_index);
} else if (port>= 65 && port <= 66) {
cpld_port_index = 0;
i2c_id = CPLD_OFFSET;
if (port == 65) {
mask = 1 << CPLD_SFP1_PRES_BIT;
} else {
mask = 1 << CPLD_SFP2_PRES_BIT;
}
snprintf(reg_path, 128, CPLD_SFP_REG_PATH, i2c_id, CPLD_REG, CPLD_SFP_PORT_STATUS_KEY);
} else {
return ONLP_STATUS_E_INTERNAL;
}
if (onlp_file_read(data, sizeof(data), &data_len, reg_path) == ONLP_STATUS_OK) {
//convert hex string to integer
value = (int) strtol ((char *) data, NULL, 16);
if ( (value & mask) == 0) {
status = 1;
} else {
status = 0;
}
} else {
return ONLP_STATUS_E_INTERNAL;
}
return status;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
int p = 1;
int rc = 0;
for (p = 1; p <= PORT_NUM; p++) {
rc = onlp_sfpi_is_present(p);
AIM_BITMAP_MOD(dst, p, (1 == rc) ? 1 : 0);
}
return ONLP_STATUS_OK;
}
/*
* This function reads the SFPs idrom and returns in
* in the data buffer provided.
*/
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
int eeprombus=0, eeprombusbase=0, phy_port=0, port_group=0, eeprombusshift=0;
char eeprom_path[512], eeprom_addr[32];
memset(eeprom_path, 0, sizeof(eeprom_path));
memset(eeprom_addr, 0, sizeof(eeprom_addr));
strncpy(eeprom_addr, "0050", sizeof(eeprom_addr));
memset(data, 0, 256);
if (port >=1 && port <= 64) {
phy_port = _fp2phy_port_mapping[port-1] + 1;
port_group = (phy_port-1)/8;
eeprombusbase = 41 + (port_group * 8);
eeprombusshift = (phy_port-1)%8;
eeprombus = eeprombusbase + eeprombusshift;
} else if (port == 65 ){
eeprombus = 29;
} else if (port == 66 ){
eeprombus = 30;
} else {
return ONLP_STATUS_E_INTERNAL;
}
snprintf(eeprom_path, sizeof(eeprom_path),
"/sys/bus/i2c/devices/%d-%s/eeprom", eeprombus, eeprom_addr);
if (onlplib_sfp_eeprom_read_file(eeprom_path, data) != 0) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* De-initialize the SFPI subsystem.
*/
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

340
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/sysi.c Executable file
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@@ -0,0 +1,340 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/psui.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlplib/file.h>
#include <onlplib/crc32.h>
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <sys/stat.h>
#include "platform_lib.h"
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-ingrasys-s9280-64x-r0";
}
int
onlp_sysi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
uint8_t* rdata = aim_zmalloc(256);
if(onlp_file_read(rdata, 256, size, SYS_EEPROM_PATH) == ONLP_STATUS_OK) {
if(*size == 256) {
*data = rdata;
return ONLP_STATUS_OK;
}
}
AIM_LOG_INFO("Unable to get data from eeprom \n");
aim_free(rdata);
*size = 0;
return ONLP_STATUS_E_INTERNAL;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
int i;
/* 2 PSUs */
*e++ = ONLP_PSU_ID_CREATE(1);
*e++ = ONLP_PSU_ID_CREATE(2);
/* LEDs Item */
for (i=1; i<=LED_NUM; i++) {
*e++ = ONLP_LED_ID_CREATE(i);
}
/* THERMALs Item */
for (i=1; i<=THERMAL_NUM; i++) {
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* Fans Item */
for (i=1; i<=FAN_NUM; i++) {
*e++ = ONLP_FAN_ID_CREATE(i);
}
return ONLP_STATUS_OK;
}
int
decide_fan_percentage(int is_up, int new_temp)
{
int new_perc;
if (is_up) {
if (new_temp >= THERMAL_ERROR_DEFAULT) {
new_perc = THERMAL_ERROR_FAN_PERC;
} else if (new_temp >= THERMAL_WARNING_DEFAULT) {
new_perc = THERMAL_WARNING_FAN_PERC;
} else {
new_perc = THERMAL_NORMAL_FAN_PERC;
}
} else {
if (new_temp <= THERMAL_NORMAL_DEFAULT) {
new_perc = THERMAL_NORMAL_FAN_PERC;
} else if (new_temp <= THERMAL_WARNING_DEFAULT) {
new_perc = THERMAL_WARNING_FAN_PERC;
} else {
new_perc = THERMAL_ERROR_FAN_PERC;
}
}
return new_perc;
}
int
platform_thermal_temp_get(int *thermal_temp)
{
int i, temp, max_temp, rc;
onlp_thermal_info_t thermal_info;
memset(&thermal_info, 0, sizeof(thermal_info));
uint32_t thermal_arr[] = { THERMAL_OID_FRONT_MAC,
THERMAL_OID_ASIC,
THERMAL_OID_CPU1,
THERMAL_OID_CPU2,
THERMAL_OID_CPU3,
THERMAL_OID_CPU4 };
max_temp = 0;
for (i=0; i<BOARD_THERMAL_NUM; i++) {
if ((rc = onlp_thermali_info_get(thermal_arr[i], &thermal_info)) != ONLP_STATUS_OK) {
return rc;
}
temp = thermal_info.mcelsius;
if (temp > max_temp) {
max_temp = temp;
}
}
*thermal_temp = max_temp;
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_fans(void)
{
int rc, is_up ,new_temp, thermal_temp, diff;
static int new_perc = 0, ori_perc = 0;
static int ori_temp = 0;
onlp_thermal_info_t thermal_info;
memset(&thermal_info, 0, sizeof(thermal_info));
/* get new temperature */
if ((rc = platform_thermal_temp_get(&thermal_temp)) != ONLP_STATUS_OK) {
goto _EXIT;
}
new_temp = thermal_temp;
diff = new_temp - ori_temp;
if (diff == 0) {
goto _EXIT;
} else {
is_up = (diff > 0 ? 1 : 0);
}
new_perc = decide_fan_percentage(is_up, new_temp);
if (ori_perc == new_perc) {
goto _EXIT;
}
AIM_LOG_INFO("The Fan Speeds Percent are now at %d%%", new_perc);
if ((rc = onlp_fani_percentage_set(THERMAL_OID_ASIC, new_perc)) != ONLP_STATUS_OK) {
goto _EXIT;
}
/* update */
ori_perc = new_perc;
ori_temp = new_temp;
_EXIT :
return rc;
}
int
onlp_sysi_platform_manage_leds(void)
{
int psu1_status, psu2_status, rc, i;
static int pre_psu1_status = 0, pre_psu2_status = 0, pre_fan_status = 0;
//-------------------------------
static int pre_fan_tray_status[4] = {0};
int fan_tray_id, sum, total = 0;
onlp_led_status_t fan_tray_status[SYS_FAN_NUM];
//-------------------------------
onlp_psu_info_t psu_info;
onlp_fan_info_t fan_info;
//-------- -----------------------
memset(&fan_tray_status, 0, sizeof(fan_tray_status));
//-------------------------------
memset(&psu_info, 0, sizeof(onlp_psu_info_t));
memset(&fan_info, 0, sizeof(onlp_fan_info_t));
uint32_t fan_arr[] = { FAN_OID_FAN1,
FAN_OID_FAN2,
FAN_OID_FAN3,
FAN_OID_FAN4, };
/* PSU LED CTRL */
if ((rc = onlp_psui_info_get(PSU_OID_PSU1, &psu_info)) != ONLP_STATUS_OK) {
goto _EXIT;
}
psu1_status = psu_info.status;
if (psu1_status != pre_psu1_status) {
if((psu1_status & ONLP_PSU_STATUS_PRESENT) == 0) {
rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_OFF);
}
else if(psu1_status != ONLP_PSU_STATUS_PRESENT) {
rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_ORANGE);
} else {
rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_GREEN);
}
if (rc != ONLP_STATUS_OK) {
goto _EXIT;
}
pre_psu1_status = psu1_status;
}
if ((rc = onlp_psui_info_get(PSU_OID_PSU2, &psu_info)) != ONLP_STATUS_OK) {
goto _EXIT;
}
psu2_status = psu_info.status;
if( psu2_status != pre_psu2_status) {
if((psu2_status & ONLP_PSU_STATUS_PRESENT) == 0) {
rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_OFF);
}
else if(psu2_status != ONLP_PSU_STATUS_PRESENT) {
rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_ORANGE);
} else {
rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_GREEN);
}
if (rc != ONLP_STATUS_OK) {
goto _EXIT;
}
pre_psu2_status = psu2_status;
}
/* FAN LED CTRL */
for (i=0; i<SYS_FAN_NUM; i++) {
if ((rc = onlp_fani_info_get(fan_arr[i], &fan_info)) != ONLP_STATUS_OK) {
goto _EXIT;
}
/* FAN TRAY LED CTRL */
fan_tray_status[i] = fan_info.status;
sum = fan_tray_status[i];
total = total + sum;
switch (i) {
case 0:
fan_tray_id = LED_FAN_TRAY1;
break;
case 1:
fan_tray_id = LED_FAN_TRAY2;
break;
case 2:
fan_tray_id = LED_FAN_TRAY3;
break;
case 3:
fan_tray_id = LED_FAN_TRAY4;
break;
}
/* the enum of fan_tray id is start from 5 to 8,
* the "-5" means mapping to array index 0 to 3
*/
if (sum != pre_fan_tray_status[fan_tray_id - 5]) {
if (sum > ONLP_LED_STATUS_FAILED) {
rc = onlp_ledi_mode_set(fan_tray_id, ONLP_LED_MODE_ORANGE);
} else {
rc = onlp_ledi_mode_set(fan_tray_id, ONLP_LED_MODE_GREEN);
}
if (rc != ONLP_STATUS_OK) {
goto _EXIT;
}
pre_fan_tray_status[fan_tray_id - 5] = sum;
}
}
if (total != pre_fan_status) {
if (total == (ONLP_LED_STATUS_PRESENT * 4)) {
rc = onlp_ledi_mode_set(LED_OID_FAN, ONLP_LED_MODE_GREEN);
} else {
rc = onlp_ledi_mode_set(LED_OID_FAN, ONLP_LED_MODE_ORANGE);
}
if (rc != ONLP_STATUS_OK) {
goto _EXIT;
}
pre_fan_status = total;
}
_EXIT :
return rc;
}
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
int rc;
if ((rc = sysi_platform_info_get(pi)) != ONLP_STATUS_OK) {
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}

237
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/thermali.c Executable file
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@@ -0,0 +1,237 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Thermal Sensor Platform Implementation.
*
***********************************************************/
#include <onlp/platformi/thermali.h>
#include <onlplib/file.h>
#include "x86_64_ingrasys_s9280_64x_log.h"
#include "platform_lib.h"
static onlp_thermal_info_t thermal_info[] = {
{ }, /* Not used */
{ { THERMAL_OID_CPU1, "CPU Thermal 1", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_CPU2, "CPU Thermal 2", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_CPU3, "CPU Thermal 3", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_CPU4, "CPU Thermal 4", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_REAR_PANEL, "Rear Panel", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_REAR_MAC, "Rear MAC", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_MB, "Mother Board", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_ASIC, "MAC Temp", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_FRONT_PANEL, "Front Panel", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_FRONT_MAC, "FRONT MAC", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { THERMAL_OID_BMC_BOARD, "BMC Board", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0
},
{ { THERMAL_OID_CPU_BOARD, "CPU Board", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0
},
{ { THERMAL_OID_PSU1_1, "PSU-1 Thermal 1", PSU_OID_PSU1},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0
},
{ { THERMAL_OID_PSU1_2, "PSU-1 Thermal 2", PSU_OID_PSU1},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0
},
{ { THERMAL_OID_PSU2_1, "PSU-2 Thermal 1", PSU_OID_PSU2},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0
},
{ { THERMAL_OID_PSU2_2, "PSU-2 Thermal 2", PSU_OID_PSU2},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0
}
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
static int
lm_thermal_info_get(onlp_thermal_info_t* info, int id)
{
int rv;
char sysfs_path[64];
switch (id) {
case THERMAL_ID_REAR_PANEL:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_REAR_PANEL_TEMP_PREFIX "temp%d_input", 1);
break;
case THERMAL_ID_REAR_MAC:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_REAR_MAC_TEMP_PREFIX "temp%d_input", 1);
break;
case THERMAL_ID_MB:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_MB_ASIC_TEMP_PREFIX "temp%d_input", 1);
break;
case THERMAL_ID_ASIC:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_MB_ASIC_TEMP_PREFIX "temp%d_input", 2);
break;
case THERMAL_ID_FRONT_PANEL:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_FRONT_PANEL_PREFIX "temp%d_input", 1);
break;
case THERMAL_ID_FRONT_MAC:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_FRONT_MAC_PREFIX "temp%d_input", 1);
break;
case THERMAL_ID_BMC_BOARD:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_BMC_BOARD_PREFIX "temp%d_input", 1);
break;
case THERMAL_ID_CPU_BOARD:
snprintf(sysfs_path, sizeof(sysfs_path), SYS_CPU_BOARD_PREFIX "temp%d_input", 1);
break;
}
rv = onlp_file_read_int(&info->mcelsius, sysfs_path);
if(rv == ONLP_STATUS_E_INTERNAL) {
return rv;
}
if(rv == ONLP_STATUS_E_MISSING) {
info->status &= ~1;
return 0;
}
return ONLP_STATUS_OK;
}
static int
cpu_thermal_info_get(onlp_thermal_info_t* info, int id)
{
int rv;
int offset;
offset = 1;
id = id + offset;
rv = onlp_file_read_int(&info->mcelsius,
SYS_CPU_TEMP_PREFIX "temp%d_input", id);
if(rv == ONLP_STATUS_E_INTERNAL) {
return rv;
}
if(rv == ONLP_STATUS_E_MISSING) {
info->status &= ~1;
return 0;
}
return ONLP_STATUS_OK;
}
int
psu_thermal_info_get(onlp_thermal_info_t* info, int id)
{
int rv;
rv = psu_thermal_get(info, id);
if(rv == ONLP_STATUS_E_INTERNAL) {
return rv;
}
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int sensor_id, rc;
sensor_id = ONLP_OID_ID_GET(id);
*info = thermal_info[sensor_id];
info->caps |= ONLP_THERMAL_CAPS_GET_TEMPERATURE;
switch (sensor_id) {
case THERMAL_ID_CPU1:
case THERMAL_ID_CPU2:
case THERMAL_ID_CPU3:
case THERMAL_ID_CPU4:
rc = cpu_thermal_info_get(info, sensor_id);
break;
case THERMAL_ID_REAR_PANEL:
case THERMAL_ID_REAR_MAC:
case THERMAL_ID_MB:
case THERMAL_ID_ASIC:
case THERMAL_ID_FRONT_PANEL:
case THERMAL_ID_FRONT_MAC:
case THERMAL_ID_BMC_BOARD:
case THERMAL_ID_CPU_BOARD:
rc = lm_thermal_info_get(info, sensor_id);
break;
case THERMAL_ID_PSU1_1:
case THERMAL_ID_PSU1_2:
case THERMAL_ID_PSU2_1:
case THERMAL_ID_PSU2_2:
rc = psu_thermal_info_get(info, sensor_id);
break;
default:
return ONLP_STATUS_E_INTERNAL;
break;
}
return rc;
}

101
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_config.c Executable file
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@@ -0,0 +1,101 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
/* <auto.start.cdefs(X86_64_INGRAYSYS_S9280_64X_CONFIG_HEADER).source> */
#define __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(_x) __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(_x)
x86_64_ingrasys_s9280_64x_config_settings_t x86_64_ingrasys_s9280_64x_config_settings[] =
{
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_LOGGING(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_STDLIB(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_INCLUDE_UCLI(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT
{ __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT), __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT) },
#else
{ X86_64_INGRAYSYS_S9280_64X_CONFIG_SFP_COUNT(__x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_ingrasys_s9280_64x_config_STRINGIFY_VALUE
#undef __x86_64_ingrasys_s9280_64x_config_STRINGIFY_NAME
const char*
x86_64_ingrasys_s9280_64x_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_ingrasys_s9280_64x_config_settings[i].name; i++) {
if(strcmp(x86_64_ingrasys_s9280_64x_config_settings[i].name, setting)) {
return x86_64_ingrasys_s9280_64x_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_ingrasys_s9280_64x_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_ingrasys_s9280_64x_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_ingrasys_s9280_64x_config_settings[i].name, x86_64_ingrasys_s9280_64x_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_INGRAYSYS_S9280_64X_CONFIG_HEADER).source> */

30
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_enums.c Executable file
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@@ -0,0 +1,30 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

29
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_int.h Executable file
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@@ -0,0 +1,29 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __x86_64_ingrasys_s9280_64x_INT_H__
#define __x86_64_ingrasys_s9280_64x_INT_H__
#endif /* __x86_64_ingrasys_s9280_64x_INT_H__ */

38
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_log.c Executable file
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@@ -0,0 +1,38 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
#include "x86_64_ingrasys_s9280_64x_log.h"
/*
* x86_64_ingrasys_s9280_64x log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_INGRAYSYS_S9280_64X_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

32
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_log.h Executable file
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@@ -0,0 +1,32 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __x86_64_ingrasys_s9280_64x_LOG_H__
#define __x86_64_ingrasys_s9280_64x_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_ingrasys_s9280_64x
#include <AIM/aim_log.h>
#endif /* __x86_64_ingrasys_s9280_64x_LOG_H__ */

44
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_module.c Executable file
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@@ -0,0 +1,44 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
#include "x86_64_ingrasys_s9280_64x_log.h"
static int
datatypes_init__(void)
{
#define INGRAYSYS_S9180_32X_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x.x>
return 0;
}
void __x86_64_ingrasys_s9280_64x_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

82
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/onlp/builds/src/x86_64_ingrasys_s9280_64x/module/src/x86_64_ingrasys_s9280_64x_ucli.c Executable file
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@@ -0,0 +1,82 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014, 2015 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_ingrasys_s9280_64x/x86_64_ingrasys_s9280_64x_config.h>
#if ONLPSIM_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_ingrasys_s9280_64x_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_ingrasys_s9280_64x)
}
/* <auto.ucli.handlers.start> */
/******************************************************************************
*
* These handler table(s) were autogenerated from the symbols in this
* source file.
*
*****************************************************************************/
static ucli_command_handler_f x86_64_ingrasys_s9280_64x_ucli_ucli_handlers__[] =
{
x86_64_ingrasys_s9280_64x_ucli_ucli__config__,
NULL
};
/******************************************************************************/
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_ingrasys_s9280_64x_ucli_module__ =
{
"x86_64_ingrasys_s9280_64x_ucli",
NULL,
x86_64_ingrasys_s9280_64x_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_ingrasys_s9280_64x_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_ingrasys_s9280_64x_ucli_module__);
n = ucli_node_create("x86_64_ingrasys_s9280_64x", NULL, &x86_64_ingrasys_s9280_64x_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_ingrasys_s9280_64x"));
return n;
}
#else
void*
x86_64_ingrasys_s9280_64x_ucli_node_create(void)
{
return NULL;
}
#endif

1
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/platform-config/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/platform-config/r0/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/platform-config/r0/PKG.yml Executable file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=ingrasys BASENAME=x86-64-ingrasys-s9280-64x REVISION=r0

30
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/platform-config/r0/src/lib/x86-64-ingrasys-s9280-64x-r0.yml Executable file
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@@ -0,0 +1,30 @@
---
######################################################################
#
# platform-config for x86-64-ingrasys-s9280-64x
#
######################################################################
x86-64-ingrasys-s9280-64x-r0:
grub:
serial: >-
--port=0x3f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-3-16
args: >-
console=ttyS0,115200n8
##network
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:03.0

192
packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9280-64x/platform-config/r0/src/python/x86_64_ingrasys_s9280_64x_r0/__init__.py Executable file
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@@ -0,0 +1,192 @@
from onl.platform.base import *
from onl.platform.ingrasys import *
import os
class OnlPlatform_x86_64_ingrasys_s9280_64x_r0(OnlPlatformIngrasys):
PLATFORM='x86-64-ingrasys-s9280-64x-r0'
MODEL="S9280-64X"
SYS_OBJECT_ID=".9280.64"
def baseconfig(self):
# fp port to phy port mapping
fp2phy_array=( 0, 1, 4, 5, 8, 9, 12, 13, 16, 17, 20, 21, 24, 25, 28, 29,
32, 33, 36, 37, 40, 41, 44, 45, 48, 49, 52, 53, 56, 57, 60, 61,
2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31,
34, 35, 38, 39, 42, 43, 46, 47, 50, 51, 54, 55, 58, 59, 62, 63)
# fp port to led port mapping
fp2led_array=( 1, 2, 5, 6, 9, 10, 13, 14, 1, 2, 5, 6, 9, 10, 13, 14,
1, 2, 5, 6, 9, 10, 13, 14, 1, 2, 5, 6, 9, 10, 13, 14,
3, 4, 7, 8, 11, 12, 15, 16, 3, 4, 7, 8, 11, 12, 15, 16,
3, 4, 7, 8, 11, 12, 15, 16, 3, 4, 7, 8, 11, 12, 15, 16)
self.insmod("eeprom_mb")
# init SYS EEPROM devices
self.new_i2c_devices(
[
# _i2c_mb_eeprom_init
('mb_eeprom', 0x55, 0),
# _i2c_cb_eeprom_init
('mb_eeprom', 0x51, 0),
]
)
os.system("modprobe w83795")
os.system("modprobe eeprom")
########### initialize I2C bus 0 ###########
# init PCA9548
self.new_i2c_devices(
[
('pca9548', 0x70, 0), #pca9548_0
('pca9548', 0x73, 0), #pca9548_1
('pca9546', 0x72, 0), #pca9546_0
('pca9548', 0x71, 19), #pca9548_2
('pca9546', 0x71, 20), #pca9546_1
('pca9548', 0x75, 0), #pca9548_11
('pca9548', 0x74, 21), #pca9548_3
('pca9548', 0x74, 22), #pca9548_4
('pca9548', 0x74, 23), #pca9548_5
('pca9548', 0x74, 24), #pca9548_6
('pca9548', 0x74, 25), #pca9548_7
('pca9548', 0x74, 26), #pca9548_8
('pca9548', 0x74, 27), #pca9548_9
('pca9548', 0x74, 28), #pca9548_10
]
)
# _i2c_hwm_init
os.system("i2cset -y -r 16 0x2f 0x00 0x80")
os.system("i2cset -y -r 16 0x2f 0x01 0x9C")
os.system("i2cset -y -r 16 0x2f 0x04 0x00")
os.system("i2cset -y -r 16 0x2f 0x06 0xFF")
os.system("i2cset -y -r 16 0x2f 0x07 0x00")
os.system("i2cset -y -r 16 0x2f 0x01 0x1C")
os.system("i2cset -y -r 16 0x2f 0x00 0x82")
os.system("i2cset -y -r 16 0x2f 0x0F 0x00")
os.system("i2cset -y -r 16 0x2f 0x18 0x84")
os.system("i2cset -y -r 16 0x2f 0x19 0x84")
# _i2c_io_exp_init
# need to init BMC io expander first due to some io expander are reset default
# Init BMC INT & HW ID IO Expander
os.system("i2cset -y -r 0 0x24 6 0xFF")
os.system("i2cset -y -r 0 0x24 7 0xFF")
os.system("i2cset -y -r 0 0x24 4 0x00")
os.system("i2cset -y -r 0 0x24 5 0x00")
# Init BMC PSU status IO Expander
os.system("i2cset -y -r 0 0x25 2 0x00")
os.system("i2cset -y -r 0 0x25 3 0x00")
os.system("i2cset -y -r 0 0x25 6 0xDB")
os.system("i2cset -y -r 0 0x25 7 0xE3")
os.system("i2cset -y -r 0 0x25 4 0x00")
os.system("i2cset -y -r 0 0x25 5 0x00")
# Init BMC RST and SEL IO Expander
os.system("i2cset -y -r 0 0x26 2 0x3F")
os.system("i2cset -y -r 0 0x26 3 0x1F")
os.system("i2cset -y -r 0 0x26 6 0xD0")
os.system("i2cset -y -r 0 0x26 7 0x00")
os.system("i2cset -y -r 0 0x26 4 0x00")
os.system("i2cset -y -r 0 0x26 5 0x00")
# Init System LED & HW ID IO Expander
os.system("i2cset -y -r 10 0x76 2 0x00")
os.system("i2cset -y -r 10 0x76 6 0x00")
os.system("i2cset -y -r 10 0x76 7 0xFF")
os.system("i2cset -y -r 10 0x76 4 0x00")
os.system("i2cset -y -r 10 0x76 5 0x00")
# Init FAN Board Status IO Expander
os.system("i2cset -y -r 0 0x20 2 0x11")
os.system("i2cset -y -r 0 0x20 3 0x11")
os.system("i2cset -y -r 0 0x20 6 0xCC")
os.system("i2cset -y -r 0 0x20 7 0xCC")
os.system("i2cset -y -r 0 0x20 4 0x00")
os.system("i2cset -y -r 0 0x20 5 0x00")
# Init System SEL and RST IO Expander
os.system("i2cset -y -r 32 0x76 2 0x04")
os.system("i2cset -y -r 32 0x76 3 0xDF")
os.system("i2cset -y -r 32 0x76 6 0x09")
os.system("i2cset -y -r 32 0x76 7 0x3F")
os.system("i2cset -y -r 32 0x76 4 0x00")
os.system("i2cset -y -r 32 0x76 5 0x00")
# _i2c_sensors_init
self.new_i2c_devices(
[
# w83795, hwmon1
('w83795adg', 0x2F, 16),
# lm75_1 Rear Panel, hwmon2
('lm75', 0x4D, 6),
# lm75_2 Rear MAC, hwmon3
('lm75', 0x4E, 6),
# lm86 , hwmon4
('lm86', 0x4C, 6),
# lm75_3 Front Panel, hwmon5
('lm75', 0x4D, 7),
# lm75_4 Front MAC, hwmon6
('lm75', 0x4E, 7),
# tmp75 BMC board thermal, hwmon7
('lm75', 0x4A, 16),
# tmp75 CPU board thermal, hwmon8
('tmp75', 0x4F, 0),
]
)
# hwmon9
#os.system("modprobe jc42")
# _i2c_cpld_init
self.insmod("ingrasys_s9280_64x_i2c_cpld")
# add cpld 1~5 to sysfs
for i in range(1, 6):
self.new_i2c_device('ingrasys_cpld%d' % i, 0x33, i)
# _i2c_psu_init
self.insmod("ingrasys_s9280_64x_psu")
# add psu 1~2 to sysfs
for i in range(1, 3):
self.new_i2c_device('psu%d' % i, 0x50, 19-i)
# _i2c_qsfp_eeprom_init
for i in range(1, 65):
phy_port = fp2phy_array[i-1] + 1
port_group = (phy_port-1)/8
eeprom_busbase = 41 + (port_group * 8)
eeprom_busshift = (phy_port-1)%8
eeprom_bus = eeprom_busbase + eeprom_busshift
self.new_i2c_device('sff8436', 0x50, eeprom_bus)
# _i2c_sfp_eeprom_init
for i in range(1, 3):
self.new_i2c_device('sff8436', 0x50, 28+i)
# _i2c_fan_speed_init
os.system("echo 120 > /sys/class/hwmon/hwmon1/device/pwm2")
# _util_port_led_clear
os.system("i2cset -m 0x04 -y -r 32 0x76 2 0x00")
os.system("sleep 1")
os.system("i2cset -m 0x04 -y -r 32 0x76 2 0xFF")
# turn on sys led
os.system("i2cset -m 0x80 -y -r 10 0x76 2 0x80")
return True