- Initial LY9 Support

Most of this code is originally from Jonathan Tsai's LY9 pull request:
  https://github.com/opencomputeproject/OpenNetworkLinux/pull/102

  The LY9 (and other quanta x86 platforms) have all been ported to the 3.16 LTS kernel
  with platform module support. The code from Jonathan's pull request has been manually
  merged into this porting effort where appropriate to provide a new baseline for the
  LY9 development.

  The other items originally in the pull request will be reviewed separately.
This commit is contained in:
Jeffrey Townsend
2017-01-09 18:34:49 +00:00
parent cf92393ae2
commit 80afad6a76
42 changed files with 2022 additions and 0 deletions

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*x86*64*quanta*ly9*rangeley*.mk
onlpdump.mk

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include $(ONL)/make/pkg.mk

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include $(ONL)/make/pkg.mk

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!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly9-rangeley

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include $(ONL)/make/pkg.mk

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!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-quanta-ly9-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

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FILTER=src
include $(ONL)/make/subdirs.mk

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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-quanta-ly9-rangeley
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_quanta_ly9_rangeley quanta_sys_eeprom onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-quanta-ly9-rangeley.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_quanta_ly9_rangeley quanta_sys_eeprom onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

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name: x86_64_quanta_ly9_rangeley

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###############################################################################
#
#
#
###############################################################################
include $(ONL)/make/config.mk
MODULE := x86_64_quanta_ly9_rangeley
AUTOMODULE := x86_64_quanta_ly9_rangeley
include $(BUILDER)/definemodule.mk

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###############################################################################
#
# x86_64_quanta_ly9_rangeley Autogeneration
#
###############################################################################
x86_64_quanta_ly9_rangeley_AUTO_DEFS := module/auto/x86_64_quanta_ly9_rangeley.yml
x86_64_quanta_ly9_rangeley_AUTO_DIRS := module/inc/x86_64_quanta_ly9_rangeley module/src
include $(BUILDER)/auto.mk

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###############################################################################
#
# x86_64_quanta_ly9_rangeley Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD:
doc: "RPM Threshold at which the fan is considered to have failed."
default: 3000
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX:
doc: "Maximum system front-to-back fan speed."
default: 18000
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX:
doc: "Maximum system back-to-front fan speed."
default: 18000
- X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS:
doc: "Time to hold Phy GPIO in reset, in ms"
default: 100
definitions:
cdefs:
X86_64_QUANTA_LY9_RANGELEY_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_quanta_ly9_rangeley_config
enum: &enums
fan_id:
members:
- FAN1 : 1
- FAN2 : 2
- FAN3 : 3
- FAN4 : 4
- FAN5 : 5
- FAN6 : 6
- FAN7 : 7
- FAN8 : 8
- FAN9 : 9
- FAN10 : 10
fan_oid:
members:
- FAN1 : ONLP_FAN_ID_CREATE(1)
- FAN2 : ONLP_FAN_ID_CREATE(2)
- FAN3 : ONLP_FAN_ID_CREATE(3)
- FAN4 : ONLP_FAN_ID_CREATE(4)
- FAN5 : ONLP_FAN_ID_CREATE(5)
- FAN6 : ONLP_FAN_ID_CREATE(6)
- FAN7 : ONLP_FAN_ID_CREATE(7)
- FAN8 : ONLP_FAN_ID_CREATE(8)
- FAN9 : ONLP_FAN_ID_CREATE(9)
- FAN10 : ONLP_FAN_ID_CREATE(10)
psu_id:
members:
- PSU1 : 1
- PSU2 : 2
psu_oid:
members:
- PSU1 : ONLP_PSU_ID_CREATE(1)
- PSU2 : ONLP_PSU_ID_CREATE(2)
thermal_id:
members:
- THERMAL1 : 1
- THERMAL2 : 2
- THERMAL3 : 3
- THERMAL4 : 4
- THERMAL5 : 5
- THERMAL6 : 6
- THERMAL7 : 7
- THERMAL8 : 8
- THERMAL9 : 9
- THERMAL10 : 10
- THERMAL11 : 11
- THERMAL12 : 12
- THERMAL13 : 13
- THERMAL14 : 14
- THERMAL15 : 15
- THERMAL16 : 16
thermal_oid:
members:
- THERMAL1 : ONLP_THERMAL_ID_CREATE(1)
- THERMAL2 : ONLP_THERMAL_ID_CREATE(2)
- THERMAL3 : ONLP_THERMAL_ID_CREATE(3)
- THERMAL4 : ONLP_THERMAL_ID_CREATE(4)
- THERMAL5 : ONLP_THERMAL_ID_CREATE(5)
- THERMAL6 : ONLP_THERMAL_ID_CREATE(6)
- THERMAL7 : ONLP_THERMAL_ID_CREATE(7)
- THERMAL8 : ONLP_THERMAL_ID_CREATE(8)
- THERMAL9 : ONLP_THERMAL_ID_CREATE(9)
- THERMAL10 : ONLP_THERMAL_ID_CREATE(10)
- THERMAL11 : ONLP_THERMAL_ID_CREATE(11)
- THERMAL12 : ONLP_THERMAL_ID_CREATE(12)
- THERMAL13 : ONLP_THERMAL_ID_CREATE(13)
- THERMAL14 : ONLP_THERMAL_ID_CREATE(14)
- THERMAL15 : ONLP_THERMAL_ID_CREATE(15)
- THERMAL16 : ONLP_THERMAL_ID_CREATE(16)
portingmacro:
X86_64_QUANTA_LY9_RANGELEY:
macros:
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

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#ifndef __QUANTA_LIB_GPIO_H__
#define __QUANTA_LIB_GPIO_H__
#define GPIO_LOW 0
#define GPIO_HIGH 1
#define GPIO_IN 0
#define GPIO_OUT 1
#define GPIO_PATH "/sys/class/gpio"
#define GPIO_EXPORT GPIO_PATH "/export"
#define GPIO_UNEXPORT GPIO_PATH "/unexport"
#define GPIO_PREF GPIO_PATH "/gpio"
int pca953x_gpio_value_get(int gpio, int *value);
int pca953x_gpio_direction_set(int gpio, int direction);
int pca953x_gpio_value_set(int gpio, int value);
#endif /* __QUANTA_LIB_GPIO_H__ */

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#ifndef __QUANTA_LIB_I2C_H__
#define __QUANTA_LIB_I2C_H__
int i2c_block_read(int bus, uint8_t addr, uint8_t offset, int size,
unsigned char *rdata, uint32_t flags);
#endif /* __QUANTA_LIB_I2C_H__ */

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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

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/**************************************************************************//**
*
* @file
* @brief x86_64_quanta_ly9_rangeley Configuration Header
*
* @addtogroup x86_64_quanta_ly9_rangeley-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_LY9_RANGELEY_CONFIG_H__
#define __X86_64_QUANTA_LY9_RANGELEY_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_INCLUDE_CUSTOM_CONFIG
#include <x86_64_quanta_ly9_rangeley_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_QUANTA_LY9_RANGELEY_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
*
* RPM Threshold at which the fan is considered to have failed. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX
*
* Maximum system front-to-back fan speed. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX 18000
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX
*
* Maximum system back-to-front fan speed. */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX 18000
#endif
/**
* X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS
*
* Time to hold Phy GPIO in reset, in ms */
#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS
#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS 100
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_quanta_ly9_rangeley_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_quanta_ly9_rangeley_config_settings_t;
/** Configuration settings table. */
/** x86_64_quanta_ly9_rangeley_config_settings table. */
extern x86_64_quanta_ly9_rangeley_config_settings_t x86_64_quanta_ly9_rangeley_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_quanta_ly9_rangeley_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_quanta_ly9_rangeley_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_QUANTA_LY9_RANGELEY_CONFIG_HEADER).header> */
#include "x86_64_quanta_ly9_rangeley_porting.h"
#endif /* __X86_64_QUANTA_LY9_RANGELEY_CONFIG_H__ */
/* @} */

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/**************************************************************************//**
*
* x86_64_quanta_ly9_rangeley Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_LY9_RANGELEY_DOX_H__
#define __X86_64_QUANTA_LY9_RANGELEY_DOX_H__
/**
* @defgroup x86_64_quanta_ly9_rangeley x86_64_quanta_ly9_rangeley - x86_64_quanta_ly9_rangeley Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_quanta_ly9_rangeley-x86_64_quanta_ly9_rangeley Public Interface
* @defgroup x86_64_quanta_ly9_rangeley-config Compile Time Configuration
* @defgroup x86_64_quanta_ly9_rangeley-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_QUANTA_LY9_RANGELEY_DOX_H__ */

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#ifndef __X86_64_QUANTA_LY9_RANGELEY_GPIO_TABLE_H__
#define __X86_64_QUANTA_LY9_RANGELEY_GPIO_TABLE_H__
/*
* defined within platform/quanta_switch.c
* Quanta Switch Platform driver
*/
#define PCA953x_GPIO(P1, P2) (P1*8+P2)
#define PCA9555_GPIO_SIZE 0x10
#define I2C_GPIO_BASE 0x80
#define FAN_GPIO_BASE (I2C_GPIO_BASE)
#define FAN_GPIO_SIZE PCA9555_GPIO_SIZE
#define FAN_PRSNT_N_1 (FAN_GPIO_BASE + PCA953x_GPIO(0,4))
#define FAN_PRSNT_N_2 (FAN_GPIO_BASE + PCA953x_GPIO(0,5))
#define FAN_PRSNT_N_3 (FAN_GPIO_BASE + PCA953x_GPIO(0,6))
#define FAN_BF_DET1 (FAN_GPIO_BASE + PCA953x_GPIO(1,0))
#define FAN_BF_DET2 (FAN_GPIO_BASE + PCA953x_GPIO(1,1))
#define FAN_BF_DET3 (FAN_GPIO_BASE + PCA953x_GPIO(1,2))
#define FAN_FAIL_LED_1 (FAN_GPIO_BASE + PCA953x_GPIO(1,4))
#define FAN_FAIL_LED_2 (FAN_GPIO_BASE + PCA953x_GPIO(1,5))
#define FAN_FAIL_LED_3 (FAN_GPIO_BASE + PCA953x_GPIO(1,6))
#define QSFP_EN_GPIO_BASE (FAN_GPIO_BASE + FAN_GPIO_SIZE)
#define QSFP_EN_GPIO_SIZE PCA9555_GPIO_SIZE
#define QSFP_EN_GPIO_P3V3_PW_GD (QSFP_EN_GPIO_BASE + PCA953x_GPIO(0,4))
#define QSFP_EN_GPIO_P3V3_PW_EN (QSFP_EN_GPIO_BASE + PCA953x_GPIO(0,5))
#define QSFP_EN_GPIO_QDB_PRSNT (QSFP_EN_GPIO_BASE + PCA953x_GPIO(0,6))
#define QSFP_QDB_GPIO_BASE (QSFP_EN_GPIO_BASE + QSFP_EN_GPIO_SIZE)
#define QSFP_QDB_GPIO_SIZE PCA9555_GPIO_SIZE
#define QSFP_QDB_GPIO_PRSNT_53_N (QSFP_QDB_GPIO_BASE + PCA953x_GPIO(0,2))
#define QSFP_QDB_GPIO_PRSNT_54_N (QSFP_QDB_GPIO_BASE + PCA953x_GPIO(0,6))
#define QSFP_QDB_GPIO_MOD_EN_N (QSFP_QDB_GPIO_BASE + PCA953x_GPIO(1,0))
#define PSU_GPIO_BASE (QSFP_QDB_GPIO_BASE + QSFP_QDB_GPIO_SIZE)
#define PSU_GPIO_SIZE PCA9555_GPIO_SIZE
#define PSU_GPIO_PSU1_PRSNT_N (PSU_GPIO_BASE + PCA953x_GPIO(0,0))
#define PSU_GPIO_PSU1_PWRGD (PSU_GPIO_BASE + PCA953x_GPIO(0,1))
#define PSU_GPIO_PSU2_PRSNT_N (PSU_GPIO_BASE + PCA953x_GPIO(0,3))
#define PSU_GPIO_PSU2_PWRGD (PSU_GPIO_BASE + PCA953x_GPIO(0,4))
#define PSU_GPIO_PSU1_AC_OK (PSU_GPIO_BASE + PCA953x_GPIO(0,6))
#define PSU_GPIO_PSU2_AC_OK (PSU_GPIO_BASE + PCA953x_GPIO(0,7))
#define PSU_GPIO_PSU1_GREEN_R (PSU_GPIO_BASE + PCA953x_GPIO(1,2))
#define PSU_GPIO_PSU1_RED_R (PSU_GPIO_BASE + PCA953x_GPIO(1,3))
#define PSU_GPIO_PSU2_GREEN_R (PSU_GPIO_BASE + PCA953x_GPIO(1,4))
#define PSU_GPIO_PSU2_RED_R (PSU_GPIO_BASE + PCA953x_GPIO(1,5))
#define PSU_GPIO_FAN_GREEN_R (PSU_GPIO_BASE + PCA953x_GPIO(1,6))
#define PSU_GPIO_FAN_RED_R (PSU_GPIO_BASE + PCA953x_GPIO(1,7))
#endif /* __X86_64_QUANTA_LY9_RANGELEY_GPIO_TABLE_H__ */

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/**************************************************************************//**
*
* @file
* @brief x86_64_quanta_ly9_rangeley Porting Macros.
*
* @addtogroup x86_64_quanta_ly9_rangeley-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_LY9_RANGELEY_PORTING_H__
#define __X86_64_QUANTA_LY9_RANGELEY_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef X86_64_QUANTA_LY9_RANGELEY_MEMSET
#if defined(GLOBAL_MEMSET)
#define X86_64_QUANTA_LY9_RANGELEY_MEMSET GLOBAL_MEMSET
#elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_LY9_RANGELEY_MEMSET memset
#else
#error The macro X86_64_QUANTA_LY9_RANGELEY_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_LY9_RANGELEY_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define X86_64_QUANTA_LY9_RANGELEY_MEMCPY GLOBAL_MEMCPY
#elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_LY9_RANGELEY_MEMCPY memcpy
#else
#error The macro X86_64_QUANTA_LY9_RANGELEY_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_LY9_RANGELEY_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define X86_64_QUANTA_LY9_RANGELEY_STRNCPY GLOBAL_STRNCPY
#elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_LY9_RANGELEY_STRNCPY strncpy
#else
#error The macro X86_64_QUANTA_LY9_RANGELEY_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF vsnprintf
#else
#error The macro X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_LY9_RANGELEY_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define X86_64_QUANTA_LY9_RANGELEY_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_LY9_RANGELEY_SNPRINTF snprintf
#else
#error The macro X86_64_QUANTA_LY9_RANGELEY_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_LY9_RANGELEY_STRLEN
#if defined(GLOBAL_STRLEN)
#define X86_64_QUANTA_LY9_RANGELEY_STRLEN GLOBAL_STRLEN
#elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_LY9_RANGELEY_STRLEN strlen
#else
#error The macro X86_64_QUANTA_LY9_RANGELEY_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_QUANTA_LY9_RANGELEY_PORTING_H__ */
/* @} */

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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_quanta_ly9_rangeley_INCLUDES := -I $(THIS_DIR)inc
x86_64_quanta_ly9_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_quanta_ly9_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_quanta_ly9_rangeley ucli:x86_64_quanta_ly9_rangeley

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@@ -0,0 +1,9 @@
###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_quanta_ly9_rangeley_ucli.c

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@@ -0,0 +1,168 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_gpio_table.h>
#include <onlp/platformi/fani.h>
#include "x86_64_quanta_ly9_rangeley_int.h"
#include "x86_64_quanta_ly9_rangeley_log.h"
#include <onlplib/file.h>
#include <quanta_lib/gpio.h>
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
struct fan_gpio_s {
int present;
int fan_dir_detect;
};
static struct fan_gpio_s fan_gpio[] = {
{}, /* Not used */
{ .present = FAN_PRSNT_N_1, .fan_dir_detect = FAN_BF_DET1 },
{ .present = FAN_PRSNT_N_2, .fan_dir_detect = FAN_BF_DET2 },
{ .present = FAN_PRSNT_N_3, .fan_dir_detect = FAN_BF_DET3 },
{}, /* Not used */
{ .present = FAN_PRSNT_N_1, .fan_dir_detect = FAN_BF_DET1 },
{ .present = FAN_PRSNT_N_2, .fan_dir_detect = FAN_BF_DET2 },
{ .present = FAN_PRSNT_N_3, .fan_dir_detect = FAN_BF_DET3 },
{}, /* Not used */
};
static int
sys_fan_info_get__(onlp_fan_info_t* info, int id)
{
int value = 0;
int rv;
if(pca953x_gpio_value_get(fan_gpio[id].present, &value) == ONLP_STATUS_OK
&& value == GPIO_LOW) {
info->status = ONLP_FAN_STATUS_PRESENT;
if(pca953x_gpio_value_get(fan_gpio[id].fan_dir_detect, &value) == ONLP_STATUS_OK
&& value == GPIO_LOW) {
info->status |= ONLP_FAN_STATUS_F2B;
info->caps |= ONLP_FAN_CAPS_F2B;
}
else {
info->status |= ONLP_FAN_STATUS_B2F;
info->caps |= ONLP_FAN_CAPS_B2F;
}
}
else {
info->status = ONLP_FAN_STATUS_FAILED;
}
rv = onlp_file_read_int(&info->rpm,
SYS_HWMON_PREFIX "/fan%d_input", id);
if(rv == ONLP_STATUS_E_INTERNAL) {
return rv;
}
if(rv == ONLP_STATUS_E_MISSING) {
info->status &= ~1;
return 0;
}
if(info->rpm <= X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) {
info->status |= ONLP_FAN_STATUS_FAILED;
}
/*
* Calculate percentage based on current speed and the maximum.
*/
info->caps |= ONLP_FAN_CAPS_GET_PERCENTAGE;
if(info->status & ONLP_FAN_STATUS_F2B) {
info->percentage = (int) ((double) info->rpm * (double)100 / (double)X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX);
}
if(info->status & ONLP_FAN_STATUS_B2F) {
info->percentage = (int) ((double) info->rpm * (double)100 / (double)X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX);
}
return 0;
}
static int
psu_fan_info_get__(onlp_fan_info_t* info, int id)
{
extern struct psu_info_s psu_info[];
char* dir = psu_info[id].path;
return onlp_file_read_int(&info->rpm, "%s*fan1_input", dir);
}
/* Onboard Fans */
static onlp_fan_info_t fans__[] = {
{ }, /* Not used */
{ { FAN_OID_FAN1, "Left (Module/Fan 1/1)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN2, "Center(Module/Fan 2/1)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN3, "Right (Module/Fan 3/1)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN4, "Reserved (Module/Fan 4/1)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN5, "Left (Module/Fan 1/2)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN6, "Center(Module/Fan 2/2)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN7, "Right (Module/Fan 3/2)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN8, "Reserved (Module/Fan 4/2)", 0}, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
{ { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
};
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv)
{
int fid = ONLP_OID_ID_GET(id);
*rv = fans__[ONLP_OID_ID_GET(id)];
rv->caps |= ONLP_FAN_CAPS_GET_RPM;
switch(fid) {
case FAN_ID_FAN1:
case FAN_ID_FAN2:
case FAN_ID_FAN3:
case FAN_ID_FAN4:
case FAN_ID_FAN5:
case FAN_ID_FAN6:
case FAN_ID_FAN7:
case FAN_ID_FAN8:
return sys_fan_info_get__(rv, fid);
break;
case FAN_ID_FAN9:
case FAN_ID_FAN10:
return psu_fan_info_get__(rv, fid - FAN_ID_FAN9 + 1);
break;
default:
return ONLP_STATUS_E_INVALID;
break;
}
return ONLP_STATUS_E_INVALID;
}

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@@ -0,0 +1,82 @@
#include <onlp/onlp.h>
#include <onlplib/file.h>
#include <quanta_lib/gpio.h>
#include <sys/stat.h>
#include <limits.h>
static int file_exists(char *filename) {
struct stat st;
return (stat(filename, &st) == 0);
}
static int try_export_gpio(int gpio) {
char filename[PATH_MAX];
memset(filename, 0, sizeof(filename));
sprintf(filename, "%s%d/value", GPIO_PREF, gpio);
if(!file_exists(filename)) {
onlp_file_write_int(gpio, GPIO_EXPORT);
}
return ONLP_STATUS_OK;
}
static int try_unexport_gpio(int gpio) {
char filename[PATH_MAX];
memset(filename, 0, sizeof(filename));
sprintf(filename, "%s%d/value", GPIO_PREF, gpio);
if(file_exists(filename)) {
onlp_file_write_int(gpio, GPIO_UNEXPORT);
}
return ONLP_STATUS_OK;
}
int pca953x_gpio_value_get(int gpio, int *value) {
int ret;
try_export_gpio(gpio);
ret = onlp_file_read_int(value, "%s%d/value", GPIO_PREF, gpio);
try_unexport_gpio(gpio);
return ret;
}
int pca953x_gpio_direction_set(int gpio, int direction) {
int ret;
try_export_gpio(gpio);
switch(direction) {
case GPIO_IN:
ret = onlp_file_write_str("in", "%s%d/direction", GPIO_PREF, gpio);
break;
case GPIO_OUT:
ret = onlp_file_write_str("out", "%s%d/direction", GPIO_PREF, gpio);
break;
default:
ret = ONLP_STATUS_E_UNSUPPORTED;
break;
}
try_unexport_gpio(gpio);
return ret;
}
int pca953x_gpio_value_set(int gpio, int value) {
int ret;
pca953x_gpio_direction_set(gpio, GPIO_OUT);
try_export_gpio(gpio);
ret = onlp_file_write_int(value, "%s%d/value", GPIO_PREF, gpio);
try_unexport_gpio(gpio);
return ret;
}

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@@ -0,0 +1,97 @@
#include <onlp/onlp.h>
#include <onlplib/file.h>
#include <onlplib/i2c.h>
#include <quanta_lib/i2c.h>
#include <fcntl.h>
#include <unistd.h>
#if ONLPLIB_CONFIG_I2C_USE_CUSTOM_HEADER == 1
#include <linux/i2c-devices.h>
#else
#include <linux/i2c-dev.h>
#endif
#include <sys/types.h>
#include <sys/ioctl.h>
#include "x86_64_quanta_ly9_rangeley_log.h"
#include <AIM/aim_printf.h>
#include <errno.h>
int i2c_dev_smbus_access(int file, char read_write, __u8 command,
int size, union i2c_smbus_data *data)
{
struct i2c_smbus_ioctl_data args;
args.read_write = read_write;
args.command = command;
args.size = size;
args.data = data;
return ioctl(file, I2C_SMBUS, &args);
}
int i2c_dev_read_block(int file, uint8_t command, unsigned char *buffer, int length)
{
union i2c_smbus_data data;
int i;
if (length > 32)
length = 32;
data.block[0] = length;
if (i2c_dev_smbus_access(file, I2C_SMBUS_READ, command,
length == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
I2C_SMBUS_I2C_BLOCK_DATA, &data))
return -1;
else{
for (i = 1; i <= data.block[0]; i++)
buffer[i - 1] = data.block[i];
}
return 0;
}
/* first byte of rdata is length of result */
int
i2c_block_read(int bus, uint8_t addr, uint8_t offset, int size,
unsigned char *rdata, uint32_t flags)
{
int fd;
int force = I2C_SLAVE, rv;
fd = onlp_i2c_open(bus, addr, flags);
if(fd < 0) {
return fd;
}
fd = onlp_file_open(O_RDWR, 1, "/dev/i2c-%d", bus);
if(fd < 0) {
AIM_LOG_MSG("/dev/i2c-%d open Error!", bus);
return fd;
}
/* Set SLAVE or SLAVE_FORCE address */
rv = ioctl(fd,
force ? I2C_SLAVE_FORCE : I2C_SLAVE,
addr);
if(rv == -1) {
AIM_LOG_ERROR("i2c-%d: %s slave address 0x%x failed: %{errno}",
bus,
(flags & ONLP_I2C_F_FORCE) ? "forcing" : "setting",
addr,
errno);
goto error;
}
if ((i2c_dev_read_block(fd, offset, rdata, size)) < 0)
{
printf("/dev/i2c-%d read Error!\n", bus);
close (fd);
return -1;
}
close(fd);
return 0;
error:
close(fd);
return -1;
}

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###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_quanta_ly9_rangeley
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

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@@ -0,0 +1,126 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_gpio_table.h>
#include <onlp/platformi/psui.h>
#include <onlplib/file.h>
#include <onlplib/i2c.h>
#include <quanta_lib/i2c.h>
#include <quanta_lib/gpio.h>
#include "x86_64_quanta_ly9_rangeley_int.h"
#include "x86_64_quanta_ly9_rangeley_log.h"
struct psu_info_s psu_info[] = {
{}, /* Not used */
{ .path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/24-006f", .present = PSU_GPIO_PSU1_PRSNT_N, .busno = 24, .addr = 0x6f},
{ .path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/25-0069", .present = PSU_GPIO_PSU2_PRSNT_N, .busno = 25, .addr = 0x69},
};
int
onlp_psui_init(void)
{
return 0;
}
static onlp_psu_info_t psus__[] = {
{ }, /* Not used */
{
{
PSU_OID_PSU1,
"Quanta LY9 RPSU-1",
0,
{
FAN_OID_FAN9,
},
}
},
{
{
PSU_OID_PSU2,
"Quanta LY9 RPSU-2",
0,
{
FAN_OID_FAN10,
},
}
},
};
#define PMBUS_MFR_MODEL 0x9A
#define PMBUS_MFR_SERIAL 0x9E
#define PMBUS_MFR_MODEL_LEN 20
#define PMBUS_MFR_SERIAL_LEN 19
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int rv;
int pid = ONLP_OID_ID_GET(id);
*info = psus__[pid];
const char* dir = psu_info[pid].path;
uint8_t buffer[ONLP_CONFIG_INFO_STR_MAX];
int value = -1;
rv = pca953x_gpio_value_get(psu_info[pid].present, &value);
if(rv < 0) {
return rv;
}
else if(value == GPIO_HIGH) {
info->status &= ~1;
return 0;
}
if(onlp_file_read_int(&info->mvin, "%s/in1_input", dir) == 0 && info->mvin >= 0) {
info->caps |= ONLP_PSU_CAPS_VIN;
}
/* PSU is present and powered. */
info->status |= 1;
memset(buffer, 0, sizeof(buffer));
rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_MODEL, PMBUS_MFR_MODEL_LEN, buffer, ONLP_I2C_F_FORCE);
buffer[buffer[0] + 1] = 0x00;
if(rv >= 0)
strncpy(info->model, (char *) (buffer+1), (buffer[0] + 1));
else
strcpy(info->model, "Missing");
memset(buffer, 0, sizeof(buffer));
rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_SERIAL, PMBUS_MFR_SERIAL_LEN, buffer, ONLP_I2C_F_FORCE);
buffer[buffer[0] + 1] = 0x00;
if(rv >= 0)
strncpy(info->serial, (char *) (buffer+1), (buffer[0] + 1));
else
strcpy(info->serial, "Missing");
info->caps |= ONLP_PSU_CAPS_AC;
if(onlp_file_read_int(&info->miin, "%s/curr1_input", dir) == 0 && info->miin >= 0) {
info->caps |= ONLP_PSU_CAPS_IIN;
}
if(onlp_file_read_int(&info->miout, "%s/curr2_input", dir) == 0 && info->miout >= 0) {
info->caps |= ONLP_PSU_CAPS_IOUT;
}
if(onlp_file_read_int(&info->mvout, "%s/in2_input", dir) == 0 && info->mvout >= 0) {
info->caps |= ONLP_PSU_CAPS_VOUT;
/* Empirical */
info->mvout /= 500;
}
if(onlp_file_read_int(&info->mpin, "%s/power1_input", dir) == 0 && info->mpin >= 0) {
info->caps |= ONLP_PSU_CAPS_PIN;
/* The pmbus driver reports power in micro-units */
info->mpin /= 1000;
}
if(onlp_file_read_int(&info->mpout, "%s/power2_input", dir) == 0 && info->mpout >= 0) {
info->caps |= ONLP_PSU_CAPS_POUT;
/* the pmbus driver reports power in micro-units */
info->mpout /= 1000;
}
return ONLP_STATUS_OK;
}

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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* SFPI Interface for the Quanta LY9
*
***********************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_gpio_table.h>
#include <onlp/platformi/sfpi.h>
#include <onlplib/sfp.h>
#include "x86_64_quanta_ly9_rangeley_log.h"
#include <unistd.h>
#include <fcntl.h>
#include <quanta_lib/gpio.h>
/**
* This table maps the presence gpio, reset gpio, and eeprom file
* for each SFP port.
*/
typedef struct sfpmap_s {
int port;
const char* present_cpld;
const char* reset_gpio;
const char* eeprom;
const char* dom;
} sfpmap_t;
static sfpmap_t sfpmap__[] =
{
{ 49, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-1/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-32/32-0050/eeprom", NULL },
{ 50, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-2/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-33/33-0050/eeprom", NULL },
{ 51, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-3/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-34/34-0050/eeprom", NULL },
{ 52, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-4/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-35/35-0050/eeprom", NULL },
};
typedef struct qsfpmap_s {
int port;
int present_gpio;
const char* reset_gpio;
const char* eeprom;
const char* dom;
} qsfpmap_t;
static qsfpmap_t qsfpmap__[] =
{
{ 53, QSFP_QDB_GPIO_PRSNT_53_N, NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-48/48-0050/eeprom", NULL },
{ 54, QSFP_QDB_GPIO_PRSNT_54_N, NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-49/49-0050/eeprom", NULL },
};
int
onlp_sfpi_init(void)
{
int value = -1, ret;
ret = pca953x_gpio_value_get(QSFP_EN_GPIO_P3V3_PW_EN, &value);
if(ret == ONLP_STATUS_OK && value != GPIO_LOW) {
ret = pca953x_gpio_value_set(QSFP_EN_GPIO_P3V3_PW_EN, GPIO_LOW);
}
if(ret == ONLP_STATUS_OK) {
ret = pca953x_gpio_value_get(QSFP_QDB_GPIO_MOD_EN_N, &value);
if(ret == ONLP_STATUS_OK && value != GPIO_LOW) {
ret = pca953x_gpio_value_set(QSFP_QDB_GPIO_MOD_EN_N, GPIO_LOW);
}
}
return ret;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
int p;
for(p = 49; p < 55; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
#define SFP_GET(_port) (sfpmap__ + _port - 49)
#define QSFP_GET(_port) (qsfpmap__ + _port - 53)
int
onlp_sfpi_is_present(int port)
{
if(port > 52){
int value = 0;
qsfpmap_t* qsfp = QSFP_GET(port);
if(qsfp->present_gpio > 0) {
if(pca953x_gpio_value_get(qsfp->present_gpio, &value) == ONLP_STATUS_OK)
return (value == GPIO_LOW);
else
return ONLP_STATUS_E_MISSING;
}
else {
/**
* If we can open and read a byte from the EEPROM file
* then we consider it present.
*/
int fd = open(qsfp->eeprom, O_RDONLY);
if (fd < 0) {
/* Not Present */
return 0;
}
int rv;
uint8_t byte;
if(read(fd, &byte, 1) == 1) {
/* Present */
rv = 1;
}
else {
/* No Present */
rv = 0;
}
close(fd);
return rv;
}
}
else{
sfpmap_t* sfp = SFP_GET(port);
return onlplib_sfp_is_present_file(sfp->present_cpld, /* Present */ "1\n", /* Absent */ "0\n");
}
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
if(port > 52){
qsfpmap_t* qsfp = QSFP_GET(port);
return onlplib_sfp_eeprom_read_file(qsfp->eeprom, data);
}
else{
sfpmap_t* sfp = SFP_GET(port);
return onlplib_sfp_eeprom_read_file(sfp->eeprom, data);
}
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
if(port > 52){
qsfpmap_t* qsfp = QSFP_GET(port);
return onlplib_sfp_eeprom_read_file(qsfp->dom, data);
}
else{
sfpmap_t* sfp = SFP_GET(port);
return onlplib_sfp_eeprom_read_file(sfp->dom, data);
}
}

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@@ -0,0 +1,79 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sysi.h>
#include "x86_64_quanta_ly9_rangeley_int.h"
#include "x86_64_quanta_ly9_rangeley_log.h"
#include <quanta_sys_eeprom/eeprom.h>
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-quanta-ly9-rangeley-r0";
}
int
onlp_sysi_init(void)
{
return ONLP_STATUS_OK;
}
#define QUANTA_SYS_EEPROM_PATH \
"/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-27/27-0054/eeprom"
int
onlp_sysi_onie_info_get(onlp_onie_info_t* onie)
{
int rv;
rv = onlp_onie_decode_file(onie, QUANTA_SYS_EEPROM_PATH);
if(rv >= 0) {
onie->platform_name = aim_strdup("x86-64-quanta-ly9-rangeley-r0");
rv = quanta_onie_sys_eeprom_custom_format(onie);
}
return rv;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/*
* 6 Chassis Thermal Sensors
*/
*e++ = THERMAL_OID_THERMAL1;
*e++ = THERMAL_OID_THERMAL2;
*e++ = THERMAL_OID_THERMAL3;
*e++ = THERMAL_OID_THERMAL4;
*e++ = THERMAL_OID_THERMAL5;
*e++ = THERMAL_OID_THERMAL6;
/*
* 6 Fans
*/
*e++ = FAN_OID_FAN1;
*e++ = FAN_OID_FAN2;
*e++ = FAN_OID_FAN3;
*e++ = FAN_OID_FAN5;
*e++ = FAN_OID_FAN6;
*e++ = FAN_OID_FAN7;
/*
* 2 PSUs
*/
*e++ = PSU_OID_PSU1;
*e++ = PSU_OID_PSU2;
/*
* Todo - LEDs
*/
return 0;
}

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@@ -0,0 +1,145 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/thermali.h>
#include <onlplib/file.h>
#include "x86_64_quanta_ly9_rangeley_int.h"
#include "x86_64_quanta_ly9_rangeley_log.h"
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
static int
sys_thermal_info_get__(onlp_thermal_info_t* info, int id)
{
int rv;
rv = onlp_file_read_int(&info->mcelsius,
SYS_HWMON_PREFIX "/temp%d_input", id);
if(rv == ONLP_STATUS_E_INTERNAL) {
return rv;
}
if(rv == ONLP_STATUS_E_MISSING) {
info->status &= ~1;
return 0;
}
return ONLP_STATUS_OK;
}
static int
psu_thermal_info_get__(onlp_thermal_info_t* info, int pid, int id)
{
/* THERMAL6 -> PSU1 */
/* THERMAL7 -> PSU2 */
extern struct psu_info_s psu_info[];
char* dir = psu_info[pid].path;
info->status |= 1;
return onlp_file_read_int(&info->mcelsius, "%s/temp%d_input", dir, id);
}
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* rv)
{
int tid = ONLP_OID_ID_GET(id);
static onlp_thermal_info_t info[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(1), "Chassis Thermal 1", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(2), "Chassis Thermal 2", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(3), "Chassis Thermal 3", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(4), "Chassis Thermal 4", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(5), "Chassis Thermal 5", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(6), "Chassis Thermal 6", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(7), "Chassis Thermal 7", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(8), "Chassis Thermal 8", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(9), "Chassis Thermal 9", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(10), "Chassis Thermal 10", 0}, ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(11), "PSU-1 Thermal 1", 0 } },
{ { ONLP_THERMAL_ID_CREATE(12), "PSU-1 Thermal 2", 0 } },
{ { ONLP_THERMAL_ID_CREATE(13), "PSU-1 Thermal 3", 0 } },
{ { ONLP_THERMAL_ID_CREATE(14), "PSU-2 Thermal 1", 0 } },
{ { ONLP_THERMAL_ID_CREATE(15), "PSU-2 Thermal 2", 0 } },
{ { ONLP_THERMAL_ID_CREATE(16), "PSU-2 Thermal 3", 0 } },
};
*rv = info[tid];
rv->caps |= ONLP_THERMAL_CAPS_GET_TEMPERATURE;
switch(tid)
{
case THERMAL_ID_THERMAL1:
case THERMAL_ID_THERMAL2:
case THERMAL_ID_THERMAL3:
case THERMAL_ID_THERMAL4:
case THERMAL_ID_THERMAL5:
case THERMAL_ID_THERMAL6:
case THERMAL_ID_THERMAL7:
case THERMAL_ID_THERMAL8:
case THERMAL_ID_THERMAL9:
case THERMAL_ID_THERMAL10:
return sys_thermal_info_get__(rv, tid);
case THERMAL_ID_THERMAL11:
case THERMAL_ID_THERMAL12:
case THERMAL_ID_THERMAL13:
return psu_thermal_info_get__(rv, 1, tid - THERMAL_ID_THERMAL11 + 1);
case THERMAL_ID_THERMAL14:
case THERMAL_ID_THERMAL15:
case THERMAL_ID_THERMAL16:
return psu_thermal_info_get__(rv, 2, tid - THERMAL_ID_THERMAL14 + 1);
}
return ONLP_STATUS_E_INVALID;
}

View File

@@ -0,0 +1,95 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
/* <auto.start.cdefs(X86_64_QUANTA_LY9_RANGELEY_CONFIG_HEADER).source> */
#define __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(_x)
x86_64_quanta_ly9_rangeley_config_settings_t x86_64_quanta_ly9_rangeley_config_settings[] =
{
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS
{ __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS) },
#else
{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE
#undef __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME
const char*
x86_64_quanta_ly9_rangeley_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_quanta_ly9_rangeley_config_settings[i].name; i++) {
if(strcmp(x86_64_quanta_ly9_rangeley_config_settings[i].name, setting)) {
return x86_64_quanta_ly9_rangeley_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_quanta_ly9_rangeley_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_quanta_ly9_rangeley_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_quanta_ly9_rangeley_config_settings[i].name, x86_64_quanta_ly9_rangeley_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_QUANTA_LY9_RANGELEY_CONFIG_HEADER).source> */

View File

@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

View File

@@ -0,0 +1,231 @@
/**************************************************************************//**
*
* x86_64_quanta_ly9_rangeley Internal Header
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_LY9_RANGELEY_INT_H__
#define __X86_64_QUANTA_LY9_RANGELEY_INT_H__
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#include <limits.h>
/* <auto.start.enum(ALL).header> */
/** thermal_oid */
typedef enum thermal_oid_e {
THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1),
THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2),
THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3),
THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4),
THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5),
THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6),
THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7),
THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8),
THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9),
THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10),
THERMAL_OID_THERMAL11 = ONLP_THERMAL_ID_CREATE(11),
THERMAL_OID_THERMAL12 = ONLP_THERMAL_ID_CREATE(12),
THERMAL_OID_THERMAL13 = ONLP_THERMAL_ID_CREATE(13),
THERMAL_OID_THERMAL14 = ONLP_THERMAL_ID_CREATE(14),
THERMAL_OID_THERMAL15 = ONLP_THERMAL_ID_CREATE(15),
THERMAL_OID_THERMAL16 = ONLP_THERMAL_ID_CREATE(16),
} thermal_oid_t;
/** Enum names. */
const char* thermal_oid_name(thermal_oid_t e);
/** Enum values. */
int thermal_oid_value(const char* str, thermal_oid_t* e, int substr);
/** Enum descriptions. */
const char* thermal_oid_desc(thermal_oid_t e);
/** Enum validator. */
int thermal_oid_valid(thermal_oid_t e);
/** validator */
#define THERMAL_OID_VALID(_e) \
(thermal_oid_valid((_e)))
/** thermal_oid_map table. */
extern aim_map_si_t thermal_oid_map[];
/** thermal_oid_desc_map table. */
extern aim_map_si_t thermal_oid_desc_map[];
/** psu_oid */
typedef enum psu_oid_e {
PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1),
PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2),
} psu_oid_t;
/** Enum names. */
const char* psu_oid_name(psu_oid_t e);
/** Enum values. */
int psu_oid_value(const char* str, psu_oid_t* e, int substr);
/** Enum descriptions. */
const char* psu_oid_desc(psu_oid_t e);
/** Enum validator. */
int psu_oid_valid(psu_oid_t e);
/** validator */
#define PSU_OID_VALID(_e) \
(psu_oid_valid((_e)))
/** psu_oid_map table. */
extern aim_map_si_t psu_oid_map[];
/** psu_oid_desc_map table. */
extern aim_map_si_t psu_oid_desc_map[];
/** thermal_id */
typedef enum thermal_id_e {
THERMAL_ID_THERMAL1 = 1,
THERMAL_ID_THERMAL2 = 2,
THERMAL_ID_THERMAL3 = 3,
THERMAL_ID_THERMAL4 = 4,
THERMAL_ID_THERMAL5 = 5,
THERMAL_ID_THERMAL6 = 6,
THERMAL_ID_THERMAL7 = 7,
THERMAL_ID_THERMAL8 = 8,
THERMAL_ID_THERMAL9 = 9,
THERMAL_ID_THERMAL10 = 10,
THERMAL_ID_THERMAL11 = 11,
THERMAL_ID_THERMAL12 = 12,
THERMAL_ID_THERMAL13 = 13,
THERMAL_ID_THERMAL14 = 14,
THERMAL_ID_THERMAL15 = 15,
THERMAL_ID_THERMAL16 = 16,
} thermal_id_t;
/** Enum names. */
const char* thermal_id_name(thermal_id_t e);
/** Enum values. */
int thermal_id_value(const char* str, thermal_id_t* e, int substr);
/** Enum descriptions. */
const char* thermal_id_desc(thermal_id_t e);
/** Enum validator. */
int thermal_id_valid(thermal_id_t e);
/** validator */
#define THERMAL_ID_VALID(_e) \
(thermal_id_valid((_e)))
/** thermal_id_map table. */
extern aim_map_si_t thermal_id_map[];
/** thermal_id_desc_map table. */
extern aim_map_si_t thermal_id_desc_map[];
/** fan_id */
typedef enum fan_id_e {
FAN_ID_FAN1 = 1,
FAN_ID_FAN2 = 2,
FAN_ID_FAN3 = 3,
FAN_ID_FAN4 = 4,
FAN_ID_FAN5 = 5,
FAN_ID_FAN6 = 6,
FAN_ID_FAN7 = 7,
FAN_ID_FAN8 = 8,
FAN_ID_FAN9 = 9,
FAN_ID_FAN10 = 10,
} fan_id_t;
/** Enum names. */
const char* fan_id_name(fan_id_t e);
/** Enum values. */
int fan_id_value(const char* str, fan_id_t* e, int substr);
/** Enum descriptions. */
const char* fan_id_desc(fan_id_t e);
/** Enum validator. */
int fan_id_valid(fan_id_t e);
/** validator */
#define FAN_ID_VALID(_e) \
(fan_id_valid((_e)))
/** fan_id_map table. */
extern aim_map_si_t fan_id_map[];
/** fan_id_desc_map table. */
extern aim_map_si_t fan_id_desc_map[];
/** psu_id */
typedef enum psu_id_e {
PSU_ID_PSU1 = 1,
PSU_ID_PSU2 = 2,
} psu_id_t;
/** Enum names. */
const char* psu_id_name(psu_id_t e);
/** Enum values. */
int psu_id_value(const char* str, psu_id_t* e, int substr);
/** Enum descriptions. */
const char* psu_id_desc(psu_id_t e);
/** Enum validator. */
int psu_id_valid(psu_id_t e);
/** validator */
#define PSU_ID_VALID(_e) \
(psu_id_valid((_e)))
/** psu_id_map table. */
extern aim_map_si_t psu_id_map[];
/** psu_id_desc_map table. */
extern aim_map_si_t psu_id_desc_map[];
/** fan_oid */
typedef enum fan_oid_e {
FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1),
FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2),
FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3),
FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4),
FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5),
FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6),
FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7),
FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8),
FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9),
FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10),
} fan_oid_t;
/** Enum names. */
const char* fan_oid_name(fan_oid_t e);
/** Enum values. */
int fan_oid_value(const char* str, fan_oid_t* e, int substr);
/** Enum descriptions. */
const char* fan_oid_desc(fan_oid_t e);
/** Enum validator. */
int fan_oid_valid(fan_oid_t e);
/** validator */
#define FAN_OID_VALID(_e) \
(fan_oid_valid((_e)))
/** fan_oid_map table. */
extern aim_map_si_t fan_oid_map[];
/** fan_oid_desc_map table. */
extern aim_map_si_t fan_oid_desc_map[];
/* <auto.end.enum(ALL).header> */
/* psu info table */
struct psu_info_s {
char path[PATH_MAX];
int present;
int busno;
int addr;
};
#define SYS_HWMON_PREFIX "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-004e"
#endif /* __X86_64_QUANTA_LY9_RANGELEY_INT_H__ */

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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#include "x86_64_quanta_ly9_rangeley_log.h"
/*
* x86_64_quanta_ly9_rangeley log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

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/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_LY9_RANGELEY_LOG_H__
#define __X86_64_QUANTA_LY9_RANGELEY_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_quanta_ly9_rangeley
#include <AIM/aim_log.h>
#endif /* __X86_64_QUANTA_LY9_RANGELEY_LOG_H__ */

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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#include "x86_64_quanta_ly9_rangeley_log.h"
static int
datatypes_init__(void)
{
#define X86_64_QUANTA_LY9_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley.x>
return 0;
}
void __x86_64_quanta_ly9_rangeley_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h>
#if X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_quanta_ly9_rangeley_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_quanta_ly9_rangeley)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_quanta_ly9_rangeley_ucli_module__ =
{
"x86_64_quanta_ly9_rangeley_ucli",
NULL,
x86_64_quanta_ly9_rangeley_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_quanta_ly9_rangeley_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_quanta_ly9_rangeley_ucli_module__);
n = ucli_node_create("x86_64_quanta_ly9_rangeley", NULL, &x86_64_quanta_ly9_rangeley_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_quanta_ly9_rangeley"));
return n;
}
#else
void*
x86_64_quanta_ly9_rangeley_ucli_node_create(void)
{
return NULL;
}
#endif

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include $(ONL)/make/pkg.mk

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include $(ONL)/make/pkg.mk

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!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly9-rangeley REVISION=r0

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---
######################################################################
#
# platform-config for LY9
#
######################################################################
x86-64-quanta-ly9-rangeley-r0:
grub:
serial: >-
--port=0x2f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-3-16
args: >-
console=ttyS1,115200n8
reboot=c,p
##network:
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:14.0

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from onl.platform.base import *
from onl.platform.quanta import *
class OnlPlatform_x86_64_quanta_ly9_rangeley_r0(OnlPlatformQuanta,
OnlPlatformPortConfig_48x10_6x40):
PLATFORM='x86-64-quanta-ly9-rangeley-r0'
MODEL="LY9"
SYS_OBJECT_ID=".9.1"
def baseconfig(self):
self.insmod("emerson700")
self.insmod("quanta_hwmon")
self.insmod("qci_cpld")
self.insmod("quanta_switch", params=dict(platform="x86-64-quanta-ly9-rangeley"))
# make ds1339 as default rtc
os.system("ln -snf /dev/rtc1 /dev/rtc")
os.system("hwclock --hctosys")
return True