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update the delta_ag9032v1 platform

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This commit is contained in:
hans
2017-04-14 11:05:51 +08:00
parent 1d9defd946
commit 8826b1753a
46 changed files with 5005 additions and 0 deletions
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3
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/.gitignore vendored Normal file
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*x86*64*delta*ag9032v1*.mk
onlpdump.mk

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packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/Makefile Normal file
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include $(ONL)/make/pkg.mk

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packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/Makefile Normal file
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include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/PKG.yml Normal file
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!include $ONL_TEMPLATES/platform-modules.yml VENDOR=delta BASENAME=x86-64-delta-ag9032v1 ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/builds/.gitignore vendored Normal file
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lib

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packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/builds/Makefile Normal file
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KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64
KMODULES := $(wildcard *.c)
VENDOR := delta
BASENAME := x86-64-delta-ag9032v1
ARCH := x86_64
include $(ONL)/make/kmodule.mk

548
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/builds/dni_ag9032v1_psu.c Normal file
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/*
* An hwmon driver for delta AG9032v1 PSU
* dps_800ab_16_d.c - Support for DPS-800AB-16 D Power Supply Module
*
* Copyright (C) 2017 Delta Networks, Inc.
*
* Aries Lin <aries.lin@deltaww.com>
*
* Based on ym2651y.c
* Based on ad7414.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#define MAX_FAN_DUTY_CYCLE 100
#define SWPLD_REG 0x31
#define SWPLD_PSU_MUX_REG 0x21
#define SELECT_PSU1_EEPROM 0x00
#define SELECT_PSU2_EEPROM 0x20
u8 psu_member_data = 0x00;
/* Address scanned */
static const unsigned short normal_i2c[] = { 0x58, I2C_CLIENT_END };
/* This is additional data */
struct dps_800ab_16_d_data {
struct device *hwmon_dev;
struct mutex update_lock;
char valid;
unsigned long last_updated; /* In jiffies */
/* Registers value */
u8 vout_mode;
u16 v_in;
u16 v_out;
u16 i_in;
u16 i_out;
u16 p_in;
u16 p_out;
u16 temp_input[2];
u8 fan_fault;
u16 fan_duty_cycle[2];
u16 fan_speed[2];
u8 mfr_model[16];
u8 mfr_serial[16];
};
static int two_complement_to_int(u16 data, u8 valid_bit, int mask);
static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count);
static ssize_t for_linear_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
static ssize_t for_fan_fault(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
static ssize_t for_vout_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
static int dps_800ab_16_d_read_byte(struct i2c_client *client, u8 reg);
static int dps_800ab_16_d_read_word(struct i2c_client *client, u8 reg);
static int dps_800ab_16_d_write_word(struct i2c_client *client, u8 reg, \
u16 value);
static int dps_800ab_16_d_read_block(struct i2c_client *client, u8 command, \
u8 *data, int data_len);
static struct dps_800ab_16_d_data *dps_800ab_16_d_update_device( \
struct device *dev);
static ssize_t for_ascii(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
static ssize_t set_w_member_data(struct device *dev, struct device_attribute \
*dev_att, const char *buf, size_t count);
static ssize_t for_r_member_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
extern int i2c_cpld_write(int bus, unsigned short cpld_addr, u8 reg, u8 value);
enum dps_800ab_16_d_sysfs_attributes {
PSU_V_IN,
PSU_V_OUT,
PSU_I_IN,
PSU_I_OUT,
PSU_P_IN,
PSU_P_OUT,
PSU_TEMP1_INPUT,
PSU_FAN1_FAULT,
PSU_FAN1_DUTY_CYCLE,
PSU_FAN1_SPEED,
PSU_MFR_MODEL,
PSU_MFR_SERIAL,
PSU_SELECT_MEMBER,
};
static ssize_t set_w_member_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
long data;
int error;
if (attr->index == PSU_SELECT_MEMBER) {
error = kstrtol(buf, 16, &data);
if (error)
return error;
if (SELECT_PSU1_EEPROM == data) {
psu_member_data = SELECT_PSU1_EEPROM;
} else if (SELECT_PSU2_EEPROM == data) {
psu_member_data = SELECT_PSU2_EEPROM;
} else {
return -EINVAL;
}
}
return count;
}
static ssize_t for_r_member_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
return sprintf(buf, "0x%02X\n", psu_member_data);
}
static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
{
u16 valid_data = data & mask;
bool is_negative = valid_data >> (valid_bit - 1);
return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
}
static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
struct i2c_client *client = to_i2c_client(dev);
struct dps_800ab_16_d_data *data = i2c_get_clientdata(client);
int nr = (attr->index == PSU_FAN1_DUTY_CYCLE) ? 0 : 1;
long speed;
int error;
error = kstrtol(buf, 10, &speed);
if (error)
return error;
if (speed < 0 || speed > MAX_FAN_DUTY_CYCLE)
return -EINVAL;
/* Select SWPLD PSU offset */
i2c_cpld_write(6, SWPLD_REG,
SWPLD_PSU_MUX_REG, psu_member_data);
mutex_lock(&data->update_lock);
data->fan_duty_cycle[nr] = speed;
dps_800ab_16_d_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t for_linear_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev);
u16 value = 0;
int exponent, mantissa;
int multiplier = 1000;
switch (attr->index) {
case PSU_V_IN:
value = data->v_in;
break;
case PSU_I_IN:
value = data->i_in;
break;
case PSU_I_OUT:
value = data->i_out;
break;
case PSU_P_IN:
value = data->p_in;
break;
case PSU_P_OUT:
value = data->p_out;
break;
case PSU_TEMP1_INPUT:
value = data->temp_input[0];
break;
case PSU_FAN1_DUTY_CYCLE:
multiplier = 1;
value = data->fan_duty_cycle[0];
break;
case PSU_FAN1_SPEED:
multiplier = 1;
value = data->fan_speed[0];
break;
default:
break;
}
exponent = two_complement_to_int(value >> 11, 5, 0x1f);
mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
return (exponent >= 0) ? sprintf(buf, "%d\n", \
(mantissa << exponent) * multiplier) : \
sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
}
static ssize_t for_fan_fault(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev);
u8 shift = (attr->index == PSU_FAN1_FAULT) ? 7 : 6;
return sprintf(buf, "%d\n", data->fan_fault >> shift);
}
static ssize_t for_vout_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev);
int exponent, mantissa;
int multiplier = 1000;
exponent = two_complement_to_int(data->vout_mode, 5, 0x1f);
mantissa = data->v_out;
return (exponent > 0) ? sprintf(buf, "%d\n", \
(mantissa << exponent) * multiplier) : \
sprintf(buf, "%d\n", (mantissa << exponent) / (1 << -exponent));
}
static ssize_t for_ascii(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
struct dps_800ab_16_d_data *data = dps_800ab_16_d_update_device(dev);
u8 *ptr = NULL;
if (!data->valid)
return 0;
switch (attr->index) {
case PSU_MFR_MODEL:
ptr = data->mfr_model + 1;
break;
case PSU_MFR_SERIAL:
ptr = data->mfr_serial + 1;
break;
default:
return 0;
}
return sprintf(buf, "%s\n", ptr);
}
static int dps_800ab_16_d_read_byte(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_byte_data(client, reg);
}
static int dps_800ab_16_d_read_word(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_word_data(client, reg);
}
static int dps_800ab_16_d_write_word(struct i2c_client *client, u8 reg, \
u16 value)
{
union i2c_smbus_data data;
data.word = value;
return i2c_smbus_xfer(client->adapter, client->addr,
client->flags |= I2C_CLIENT_PEC,
I2C_SMBUS_WRITE, reg,
I2C_SMBUS_WORD_DATA, &data);
}
static int dps_800ab_16_d_read_block(struct i2c_client *client, u8 command, \
u8 *data, int data_len)
{
int result = i2c_smbus_read_i2c_block_data(client, command, data_len,
data);
if (unlikely(result < 0))
goto abort;
if (unlikely(result != data_len)) {
result = -EIO;
goto abort;
}
result = 0;
abort:
return result;
}
struct reg_data_byte {
u8 reg;
u8 *value;
};
struct reg_data_word {
u8 reg;
u16 *value;
};
static struct dps_800ab_16_d_data *dps_800ab_16_d_update_device( \
struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct dps_800ab_16_d_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
/* Select SWPLD PSU offset */
i2c_cpld_write(6, SWPLD_REG, SWPLD_PSU_MUX_REG, psu_member_data);
if (time_after(jiffies, data->last_updated)) {
int i, status;
u8 command;
struct reg_data_byte regs_byte[] = {
{0x20, &data->vout_mode},
{0x81, &data->fan_fault}
};
struct reg_data_word regs_word[] = {
{0x88, &data->v_in},
{0x8b, &data->v_out},
{0x89, &data->i_in},
{0x8c, &data->i_out},
{0x96, &data->p_out},
{0x97, &data->p_in},
{0x8d, &(data->temp_input[0])},
{0x8e, &(data->temp_input[1])},
{0x3b, &(data->fan_duty_cycle[0])},
{0x90, &(data->fan_speed[0])},
};
dev_dbg(&client->dev, "start data update\n");
/* one milliseconds from now */
data->last_updated = jiffies + HZ / 1000;
for (i = 0; i < ARRAY_SIZE(regs_byte); i++) {
status = dps_800ab_16_d_read_byte(client,
regs_byte[i].reg);
if (status < 0) {
dev_dbg(&client->dev, "reg %d, err %d\n",
regs_byte[i].reg, status);
} else {
*(regs_byte[i].value) = status;
}
}
for (i = 0; i < ARRAY_SIZE(regs_word); i++) {
status = dps_800ab_16_d_read_word(client,
regs_word[i].reg);
if (status < 0) {
dev_dbg(&client->dev, "reg %d, err %d\n",
regs_word[i].reg, status);
} else {
*(regs_word[i].value) = status;
}
}
command = 0x9a; /* PSU mfr_model */
status = dps_800ab_16_d_read_block(client, command,
data->mfr_model, ARRAY_SIZE(data->mfr_model) - 1);
data->mfr_model[ARRAY_SIZE(data->mfr_model) - 1] = '\0';
if (status < 0) {
dev_dbg(&client->dev, "reg %d, err %d\n", command,
status);
}
command = 0x9e; /* PSU mfr_serial */
status = dps_800ab_16_d_read_block(client, command,
data->mfr_serial, ARRAY_SIZE(data->mfr_serial) - 1);
data->mfr_serial[ARRAY_SIZE(data->mfr_serial) - 1] = '\0';
if (status < 0) {
dev_dbg(&client->dev, "reg %d, err %d\n", command,
status);
}
data->valid = 1;
}
mutex_unlock(&data->update_lock);
return data;
}
/* sysfs attributes for hwmon */
static SENSOR_DEVICE_ATTR(psu_v_in, S_IRUGO, for_linear_data, NULL, PSU_V_IN);
static SENSOR_DEVICE_ATTR(psu_v_out, S_IRUGO, for_vout_data, NULL, PSU_V_OUT);
static SENSOR_DEVICE_ATTR(psu_i_in, S_IRUGO, for_linear_data, NULL, PSU_I_IN);
static SENSOR_DEVICE_ATTR(psu_i_out, S_IRUGO, for_linear_data, NULL, PSU_I_OUT);
static SENSOR_DEVICE_ATTR(psu_p_in, S_IRUGO, for_linear_data, NULL, PSU_P_IN);
static SENSOR_DEVICE_ATTR(psu_p_out, S_IRUGO, for_linear_data, NULL, PSU_P_OUT);
static SENSOR_DEVICE_ATTR(psu_temp1_input, \
S_IRUGO, for_linear_data, NULL, PSU_TEMP1_INPUT);
static SENSOR_DEVICE_ATTR(psu_fan1_fault, \
S_IRUGO, for_fan_fault, NULL, PSU_FAN1_FAULT);
static SENSOR_DEVICE_ATTR(psu_fan1_duty_cycle_percentage, S_IWUGO | S_IRUGO, \
for_linear_data, set_fan_duty_cycle, PSU_FAN1_DUTY_CYCLE);
static SENSOR_DEVICE_ATTR(psu_fan1_speed_rpm, \
S_IRUGO, for_linear_data, NULL, PSU_FAN1_SPEED);
static SENSOR_DEVICE_ATTR(psu_mfr_model, \
S_IRUGO, for_ascii, NULL, PSU_MFR_MODEL);
static SENSOR_DEVICE_ATTR(psu_mfr_serial, \
S_IRUGO, for_ascii, NULL, PSU_MFR_SERIAL);
static SENSOR_DEVICE_ATTR(psu_select_member, S_IWUGO | S_IRUGO, \
for_r_member_data, set_w_member_data, PSU_SELECT_MEMBER);
static struct attribute *dps_800ab_16_d_attributes[] = {
&sensor_dev_attr_psu_v_in.dev_attr.attr,
&sensor_dev_attr_psu_v_out.dev_attr.attr,
&sensor_dev_attr_psu_i_in.dev_attr.attr,
&sensor_dev_attr_psu_i_out.dev_attr.attr,
&sensor_dev_attr_psu_p_in.dev_attr.attr,
&sensor_dev_attr_psu_p_out.dev_attr.attr,
&sensor_dev_attr_psu_temp1_input.dev_attr.attr,
&sensor_dev_attr_psu_fan1_fault.dev_attr.attr,
&sensor_dev_attr_psu_fan1_duty_cycle_percentage.dev_attr.attr,
&sensor_dev_attr_psu_fan1_speed_rpm.dev_attr.attr,
&sensor_dev_attr_psu_mfr_model.dev_attr.attr,
&sensor_dev_attr_psu_mfr_serial.dev_attr.attr,
&sensor_dev_attr_psu_select_member.dev_attr.attr,
NULL
};
static const struct attribute_group dps_800ab_16_d_group = {
.attrs = dps_800ab_16_d_attributes,
};
static int dps_800ab_16_d_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct dps_800ab_16_d_data *data;
int status;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) {
status = -EIO;
goto exit;
}
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data) {
status = -ENOMEM;
goto exit;
}
i2c_set_clientdata(client, data);
data->valid = 0;
mutex_init(&data->update_lock);
dev_info(&client->dev, "new chip found\n");
/* Register sysfs hooks */
status = sysfs_create_group(&client->dev.kobj, &dps_800ab_16_d_group);
if (status)
goto exit_sysfs_create_group;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
status = PTR_ERR(data->hwmon_dev);
goto exit_hwmon_device_register;
}
return 0;
exit_hwmon_device_register:
sysfs_remove_group(&client->dev.kobj, &dps_800ab_16_d_group);
exit_sysfs_create_group:
kfree(data);
exit:
return status;
}
static int dps_800ab_16_d_remove(struct i2c_client *client)
{
struct dps_800ab_16_d_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &dps_800ab_16_d_group);
kfree(data);
return 0;
}
enum id_name {
dni_ag9032v1_psu,
dps_800ab_16_d
};
static const struct i2c_device_id dps_800ab_16_d_id[] = {
{ "dni_ag9032v1_psu", dni_ag9032v1_psu },
{ "dps_800ab_16_d", dps_800ab_16_d },
{}
};
MODULE_DEVICE_TABLE(i2c, dps_800ab_16_d_id);
/* This is the driver that will be inserted */
static struct i2c_driver dps_800ab_16_d_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "dps_800ab_16_d",
},
.probe = dps_800ab_16_d_probe,
.remove = dps_800ab_16_d_remove,
.id_table = dps_800ab_16_d_id,
.address_list = normal_i2c,
};
static int __init dps_800ab_16_d_init(void)
{
return i2c_add_driver(&dps_800ab_16_d_driver);
}
static void __exit dps_800ab_16_d_exit(void)
{
i2c_del_driver(&dps_800ab_16_d_driver);
}
MODULE_AUTHOR("Aries Lin <aries.lin@deltaww.com>");
MODULE_DESCRIPTION("DPS_800AB_16_D Driver");
MODULE_LICENSE("GPL");
module_init(dps_800ab_16_d_init);
module_exit(dps_800ab_16_d_exit);

656
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/builds/dni_ag9032v1_sfp.c Normal file
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@@ -0,0 +1,656 @@
/*
* An hwmon driver for delta ag9032v1 qsfp
*
* Copyright (C) 2017 Delta Networks, Inc.
*
* Aries Lin <aries.lin@deltaww.com>
*
* Based on ad7414.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/sysfs.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#define SWPLD_REG 0x31
#define SWPLD_SFP_MUX_REG 0x20
#define SFP_PRESENCE_1 0x38
#define SFP_PRESENCE_2 0x39
#define SFP_PRESENCE_3 0x3A
#define SFP_PRESENCE_4 0x3B
#define SFP_LP_MODE_1 0x34
#define SFP_LP_MODE_2 0x35
#define SFP_LP_MODE_3 0x36
#define SFP_LP_MODE_4 0x37
#define SFP_RESET_1 0x3C
#define SFP_RESET_2 0x3D
#define SFP_RESET_3 0x3E
#define SFP_RESET_4 0x3F
/* Check cpld read results */
#define VALIDATED_READ(_buf, _rv, _read, _invert) \
do { \
_rv = _read; \
if (_rv < 0) { \
return sprintf(_buf, "READ ERROR\n"); \
} \
if (_invert) { \
_rv = ~_rv; \
} \
_rv &= 0xFF; \
} while(0) \
u8 sfp_port_data = 0x00;
static const u8 cpld_to_port_table[] = {
0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x10,
0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x20,
0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x30,
0x31, 0x32 };
/* Addresses scanned */
static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END };
/* Each client has this additional data */
struct ag9032v1_sfp_data {
struct device *hwmon_dev;
struct mutex update_lock;
char valid;
unsigned long last_updated;
int port;
char eeprom[256];
};
static ssize_t for_eeprom(struct device *dev, struct device_attribute *dev_attr,
char *buf);
static int ag9032v1_sfp_read_block(struct i2c_client *client, u8 command,
u8 *data, int data_len);
static struct ag9032v1_sfp_data *ag9032v1_sfp_update_device( \
struct device *dev);
static ssize_t set_w_port_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count);
static ssize_t for_r_port_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
static ssize_t for_status(struct device *dev, struct device_attribute \
*dev_attr, char *buf);
static ssize_t set_w_lp_mode_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count);
static ssize_t set_w_reset_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count);
extern int i2c_cpld_write(int bus, unsigned short cpld_addr, u8 reg, u8 value);
extern int i2c_cpld_read(int bus, unsigned short cpld_addr, u8 reg);
enum ag9032v1_sfp_sysfs_attributes {
SFP_EEPROM,
SFP_SELECT_PORT,
SFP_IS_PRESENT,
SFP_IS_PRESENT_ALL,
SFP_LP_MODE,
SFP_RESET
};
static ssize_t set_w_port_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
long data;
int error;
if (attr->index == SFP_SELECT_PORT) {
error = kstrtol(buf, 16, &data);
if (error)
return error;
sfp_port_data = data;
}
return count;
}
static ssize_t for_r_port_data(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
return sprintf(buf, "0x%02X\n", sfp_port_data);
}
static ssize_t set_w_lp_mode_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count)
{
long data;
int error;
u8 port_t = 0;
int bit_t = 0x00;
int values = 0x00;
error = kstrtol(buf, 10, &data);
if (error)
return error;
for (port_t = 0; port_t < 32; port_t++) {
/* port number range is 0 - 31 */
if (cpld_to_port_table[port_t] == sfp_port_data)
break;
}
if (port_t < 8) { /* Port 0-7 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_1);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_LP_MODE_1, values);
} else if (port_t > 7 && port_t < 16) { /* Port 7-15 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_2);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_LP_MODE_2, values);
} else if (port_t > 15 && port_t < 24) { /* Port 16-23 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_3);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_LP_MODE_3, values);
} else if (port_t > 23 && port_t < 32) { /* Port 24-31 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_4);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_LP_MODE_4, values);
}
return count;
}
static ssize_t set_w_reset_data(struct device *dev, struct device_attribute \
*dev_attr, const char *buf, size_t count)
{
long data;
int error;
u8 port_t = 0;
int bit_t = 0x00;
int values = 0x00;
error = kstrtol(buf, 10, &data);
if (error)
return error;
for (port_t = 0; port_t < 32; port_t++) {
/* port number range is 0 - 31 */
if (cpld_to_port_table[port_t] == sfp_port_data)
break;
}
if (port_t < 8) { /* Port 0-7 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_1);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_RESET_1, values);
} else if (port_t > 7 && port_t < 16) { /* Port 7-15 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_2);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_RESET_2, values);
} else if (port_t > 15 && port_t < 24) { /* Port 16-23 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_3);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_RESET_3, values);
} else if (port_t > 23 && port_t < 32) { /* Port 24-31 */
values = i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_4);
if (data == 0) {
bit_t = ~(1 << (7 - (port_t % 8)));
values = values & bit_t;
} else if (data == 1) {
bit_t = 1 << (7 - (port_t % 8));
values = values | bit_t;
} else {
return -EINVAL;
}
i2c_cpld_write(6, SWPLD_REG,
SFP_RESET_4, values);
}
return count;
}
static ssize_t for_status(struct device *dev, struct device_attribute \
*dev_attr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
u8 port_t = 0;
int values[4] = {'\0'};
int bit_t = 0x00;
if (attr->index == SFP_IS_PRESENT) {
for (port_t = 0; port_t < 32; port_t++) {
/* port number range is 0 - 31 */
if (cpld_to_port_table[port_t] == sfp_port_data)
break;
}
if (port_t < 8) { /* Port 0-7 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_1), 0);
} else if (port_t > 7 && port_t < 16) { /* Port 7-15 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_2), 0);
} else if (port_t > 15 && port_t < 24) { /* Port 16-23 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_3), 0);
} else if (port_t > 23 && port_t < 32) { /* Port 24-31 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_4), 0);
}
/* SWPLD QSFP module respond */
bit_t = 1 << (7 - (port_t % 8));
values[0] = values[0] & bit_t;
values[0] = values[0]/bit_t;
/* sfp_is_present value
* return 1 is module NOT present
* return 0 is module present
*/
return sprintf(buf, "%d\n", values[0]);
}
if (attr->index == SFP_IS_PRESENT_ALL) {
/*
* Report the SFP ALL PRESENCE status
* This data information form CPLD.
*/
/* SFP_PRESENT Ports 1-8 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_1), 0);
/* SFP_PRESENT Ports 9-16 */
VALIDATED_READ(buf, values[1],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_2), 0);
/* SFP_PRESENT Ports 17-24 */
VALIDATED_READ(buf, values[2],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_3), 0);
/* SFP_PRESENT Ports 25-32 */
VALIDATED_READ(buf, values[3],
i2c_cpld_read(6, SWPLD_REG,
SFP_PRESENCE_4), 0);
/* sfp_is_present_all value
* return 0 is module NOT present
* return 1 is module present
*/
return sprintf(buf, "%02X %02X %02X %02X\n",
values[0], values[1],
values[2], values[3]);
}
if (attr->index == SFP_LP_MODE) {
for (port_t = 0; port_t < 32; port_t++) {
/* port number range is 0 - 31 */
if (cpld_to_port_table[port_t] == sfp_port_data)
break;
}
if (port_t < 8) { /* Port 0-7 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_1), 0);
} else if (port_t > 7 && port_t < 16) { /* Port 7-15 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_2), 0);
} else if (port_t > 15 && port_t < 24) { /* Port 16-23 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_3), 0);
} else if (port_t > 23 && port_t < 32) { /* Port 24-31 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_LP_MODE_4), 0);
}
/* SWPLD QSFP module respond */
bit_t = 1 << (7 - (port_t % 8));
values[0] = values[0] & bit_t;
values[0] = values[0] / bit_t;
/* sfp_lp_mode value
* return 0 is module NOT in LP mode
* return 1 is module in LP mode
*/
return sprintf(buf, "%d\n", values[0]);
}
if (attr->index == SFP_RESET) {
for (port_t = 0; port_t < 32; port_t++) {
/* port number range is 0 - 31 */
if (cpld_to_port_table[port_t] == sfp_port_data)
break;
}
if (port_t < 8) { /* Port 0-7 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_1), 0);
} else if (port_t > 7 && port_t < 16) { /* Port 7-15 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_2), 0);
} else if (port_t > 15 && port_t < 24) { /* Port 16-23 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_3), 0);
} else if (port_t > 23 && port_t < 32) { /* Port 24-31 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(6, SWPLD_REG,
SFP_RESET_4), 0);
}
/* SWPLD QSFP module respond */
bit_t = 1 << (7 - (port_t % 8));
values[0] = values[0] & bit_t;
values[0] = values[0] / bit_t;
/* sfp_reset value
* return 0 is module NOT in Reset
* return 1 is module in Reset
*/
return sprintf(buf, "%d\n", values[0]);
}
return (attr->index);
}
static ssize_t for_eeprom(struct device *dev, struct device_attribute *dev_attr,
char *buf)
{
struct ag9032v1_sfp_data *data = ag9032v1_sfp_update_device(dev);
if (!data->valid) {
return 0;
}
memcpy(buf, data->eeprom, sizeof(data->eeprom));
return sizeof(data->eeprom);
}
static int ag9032v1_sfp_read_block(struct i2c_client *client, u8 command, \
u8 *data, int data_len)
{
int result = i2c_smbus_read_i2c_block_data(client, command, data_len,
data);
if (unlikely(result < 0))
goto abort;
if (unlikely(result != data_len)) {
result = -EIO;
goto abort;
}
result = 0;
abort:
return result;
}
static struct ag9032v1_sfp_data *ag9032v1_sfp_update_device( \
struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct ag9032v1_sfp_data *data = i2c_get_clientdata(client);
u8 port_t = 0;
/* Use SWPLD to change sfp port offset */
for (port_t = 0; port_t < 32; port_t++) {
/* port number range is 0 - 31 */
if (cpld_to_port_table[port_t] == sfp_port_data)
break;
}
if (port_t < 8) { /* Port 0-7 */
i2c_cpld_write(6, SWPLD_REG,
SWPLD_SFP_MUX_REG, sfp_port_data);
} else if (port_t > 7 && port_t < 16) { /* Port 7-15 */
i2c_cpld_write(6, SWPLD_REG,
SWPLD_SFP_MUX_REG, sfp_port_data);
} else if (port_t > 15 && port_t < 24) { /* Port 16-23 */
i2c_cpld_write(6, SWPLD_REG,
SWPLD_SFP_MUX_REG, sfp_port_data);
} else if (port_t > 23 && port_t < 32) { /* Port 24-31 */
i2c_cpld_write(6, SWPLD_REG,
SWPLD_SFP_MUX_REG, sfp_port_data);
}
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated) || !data->valid) {
int status = -1;
int i = 0;
data->valid = 0;
memset(data->eeprom, 0, sizeof(data->eeprom));
for (i = 0; i < sizeof(data->eeprom)/ \
I2C_SMBUS_BLOCK_MAX; i++) {
status = ag9032v1_sfp_read_block(
client,
i*I2C_SMBUS_BLOCK_MAX,
data->eeprom + (i*I2C_SMBUS_BLOCK_MAX),
I2C_SMBUS_BLOCK_MAX
);
if (status < 0) {
printk(KERN_INFO "status = %d\n", status);
dev_dbg(&client->dev,
"unable to read eeprom from port(%d)\n", data->port);
goto exit;
}
}
data->last_updated = jiffies;
data->valid = 1;
}
exit:
mutex_unlock(&data->update_lock);
return data;
}
/* sysfs attributes for hwmon */
static SENSOR_DEVICE_ATTR(sfp_eeprom, S_IRUGO, for_eeprom, NULL,
SFP_EEPROM);
static SENSOR_DEVICE_ATTR(sfp_select_port, S_IWUSR | S_IRUGO,
for_r_port_data, set_w_port_data, SFP_SELECT_PORT);
static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, for_status, NULL,
SFP_IS_PRESENT);
static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, for_status, NULL,
SFP_IS_PRESENT_ALL);
static SENSOR_DEVICE_ATTR(sfp_lp_mode, S_IWUSR | S_IRUGO,
for_status, set_w_lp_mode_data, SFP_LP_MODE);
static SENSOR_DEVICE_ATTR(sfp_reset, S_IWUSR | S_IRUGO,
for_status, set_w_reset_data, SFP_RESET);
static struct attribute *ag9032v1_sfp_attributes[] = {
&sensor_dev_attr_sfp_eeprom.dev_attr.attr,
&sensor_dev_attr_sfp_select_port.dev_attr.attr,
&sensor_dev_attr_sfp_is_present.dev_attr.attr,
&sensor_dev_attr_sfp_is_present_all.dev_attr.attr,
&sensor_dev_attr_sfp_lp_mode.dev_attr.attr,
&sensor_dev_attr_sfp_reset.dev_attr.attr,
NULL
};
static const struct attribute_group ag9032v1_sfp_group = {
.attrs = ag9032v1_sfp_attributes,
};
static int ag9032v1_sfp_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct ag9032v1_sfp_data *data;
int status;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_I2C_BLOCK)) {
status = -EIO;
goto exit;
}
data = kzalloc(sizeof(struct ag9032v1_sfp_data), GFP_KERNEL);
if (!data) {
status = -ENOMEM;
goto exit;
}
mutex_init(&data->update_lock);
data->port = id->driver_data;
i2c_set_clientdata(client, data);
dev_info(&client->dev, "chip found\n");
status = sysfs_create_group(&client->dev.kobj, &ag9032v1_sfp_group);
if (status)
goto exit_sysfs_create_group;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
status = PTR_ERR(data->hwmon_dev);
goto exit_hwmon_device_register;
}
dev_info(&client->dev, "%s: sfp '%s'\n", dev_name(data->hwmon_dev),
client->name);
return 0;
exit_hwmon_device_register:
sysfs_remove_group(&client->dev.kobj, &ag9032v1_sfp_group);
exit_sysfs_create_group:
kfree(data);
exit:
return status;
}
static int ag9032v1_sfp_remove(struct i2c_client *client)
{
struct ag9032v1_sfp_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &ag9032v1_sfp_group);
kfree(data);
return 0;
}
enum id_name {
dni_ag9032v1_sfp
};
static const struct i2c_device_id ag9032v1_sfp_id[] = {
{ "dni_ag9032v1_sfp", dni_ag9032v1_sfp },
{}
};
MODULE_DEVICE_TABLE(i2c, ag9032v1_sfp_id);
static struct i2c_driver ag9032v1_sfp_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "dni_ag9032v1_sfp",
},
.probe = ag9032v1_sfp_probe,
.remove = ag9032v1_sfp_remove,
.id_table = ag9032v1_sfp_id,
.address_list = normal_i2c,
};
static int __init ag9032v1_sfp_init(void)
{
return i2c_add_driver(&ag9032v1_sfp_driver);
}
static void __exit ag9032v1_sfp_exit(void)
{
i2c_del_driver(&ag9032v1_sfp_driver);
}
MODULE_AUTHOR("Aries Lin <aries.lin@deltaww.com>");
MODULE_DESCRIPTION("AG9032v1 SFP Driver");
MODULE_LICENSE("GPL");
module_init(ag9032v1_sfp_init);
module_exit(ag9032v1_sfp_exit);

370
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/modules/builds/dni_emc2305.c Executable file
View File

@@ -0,0 +1,370 @@
/*
* <bsn.cl fy=2013 v=gpl>
*
* Copyright (C) 2017 Delta Networks, Inc.
*
* This program is free software; you can redistribute it
* and/or modify it under the terms ofthe GNU General Public License as
* published by the Free Software Foundation; either version 2 of the License,
* or (at your option) any later version.
*
*
* </bsn.cl>
*
*
* A hwmon driver for the SMSC EMC2305 fan controller
* Complete datasheet is available (6/2013) at:
* http://www.smsc.com/media/Downloads_Public/Data_Sheets/2305.pdf
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
extern int i2c_cpld_read(int bus, unsigned short cpld_addr, u8 reg);
extern int i2c_cpld_write(int bus, unsigned short cpld_addr, u8 reg, u8 value);
static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count);
static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
char *buf);
static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
char *buf);
static ssize_t set_fan(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count);
static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count);
static const unsigned short normal_i2c[] = { 0x2C, 0x2D, 0x2E, 0x2F, 0x4C,
0x4D, I2C_CLIENT_END
};
#define EMC2305_REG_DEVICE 0xFD
#define EMC2305_REG_VENDOR 0xFE
//#define FAN_MINIMUN 0x33 /*20%*/
#define FAN_MINIMUN 0x0 /*0%*/
#define FAN_RPM_BASED 0xAB
#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * n)
#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * n)
#define EMC2305_REG_FAN_TACH(n) (0x3E + 0x10 * n)
#define EMC2305_REG_FAN_CONF(n) (0x32 + 0x10 * n)
#define EMC2305_REG_FAN_REAR_H_RPM(n) (0x3D + 0x10 * n)
#define EMC2305_REG_FAN_REAR_L_RPM(n) (0x3C + 0x10 * n)
#define EMC2305_DEVICE 0x34
#define EMC2305_VENDOR 0x5D
//#define MUX_SELECT i2c_cpld_write(5, 0x30, 0x67, 0x05)
#define MUX_SELECT i2c_cpld_write(6, 0x31, 0x21, 0x05)
struct emc2305_data
{
struct device *hwmon_dev;
struct attribute_group attrs;
struct mutex lock;
};
static int emc2305_probe(struct i2c_client *client,
const struct i2c_device_id *id);
static int emc2305_detect(struct i2c_client *client,
struct i2c_board_info *info);
static int emc2305_remove(struct i2c_client *client);
static const struct i2c_device_id emc2305_id[] =
{
{ "emc2305", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, emc2305_id);
static struct i2c_driver emc2305_driver =
{
.class = I2C_CLASS_HWMON,
.driver = {
.name = "emc2305",
},
.probe = emc2305_probe,
.remove = emc2305_remove,
.id_table = emc2305_id,
.detect = emc2305_detect,
.address_list = normal_i2c,
};
static SENSOR_DEVICE_ATTR(fan1_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 0);
static SENSOR_DEVICE_ATTR(fan2_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 1);
static SENSOR_DEVICE_ATTR(fan3_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 2);
static SENSOR_DEVICE_ATTR(fan4_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 3);
static SENSOR_DEVICE_ATTR(fan5_input, S_IWUSR | S_IRUGO, show_fan, set_fan, 4);
static SENSOR_DEVICE_ATTR(fan1_input_percentage, S_IWUSR | S_IRUGO, show_fan, set_fan_percentage, 0);
static SENSOR_DEVICE_ATTR(fan2_input_percentage, S_IWUSR | S_IRUGO, show_fan, set_fan_percentage, 1);
static SENSOR_DEVICE_ATTR(fan3_input_percentage, S_IWUSR | S_IRUGO, show_fan, set_fan_percentage, 2);
static SENSOR_DEVICE_ATTR(fan4_input_percentage, S_IWUSR | S_IRUGO, show_fan, set_fan_percentage, 3);
static SENSOR_DEVICE_ATTR(fan5_input_percentage, S_IWUSR | S_IRUGO, show_fan, set_fan_percentage, 4);
static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0);
static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 1);
static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 2);
static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 3);
static SENSOR_DEVICE_ATTR(pwm5, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 4);
static struct attribute *emc2305_attr[] =
{
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan1_input_percentage.dev_attr.attr,
&sensor_dev_attr_fan2_input_percentage.dev_attr.attr,
&sensor_dev_attr_fan3_input_percentage.dev_attr.attr,
&sensor_dev_attr_fan4_input_percentage.dev_attr.attr,
&sensor_dev_attr_fan5_input_percentage.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
&sensor_dev_attr_pwm5.dev_attr.attr,
NULL
};
static ssize_t set_fan_percentage(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct emc2305_data *data = i2c_get_clientdata(client);
unsigned long hsb, lsb;
unsigned long tech;
unsigned long val;
int ret;
MUX_SELECT;
ret = kstrtoul(buf, 10, &val);
if (ret)
{
return ret;
}
if (val > 100)
{
return -EINVAL;
}
if (val <= 5)
{
hsb = 0xff; /*high bit*/
lsb = 0xe0; /*low bit*/
}
else
{
val = val * 230;
tech = (3932160 * 2) / (val > 0 ? val : 1);
hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff);
lsb = (uint8_t)((tech << 3) & 0x0f8);
}
mutex_lock(&data->lock);
i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb);
i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb);
mutex_unlock(&data->lock);
return count;
}
static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct emc2305_data *data = i2c_get_clientdata(client);
int val;
MUX_SELECT;
mutex_lock(&data->lock);
val = i2c_smbus_read_word_swapped(client,
EMC2305_REG_FAN_TACH(attr->index));
mutex_unlock(&data->lock);
/* Left shift 3 bits for showing correct RPM */
val = val >> 3;
return sprintf(buf, "%d\n", 3932160 * 2 / (val > 0 ? val : 1));
}
static ssize_t set_fan(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct emc2305_data *data = i2c_get_clientdata(client);
unsigned long hsb, lsb;
unsigned long tech;
unsigned long val;
int ret;
MUX_SELECT;
ret = kstrtoul(buf, 10, &val);
if (ret)
{
return ret;
}
if (val > 23000)
{
return -EINVAL;
}
if (val <= 960)
{
hsb = 0xff; /*high bit*/
lsb = 0xe0; /*low bit*/
}
else
{
tech = (3932160 * 2) / (val > 0 ? val : 1);
hsb = (uint8_t)(((tech << 3) >> 8) & 0x0ff);
lsb = (uint8_t)((tech << 3) & 0x0f8);
}
mutex_lock(&data->lock);
i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_H_RPM(attr->index), hsb);
i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_REAR_L_RPM(attr->index), lsb);
mutex_unlock(&data->lock);
return count;
}
static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct emc2305_data *data = i2c_get_clientdata(client);
int val;
MUX_SELECT;
mutex_lock(&data->lock);
val = i2c_smbus_read_byte_data(client,
EMC2305_REG_FAN_DRIVE(attr->index));
mutex_unlock(&data->lock);
return sprintf(buf, "%d\n", val);
}
static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct emc2305_data *data = i2c_get_clientdata(client);
unsigned long val;
int ret;
MUX_SELECT;
ret = kstrtoul(buf, 10, &val);
if (ret)
{
return ret;
}
if (val > 255)
{
return -EINVAL;
}
mutex_lock(&data->lock);
i2c_smbus_write_byte_data(client,
EMC2305_REG_FAN_DRIVE(attr->index),
val);
mutex_unlock(&data->lock);
return count;
}
static int emc2305_detect(struct i2c_client *client,
struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
int vendor, device;
MUX_SELECT;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
{
return -ENODEV;
}
vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR);
if (vendor != EMC2305_VENDOR)
{
return -ENODEV;
}
device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE);
if (device != EMC2305_DEVICE)
{
return -ENODEV;
}
strlcpy(info->type, "emc2305", I2C_NAME_SIZE);
return 0;
}
static int emc2305_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct emc2305_data *data;
int err;
int i;
data = devm_kzalloc(&client->dev, sizeof(struct emc2305_data),
GFP_KERNEL);
if (!data)
{
return -ENOMEM;
}
i2c_set_clientdata(client, data);
mutex_init(&data->lock);
dev_info(&client->dev, "%s chip found\n", client->name);
data->attrs.attrs = emc2305_attr;
err = sysfs_create_group(&client->dev.kobj, &data->attrs);
if (err)
{
return err;
}
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev))
{
err = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
for (i = 0; i < 5; i++)
{
/* set minimum drive to 0% */
i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i), FAN_MINIMUN);
i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_CONF(i), FAN_RPM_BASED);
}
return 0;
exit_remove:
sysfs_remove_group(&client->dev.kobj, &data->attrs);
return err;
}
static int emc2305_remove(struct i2c_client *client)
{
struct emc2305_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &data->attrs);
return 0;
}
module_i2c_driver(emc2305_driver);
MODULE_AUTHOR("Neal Tai<neal.tai@deltaww.com>");
MODULE_DESCRIPTION("SMSC EMC2305 fan controller driver");
MODULE_LICENSE("GPL");

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include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/PKG.yml Normal file
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!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-delta-ag9032v1 ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

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FILTER=src
include $(ONL)/make/subdirs.mk

45
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/lib/Makefile Normal file
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-delta-ag9032v1
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_delta_ag9032v1 onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-delta-ag9032v1.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
# Copyright (C) 2017 Delta Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_delta_ag9032v1 onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/.module Normal file
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@@ -0,0 +1 @@
name: x86_64_delta_ag9032v1

9
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/Makefile Normal file
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###############################################################################
#
#
#
###############################################################################
include ../../init.mk
MODULE := x86_64_delta_ag9032v1
AUTOMODULE := x86_64_delta_ag9032v1
include $(BUILDER)/definemodule.mk

6
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/README Normal file
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###############################################################################
#
# x86_64_delta_ag9032v1 README
#
###############################################################################

9
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/auto/make.mk Normal file
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###############################################################################
#
# x86_64_delta_ag9032v1 Autogeneration
#
###############################################################################
x86_64_delta_ag9032v1_AUTO_DEFS := module/auto/x86_64_delta_ag9032v1.yml
x86_64_delta_ag9032v1_AUTO_DIRS := module/inc/x86_64_delta_ag9032v1 module/src
include $(BUILDER)/auto.mk

50
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/auto/x86_64_delta_ag9032v1.yml Normal file
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###############################################################################
#
# x86_64_delta_ag9032v1 Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: x86_64_delta_ag9032v1_CONFIG_PORTING_STDLIB
- X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION:
doc: "Assume chassis fan direction is the same as the PSU fan direction."
default: 0
definitions:
cdefs:
X86_64_DELTA_AG9032V1_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_delta_ag9032v1_config
portingmacro:
x86_64_delta_ag9032v1:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/inc/x86_64_delta_ag9032v1/x86_64_delta_ag9032v1.x Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

137
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/inc/x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h Normal file
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/**************************************************************************//**
*
* @file
* @brief x86_64_delta_ag9032v1 Configuration Header
*
* @addtogroup x86_64_delta_ag9032v1-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_DELTA_AG9032V1_CONFIG_H__
#define __X86_64_DELTA_AG9032V1_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef x86_64_delta_ag9032V1_INCLUDE_CUSTOM_CONFIG
#include <x86_64_delta_ag9032v1_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_DELTA_AG9032V1_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING
#define X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT
#define X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB
#define X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI
#define X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
*
* Assume chassis fan direction is the same as the PSU fan direction. */
#ifndef X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
#define X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_delta_ag9032v1_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_delta_ag9032v1_config_settings_t;
/** Configuration settings table. */
/** x86_64_delta_ag9032v1_config_settings table. */
extern x86_64_delta_ag9032v1_config_settings_t x86_64_delta_ag9032v1_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_delta_ag9032v1_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_delta_ag9032v1_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_DELTA_AG9032V1_CONFIG_HEADER).header> */
#include "x86_64_delta_ag9032v1_porting.h"
#endif /* __X86_64_DELTA_AG9032V1_CONFIG_H__ */
/* @} */

26
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/inc/x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_dox.h Normal file
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@@ -0,0 +1,26 @@
/**************************************************************************//**
*
* x86_64_delta_ag9032v1 Doxygen Header
*
*****************************************************************************/
#ifndef __x86_64_delta_ag9032v1_DOX_H__
#define __x86_64_delta_ag9032v1_DOX_H__
/**
* @defgroup x86_64_delta_ag9032v1 x86_64_delta_ag9032v1 - x86_64_delta_ag9032v1 Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_delta_ag9032v1-x86_64_delta_ag9032v1 Public Interface
* @defgroup x86_64_delta_ag9032v1-config Compile Time Configuration
* @defgroup x86_64_delta_ag9032v1-porting Porting Macros
*
* @}
*
*/
#endif /* __x86_64_delta_ag9032v1_DOX_H__ */

107
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/inc/x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_porting.h Normal file
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/**************************************************************************//**
*
* @file
* @brief x86_64_delta_ag9032v1 Porting Macros.
*
* @addtogroup x86_64_delta_ag9032v1-porting
* @{
*
*****************************************************************************/
#ifndef __x86_64_delta_ag9032v1_PORTING_H__
#define __x86_64_delta_ag9032v1_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef x86_64_delta_ag9032v1_MALLOC
#if defined(GLOBAL_MALLOC)
#define x86_64_delta_ag9032v1_MALLOC GLOBAL_MALLOC
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_MALLOC malloc
#else
#error The macro x86_64_delta_ag9032v1_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_FREE
#if defined(GLOBAL_FREE)
#define x86_64_delta_ag9032v1_FREE GLOBAL_FREE
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_FREE free
#else
#error The macro x86_64_delta_ag9032v1_FREE is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_MEMSET
#if defined(GLOBAL_MEMSET)
#define x86_64_delta_ag9032v1_MEMSET GLOBAL_MEMSET
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_MEMSET memset
#else
#error The macro x86_64_delta_ag9032v1_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define x86_64_delta_ag9032v1_MEMCPY GLOBAL_MEMCPY
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_MEMCPY memcpy
#else
#error The macro x86_64_delta_ag9032v1_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define x86_64_delta_ag9032v1_STRNCPY GLOBAL_STRNCPY
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_STRNCPY strncpy
#else
#error The macro x86_64_delta_ag9032v1_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define x86_64_delta_ag9032v1_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_VSNPRINTF vsnprintf
#else
#error The macro x86_64_delta_ag9032v1_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define x86_64_delta_ag9032v1_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_SNPRINTF snprintf
#else
#error The macro x86_64_delta_ag9032v1_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_delta_ag9032v1_STRLEN
#if defined(GLOBAL_STRLEN)
#define x86_64_delta_ag9032v1_STRLEN GLOBAL_STRLEN
#elif X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB == 1
#define x86_64_delta_ag9032v1_STRLEN strlen
#else
#error The macro x86_64_delta_ag9032v1_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __x86_64_delta_ag9032v1_PORTING_H__ */
/* @} */

10
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/make.mk Normal file
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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_delta_ag9032v1_INCLUDES := -I $(THIS_DIR)inc
x86_64_delta_ag9032v1_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_delta_ag9032v1_DEPENDMODULE_ENTRIES := init:x86_64_delta_ag9032v1 ucli:x86_64_delta_ag9032v1

9
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/Makefile Normal file
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@@ -0,0 +1,9 @@
###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_delta_ag9032v1_ucli.c

422
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/fani.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright (C) 2017 Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlp/platformi/fani.h>
#include <onlplib/mmap.h>
#include <fcntl.h>
#include "platform_lib.h"
#include <onlplib/i2c.h>
#define MAX_FAN_SPEED 23000
#define MAX_PSU_FAN_SPEED 19328
typedef struct fan_path_S
{
char *status;
char *speed;
char *ctrl_speed;
}fan_path_T;
static fan_path_T fan_path[] = /* must map with onlp_fan_id */
{
{ NULL, NULL, NULL },
{ "3-002c/fan1_fault", "3-002c/fan1_input", "3-002c/fan1_input_percentage" },
{ "3-002c/fan2_fault", "3-002c/fan2_input", "3-002c/fan2_input_percentage" },
{ "3-002c/fan3_fault", "3-002c/fan3_input", "3-002c/fan3_input_percentage" },
{ "3-002c/fan4_fault", "3-002c/fan4_input", "3-002c/fan4_input_percentage" },
{ "3-002c/fan5_fault", "3-002c/fan5_input", "3-002c/fan5_input_percentage" },
{ "3-002d/fan1_fault", "3-002d/fan1_input", "3-002d/fan1_input_percentage" },
{ "3-002d/fan2_fault", "3-002d/fan2_input", "3-002d/fan2_input_percentage" },
{ "3-002d/fan3_fault", "3-002d/fan3_input", "3-002d/fan3_input_percentage" },
{ "3-002d/fan4_fault", "3-002d/fan4_input", "3-002d/fan4_input_percentage" },
{ "3-002d/fan5_fault", "3-002d/fan5_input", "3-002d/fan5_input_percentage" },
{ "4-0058/psu_fan1_fault", "4-0058/psu_fan1_speed_rpm", "4-0058/psu_fan1_duty_cycle_percentage" },
{ "4-0058/psu_fan1_fault", "4-0058/psu_fan1_speed_rpm", "4-0058/psu_fan1_duty_cycle_percentage" }
};
#define MAKE_FAN_INFO_NODE_ON_FAN_BOARD(id) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##id##_ON_FAN_BOARD), "Chassis Fan "#id, 0 }, \
0x0, \
(ONLP_FAN_CAPS_SET_RPM | ONLP_FAN_CAPS_GET_RPM), \
0, \
0, \
ONLP_FAN_MODE_INVALID, \
}
#define MAKE_FAN_INFO_NODE_ON_PSU(psu_id, fan_id) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fan_id##_ON_PSU##psu_id), "Chassis PSU-"#psu_id " Fan "#fan_id, 0 }, \
0x0, \
(ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE), \
0, \
0, \
ONLP_FAN_MODE_INVALID, \
}
/* Static fan information */
onlp_fan_info_t linfo[] = {
{ }, /* Not used */
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(1),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(2),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(3),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(4),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(5),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(6),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(7),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(8),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(9),
MAKE_FAN_INFO_NODE_ON_FAN_BOARD(10),
MAKE_FAN_INFO_NODE_ON_PSU(1,1),
MAKE_FAN_INFO_NODE_ON_PSU(2,1),
};
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
dni_fani_info_get_fan(int local_id, onlp_fan_info_t* info)
{
int rpm = 0;
char fullpath[100] = {0};
uint8_t present_bit=0x00, bit=0x00;
mux_info_t mux_info;
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.channel = 0x05;
mux_info.flags = DEFAULT_FLAG;
dev_info_t dev_info;
dev_info.bus = I2C_BUS_3;
dev_info.addr = FAN_IO_CTL;
dev_info.offset = 0x00;
dev_info.flags = DEFAULT_FLAG;
sprintf(fullpath, "%s%s", PREFIX_PATH, fan_path[local_id].speed);
rpm = dni_i2c_lock_read_attribute(&mux_info, fullpath);
info->rpm = rpm;
/* If rpm is FAN_ZERO_TACH, then the rpm value is zero. */
if(info->rpm == FAN_ZERO_TACH)
info->rpm = 0;
/* get speed percentage from rpm */
info->percentage = (info->rpm * 100)/MAX_FAN_SPEED;
mux_info.channel = 0x07;
present_bit = dni_i2c_lock_read(&mux_info, &dev_info);
switch(local_id)
{
case FAN_1_ON_FAN_BOARD:
case FAN_6_ON_FAN_BOARD:
if((present_bit & (bit+1)) == 0)
info->status |= ONLP_FAN_STATUS_PRESENT;
else
info->status |= ONLP_FAN_STATUS_FAILED;
break;
case FAN_2_ON_FAN_BOARD:
case FAN_7_ON_FAN_BOARD:
if((present_bit & ((bit+1)<<1)) == 0)
info->status |= ONLP_FAN_STATUS_PRESENT;
else
info->status |= ONLP_FAN_STATUS_FAILED;
break;
case FAN_3_ON_FAN_BOARD:
case FAN_8_ON_FAN_BOARD:
if((present_bit & ((bit+1)<<2)) == 0)
info->status |= ONLP_FAN_STATUS_PRESENT;
else
info->status |= ONLP_FAN_STATUS_FAILED;
break;
case FAN_4_ON_FAN_BOARD:
case FAN_9_ON_FAN_BOARD:
if((present_bit & ((bit+1)<<3)) == 0)
info->status |= ONLP_FAN_STATUS_PRESENT;
else
info->status |= ONLP_FAN_STATUS_FAILED;
break;
case FAN_5_ON_FAN_BOARD:
case FAN_10_ON_FAN_BOARD:
if((present_bit & ((bit+1)<<4)) == 0)
info->status |= ONLP_FAN_STATUS_PRESENT;
else
info->status |= ONLP_FAN_STATUS_FAILED;
break;
}
return ONLP_STATUS_OK;
}
static int
dni_fani_info_get_fan_on_psu(int local_id, onlp_fan_info_t* info)
{
int r_data = 0;
uint8_t channel = 0x00;
char fullpath[80] = {0};
char channel_data[2] = {'\0'};
mux_info_t mux_info;
dev_info_t dev_info;
/* Select PSU member */
switch (local_id) {
case FAN_1_ON_PSU1:
channel = PSU_I2C_SEL_PSU1_EEPROM;
sprintf(channel_data, "%x", PSU_I2C_SEL_PSU1_EEPROM);
dni_i2c_lock_write_attribute(NULL, channel_data, PSU_SELECT_MEMBER_PATH);
break;
case FAN_1_ON_PSU2:
channel = PSU_I2C_SEL_PSU2_EEPROM;
sprintf(channel_data, "%x", PSU_I2C_SEL_PSU2_EEPROM);
dni_i2c_lock_write_attribute(NULL, channel_data, PSU_SELECT_MEMBER_PATH);
break;
default:
channel = 0x00; /* DEFAULT */
break;
}
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_4;
dev_info.addr = PSU_EEPROM;
dev_info.offset = 0x00; /* In EEPROM address 0x00 */
dev_info.flags = DEFAULT_FLAG;
/* Check PSU is PRESENT or not
* Read PSU EEPROM 1 byte from adress 0x00
* if not present, return Negative value.
*/
if(dni_i2c_lock_read(&mux_info, &dev_info) >= 0) {
info->status |= ONLP_FAN_STATUS_PRESENT | ONLP_FAN_STATUS_B2F;
}
/* Check PSU FAN is fault or not
* Read PSU FAN Fault from psu_fan1_fault
* Return 1 is PSU fan fault
*/
sprintf(fullpath, "%s%s", PREFIX_PATH, fan_path[local_id].status);
r_data = dni_i2c_lock_read_attribute(&mux_info, fullpath);
if (r_data == 1) {
info->status |= ONLP_FAN_STATUS_FAILED;
}
/* Read PSU FAN speed from psu_fan1_speed_rpm */
sprintf(fullpath, "%s%s", PREFIX_PATH, fan_path[local_id].speed);
r_data = dni_i2c_lock_read_attribute(&mux_info, fullpath);
info->rpm = r_data;
/* get speed percentage from rpm */
info->percentage = ((info->rpm) * 100) / MAX_PSU_FAN_SPEED;
return ONLP_STATUS_OK;
}
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
int rc = 0;
int local_id;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
*info = linfo[local_id];
switch (local_id)
{
case FAN_1_ON_PSU1:
case FAN_1_ON_PSU2:
rc = dni_fani_info_get_fan_on_psu(local_id, info);
break;
case FAN_1_ON_FAN_BOARD:
case FAN_2_ON_FAN_BOARD:
case FAN_3_ON_FAN_BOARD:
case FAN_4_ON_FAN_BOARD:
case FAN_5_ON_FAN_BOARD:
case FAN_6_ON_FAN_BOARD:
case FAN_7_ON_FAN_BOARD:
case FAN_8_ON_FAN_BOARD:
case FAN_9_ON_FAN_BOARD:
case FAN_10_ON_FAN_BOARD:
rc = dni_fani_info_get_fan(local_id, info);
break;
default:
rc = ONLP_STATUS_E_INVALID;
break;
}
return rc;
}
/*
* This function sets the speed of the given fan in RPM.
*
* This function will only be called if the fan supprots the RPM_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{
int local_id;
char data[10] = {0};
char fullpath[70] = {0};
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
/* get fullpath */
switch (local_id)
{
case FAN_1_ON_FAN_BOARD:
case FAN_2_ON_FAN_BOARD:
case FAN_3_ON_FAN_BOARD:
case FAN_4_ON_FAN_BOARD:
case FAN_5_ON_FAN_BOARD:
case FAN_6_ON_FAN_BOARD:
case FAN_7_ON_FAN_BOARD:
case FAN_8_ON_FAN_BOARD:
case FAN_9_ON_FAN_BOARD:
case FAN_10_ON_FAN_BOARD:
sprintf(fullpath, "%s%s", PREFIX_PATH, fan_path[local_id].ctrl_speed);
break;
default:
return ONLP_STATUS_E_INVALID;
}
sprintf(data, "%d", rpm);
dni_i2c_lock_write_attribute(NULL, data, fullpath);
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int p)
{
int local_id;
char data[10] = {0};
char fullpath[70] = {0};
char channel_data[2] = {'\0'};
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
/* Select PSU member */
switch (local_id) {
case FAN_1_ON_PSU1:
sprintf(channel_data, "%x", PSU_I2C_SEL_PSU1_EEPROM);
dni_i2c_lock_write_attribute(NULL, channel_data,
"/sys/bus/i2c/devices/4-0058/psu_select_member");
break;
case FAN_1_ON_PSU2:
sprintf(channel_data, "%x", PSU_I2C_SEL_PSU2_EEPROM);
dni_i2c_lock_write_attribute(NULL, channel_data,
"/sys/bus/i2c/devices/4-0058/psu_select_member");
break;
case FAN_1_ON_FAN_BOARD:
case FAN_2_ON_FAN_BOARD:
case FAN_3_ON_FAN_BOARD:
case FAN_4_ON_FAN_BOARD:
case FAN_5_ON_FAN_BOARD:
case FAN_6_ON_FAN_BOARD:
case FAN_7_ON_FAN_BOARD:
case FAN_8_ON_FAN_BOARD:
case FAN_9_ON_FAN_BOARD:
case FAN_10_ON_FAN_BOARD:
break;
default:
return ONLP_STATUS_E_INVALID;
}
sprintf(fullpath, "%s%s", PREFIX_PATH, fan_path[local_id].ctrl_speed);
/* Write percentage to psu_fan1_duty_cycle_percentage */
sprintf(data, "%d", p);
dni_i2c_lock_write_attribute(NULL, data, fullpath);
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
*
* This function is only relevant if the fan OID supports both direction
* capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

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packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/ledi.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright (C) 2017 Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/ledi.h>
#include <sys/mman.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <onlplib/mmap.h>
#include <onlplib/i2c.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t linfo[] =
{
{ }, /* Not used */
{
{ ONLP_LED_ID_CREATE(LED_FRONT_FAN), "FRONT LED (FAN LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO,
},
{
{ ONLP_LED_ID_CREATE(LED_FRONT_SYS), "FRONT LED (SYS LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING | ONLP_LED_CAPS_AUTO,
},
{
{ ONLP_LED_ID_CREATE(LED_FRONT_PWR1), "FRONT LED (PWR1 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_ORANGE_BLINKING | ONLP_LED_CAPS_GREEN,
},
{
{ ONLP_LED_ID_CREATE(LED_FRONT_PWR2), "FRONT LED (PWR2 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_ORANGE_BLINKING | ONLP_LED_CAPS_GREEN,
},
{
{ ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_1), "FAN TRAY 1 LED", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
},
{
{ ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_2), "FAN TRAY 2 LED", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
},
{
{ ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_3), "FAN TRAY 3 LED", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
},
{
{ ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_4), "FAN TRAY 4 LED", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
},
{
{ ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_5), "FAN TRAY 5 LED", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
},
};
/* Function to check fan 1-10 speed normally*/
static int dni_fan_speed_good()
{
int rpm = 0, rpm1 = 0, speed_good = 0;
rpm = dni_i2c_lock_read_attribute(NULL, FAN1_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN1_REAR);
if(rpm != 0 && rpm != 960 && rpm1 != 0 && rpm1 != 960)
speed_good++;
rpm = dni_i2c_lock_read_attribute(NULL, FAN2_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN2_REAR);
if(rpm != 0 && rpm != 960 && rpm1 != 0 && rpm1 != 960)
speed_good++;
rpm = dni_i2c_lock_read_attribute(NULL, FAN3_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN3_REAR);
if(rpm != 0 && rpm != 960 && rpm1 != 0 && rpm1 != 960)
speed_good++;
rpm = dni_i2c_lock_read_attribute(NULL, FAN4_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN4_REAR);
if(rpm != 0 && rpm != 960 && rpm1 != 0 && rpm1 != 960)
speed_good++;
rpm = dni_i2c_lock_read_attribute(NULL, FAN5_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN5_REAR);
if(rpm != 0 && rpm != 960 && rpm1 != 0 && rpm1 != 960)
speed_good++;
return speed_good;
}
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int r_data = 0, fantray_present = -1;
VALIDATE(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[ONLP_OID_ID_GET(id)];
/* Set front panel's mode of leds */
r_data = dni_lock_swpld_read_attribute(LED_REG);
int local_id = ONLP_OID_ID_GET(id);
dev_info_t dev_info;
dev_info.bus = I2C_BUS_3;
dev_info.offset = 0x00;
dev_info.flags = DEFAULT_FLAG;
mux_info_t mux_info;
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.flags = DEFAULT_FLAG;
switch(local_id)
{
case LED_FRONT_FAN:
if((r_data & 0x01) == 0x01)
info->mode = ONLP_LED_MODE_GREEN;
else if((r_data & 0x02) == 0x02)
info->mode = ONLP_LED_MODE_ORANGE;
break;
case LED_FRONT_SYS:
if((r_data & 0x04) == 0x04)
info->mode = ONLP_LED_MODE_GREEN;
else if((r_data & 0x0C) == 0x0C)
info->mode = ONLP_LED_MODE_ORANGE;
else if((r_data & 0x08) == 0x08)
info->mode = ONLP_LED_MODE_GREEN_BLINKING;
else
return ONLP_STATUS_E_INTERNAL;
break;
case LED_FRONT_PWR1:
if((r_data & 0x40) == 0x40)
info->mode = ONLP_LED_MODE_GREEN;
else if((r_data & 0x80) == 0x80)
info->mode = ONLP_LED_MODE_ORANGE_BLINKING;
else
info->mode = ONLP_LED_MODE_OFF;
break;
case LED_FRONT_PWR2:
if((r_data & 0x10) == 0x10)
info->mode = ONLP_LED_MODE_GREEN;
else if((r_data & 0x20) == 0x20)
info->mode = ONLP_LED_MODE_ORANGE_BLINKING;
else
info->mode = ONLP_LED_MODE_OFF;
break;
case LED_REAR_FAN_TRAY_1:
/* Select fan tray 1 */
dev_info.addr = FAN_TRAY_1;
mux_info.channel = 0x00;
r_data = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG);
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
if(fantray_present >= 0)
{
if((r_data & 0x40) == 0x40)
info->mode = ONLP_LED_MODE_GREEN;
else
info->mode = ONLP_LED_MODE_RED;
}
else
info->mode = ONLP_LED_MODE_OFF;
break;
case LED_REAR_FAN_TRAY_2:
/* Select fan tray 2 */
dev_info.addr = FAN_TRAY_2;
mux_info.channel = 0x01;
r_data = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG);
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
if(fantray_present >= 0)
{
if((r_data & 0x10) == 0x10)
info->mode = ONLP_LED_MODE_GREEN;
else
info->mode = ONLP_LED_MODE_RED;
}
else
info->mode = ONLP_LED_MODE_OFF;
break;
case LED_REAR_FAN_TRAY_3:
/* Select fan tray 3 */
dev_info.addr = FAN_TRAY_3;
mux_info.channel = 0x02;
r_data = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG);
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
if(fantray_present >= 0)
{
if((r_data & 0x04) == 0x04)
info->mode = ONLP_LED_MODE_GREEN;
else
info->mode = ONLP_LED_MODE_RED;
}
else
info->mode = ONLP_LED_MODE_OFF;
break;
case LED_REAR_FAN_TRAY_4:
/* Select fan tray 4 */
dev_info.addr = FAN_TRAY_4;
mux_info.channel = 0x03;
r_data = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG);
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
if(fantray_present >= 0)
{
if((r_data & 0x01) == 0x01)
info->mode = ONLP_LED_MODE_GREEN;
else
info->mode = ONLP_LED_MODE_RED;
}
else
info->mode = ONLP_LED_MODE_OFF;
break;
case LED_REAR_FAN_TRAY_5:
/* Select fan tray 5 */
dev_info.addr = FAN_TRAY_5;
mux_info.channel = 0x04;
r_data = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG_2);
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
if(fantray_present >= 0)
{
if((r_data & 0x40) == 0x40)
info->mode = ONLP_LED_MODE_GREEN;
else
info->mode = ONLP_LED_MODE_RED;
}
else
info->mode = ONLP_LED_MODE_OFF;
break;
default:
break;
}
/* Set the on/off status */
if (info->mode == ONLP_LED_MODE_OFF)
info->status |= ONLP_LED_STATUS_FAILED;
else
info->status |=ONLP_LED_STATUS_PRESENT;
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
VALIDATE(id);
// int local_id = ONLP_OID_ID_GET(id);
if(on_or_off == 0)
onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
else
onlp_ledi_mode_set(id,ONLP_LED_MODE_AUTO);
return ONLP_STATUS_OK;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
VALIDATE(id);
int local_id = ONLP_OID_ID_GET(id);
int i = 0, count = 0;
int state = 0, fantray_present = -1, rpm = 0, rpm1 = 0;
uint8_t front_panel_led_value, power_state,fan_tray_led_reg_value,fan_tray_led_reg_2_value;
mux_info_t mux_info;
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.flags = DEFAULT_FLAG;
dev_info_t dev_info;
dev_info.bus = I2C_BUS_3;
dev_info.offset = 0x00;
dev_info.flags = DEFAULT_FLAG;
front_panel_led_value = dni_lock_swpld_read_attribute(LED_REG);
fan_tray_led_reg_value = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG);
fan_tray_led_reg_2_value = dni_lock_swpld_read_attribute(FAN_TRAY_LED_REG_2);
switch(local_id)
{
case LED_FRONT_FAN:
/* Clean the bit 1,0 */
front_panel_led_value &= ~0x3;
/* Read fan eeprom to check present. Fan tray 1-5 */
for(i = 0; i < 5; i++)
{
mux_info.channel = i;
dev_info.addr = FAN_TRAY_1 + i;
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
if( fantray_present >= 0)
count++;
}
/* Set front light of FAN */
if(count == ALL_FAN_TRAY_EXIST && dni_fan_speed_good() == FAN_SPEED_NORMALLY)
{
front_panel_led_value |= 0x01;
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
}
else
{
front_panel_led_value |= 0x02;
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
}
break;
case LED_FRONT_PWR1:
/* Clean bit 7,6 */
front_panel_led_value &= ~0xC0;
/* switch CPLD to PSU 1 */
dev_info.bus = I2C_BUS_4;
dev_info.addr = PSU_EEPROM;
mux_info.channel = 0x00;
state = dni_i2c_lock_read(&mux_info, &dev_info);
/* Check the state of PSU 1, "state = 1, PSU exists' */
if(state == 1)
{
power_state = dni_lock_swpld_read_attribute(CTL_REG);
/* Set the light of PSU */
if((power_state&0x80) != 0x80)
{
/* Red */
front_panel_led_value |= 0x80;
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
}
else if((power_state & 0x80) == 0x80)
{
/* Green */
front_panel_led_value |= 0x40;
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
}
}
else
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
break;
case LED_FRONT_PWR2:
/* Set front light of PSU 2 */
/* Clean bit 5,4 */
front_panel_led_value &= ~0x30;
/* switch CPLD to PSU 2 */
dev_info.bus = I2C_BUS_4;
dev_info.addr = PSU_EEPROM;
mux_info.channel = 0x20;
state = dni_i2c_lock_read(&mux_info, &dev_info);
/* Check the state of PSU 2, "state = 1, PSU exists' */
if(state == 1)
{
power_state = dni_lock_swpld_read_attribute(CTL_REG);
if((power_state & 0x40) != 0x40)
{
/* Red */
front_panel_led_value |= 0x20;
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
}
else if((power_state & 0x40) == 0x40)
{
/* Green */
front_panel_led_value |= 0x10;
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
}
}
else
dni_lock_swpld_write_attribute(LED_REG, front_panel_led_value);
break;
case LED_REAR_FAN_TRAY_1:
/* Select fan tray 1 */
mux_info.channel = 0x00;
dev_info.addr = FAN_TRAY_1;
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
/* Clean bit 7,6 */
fan_tray_led_reg_value &= ~0xC0;
rpm = dni_i2c_lock_read_attribute(NULL, FAN5_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN5_REAR);
if(fantray_present >= 0 && rpm != 960 && rpm != 0 && rpm1 != 960 && rpm1 != 0 )
{/* Green light */
fan_tray_led_reg_value |= 0x40;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
else
{/* Red light */
fan_tray_led_reg_value |= 0x80;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
break;
case LED_REAR_FAN_TRAY_2:
/* Select fan tray 2 */
mux_info.channel = 0x01;
dev_info.addr = FAN_TRAY_2;
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
/* Clean bit 5,4 */
fan_tray_led_reg_value &= ~0x30;
rpm = dni_i2c_lock_read_attribute(NULL, FAN4_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN4_REAR);
if(fantray_present >= 0 && rpm != 960 && rpm != 0 && rpm1 != 960 && rpm1 != 0 )
{
fan_tray_led_reg_value |= 0x10;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
else
{
fan_tray_led_reg_value |= 0x20;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
break;
case LED_REAR_FAN_TRAY_3:
/* Select fan tray 3 */
mux_info.channel = 0x02;
dev_info.addr = FAN_TRAY_3;
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
fan_tray_led_reg_value &= ~0x0c;
/* Clean bit 3,2 */
rpm = dni_i2c_lock_read_attribute(NULL, FAN3_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN3_REAR);
if(fantray_present >= 0 && rpm != 960 && rpm != 0 && rpm1 != 960 && rpm1 != 0 )
{
fan_tray_led_reg_value |= 0x04;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
else
{
fan_tray_led_reg_value |= 0x08;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
break;
case LED_REAR_FAN_TRAY_4:
/* Select fan tray 4 */
mux_info.channel = 0x03;
dev_info.addr = FAN_TRAY_4;
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
/* Clean bit 1,0 */
fan_tray_led_reg_value &= ~0x03;
rpm = dni_i2c_lock_read_attribute(NULL, FAN2_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN2_REAR);
if(fantray_present >= 0 && rpm != 960 && rpm !=0 && rpm1 != 960 && rpm1 != 0 )
{
fan_tray_led_reg_value |= 0x01;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
else
{
fan_tray_led_reg_value |= 0x02;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG, fan_tray_led_reg_value);
}
break;
case LED_REAR_FAN_TRAY_5:
/* Select fan tray 5 */
mux_info.channel = 0x04;
dev_info.addr = FAN_TRAY_5;
fantray_present = dni_i2c_lock_read(&mux_info, &dev_info);
/* Clean bit 7,6 */
fan_tray_led_reg_2_value &= ~0xC0;
rpm = dni_i2c_lock_read_attribute(NULL, FAN1_FRONT);
rpm1 = dni_i2c_lock_read_attribute(NULL, FAN1_REAR);
if(fantray_present >= 0 && rpm != 960 && rpm != 0 && rpm1 != 960 && rpm1 !=0 )
{
fan_tray_led_reg_2_value |= 0x40;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG_2, fan_tray_led_reg_2_value);
}
else
{
fan_tray_led_reg_2_value |= 0x80;
dni_lock_swpld_write_attribute(FAN_TRAY_LED_REG_2, fan_tray_led_reg_2_value);
}
break;
}
return ONLP_STATUS_OK;
}
/*
* Generic LED ioctl interface.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

9
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/make.mk Normal file
View File

@@ -0,0 +1,9 @@
###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_delta_ag9032v1
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

250
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/platform_lib.c Normal file
View File

@@ -0,0 +1,250 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright (C) 2017 Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <sys/mman.h>
#include <errno.h>
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <fcntl.h>
#include <AIM/aim.h>
#include "platform_lib.h"
#include <onlplib/i2c.h>
#include <onlplib/mmap.h>
#include <pthread.h>
int dni_i2c_read_attribute_binary(char *filename, char *buffer, int buf_size, int data_len)
{
int fd;
int len;
if ((buffer == NULL) || (buf_size < 0)) {
return -1;
}
if ((fd = open(filename, O_RDONLY)) == -1) {
return -1;
}
if ((len = read(fd, buffer, buf_size)) < 0) {
close(fd);
return -1;
}
if ((close(fd) == -1)) {
return -1;
}
if ((len > buf_size) || (data_len != 0 && len != data_len)) {
return -1;
}
return 0;
}
int dni_i2c_read_attribute_string(char *filename, char *buffer, int buf_size, int data_len)
{
int ret;
if (data_len >= buf_size) {
return -1;
}
ret = dni_i2c_read_attribute_binary(filename, buffer, buf_size-1, data_len);
if (ret == 0) {
buffer[buf_size-1] = '\0';
}
return ret;
}
/* Lock function */
int dni_i2c_lock_read( mux_info_t * mux_info, dev_info_t * dev_info)
{
int r_data=0;
pthread_mutex_lock(&mutex);
if(mux_info != NULL)
dni_lock_swpld_write_attribute(mux_info->offset, mux_info->channel);
if(dev_info->size == 1)
r_data = onlp_i2c_readb(dev_info->bus, dev_info->addr, dev_info->offset, dev_info->flags);
else
r_data = onlp_i2c_readw(dev_info->bus, dev_info->addr, dev_info->offset, dev_info->flags);
pthread_mutex_unlock(&mutex);
return r_data;
}
int dni_i2c_lock_write( mux_info_t * mux_info, dev_info_t * dev_info)
{
pthread_mutex_lock(&mutex);
if(mux_info != NULL)
dni_lock_swpld_write_attribute(mux_info->offset, mux_info->channel);
/* Write size */
if(dev_info->size == 1)
onlp_i2c_write(dev_info->bus, dev_info->addr, dev_info->offset, 1, &dev_info->data_8, dev_info->flags);
else
onlp_i2c_writew(dev_info->bus, dev_info->addr, dev_info->offset, dev_info->data_16, dev_info->flags);
pthread_mutex_unlock(&mutex);
return 0;
}
int dni_i2c_lock_read_attribute(mux_info_t * mux_info, char * fullpath)
{
int fd, len, nbytes = 10;
char r_data[10] = {0};
pthread_mutex_lock(&mutex);
if(mux_info != NULL)
dni_lock_swpld_write_attribute(mux_info->offset, mux_info->channel);
if ((fd = open(fullpath, O_RDONLY)) == -1)
{
goto ERROR;
}
if ((len = read(fd, r_data, nbytes)) <= 0)
{
goto ERROR;
}
close(fd);
pthread_mutex_unlock(&mutex);
return atoi(r_data);
ERROR:
close(fd);
pthread_mutex_unlock(&mutex);
return -1;
}
int dni_i2c_lock_write_attribute(mux_info_t * mux_info, char * data,char * fullpath)
{
int fd, len, nbytes = 10;
pthread_mutex_lock(&mutex);
if(mux_info!=NULL)
dni_lock_swpld_write_attribute(mux_info->offset, mux_info->channel);
/* Create output file descriptor */
fd = open(fullpath, O_WRONLY, 0644);
if (fd == -1)
{
goto ERROR;
}
len = write (fd, data, (ssize_t) nbytes);
if (len != nbytes)
{
goto ERROR;
}
close(fd);
pthread_mutex_unlock(&mutex);
return 0;
ERROR:
close(fd);
pthread_mutex_unlock(&mutex);
return -1;
}
/* SWPLD modulize in AG9032v1 platform at bus 6 on address 0x31.
Use this function to select address & read the data. */
int dni_lock_swpld_read_attribute(int addr)
{
int fd, len, nbytes = 10,data = 0;
char r_data[10] = {0};
char address[10] = {0};
sprintf(address, "%02x", addr);
pthread_mutex_lock(&mutex1);
/* Create output file descriptor */
fd = open(SWPLD_ADDR_PATH, O_WRONLY, 0644);
if (fd == -1)
{
goto ERROR;
}
len = write (fd, address, 2);
if(len <= 0)
{
goto ERROR;
}
close(fd);
if ((fd = open(SWPLD_DATA_PATH, O_RDONLY,0644)) == -1)
{
goto ERROR;
}
if ((len = read(fd, r_data, nbytes)) <= 0)
{
goto ERROR;
}
sscanf( r_data, "%x", & data);
close(fd);
pthread_mutex_unlock(&mutex1);
return data;
ERROR:
close(fd);
pthread_mutex_unlock(&mutex1);
return -1;
}
/* SWPLD modulize in AG9032v1 platform at bus 6 on address 0x31.
Use this function to select address the & write the data. */
int dni_lock_swpld_write_attribute(int addr, int data)
{
int fd, len;
char address[10] = {0};
sprintf(address, "%02x", addr);
pthread_mutex_lock(&mutex1);
/* Create output file descriptor */
fd = open(SWPLD_ADDR_PATH, O_WRONLY, 0644);
if (fd == -1)
{
goto ERROR;
}
len = write(fd, address, 2);
if(len <= 0)
{
goto ERROR;
}
close(fd);
fd = open(SWPLD_DATA_PATH, O_WRONLY, 0644);
if (fd == -1)
{
goto ERROR;
}
sprintf(address, "%02x", data);
len = write (fd, address, 2);
if(len <= 0)
{
goto ERROR;
}
close(fd);
pthread_mutex_unlock(&mutex1);
return 0;
ERROR:
close(fd);
pthread_mutex_unlock(&mutex1);
return -1;
}

217
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/platform_lib.h Normal file
View File

@@ -0,0 +1,217 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright (C) 2017 Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __PLATFORM_LIB_H__
#define __PLATFORM_LIB_H__
#include "x86_64_delta_ag9032v1_log.h"
/* CPLD numbrt & peripherals */
#define NUM_OF_THERMAL_ON_BOARDS 6
#define NUM_OF_FAN_ON_FAN_BOARD 10
#define NUM_OF_PSU_ON_PSU_BOARD 2
#define NUM_OF_LED_ON_BOARDS 9
#define NUM_OF_CPLD 2
#define CHASSIS_FAN_COUNT 10
#define CHASSIS_THERMAL_COUNT 6
#define PREFIX_PATH "/sys/bus/i2c/devices/"
#define PSU1_AC_PMBUS_PREFIX "/sys/bus/i2c/devices/4-0058/"
#define PSU2_AC_PMBUS_PREFIX "/sys/bus/i2c/devices/4-0058/"
#define SWPLD_ADDR_PATH "/sys/bus/i2c/devices/6-0031/addr"
#define SWPLD_DATA_PATH "/sys/bus/i2c/devices/6-0031/data"
#define FAN_INPUT_PATH "/sys/bus/i2c/devices/3-002c/"
#define FAN1_FRONT "/sys/bus/i2c/devices/3-002c/fan1_input"
#define FAN1_REAR "/sys/bus/i2c/devices/3-002d/fan1_input"
#define FAN2_FRONT "/sys/bus/i2c/devices/3-002c/fan2_input"
#define FAN2_REAR "/sys/bus/i2c/devices/3-002d/fan2_input"
#define FAN3_FRONT "/sys/bus/i2c/devices/3-002c/fan3_input"
#define FAN3_REAR "/sys/bus/i2c/devices/3-002d/fan3_input"
#define FAN4_FRONT "/sys/bus/i2c/devices/3-002c/fan4_input"
#define FAN4_REAR "/sys/bus/i2c/devices/3-002d/fan4_input"
#define FAN5_FRONT "/sys/bus/i2c/devices/3-002c/fan5_input"
#define FAN5_REAR "/sys/bus/i2c/devices/3-002d/fan5_input"
#define IDPROM_PATH "/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-2/2-0053/eeprom"
#define PSU_SELECT_MEMBER_PATH "/sys/bus/i2c/devices/4-0058/psu_select_member"
#define SFP_SELECT_PORT_PATH "/sys/bus/i2c/devices/5-0050/sfp_select_port"
#define SFP_IS_PRESENT_PATH "/sys/bus/i2c/devices/5-0050/sfp_is_present"
#define SFP_IS_PRESENT_ALL_PATH "/sys/bus/i2c/devices/5-0050/sfp_is_present_all"
#define SFP_EEPROM_PATH "/sys/bus/i2c/devices/5-0050/sfp_eeprom"
#define SFP_RESET_PATH "/sys/bus/i2c/devices/5-0050/sfp_reset"
#define SFP_LP_MODE_PATH "/sys/bus/i2c/devices/5-0050/sfp_lp_mode"
#define PSU1_AC_PMBUS_NODE(node) PSU1_AC_PMBUS_PREFIX#node
#define PSU2_AC_PMBUS_NODE(node) PSU2_AC_PMBUS_PREFIX#node
/* BUS define */
#define I2C_BUS_0 (0)
#define I2C_BUS_1 (1)
#define I2C_BUS_2 (2)
#define I2C_BUS_3 (3)
#define I2C_BUS_4 (4)
#define I2C_BUS_5 (5)
#define I2C_BUS_6 (6)
#define I2C_BUS_7 (7)
#define I2C_BUS_8 (8)
#define I2C_BUS_9 (9)
#define PSU1_ID (1)
#define PSU2_ID (2)
#define TURN_OFF (0)
#define TURN_ON (1)
#define ALL_FAN_TRAY_EXIST (5)
#define PSU_STATUS_PRESENT (1)
#define PSU_NODE_MAX_PATH_LEN (64)
#define FAN_SPEED_NORMALLY (5)
#define SPEED_25_PERCENTAGE (25)
#define SPEED_50_PERCENTAGE (50)
#define SPEED_75_PERCENTAGE (75)
#define SPEED_100_PERCENTAGE (100)
#define FAN_ZERO_TACH (960)
/* REG define*/
#define DEFAULT_FLAG (0x00)
#define SWPLD_QSFP28_I2C_MUX_REG (0x20)
#define SWPLD_PSU_FAN_I2C_MUX_REG (0x21)
#define CPUCPLD (0x31)
#define CPUPLD_VERSION_ADDR (0x01)
#define SWPLD (0x31)
#define SWPLD_VERSION_ADDR (0x01)
#define LED_REG (0x1C)
#define CTL_REG (0x0A)
#define PSU_EEPROM (0x50)
#define CLOSE_RESPOND (0xFF)
#define EMC2305_FRONT_FAN (0x2C)
#define EMC2305_REAR_FAN (0x2D)
#define PSU_FAN1 (0x00)
#define PSU_FAN2 (0x20)
#define FAN_DATA_HALF_SPEED (0x0032)
#define FAN_DATA_FULL_SPEED (0x0064)
#define FAN_DATA_STOP_D10_D3 (0xFF)
#define FAN_DATA_STOP_D2_D0 (0xE0)
#define FAN_IO_CTL (0x27)
#define FAN_TRAY_1 (0x51)
#define FAN_TRAY_2 (0x52)
#define FAN_TRAY_3 (0x53)
#define FAN_TRAY_4 (0x54)
#define FAN_TRAY_5 (0x55)
#define FAN_TRAY_LED_REG (0x1D)
#define FAN_TRAY_LED_REG_2 (0x1E)
#define PSU_I2C_SEL_PSU1_EEPROM (0x00)
#define PSU_I2C_SEL_PSU2_EEPROM (0x20)
#define FAN_I2C_SEL_FAN_THERMAL (0x06)
#define SFP_I2C_MUX_REG (0x20)
#define SFP_RESPOND_1 (0x30)
#define SFP_RESPOND_2 (0x31)
#define SFP_RESPOND_3 (0x32)
#define SFP_RESPOND_4 (0x33)
#define SFP_LP_MODE_1 (0x34)
#define SFP_LP_MODE_2 (0x35)
#define SFP_LP_MODE_3 (0x36)
#define SFP_LP_MODE_4 (0x37)
#define SFP_RESET_1 (0x3C)
#define SFP_RESET_2 (0x3D)
#define SFP_RESET_3 (0x3E)
#define SFP_RESET_4 (0x3F)
int dni_i2c_read_attribute_binary(char *filename, char *buffer, int buf_size, int data_len);
int dni_i2c_read_attribute_string(char *filename, char *buffer, int buf_size, int data_len);
typedef struct dev_info_s
{
int bus;
int size;
uint8_t addr;
uint8_t data_8;
uint16_t data_16;
uint8_t offset;
uint32_t flags;
}dev_info_t;
typedef struct mux_info_s
{
uint8_t offset;
uint8_t channel;
char dev_data[10];
uint32_t flags;
}mux_info_t;
pthread_mutex_t mutex;
pthread_mutex_t mutex1;
int dni_i2c_lock_read(mux_info_t * mux_info, dev_info_t * dev_info);
int dni_i2c_lock_write(mux_info_t * mux_info, dev_info_t * dev_info);
int dni_i2c_lock_read_attribute(mux_info_t * mux_info, char * fullpath);
int dni_i2c_lock_write_attribute(mux_info_t * mux_info, char * data,char * fullpath);
int dni_lock_swpld_read_attribute(int addr);
int dni_lock_swpld_write_attribute(int addr, int addr1);
typedef enum
{
THERMAL_RESERVED = 0,
THERMAL_CPU_CORE,
THERMAL_1_ON_CPU_BOARD,
THERMAL_2_ON_FAN_BOARD,
THERMAL_3_ON_SW_BOARD,
THERMAL_4_ON_SW_BOARD,
THERMAL_5_ON_SW_BOARD,
THERMAL_1_ON_PSU1,
THERMAL_1_ON_PSU2,
} onlp_thermal_id;
typedef enum
{
FAN_RESERVED = 0,
FAN_1_ON_FAN_BOARD,
FAN_2_ON_FAN_BOARD,
FAN_3_ON_FAN_BOARD,
FAN_4_ON_FAN_BOARD,
FAN_5_ON_FAN_BOARD,
FAN_6_ON_FAN_BOARD,
FAN_7_ON_FAN_BOARD,
FAN_8_ON_FAN_BOARD,
FAN_9_ON_FAN_BOARD,
FAN_10_ON_FAN_BOARD,
FAN_1_ON_PSU1,
FAN_1_ON_PSU2
} onlp_fan_id;
typedef enum
{
LED_RESERVED = 0,
LED_FRONT_FAN,
LED_FRONT_SYS,
LED_FRONT_PWR1,
LED_FRONT_PWR2,
LED_REAR_FAN_TRAY_1,
LED_REAR_FAN_TRAY_2,
LED_REAR_FAN_TRAY_3,
LED_REAR_FAN_TRAY_4,
LED_REAR_FAN_TRAY_5
}onlp_led_id;
#endif /* __PLATFORM_LIB_H__ */

222
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/psui.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 (C) Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/psui.h>
#include <onlplib/mmap.h>
#include <stdio.h>
#include <string.h>
#include "platform_lib.h"
#include <onlplib/i2c.h>
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
dni_psu_pmbus_info_get(int id, char *node, int *value)
{
int ret = 0;
char node_path[PSU_NODE_MAX_PATH_LEN] = {0};
*value = 0;
switch (id) {
case PSU1_ID:
sprintf(node_path, "%s%s", PSU1_AC_PMBUS_PREFIX, node);
break;
case PSU2_ID:
sprintf(node_path, "%s%s", PSU2_AC_PMBUS_PREFIX, node);
break;
default:
break;
}
/* Read attribute value */
*value = dni_i2c_lock_read_attribute(NULL, node_path);
return ret;
}
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
static int
dni_psu_info_get(onlp_psu_info_t* info)
{
int val = 0;
int index = ONLP_OID_ID_GET(info->hdr.id);
char val_char[16] = {'\0'};
char node_path[PSU_NODE_MAX_PATH_LEN] = {'\0'};
/* Set capability
*/
info->caps |= ONLP_PSU_CAPS_AC;
if (info->status & ONLP_PSU_STATUS_FAILED) {
return ONLP_STATUS_OK;
}
/* Set the associated oid_table
* Set PSU's fan and thermal to child OID
*/
info->hdr.coids[0] = ONLP_FAN_ID_CREATE(index + CHASSIS_FAN_COUNT);
info->hdr.coids[1] = ONLP_THERMAL_ID_CREATE(index + CHASSIS_THERMAL_COUNT);
/* Read PSU module name from attribute */
sprintf(node_path, "%s%s", PSU1_AC_PMBUS_PREFIX, "psu_mfr_model");
dni_i2c_read_attribute_string(node_path, val_char, sizeof(val_char), 0);
strcpy(info->model, val_char);
/* Read PSU serial number from attribute */
sprintf(node_path, "%s%s", PSU1_AC_PMBUS_PREFIX, "psu_mfr_serial");
dni_i2c_read_attribute_string(node_path, val_char, sizeof(val_char), 0);
strcpy(info->serial, val_char);
/* Read voltage, current and power */
if (dni_psu_pmbus_info_get(index, "psu_v_out", &val) == 0) {
info->mvout = val;
info->caps |= ONLP_PSU_CAPS_VOUT;
}
if (dni_psu_pmbus_info_get(index, "psu_v_in", &val) == 0) {
info->mvin = val;
info->caps |= ONLP_PSU_CAPS_VIN;
}
if (dni_psu_pmbus_info_get(index, "psu_i_out", &val) == 0) {
info->miout = val;
info->caps |= ONLP_PSU_CAPS_IOUT;
}
if (dni_psu_pmbus_info_get(index, "psu_i_in", &val) == 0) {
info->miin = val;
info->caps |= ONLP_PSU_CAPS_IIN;
}
if (dni_psu_pmbus_info_get(index, "psu_p_out", &val) == 0) {
info->mpout = val;
info->caps |= ONLP_PSU_CAPS_POUT;
}
if (dni_psu_pmbus_info_get(index, "psu_p_in", &val) == 0) {
info->mpin = val;
info->caps |= ONLP_PSU_CAPS_PIN;
}
return ONLP_STATUS_OK;
}
/*
* Get all information about the given PSU oid.
*/
static onlp_psu_info_t pinfo[] =
{
{ }, /* Not used */
{
{ ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 },
},
{
{ ONLP_PSU_ID_CREATE(PSU2_ID), "PSU-2", 0 },
}
};
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int val = 0;
int ret = ONLP_STATUS_OK;
int index = ONLP_OID_ID_GET(id);
uint8_t channel;
char channel_data[2] = {'\0'};
mux_info_t mux_info;
dev_info_t dev_info;
VALIDATE(id);
/* Set the onlp_oid_hdr_t */
memset(info, 0, sizeof(onlp_psu_info_t));
*info = pinfo[index];
switch (index) {
case PSU1_ID:
channel = PSU_I2C_SEL_PSU1_EEPROM;
break;
case PSU2_ID:
channel = PSU_I2C_SEL_PSU2_EEPROM;
break;
default:
break;
}
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_4;
dev_info.addr = PSU_EEPROM;
dev_info.offset = 0x00; /* In EEPROM address 0x00 */
dev_info.flags = DEFAULT_FLAG;
/* Check PSU is PRESENT or not
* Read PSU EEPROM 1 byte from adress 0x00
* if not present, return Negative value.
*/
if(dni_i2c_lock_read(&mux_info, &dev_info) < 0)
{
/* Unable to read PSU(%d) node(psu_present) */
return ONLP_STATUS_OK;
} else {
info->status |= ONLP_PSU_STATUS_PRESENT;
}
/* Select PSU member */
sprintf(channel_data, "%x", channel);
dni_i2c_lock_write_attribute(NULL, channel_data, PSU_SELECT_MEMBER_PATH);
/* Check PSU have voltage input or not */
dni_psu_pmbus_info_get(index, "psu_v_in", &val);
if (val == 0) {
/* Unable to read PSU(%d) node(psu_power_good) */
info->status |= ONLP_PSU_STATUS_UNPLUGGED;
return ONLP_STATUS_OK;
}
ret = dni_psu_info_get(info);
return ret;
}
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

559
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/sfpi.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 (C) Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <fcntl.h> /* For O_RDWR && open */
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <math.h>
#include <onlplib/i2c.h>
#include "platform_lib.h"
static inline int ag9032v1_sfp_get_lp_mode_reg(int port) {
uint8_t reg_offset = 0x00;
if (port < 8) /* port 0-7 */
reg_offset = SFP_LP_MODE_1;
else if (port > 7 && port < 16) /* port 8-15 */
reg_offset = SFP_LP_MODE_2;
else if (port > 15 && port < 24) /* port 16-23 */
reg_offset = SFP_LP_MODE_3;
else if (port > 23 && port < 32) /* port 24-31 */
reg_offset = SFP_LP_MODE_4;
return reg_offset;
}
static inline int ag9032v1_sfp_get_reset_reg(int port) {
uint8_t reg_offset = 0x00;
if (port < 8) /* port 0-7 */
reg_offset = SFP_RESET_1;
else if (port > 7 && port < 16) /* port 8-15 */
reg_offset = SFP_RESET_2;
else if (port > 15 && port < 24) /* port 16-23 */
reg_offset = SFP_RESET_3;
else if (port > 23 && port < 32) /* port 24-31 */
reg_offset = SFP_RESET_4;
return reg_offset;
}
static inline int ag9032v1_sfp_get_respond_reg(int port) {
uint8_t reg_offset = 0x00;
if (port < 8) /* port 0-7 */
reg_offset = SFP_RESPOND_1;
else if (port > 7 && port < 16) /* port 8-15 */
reg_offset = SFP_RESPOND_2;
else if (port > 15 && port < 24) /* port 16-23 */
reg_offset = SFP_RESPOND_3;
else if (port > 23 && port < 32) /* port 24-31 */
reg_offset = SFP_RESPOND_4;
return reg_offset;
}
static inline int ag9032v1_sfp_get_mux_reg(int port) {
uint8_t sel_channel = 0x00;
if (port >= 0 && port < 9)
sel_channel = port + 1; /* 0x01 - 0x09 */
else if (port >= 9 && port < 19)
sel_channel = port + 7; /* 0x10 - 0x19 */
else if (port >= 19 && port < 29)
sel_channel = port + 13; /* 0x20 - 0x29 */
else if (port >= 29 && port < 32)
sel_channel = port + 19; /* 0x30 - 0x32 */
else
AIM_LOG_ERROR("qsfp port range is 0-31");
return sel_channel;
}
/************************************************************
*
* SFPI Entry Points
*
***********************************************************/
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
return ONLP_STATUS_OK;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
/*
* Ports {0, 32}
*/
int p;
AIM_BITMAP_CLR_ALL(bmap);
for(p = 0; p < 32; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_is_present(int port)
{
char port_data[2] = {'\0'};
uint8_t present = 0;
uint8_t present_bit = 0;
/* Select QSFP port */
sprintf(port_data, "%d", port + 1);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH);
/* Read QSFP MODULE is present or not */
present_bit = dni_i2c_lock_read_attribute(NULL, SFP_IS_PRESENT_PATH);
/* From sfp_is_present value,
* return 0 = The module is preset
* return 1 = The module is NOT present
*/
if(present_bit == 0) {
present = 1;
} else if (present_bit == 1) {
present = 0;
AIM_LOG_ERROR("Unble to present status from port(%d)\r\n", port);
} else {
/* Port range over 0-31, return -1 */
AIM_LOG_ERROR("Error to present status from port(%d)\r\n", port);
present = -1;
}
return present;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
char present_all_data[12] = {'\0'};
char *r_byte;
char *r_array[4];
uint8_t bytes[4];
int count = 0;
/* Read presence bitmap from SWPLD QSFP28 Presence Register
* if only port 0 is present, return 7F FF FF FF
* if only port 0 and 1 present, return 3F FF FF FF
*/
if(dni_i2c_read_attribute_string(SFP_IS_PRESENT_ALL_PATH, present_all_data,
sizeof(present_all_data), 0) < 0) {
return -1;
}
/* String split */
r_byte = strtok(present_all_data, " ");
while (r_byte != NULL) {
r_array[count++] = r_byte;
r_byte = strtok(NULL, " ");
}
/* Convert a string to long integer
* and saved into bytes[]
*/
for (count = 0; count < 4; count++) {
bytes[count] = ~strtol(r_array[count], NULL, 16);
}
/* Convert to 64 bit integer in port order */
int i = 0;
int j = 31;
uint32_t presence_all = 0 ;
for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
presence_all <<= 8;
presence_all |= bytes[i];
}
/* Populate bitmap & remap*/
for(i = 0; presence_all; i++)
{
if(23 < j)
AIM_BITMAP_MOD(dst, j - 24,(presence_all & 1));
else if(15 < j && j < 24)
AIM_BITMAP_MOD(dst, j - 8,(presence_all & 1));
else if(7 < j && j < 16)
AIM_BITMAP_MOD(dst, j + 8,(presence_all & 1));
else
AIM_BITMAP_MOD(dst, j + 24,(presence_all & 1));
presence_all >>= 1;
j--;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
uint8_t sfp_response_reg = 0x00;
uint8_t backup_response_data = 0x00;
char port_data[2] = {'\0'};
/* Get port respond register offset */
sfp_response_reg = ag9032v1_sfp_get_respond_reg(port);
/* Select qsfp port to response mode */
backup_response_data = dni_lock_swpld_read_attribute(sfp_response_reg);
backup_response_data &= ~(1 << (7 - (port % 8)));
dni_lock_swpld_write_attribute(sfp_response_reg, backup_response_data);
/* Select QSFP port */
sprintf(port_data, "%d", port + 1);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH);
memset(data, 0, 256);
/* Read qsfp eeprom information into data[] */
if (dni_i2c_read_attribute_binary(SFP_EEPROM_PATH,
(char *)data, 256, 256) != 0) {
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int onlp_sfpi_port_map(int port, int* rport)
{
*rport = port;
return ONLP_STATUS_OK;
}
int onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
{
uint8_t sfp_response_reg = 0x00;
uint8_t port_sel_channel = 0x00;
uint8_t backup_response_data = 0x00;
uint8_t channel = 0x00;
mux_info_t mux_info;
dev_info_t dev_info;
/* int port : be used in SWPLD qsfp module respond register offset,
* input value port range is 0-31.
* uint8_t port_sel_channel : be used in SWPLD qsfp i2c mux register offset
*/
/* Get port respond register offset */
sfp_response_reg = ag9032v1_sfp_get_respond_reg(port);
/* Get port mux register channel */
port_sel_channel = ag9032v1_sfp_get_mux_reg(port);
/* Select qsfp port to response mode */
backup_response_data = dni_lock_swpld_read_attribute(sfp_response_reg);
backup_response_data &= ~(1 << (7 - (port % 8)));
dni_lock_swpld_write_attribute(sfp_response_reg, backup_response_data);
channel = port_sel_channel;
mux_info.offset = SFP_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = ONLP_I2C_F_FORCE;
dev_info.bus = I2C_BUS_5;
dev_info.addr = devaddr;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
return dni_i2c_lock_read(&mux_info, &dev_info);
}
int onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
{
uint8_t sfp_response_reg = 0x00;
uint8_t port_sel_channel = 0x00;
uint8_t backup_response_data = 0x00;
uint8_t channel = 0x00;
mux_info_t mux_info;
dev_info_t dev_info;
/* int port : be used in SWPLD qsfp module respond register offset,
* input value port range is 0-31.
* uint8_t port_sel_channel : be used in SWPLD qsfp i2c mux register offset
*/
/* Get port respond register offset */
sfp_response_reg = ag9032v1_sfp_get_respond_reg(port);
/* Get port mux register channel */
port_sel_channel = ag9032v1_sfp_get_mux_reg(port);
/* Select qsfp port to response mode */
backup_response_data = dni_lock_swpld_read_attribute(sfp_response_reg);
backup_response_data &= ~(1 << (7 - (port % 8)));
dni_lock_swpld_write_attribute(sfp_response_reg, backup_response_data);
channel = port_sel_channel;
mux_info.offset = SFP_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = ONLP_I2C_F_FORCE;
dev_info.bus = I2C_BUS_5;
dev_info.addr = devaddr;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 1; /* Write 1 byte */
dev_info.data_8 = value;
return dni_i2c_lock_write(&mux_info, &dev_info);
}
int onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
{
uint8_t sfp_response_reg = 0x00;
uint8_t port_sel_channel = 0x00;
uint8_t backup_response_data = 0x00;
uint8_t channel = 0x00;
mux_info_t mux_info;
dev_info_t dev_info;
/* int port : be used in SWPLD qsfp module respond register offset,
* input value port range is 0-31.
* uint8_t port_sel_channel : be used in SWPLD qsfp i2c mux register offset
*/
/* Get port respond register offset */
sfp_response_reg = ag9032v1_sfp_get_respond_reg(port);
/* Get port mux register channel */
port_sel_channel = ag9032v1_sfp_get_mux_reg(port);
/* Select qsfp port to response mode */
backup_response_data = dni_lock_swpld_read_attribute(sfp_response_reg);
backup_response_data &= ~(1 << (7 - (port % 8)));
dni_lock_swpld_write_attribute(sfp_response_reg, backup_response_data);
channel = port_sel_channel;
mux_info.offset = SFP_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = ONLP_I2C_F_FORCE;
dev_info.bus = I2C_BUS_5;
dev_info.addr = devaddr;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 2; /* Read two bytes */
return dni_i2c_lock_read(&mux_info, &dev_info);
}
int onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
{
uint8_t sfp_response_reg = 0x00;
uint8_t port_sel_channel = 0x00;
uint8_t backup_response_data = 0x00;
uint8_t channel = 0x00;
mux_info_t mux_info;
dev_info_t dev_info;
/* int port : be used in SWPLD qsfp module respond register offset,
* input value port range is 0-31.
* uint8_t port_sel_channel : be used in SWPLD qsfp i2c mux register offset
*/
/* Get port respond register offset */
sfp_response_reg = ag9032v1_sfp_get_respond_reg(port);
/* Get port mux register channel */
port_sel_channel = ag9032v1_sfp_get_mux_reg(port);
/* Select qsfp port to response mode */
backup_response_data = dni_lock_swpld_read_attribute(sfp_response_reg);
backup_response_data &= ~(1 << (7 - (port % 8)));
dni_lock_swpld_write_attribute(sfp_response_reg, backup_response_data);
channel = port_sel_channel;
mux_info.offset = SFP_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = ONLP_I2C_F_FORCE;
dev_info.bus = I2C_BUS_5;
dev_info.addr = devaddr;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 2; /* Write two bytes */
dev_info.data_16 = value;
return dni_i2c_lock_write(&mux_info, &dev_info);
}
int
onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* rv)
{
char port_data[2] = {'\0'};
/* Select QSFP port */
sprintf(port_data, "%d", port + 1);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH);
switch (control) {
case ONLP_SFP_CONTROL_RESET_STATE:
*rv = 1;
break;
case ONLP_SFP_CONTROL_RX_LOS:
*rv = 0;
break;
case ONLP_SFP_CONTROL_TX_DISABLE:
*rv = 0;
break;
case ONLP_SFP_CONTROL_LP_MODE:
*rv = 1;
break;
default:
return ONLP_STATUS_OK;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
uint8_t value_t = 0;
char port_data[2] = {'\0'};
/* Select QSFP port */
sprintf(port_data, "%d", port + 1);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH);
switch (control) {
case ONLP_SFP_CONTROL_RESET_STATE:
sprintf(port_data, "%d", value);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_RESET_PATH);
value_t = ONLP_STATUS_OK;
break;
case ONLP_SFP_CONTROL_RX_LOS:
value_t = ONLP_STATUS_OK;
break;
case ONLP_SFP_CONTROL_TX_DISABLE:
value_t = ONLP_STATUS_OK;
break;
case ONLP_SFP_CONTROL_LP_MODE:
sprintf(port_data, "%d", value);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_LP_MODE_PATH);
value_t = ONLP_STATUS_OK;
break;
default:
value_t = ONLP_STATUS_E_UNSUPPORTED;
break;
}
return value_t;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
uint8_t value_t = 0;
char port_data[2] = {'\0'};
/* Select QSFP port */
sprintf(port_data, "%d", port + 1);
dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH);
switch (control) {
case ONLP_SFP_CONTROL_RESET_STATE:
*value = dni_i2c_lock_read_attribute(NULL, SFP_RESET_PATH);
/* From sfp_reset value,
* return 0 = The module is in Reset
* return 1 = The module is NOT in Reset
*/
if (*value == 0)
*value = 1;
else if (*value == 1)
*value = 0;
value_t = ONLP_STATUS_OK;
break;
case ONLP_SFP_CONTROL_RX_LOS:
*value = 0;
value_t = ONLP_STATUS_OK;
break;
case ONLP_SFP_CONTROL_TX_DISABLE:
*value = 0;
value_t = ONLP_STATUS_OK;
break;
case ONLP_SFP_CONTROL_LP_MODE:
/* From sfp_lp_mode value,
* return 0 = The module is NOT in LP mode
* return 1 = The moduel is in LP mode
*/
*value = dni_i2c_lock_read_attribute(NULL, SFP_LP_MODE_PATH);
value_t = ONLP_STATUS_OK;
break;
default:
value_t = ONLP_STATUS_E_UNSUPPORTED;
break;
}
return value_t;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_post_insert(int port, sff_info_t* info)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
void
onlp_sfpi_debug(int port, aim_pvs_t* pvs)
{
}
int
onlp_sfpi_ioctl(int port, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

268
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 (C) Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <unistd.h>
#include <fcntl.h>
#include <onlplib/file.h>
#include <onlplib/i2c.h>
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlp/platformi/psui.h>
#include "x86_64_delta_ag9032v1_int.h"
#include "x86_64_delta_ag9032v1_log.h"
#include "platform_lib.h"
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-delta-ag9032v1-r0";
}
int
onlp_sysi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
uint8_t* rdata = aim_zmalloc(256);
if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
if(*size == 256) {
*data = rdata;
return ONLP_STATUS_OK;
}
}
aim_free(rdata);
*size = 0;
return ONLP_STATUS_E_UNSUPPORTED;
}
void
onlp_sysi_onie_data_free(uint8_t* data)
{
aim_free(data);
}
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
int cpld_version = 0;
int swpld_version = 0;
cpld_version = onlp_i2c_readb(I2C_BUS_2, CPUCPLD, CPUPLD_VERSION_ADDR, DEFAULT_FLAG);
swpld_version = dni_lock_swpld_read_attribute(SWPLD_VERSION_ADDR);
pi->cpld_versions = aim_fstrdup("%d , SWPLD_Versions: %d", cpld_version, swpld_version);
return ONLP_STATUS_OK;
}
void
onlp_sysi_platform_info_free(onlp_platform_info_t* pi)
{
aim_free(pi->cpld_versions);
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
int i;
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/* 6 Thermal sensors on the chassis */
for (i = 1; i <= NUM_OF_THERMAL_ON_BOARDS; i++)
{
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* 9 LEDs on the chassis */
for (i = 1; i <= NUM_OF_LED_ON_BOARDS; i++)
{
*e++ = ONLP_LED_ID_CREATE(i);
}
/* 10 Fans on the chassis */
for (i = 1; i <= NUM_OF_FAN_ON_FAN_BOARD; i++)
{
*e++ = ONLP_FAN_ID_CREATE(i);
}
/* 2 PSUs on the chassis */
for (i = 1; i <= NUM_OF_PSU_ON_PSU_BOARD; i++)
{
*e++ = ONLP_PSU_ID_CREATE(i);
}
return 0;
}
int
onlp_sysi_platform_manage_fans(void)
{
int i = 0;
int highest_temp = 0;
onlp_thermal_info_t thermal[8];
int new_duty_percentage;
/* Get current temperature
*/
if (onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), &thermal[0]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_CPU_BOARD), &thermal[1]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_FAN_BOARD), &thermal[2]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_SW_BOARD), &thermal[3]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_SW_BOARD), &thermal[4]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_SW_BOARD), &thermal[5]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU1), &thermal[6]) != ONLP_STATUS_OK ||
onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU2), &thermal[7]) != ONLP_STATUS_OK )
{
AIM_LOG_ERROR("Unable to read thermal status");
return ONLP_STATUS_E_INTERNAL;
}
for (i = 0; i < 8; i++)
{
if (thermal[i].mcelsius > highest_temp)
{
highest_temp = thermal[i].mcelsius;
}
}
highest_temp = highest_temp/1000;
if (highest_temp > 0 && highest_temp <= 30)
{
new_duty_percentage = SPEED_25_PERCENTAGE;
}
else if (highest_temp > 30 && highest_temp <= 40)
{
new_duty_percentage = SPEED_50_PERCENTAGE;
}
else if (highest_temp > 40 && highest_temp <= 50)
{
new_duty_percentage = SPEED_75_PERCENTAGE;
}
else
{
new_duty_percentage = SPEED_100_PERCENTAGE;
}
/* Set speed on fan 1-10*/
for(i = 1 ; i <= 10; i++)
{
onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(i), new_duty_percentage);
}
/*Set fans' speed of PSU 1, 2
*/
if(highest_temp >= 0 && highest_temp <= 55)
{
new_duty_percentage = SPEED_50_PERCENTAGE;
}
else if(highest_temp > 55)
{
new_duty_percentage = SPEED_100_PERCENTAGE;
}
else
{
new_duty_percentage = SPEED_100_PERCENTAGE;
AIM_LOG_ERROR("Unable to get thermal temperature");
}
onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(FAN_1_ON_PSU1) , new_duty_percentage);
onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(FAN_1_ON_PSU2) , new_duty_percentage);
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_leds(void)
{
/* Set front lights: fan, power supply 1, 2
*/
uint8_t addr, present_bit = 0x00, bit = 0x00;
addr = dni_lock_swpld_read_attribute(LED_REG);
/* Turn the fan led on or off */
if((addr & 0x3) == 0 || (addr & 0x3) == 0x3 )
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_FRONT_FAN), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_FRONT_FAN), TURN_ON);
/* Set front light of PSU 1 */
addr = dni_lock_swpld_read_attribute(LED_REG);
if((addr & 0xC0) == 0 || (addr & 0xC0) == 0xC0 )
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_FRONT_PWR1), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_FRONT_PWR1), TURN_ON);
/* Set front light of PSU 2 */
addr = dni_lock_swpld_read_attribute(LED_REG);
if((addr & 0x30) == 0 || (addr & 0x30) == 0x30 )
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_FRONT_PWR2), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_FRONT_PWR2), TURN_ON);
/* Rear light fan tray 1-5 */
dev_info_t dev_info;
dev_info.bus = I2C_BUS_3;
dev_info.addr = FAN_IO_CTL;
dev_info.offset = 0x00;
dev_info.flags = DEFAULT_FLAG;
mux_info_t mux_info;
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.flags = DEFAULT_FLAG;
mux_info.channel = 0x07;
/* Turn on or off the fan trays' leds */
present_bit = dni_i2c_lock_read(&mux_info, &dev_info);
if((present_bit & ((bit+1)<<4)) == 0)
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_1), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_1), TURN_ON);
if((present_bit & ((bit+1)<<3)) == 0)
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_2), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_2), TURN_ON);
if((present_bit & ((bit+1)<<2)) == 0)
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_3), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_3), TURN_ON);
if((present_bit & ((bit+1)<<1)) == 0)
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_4), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_4), TURN_ON);
if((present_bit & ((bit+1)<<0)) == 0)
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_5), TURN_OFF);
else
onlp_ledi_set(ONLP_LED_ID_CREATE(LED_REAR_FAN_TRAY_5), TURN_ON);
return ONLP_STATUS_OK;
}

173
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/thermali.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 (C) Delta Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Thermal Sensor Platform Implementation.
*
***********************************************************/
#include <unistd.h>
#include <onlplib/mmap.h>
#include <onlplib/file.h>
#include <onlp/platformi/thermali.h>
#include <fcntl.h>
#include "platform_lib.h"
#include <onlplib/i2c.h>
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static char* last_path[] = /* must map with onlp_thermal_id */
{
"reserved",
NULL, /* CPU Core */
"i2c-2/2-004d/hwmon/hwmon4/temp1_input",
"i2c-3/3-004f/hwmon/hwmon8/temp1_input",
"i2c-7/7-004c/hwmon/hwmon5/temp1_input",
"i2c-7/7-004d/hwmon/hwmon6/temp1_input",
"i2c-7/7-004e/hwmon/hwmon7/temp1_input",
"4-0058/psu_temp1_input",
"4-0058/psu_temp1_input",
};
static char* cpu_coretemp_files[] =
{
"/sys/devices/platform/coretemp.0/hwmon/hwmon0/temp2_input",
"/sys/devices/platform/coretemp.0/hwmon/hwmon0/temp3_input",
"/sys/devices/platform/coretemp.0/hwmon/hwmon0/temp4_input",
"/sys/devices/platform/coretemp.0/hwmon/hwmon0/temp5_input",
NULL,
};
/* Static values */
static onlp_thermal_info_t linfo[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_CPU_BOARD), "CPU below side thermal sensor (U57, Below of CPU)", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_FAN_BOARD), "Wind thermal sensor (U334, Near FAN)", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_SW_BOARD), "MAC up side thermal sersor (U38, up side of MAC)", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_SW_BOARD), "MAC down side thermal sensor (U40, down side of MAC)", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_SW_BOARD), "Surroundings thermal sensor (U240, Near front panel)", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU1), "PSU-1 Thermal Sensor 1", ONLP_PSU_ID_CREATE(PSU1_ID)},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU2), "PSU-2 Thermal Sensor 1", ONLP_PSU_ID_CREATE(PSU2_ID)},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
}
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int temp_base = 1;
uint8_t local_id = 0;
int r_data = 0;
char fullpath[50] = {0};
char channel_data[2] = {'\0'};
uint8_t channel;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[local_id];
if(local_id == THERMAL_CPU_CORE) {
int rv = onlp_file_read_int_max(&info->mcelsius, cpu_coretemp_files);
return rv;
}
switch (local_id) {
case THERMAL_2_ON_FAN_BOARD:
channel = FAN_I2C_SEL_FAN_THERMAL;
break;
case THERMAL_1_ON_PSU1:
channel = PSU_I2C_SEL_PSU1_EEPROM;
/* Select PSU member */
sprintf(channel_data, "%x", channel);
dni_i2c_lock_write_attribute(NULL, channel_data, PSU_SELECT_MEMBER_PATH);
break;
case THERMAL_1_ON_PSU2:
channel = PSU_I2C_SEL_PSU2_EEPROM;
/* Select PSU member */
sprintf(channel_data, "%x", channel);
dni_i2c_lock_write_attribute(NULL, channel_data, PSU_SELECT_MEMBER_PATH);
break;
default:
channel = 0x00; /* DEFAULT */
break;
}
mux_info_t mux_info;
mux_info.offset = SWPLD_PSU_FAN_I2C_MUX_REG;
mux_info.channel = channel;
mux_info.flags = DEFAULT_FLAG;
sprintf(fullpath, "%s%s", PREFIX_PATH, last_path[local_id]);
r_data = dni_i2c_lock_read_attribute(&mux_info, fullpath);
/* Current temperature in milli-celsius */
info->mcelsius = r_data / temp_base;
return ONLP_STATUS_OK;
}

81
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_config.c Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
/* <auto.start.cdefs(X86_64_DELTA_AG9032V1_CONFIG_HEADER).source> */
#define __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(_x) __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(_x)
x86_64_delta_ag9032v1_config_settings_t x86_64_delta_ag9032v1_config_settings[] =
{
#ifdef X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_LOGGING(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_PORTING_STDLIB(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
{ __x86_64_delta_ag9032v1_config_STRINGIFY_NAME(X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE(X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) },
#else
{ X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_delta_ag9032v1_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_delta_ag9032v1_config_STRINGIFY_VALUE
#undef __x86_64_delta_ag9032v1_config_STRINGIFY_NAME
const char*
x86_64_delta_ag9032v1_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_delta_ag9032v1_config_settings[i].name; i++) {
if(strcmp(x86_64_delta_ag9032v1_config_settings[i].name, setting)) {
return x86_64_delta_ag9032v1_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_delta_ag9032v1_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_delta_ag9032v1_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_delta_ag9032v1_config_settings[i].name, x86_64_delta_ag9032v1_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_DELTA_AG9032V1_CONFIG_HEADER).source> */

10
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_enums.c Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

12
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_int.h Normal file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
* x86_64_delta_ag9032v1 Internal Header
*
*****************************************************************************/
#ifndef __x86_64_delta_ag9032v1_INT_H__
#define __x86_64_delta_ag9032v1_INT_H__
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
#endif /* __x86_64_delta_ag9032v1_INT_H__ */

18
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_log.c Normal file
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@@ -0,0 +1,18 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
#include "x86_64_delta_ag9032v1_log.h"
/*
* x86_64_delta_ag9032v1 log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_DELTA_AG9032V1_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_DELTA_AG9032V1_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_DELTA_AG9032V1_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_log.h Normal file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __x86_64_delta_ag9032v1_LOG_H__
#define __x86_64_delta_ag9032v1_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_delta_ag9032v1
#include <AIM/aim_log.h>
#endif /* __x86_64_delta_ag9032v1_LOG_H__ */

24
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_module.c Normal file
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@@ -0,0 +1,24 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
#include "x86_64_delta_ag9032v1_log.h"
static int
datatypes_init__(void)
{
#define x86_64_delta_ag9032v1_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1.x>
return 0;
}
void __x86_64_delta_ag9032v1_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

50
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/onlp/builds/src/module/src/x86_64_delta_ag9032v1_ucli.c Normal file
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@@ -0,0 +1,50 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_delta_ag9032v1/x86_64_delta_ag9032v1_config.h>
#if X86_64_DELTA_AG9032V1_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_delta_ag9032v1_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_delta_ag9032v1)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_delta_ag9032v1_ucli_module__ =
{
"x86_64_delta_ag9032v1_ucli",
NULL,
x86_64_delta_ag9032v1_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_delta_ag9032v1_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_delta_ag9032v1_ucli_module__);
n = ucli_node_create("x86_64_delta_ag9032v1", NULL, &x86_64_delta_ag9032v1_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_delta_ag9032v1"));
return n;
}
#else
void*
x86_64_delta_ag9032v1_ucli_node_create(void)
{
return NULL;
}
#endif

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/platform-config/Makefile Normal file
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include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/platform-config/r0/Makefile Normal file
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include $(ONL)/make/pkg.mk

1
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/platform-config/r0/PKG.yml Normal file
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!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=delta BASENAME=x86-64-delta-ag9032v1 REVISION=r0

30
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/platform-config/r0/src/lib/x86-64-delta-ag9032v1-r0.yml Normal file
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@@ -0,0 +1,30 @@
---
######################################################################
#
# platform-config for AG9032V1
#
######################################################################
x86-64-delta-ag9032v1-r0:
grub:
serial: >-
--port=0x3f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-3-16
args: >-
nopat
console=ttyS0,115200n8
##network
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:14.0

53
packages/platforms/delta/x86-64/x86-64-delta-ag9032v1/platform-config/r0/src/python/x86_64_delta_ag9032v1_r0/__init__.py Normal file
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from onl.platform.base import *
from onl.platform.delta import *
class OnlPlatform_x86_64_delta_ag9032v1_r0(OnlPlatformDelta,
OnlPlatformPortConfig_32x100):
PLATFORM='x86-64-delta-ag9032v1-r0'
MODEL="AG9032V1"
SYS_OBJECT_ID=".9032"
def baseconfig(self):
#PCA9547 modulize
self.new_i2c_device('pca9547', 0x71, 1)
#Insert swpld module on 0x31
self.insmod('i2c_cpld')
self.new_i2c_device('cpld', 0x31, 6)
#IDEEPROM modulize
self.new_i2c_device('24c02', 0x53, 2)
#Insert psu module
self.insmod('dni_ag9032v1_psu')
self.new_i2c_device('dni_ag9032v1_psu', 0x58, 4)
#insert fan module
self.insmod('dni_emc2305')
#Need to set 0x05 on bus 6 swpld 0x31 addr 0x21 to show Fan control on bus 3
os.system("echo 0x21 > /sys/bus/i2c/devices/6-0031/addr")
os.system("echo 0x05 > /sys/bus/i2c/devices/6-0031/data")
self.new_i2c_device('emc2305', 0x2c, 3)
self.new_i2c_device('emc2305', 0x2d, 3)
#Insert temperature modules on bus 2 0x4d, bus 7 0x4c, 0x4d, 0x4e & bus 3 0x4f
self.new_i2c_device('tmp75', 0x4d, 2)
self.new_i2c_device('tmp75', 0x4c, 7)
self.new_i2c_device('tmp75', 0x4d, 7)
self.new_i2c_device('tmp75', 0x4e, 7)
#Need to set 0x06 on bus 6 swpld 0x31 addr 0x21 to show device on bus 3
os.system("echo 0x06 > /sys/bus/i2c/devices/6-0031/data")
self.new_i2c_device('tmp75', 0x4f, 3)
#Insert sfp module
self.insmod('dni_ag9032v1_sfp')
self.new_i2c_device('dni_ag9032v1_sfp', 0x50, 5)
#set front panel sys light "GREEN"
os.system("echo 0x1C > /sys/bus/i2c/devices/6-0031/addr")
os.system("echo 0x04 > /sys/bus/i2c/devices/6-0031/data")
return True