mirror of
https://github.com/Telecominfraproject/OpenNetworkLinux.git
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Add Support for QuantaMesh T7032-IX1B:
1. Port IX1B platform driver 2. Add IX1B enum at qci_pmbus.c 3. Port IX1B ONLP: board info 4. Port IX1B ONLP: psu 5. Port IX1B ONLP: sfp 6. Port IX1B ONLP: led 7. Print "ONLP is not supported for FAN/THERMAL" 8. Set SYS_OBJECT_ID as ".7032.3102"
This commit is contained in:
Jonathan Tsai
@@ -28,7 +28,7 @@
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#include <../drivers/hwmon/pmbus/pmbus.h>
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#include <linux/delay.h>
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enum projects { ly8, ix1, ix2, ix1a };
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enum projects { ly8, ix1, ix2, ix1b };
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#define DELAY_TIME 1000 /* uS */
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@@ -196,6 +196,7 @@ static const struct i2c_device_id qci_pmbus_id[] = {
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{"qci_pmbus_ly8", ly8},
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{"qci_pmbus_ix1", ix1},
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{"qci_pmbus_ix2", ix2},
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{"qci_pmbus_ix1b", ix1b},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, qci_pmbus_id);
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@@ -414,6 +415,7 @@ static int qci_pmbus_probe(struct i2c_client *client,
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break;
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case ix1:
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case ix2:
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case ix1b:
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info->pages = 1;
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info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN
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| PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
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2
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/.gitignore
vendored
Executable file
2
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/.gitignore
vendored
Executable file
@@ -0,0 +1,2 @@
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*x86*64*quanta*ix1b*rglbmc.mk
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onlpdump.mk
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1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/Makefile
Executable file
1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/Makefile
Executable file
@@ -0,0 +1 @@
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include $(ONL)/make/pkg.mk
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@@ -0,0 +1 @@
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include $(ONL)/make/pkg.mk
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@@ -0,0 +1 @@
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!include $ONL_TEMPLATES/platform-modules.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ix1b-rglbmc KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"
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1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/modules/builds/.gitignore
vendored
Executable file
1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/modules/builds/.gitignore
vendored
Executable file
@@ -0,0 +1 @@
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lib
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@@ -0,0 +1,6 @@
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KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64
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KMODULES := $(wildcard *.c)
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VENDOR := quanta
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BASENAME := x86-64-quanta-ix1b-rglbmc
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ARCH := x86_64
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include $(ONL)/make/kmodule.mk
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@@ -0,0 +1,326 @@
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/*
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* Quanta Switch platform driver
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*
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*
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* Copyright (C) 2017 Quanta Computer inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/platform_data/pca953x.h>
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#include <linux/i2c/pca954x.h>
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#include <linux/gpio.h>
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#include <linux/i2c-mux-gpio.h>
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#include <linux/platform_device.h>
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#include <linux/dmi.h>
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#define DRIVER_NAME "quanta-platform-ix1b"
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#define MAX_I2C_CLIENTS 512
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#define I2C_GPIO_BASE 0x80
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#define XSTR(x) STR(X)
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#define STR(x) #x
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enum i2c_types {
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i2c_type_spd,
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i2c_type_rtc,
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i2c_type_pca9546,
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i2c_type_pca9548,
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i2c_type_pca9554,
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i2c_type_pca9555,
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i2c_type_pca9698,
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i2c_type_qci_cpld,
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i2c_type_24c02,
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i2c_type_qci_pmbus_ix1b,
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};
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char *i2c_type_names[] = {
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"spd",
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"ds1339",
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"pca9546",
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"pca9548",
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"pca9554",
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"pca9555",
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"pca9698",
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"CPLD-QSFP28",
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"24c02",
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"qci_pmbus_ix1b",
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};
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struct i2c_init_data {
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int parent_bus;
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int type;
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int addr;
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int busno;
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int gpio_base;
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char name[I2C_NAME_SIZE];
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};
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static struct i2c_init_data quanta_ix1b_i2c_init_data[] = {
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{ .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x71, .busno = 0x02, .name = "PCA9546(CPU)\0" },
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{ .parent_bus = (0x02 + 0), .type = i2c_type_pca9555, .addr = 0x20, .gpio_base = 0x40, .name = "PCA9555_1(CPU)\0" },
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{ .parent_bus = (0x00 + 0), .type = i2c_type_spd, .addr = 0x52, .name = "SPD(DDR3-SODIMM0)\0" },
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{ .parent_bus = (0x00 + 0), .type = i2c_type_spd, .addr = 0x53, .name = "SPD(DDR3-SODIMM1)\0" },
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{ .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x77, .busno = 0x10, .name = "PCA9546_1\0" },
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{ .parent_bus = (0x10 + 0), .type = i2c_type_pca9548, .addr = 0x73, .busno = 0x20, .name = "PCA9548_1\0" },
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{ .parent_bus = (0x10 + 0), .type = i2c_type_pca9548, .addr = 0x74, .busno = 0x28, .name = "PCA9548_2\0" },
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{ .parent_bus = (0x10 + 0), .type = i2c_type_pca9548, .addr = 0x75, .busno = 0x30, .name = "PCA9548_3\0" },
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{ .parent_bus = (0x10 + 1), .type = i2c_type_pca9548, .addr = 0x76, .busno = 0x38, .name = "PCA9548_4\0" },
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{ .parent_bus = (0x10 + 0), .type = i2c_type_qci_cpld, .addr = 0x38, .name = "qci_cpld1\0" },
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{ .parent_bus = (0x10 + 0), .type = i2c_type_qci_cpld, .addr = 0x39, .name = "qci_cpld2\0" },
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{ .parent_bus = (0x20 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_1_EEPROM\0" },
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{ .parent_bus = (0x20 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_2_EEPROM\0" },
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{ .parent_bus = (0x20 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_3_EEPROM\0" },
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{ .parent_bus = (0x20 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_4_EEPROM\0" },
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{ .parent_bus = (0x20 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_5_EEPROM\0" },
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{ .parent_bus = (0x20 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_6_EEPROM\0" },
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{ .parent_bus = (0x20 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_7_EEPROM\0" },
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{ .parent_bus = (0x20 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_8_EEPROM\0" },
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{ .parent_bus = (0x28 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_9_EEPROM\0" },
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{ .parent_bus = (0x28 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_10_EEPROM\0" },
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{ .parent_bus = (0x28 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_11_EEPROM\0" },
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{ .parent_bus = (0x28 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_12_EEPROM\0" },
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{ .parent_bus = (0x28 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_13_EEPROM\0" },
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{ .parent_bus = (0x28 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_14_EEPROM\0" },
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{ .parent_bus = (0x28 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_15_EEPROM\0" },
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{ .parent_bus = (0x28 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_16_EEPROM\0" },
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{ .parent_bus = (0x30 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_17_EEPROM\0" },
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{ .parent_bus = (0x30 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_18_EEPROM\0" },
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{ .parent_bus = (0x30 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_19_EEPROM\0" },
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{ .parent_bus = (0x30 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_20_EEPROM\0" },
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{ .parent_bus = (0x30 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_21_EEPROM\0" },
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{ .parent_bus = (0x30 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_22_EEPROM\0" },
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{ .parent_bus = (0x30 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_23_EEPROM\0" },
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{ .parent_bus = (0x30 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_24_EEPROM\0" },
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{ .parent_bus = (0x38 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_25_EEPROM\0" },
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{ .parent_bus = (0x38 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_26_EEPROM\0" },
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{ .parent_bus = (0x38 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_27_EEPROM\0" },
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{ .parent_bus = (0x38 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_28_EEPROM\0" },
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{ .parent_bus = (0x38 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_29_EEPROM\0" },
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{ .parent_bus = (0x38 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_30_EEPROM\0" },
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{ .parent_bus = (0x38 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_31_EEPROM\0" },
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{ .parent_bus = (0x38 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_32_EEPROM\0" },
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{ .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x72, .busno = 0x18, .name = "PCA9546_2\0" },
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{ .parent_bus = (0x18 + 0), .type = i2c_type_qci_pmbus_ix1b, .addr = 0x5f, .name = "PSU_1\0" },
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{ .parent_bus = (0x18 + 1), .type = i2c_type_qci_pmbus_ix1b, .addr = 0x59, .name = "PSU_2\0" },
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{ .parent_bus = (0x18 + 2), .type = i2c_type_pca9555, .addr = 0x26, .gpio_base = 0x10, .name = "PCA9555-1(PSU)\0" },
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{ .parent_bus = (0x18 + 2), .type = i2c_type_24c02, .addr = 0x54, .name = "Board_EEPROM\0" },
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{ .parent_bus = (0x18 + 2), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555-2(Board ID)\0" },
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{ .parent_bus = (0x18 + 3), .type = i2c_type_pca9555, .addr = 0x25, .name = "PCA9555-3(FAN IO)\0" },
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};
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static inline struct pca954x_platform_data *pca954x_platform_data_get(int type, int busno) {
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static struct pca954x_platform_mode platform_modes[8];
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static struct pca954x_platform_data platform_data;
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int num_modes, i;
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switch(type) {
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case i2c_type_pca9546:
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num_modes = 4;
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break;
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case i2c_type_pca9548:
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num_modes = 8;
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break;
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default:
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return (struct pca954x_platform_data *) NULL;
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break;
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}
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for(i=0;i<num_modes;i++) {
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platform_modes[i] = (struct pca954x_platform_mode) {
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.adap_id = (busno + i),
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.deselect_on_exit = 1,
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};
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}
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platform_data = (struct pca954x_platform_data) {
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.modes = platform_modes,
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.num_modes = num_modes,
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};
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return &platform_data;
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}
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static int base_gpio_num = I2C_GPIO_BASE;
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static inline struct pca953x_platform_data *pca953x_platform_data_get(int type, int gpio_base) {
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static struct pca953x_platform_data platform_data;
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int num_gpios, num_gpio;
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switch(type) {
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case i2c_type_pca9554:
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num_gpios = 0x8;
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break;
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case i2c_type_pca9555:
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num_gpios = 0x10;
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break;
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case i2c_type_pca9698:
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num_gpios = 0x28;
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break;
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default:
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return (struct pca953x_platform_data *) NULL;
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break;
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}
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if(gpio_base == 0) {
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num_gpio = base_gpio_num;
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base_gpio_num += num_gpios;
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}
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else {
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num_gpio = gpio_base;
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}
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platform_data = (struct pca953x_platform_data) {
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.gpio_base = num_gpio,
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};
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return &platform_data;
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}
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static inline struct i2c_board_info *i2c_board_info_get(struct i2c_init_data data) {
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struct pca954x_platform_data *mux_platform_data;
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struct pca953x_platform_data *gpio_platform_data;
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static struct i2c_board_info board_info;
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switch(data.type) {
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case i2c_type_pca9546:
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case i2c_type_pca9548:
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mux_platform_data = pca954x_platform_data_get(data.type, data.busno);
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if(mux_platform_data == NULL) {
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return (struct i2c_board_info *) NULL;
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}
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board_info = (struct i2c_board_info) {
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.platform_data = mux_platform_data,
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};
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break;
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case i2c_type_pca9554:
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case i2c_type_pca9555:
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case i2c_type_pca9698:
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gpio_platform_data = pca953x_platform_data_get(data.type, data.gpio_base);
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if(gpio_platform_data == NULL) {
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return (struct i2c_board_info *) NULL;
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}
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board_info = (struct i2c_board_info) {
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.platform_data = gpio_platform_data,
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};
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break;
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case i2c_type_rtc:
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case i2c_type_spd:
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case i2c_type_24c02:
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case i2c_type_qci_pmbus_ix1b:
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case i2c_type_qci_cpld:
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board_info = (struct i2c_board_info) {
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.platform_data = (void *) NULL,
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};
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break;
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default:
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return (struct i2c_board_info *) NULL;
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break;
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}
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board_info.addr = data.addr;
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strcpy(board_info.type, i2c_type_names[data.type]);
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return &board_info;
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}
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static struct platform_driver quanta_platfom_ix1b_platform_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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},
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};
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static struct i2c_init_data *init_data;
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static int init_data_size;
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static struct i2c_client *registered_i2c_clients[MAX_I2C_CLIENTS];
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static int __init quanta_platfom_ix1b_init(void)
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{
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char const *vendor, *product;
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struct i2c_adapter *adapter;
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struct i2c_board_info *board_info;
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int i;
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int ret = 0;
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vendor = dmi_get_system_info(DMI_SYS_VENDOR);
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product = dmi_get_system_info(DMI_PRODUCT_NAME);
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init_data = quanta_ix1b_i2c_init_data;
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init_data_size = ARRAY_SIZE(quanta_ix1b_i2c_init_data);
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ret = platform_driver_register(&quanta_platfom_ix1b_platform_driver);
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if (ret < 0)
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return ret;
|
||||
|
||||
/**
|
||||
* Register I2C devices on new buses
|
||||
*/
|
||||
for(i = 0; i < init_data_size; i++) {
|
||||
adapter = i2c_get_adapter(init_data[i].parent_bus);
|
||||
board_info = i2c_board_info_get(init_data[i]);
|
||||
pr_info("register i2c_new_device\n\t%s for bus 0x%x:0x%x. ",
|
||||
init_data[i].name, init_data[i].parent_bus, init_data[i].addr);
|
||||
if((registered_i2c_clients[i] = i2c_new_device(adapter, board_info)) == NULL) {
|
||||
pr_err("%s: i2c_new_device for bus 0x%x:0x%x failed.",
|
||||
__FUNCTION__, init_data[i].parent_bus, init_data[i].addr);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit quanta_platfom_ix1b_cleanup(void)
|
||||
{
|
||||
int i;
|
||||
/**
|
||||
* Unregister I2C devices
|
||||
*/
|
||||
for(i = 0; i < init_data_size; i++) {
|
||||
if(registered_i2c_clients[i] != NULL) {
|
||||
i2c_unregister_device(registered_i2c_clients[init_data_size-(i+1)]);
|
||||
}
|
||||
}
|
||||
platform_driver_unregister(&quanta_platfom_ix1b_platform_driver);
|
||||
}
|
||||
|
||||
module_init(quanta_platfom_ix1b_init);
|
||||
module_exit(quanta_platfom_ix1b_cleanup);
|
||||
|
||||
MODULE_AUTHOR("Jonathan Tsai (jonathan.tsai@quantatw.com)");
|
||||
MODULE_VERSION("1.0");
|
||||
MODULE_DESCRIPTION("Quanta Platform IX1B");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/onlp/Makefile
Executable file
1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/onlp/Makefile
Executable file
@@ -0,0 +1 @@
|
||||
include $(ONL)/make/pkg.mk
|
||||
1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/onlp/PKG.yml
Executable file
1
packages/platforms/quanta/x86-64/x86-64-quanta-ix1b-rglbmc/onlp/PKG.yml
Executable file
@@ -0,0 +1 @@
|
||||
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-quanta-ix1b-rglbmc ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu
|
||||
@@ -0,0 +1,2 @@
|
||||
FILTER=src
|
||||
include $(ONL)/make/subdirs.mk
|
||||
@@ -0,0 +1,45 @@
|
||||
############################################################
|
||||
# <bsn.cl fy=2014 v=onl>
|
||||
#
|
||||
# Copyright 2014 BigSwitch Networks, Inc.
|
||||
#
|
||||
# Licensed under the Eclipse Public License, Version 1.0 (the
|
||||
# "License"); you may not use this file except in compliance
|
||||
# with the License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.eclipse.org/legal/epl-v10.html
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing,
|
||||
# software distributed under the License is distributed on an
|
||||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
# either express or implied. See the License for the specific
|
||||
# language governing permissions and limitations under the
|
||||
# License.
|
||||
#
|
||||
# </bsn.cl>
|
||||
############################################################
|
||||
#
|
||||
#
|
||||
############################################################
|
||||
include $(ONL)/make/config.amd64.mk
|
||||
|
||||
MODULE := libonlp-x86-64-quanta-ix1b-rglbmc
|
||||
include $(BUILDER)/standardinit.mk
|
||||
|
||||
DEPENDMODULES := AIM IOF x86_64_quanta_ix1b_rglbmc quanta_sys_eeprom onlplib
|
||||
DEPENDMODULE_HEADERS := sff
|
||||
|
||||
include $(BUILDER)/dependmodules.mk
|
||||
|
||||
SHAREDLIB := libonlp-x86-64-quanta-ix1b-rglbmc.so
|
||||
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
|
||||
include $(BUILDER)/so.mk
|
||||
.DEFAULT_GOAL := $(SHAREDLIB)
|
||||
|
||||
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
|
||||
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
|
||||
GLOBAL_CFLAGS += -fPIC
|
||||
GLOBAL_LINK_LIBS += -lpthread
|
||||
|
||||
include $(BUILDER)/targets.mk
|
||||
|
||||
@@ -0,0 +1,45 @@
|
||||
############################################################
|
||||
# <bsn.cl fy=2014 v=onl>
|
||||
#
|
||||
# Copyright 2014 BigSwitch Networks, Inc.
|
||||
#
|
||||
# Licensed under the Eclipse Public License, Version 1.0 (the
|
||||
# "License"); you may not use this file except in compliance
|
||||
# with the License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.eclipse.org/legal/epl-v10.html
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing,
|
||||
# software distributed under the License is distributed on an
|
||||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
# either express or implied. See the License for the specific
|
||||
# language governing permissions and limitations under the
|
||||
# License.
|
||||
#
|
||||
# </bsn.cl>
|
||||
############################################################
|
||||
#
|
||||
#
|
||||
#
|
||||
############################################################
|
||||
include $(ONL)/make/config.amd64.mk
|
||||
|
||||
.DEFAULT_GOAL := onlpdump
|
||||
|
||||
MODULE := onlpdump
|
||||
include $(BUILDER)/standardinit.mk
|
||||
|
||||
DEPENDMODULES := AIM IOF onlp x86_64_quanta_ix1b_rglbmc quanta_sys_eeprom onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
|
||||
|
||||
include $(BUILDER)/dependmodules.mk
|
||||
|
||||
BINARY := onlpdump
|
||||
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
|
||||
include $(BUILDER)/bin.mk
|
||||
|
||||
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
|
||||
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
|
||||
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
|
||||
GLOBAL_LINK_LIBS += -lpthread -lm
|
||||
|
||||
include $(BUILDER)/targets.mk
|
||||
@@ -0,0 +1 @@
|
||||
name: x86_64_quanta_ix1b_rglbmc
|
||||
@@ -0,0 +1,9 @@
|
||||
###############################################################################
|
||||
#
|
||||
#
|
||||
#
|
||||
###############################################################################
|
||||
include $(ONL)/make/config.mk
|
||||
MODULE := x86_64_quanta_ix1b_rglbmc
|
||||
AUTOMODULE := x86_64_quanta_ix1b_rglbmc
|
||||
include $(BUILDER)/definemodule.mk
|
||||
@@ -0,0 +1,9 @@
|
||||
###############################################################################
|
||||
#
|
||||
# x86_64_quanta_ix1b_rglbmc Autogeneration
|
||||
#
|
||||
###############################################################################
|
||||
x86_64_quanta_ix1b_rglbmc_AUTO_DEFS := module/auto/x86_64_quanta_ix1b_rglbmc.yml
|
||||
x86_64_quanta_ix1b_rglbmc_AUTO_DIRS := module/inc/x86_64_quanta_ix1b_rglbmc module/src
|
||||
include $(BUILDER)/auto.mk
|
||||
|
||||
@@ -0,0 +1,134 @@
|
||||
###############################################################################
|
||||
#
|
||||
# x86_64_quanta_ix1b_rglbmc Autogeneration Definitions.
|
||||
#
|
||||
###############################################################################
|
||||
|
||||
cdefs: &cdefs
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING:
|
||||
doc: "Include or exclude logging."
|
||||
default: 1
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT:
|
||||
doc: "Default enabled log options."
|
||||
default: AIM_LOG_OPTIONS_DEFAULT
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT:
|
||||
doc: "Default enabled log bits."
|
||||
default: AIM_LOG_BITS_DEFAULT
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
|
||||
doc: "Default enabled custom log bits."
|
||||
default: 0
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB:
|
||||
doc: "Default all porting macros to use the C standard libraries."
|
||||
default: 1
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
|
||||
doc: "Include standard library headers for stdlib porting macros."
|
||||
default: X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI:
|
||||
doc: "Include generic uCli support."
|
||||
default: 0
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD:
|
||||
doc: "RPM Threshold at which the fan is considered to have failed."
|
||||
default: 3000
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX:
|
||||
doc: "Maximum system front-to-back fan speed."
|
||||
default: 18000
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX:
|
||||
doc: "Maximum system back-to-front fan speed."
|
||||
default: 18000
|
||||
- X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS:
|
||||
doc: "Time to hold Phy GPIO in reset, in ms"
|
||||
default: 100
|
||||
|
||||
definitions:
|
||||
cdefs:
|
||||
X86_64_QUANTA_IX1B_RGLBMC_CONFIG_HEADER:
|
||||
defs: *cdefs
|
||||
basename: x86_64_quanta_ix1b_rglbmc_config
|
||||
|
||||
enum: &enums
|
||||
|
||||
fan_id:
|
||||
members:
|
||||
- FAN1 : 1
|
||||
- FAN2 : 2
|
||||
- FAN3 : 3
|
||||
- FAN4 : 4
|
||||
- FAN5 : 5
|
||||
- FAN6 : 6
|
||||
- FAN7 : 7
|
||||
- FAN8 : 8
|
||||
- FAN9 : 9
|
||||
- FAN10 : 10
|
||||
|
||||
fan_oid:
|
||||
members:
|
||||
- FAN1 : ONLP_FAN_ID_CREATE(1)
|
||||
- FAN2 : ONLP_FAN_ID_CREATE(2)
|
||||
- FAN3 : ONLP_FAN_ID_CREATE(3)
|
||||
- FAN4 : ONLP_FAN_ID_CREATE(4)
|
||||
- FAN5 : ONLP_FAN_ID_CREATE(5)
|
||||
- FAN6 : ONLP_FAN_ID_CREATE(6)
|
||||
- FAN7 : ONLP_FAN_ID_CREATE(7)
|
||||
- FAN8 : ONLP_FAN_ID_CREATE(8)
|
||||
- FAN9 : ONLP_FAN_ID_CREATE(9)
|
||||
- FAN10 : ONLP_FAN_ID_CREATE(10)
|
||||
|
||||
psu_id:
|
||||
members:
|
||||
- PSU1 : 1
|
||||
- PSU2 : 2
|
||||
|
||||
psu_oid:
|
||||
members:
|
||||
- PSU1 : ONLP_PSU_ID_CREATE(1)
|
||||
- PSU2 : ONLP_PSU_ID_CREATE(2)
|
||||
|
||||
thermal_id:
|
||||
members:
|
||||
- THERMAL1 : 1
|
||||
- THERMAL2 : 2
|
||||
- THERMAL3 : 3
|
||||
- THERMAL4 : 4
|
||||
- THERMAL5 : 5
|
||||
- THERMAL6 : 6
|
||||
- THERMAL7 : 7
|
||||
- THERMAL8 : 8
|
||||
- THERMAL9 : 9
|
||||
- THERMAL10 : 10
|
||||
- THERMAL11 : 11
|
||||
- THERMAL12 : 12
|
||||
- THERMAL13 : 13
|
||||
- THERMAL14 : 14
|
||||
- THERMAL15 : 15
|
||||
- THERMAL16 : 16
|
||||
|
||||
|
||||
thermal_oid:
|
||||
members:
|
||||
- THERMAL1 : ONLP_THERMAL_ID_CREATE(1)
|
||||
- THERMAL2 : ONLP_THERMAL_ID_CREATE(2)
|
||||
- THERMAL3 : ONLP_THERMAL_ID_CREATE(3)
|
||||
- THERMAL4 : ONLP_THERMAL_ID_CREATE(4)
|
||||
- THERMAL5 : ONLP_THERMAL_ID_CREATE(5)
|
||||
- THERMAL6 : ONLP_THERMAL_ID_CREATE(6)
|
||||
- THERMAL7 : ONLP_THERMAL_ID_CREATE(7)
|
||||
- THERMAL8 : ONLP_THERMAL_ID_CREATE(8)
|
||||
- THERMAL9 : ONLP_THERMAL_ID_CREATE(9)
|
||||
- THERMAL10 : ONLP_THERMAL_ID_CREATE(10)
|
||||
- THERMAL11 : ONLP_THERMAL_ID_CREATE(11)
|
||||
- THERMAL12 : ONLP_THERMAL_ID_CREATE(12)
|
||||
- THERMAL13 : ONLP_THERMAL_ID_CREATE(13)
|
||||
- THERMAL14 : ONLP_THERMAL_ID_CREATE(14)
|
||||
- THERMAL15 : ONLP_THERMAL_ID_CREATE(15)
|
||||
- THERMAL16 : ONLP_THERMAL_ID_CREATE(16)
|
||||
|
||||
|
||||
portingmacro:
|
||||
X86_64_QUANTA_IX1B_RGLBMC:
|
||||
macros:
|
||||
- memset
|
||||
- memcpy
|
||||
- strncpy
|
||||
- vsnprintf
|
||||
- snprintf
|
||||
- strlen
|
||||
@@ -0,0 +1,14 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
|
||||
/* <--auto.start.xmacro(ALL).define> */
|
||||
/* <auto.end.xmacro(ALL).define> */
|
||||
|
||||
/* <--auto.start.xenum(ALL).define> */
|
||||
/* <auto.end.xenum(ALL).define> */
|
||||
|
||||
|
||||
@@ -0,0 +1,167 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
* @file
|
||||
* @brief x86_64_quanta_ix1b_rglbmc Configuration Header
|
||||
*
|
||||
* @addtogroup x86_64_quanta_ix1b_rglbmc-config
|
||||
* @{
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef __X86_64_QUANTA_IX1B_RGLBMC_CONFIG_H__
|
||||
#define __X86_64_QUANTA_IX1B_RGLBMC_CONFIG_H__
|
||||
|
||||
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
|
||||
#include <global_custom_config.h>
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_INCLUDE_CUSTOM_CONFIG
|
||||
#include <x86_64_quanta_ix1b_rglbmc_custom_config.h>
|
||||
#endif
|
||||
|
||||
/* <auto.start.cdefs(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_HEADER).header> */
|
||||
#include <AIM/aim.h>
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING
|
||||
*
|
||||
* Include or exclude logging. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT
|
||||
*
|
||||
* Default enabled log options. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT
|
||||
*
|
||||
* Default enabled log bits. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
|
||||
*
|
||||
* Default enabled custom log bits. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB
|
||||
*
|
||||
* Default all porting macros to use the C standard libraries. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
|
||||
*
|
||||
* Include standard library headers for stdlib porting macros. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI
|
||||
*
|
||||
* Include generic uCli support. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
|
||||
*
|
||||
* RPM Threshold at which the fan is considered to have failed. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX
|
||||
*
|
||||
* Maximum system front-to-back fan speed. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX 18000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX
|
||||
*
|
||||
* Maximum system back-to-front fan speed. */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX 18000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS
|
||||
*
|
||||
* Time to hold Phy GPIO in reset, in ms */
|
||||
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS 100
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* All compile time options can be queried or displayed
|
||||
*/
|
||||
|
||||
/** Configuration settings structure. */
|
||||
typedef struct x86_64_quanta_ix1b_rglbmc_config_settings_s {
|
||||
/** name */
|
||||
const char* name;
|
||||
/** value */
|
||||
const char* value;
|
||||
} x86_64_quanta_ix1b_rglbmc_config_settings_t;
|
||||
|
||||
/** Configuration settings table. */
|
||||
/** x86_64_quanta_ix1b_rglbmc_config_settings table. */
|
||||
extern x86_64_quanta_ix1b_rglbmc_config_settings_t x86_64_quanta_ix1b_rglbmc_config_settings[];
|
||||
|
||||
/**
|
||||
* @brief Lookup a configuration setting.
|
||||
* @param setting The name of the configuration option to lookup.
|
||||
*/
|
||||
const char* x86_64_quanta_ix1b_rglbmc_config_lookup(const char* setting);
|
||||
|
||||
/**
|
||||
* @brief Show the compile-time configuration.
|
||||
* @param pvs The output stream.
|
||||
*/
|
||||
int x86_64_quanta_ix1b_rglbmc_config_show(struct aim_pvs_s* pvs);
|
||||
|
||||
/* <auto.end.cdefs(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_HEADER).header> */
|
||||
|
||||
#include "x86_64_quanta_ix1b_rglbmc_porting.h"
|
||||
|
||||
#endif /* __X86_64_QUANTA_IX1B_RGLBMC_CONFIG_H__ */
|
||||
/* @} */
|
||||
@@ -0,0 +1,26 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
* x86_64_quanta_ix1b_rglbmc Doxygen Header
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef __X86_64_QUANTA_IX1B_RGLBMC_DOX_H__
|
||||
#define __X86_64_QUANTA_IX1B_RGLBMC_DOX_H__
|
||||
|
||||
/**
|
||||
* @defgroup x86_64_quanta_ix1b_rglbmc x86_64_quanta_ix1b_rglbmc - x86_64_quanta_ix1b_rglbmc Description
|
||||
*
|
||||
|
||||
The documentation overview for this module should go here.
|
||||
|
||||
*
|
||||
* @{
|
||||
*
|
||||
* @defgroup x86_64_quanta_ix1b_rglbmc-x86_64_quanta_ix1b_rglbmc Public Interface
|
||||
* @defgroup x86_64_quanta_ix1b_rglbmc-config Compile Time Configuration
|
||||
* @defgroup x86_64_quanta_ix1b_rglbmc-porting Porting Macros
|
||||
*
|
||||
* @}
|
||||
*
|
||||
*/
|
||||
|
||||
#endif /* __X86_64_QUANTA_IX1B_RGLBMC_DOX_H__ */
|
||||
@@ -0,0 +1,55 @@
|
||||
#ifndef __X86_64_QUANTA_IX1B_RGLBMC_GPIO_TABLE_H__
|
||||
#define __X86_64_QUANTA_IX1B_RGLBMC_GPIO_TABLE_H__
|
||||
|
||||
/*
|
||||
* defined within platform/quanta_switch.c
|
||||
* Quanta Switch Platform driver
|
||||
*/
|
||||
#define QUANTA_IX1B_PCA953x_GPIO(P1, P2) (P1*8+P2)
|
||||
|
||||
#define QUANTA_IX1B_PCA9555_GPIO_SIZE 0x10
|
||||
|
||||
#define QUANTA_IX1B_I2C_GPIO_BASE 0x80
|
||||
|
||||
#define QUANTA_IX1B_I2C_GPIO_CPU_BASE 0x40
|
||||
|
||||
#define QUANTA_IX1B_CPU_BOARD_GPIO_BASE (QUANTA_IX1B_I2C_GPIO_CPU_BASE)
|
||||
#define QUANTA_IX1B_CPU_BOARD_SYS_P1 (QUANTA_IX1B_CPU_BOARD_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,2))
|
||||
#define QUANTA_IX1B_CPU_BOARD_SYS_P2 (QUANTA_IX1B_CPU_BOARD_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,3))
|
||||
|
||||
#define QUANTA_IX1B_PSU_GPIO_BASE 0x10
|
||||
#define QUANTA_IX1B_PSU_GPIO_SIZE QUANTA_IX1B_PCA9555_GPIO_SIZE
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU1_PRSNT_N (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,0))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU1_PWRGD (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,1))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU2_PRSNT_N (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,3))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU2_PWRGD (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,4))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU1_AC_OK (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,6))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU2_AC_OK (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,7))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU1_GREEN_R (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,2))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU1_RED_R (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,3))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU2_GREEN_R (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,4))
|
||||
#define QUANTA_IX1B_PSU_GPIO_PSU2_RED_R (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,5))
|
||||
#define QUANTA_IX1B_PSU_GPIO_FAN_GREEN_R (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,6))
|
||||
#define QUANTA_IX1B_PSU_GPIO_FAN_RED_R (QUANTA_IX1B_PSU_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,7))
|
||||
|
||||
#define QUANTA_IX1B_ZQSFP_EN_GPIO_BASE QUANTA_IX1B_I2C_GPIO_BASE
|
||||
#define QUANTA_IX1B_ZQSFP_EN_GPIO_SIZE QUANTA_IX1B_PCA9555_GPIO_SIZE
|
||||
#define QUANTA_IX1B_ZQSFP_EN_GPIO_P3V3_PW_GD (QUANTA_IX1B_ZQSFP_EN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,4))
|
||||
#define QUANTA_IX1B_ZQSFP_EN_GPIO_P3V3_PW_EN (QUANTA_IX1B_ZQSFP_EN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,5))
|
||||
|
||||
#define QUANTA_IX1B_FAN_GPIO_BASE (QUANTA_IX1B_ZQSFP_EN_GPIO_BASE + QUANTA_IX1B_ZQSFP_EN_GPIO_SIZE)
|
||||
#define QUANTA_IX1B_FAN_GPIO_SIZE QUANTA_IX1B_PCA9555_GPIO_SIZE
|
||||
#define QUANTA_IX1B_FAN_PRSNT_N_1 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,4))
|
||||
#define QUANTA_IX1B_FAN_PRSNT_N_2 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,5))
|
||||
#define QUANTA_IX1B_FAN_PRSNT_N_3 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,6))
|
||||
#define QUANTA_IX1B_FAN_PRSNT_N_4 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(0,7))
|
||||
#define QUANTA_IX1B_FAN_BF_DET1 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,0))
|
||||
#define QUANTA_IX1B_FAN_BF_DET2 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,1))
|
||||
#define QUANTA_IX1B_FAN_BF_DET3 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,2))
|
||||
#define QUANTA_IX1B_FAN_BF_DET4 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,3))
|
||||
#define QUANTA_IX1B_FAN_FAIL_LED_1 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,4))
|
||||
#define QUANTA_IX1B_FAN_FAIL_LED_2 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,5))
|
||||
#define QUANTA_IX1B_FAN_FAIL_LED_3 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,6))
|
||||
#define QUANTA_IX1B_FAN_FAIL_LED_4 (QUANTA_IX1B_FAN_GPIO_BASE + QUANTA_IX1B_PCA953x_GPIO(1,7))
|
||||
|
||||
#endif /* __X86_64_QUANTA_IX1B_RGLBMC_GPIO_TABLE_H__ */
|
||||
@@ -0,0 +1,87 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
* @file
|
||||
* @brief x86_64_quanta_ix1b_rglbmc Porting Macros.
|
||||
*
|
||||
* @addtogroup x86_64_quanta_ix1b_rglbmc-porting
|
||||
* @{
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef __X86_64_QUANTA_IX1B_RGLBMC_PORTING_H__
|
||||
#define __X86_64_QUANTA_IX1B_RGLBMC_PORTING_H__
|
||||
|
||||
|
||||
/* <auto.start.portingmacro(ALL).define> */
|
||||
#if X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <stdarg.h>
|
||||
#include <memory.h>
|
||||
#endif
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_MEMSET
|
||||
#if defined(GLOBAL_MEMSET)
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_MEMSET GLOBAL_MEMSET
|
||||
#elif X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB == 1
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_MEMSET memset
|
||||
#else
|
||||
#error The macro X86_64_QUANTA_IX1B_RGLBMC_MEMSET is required but cannot be defined.
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_MEMCPY
|
||||
#if defined(GLOBAL_MEMCPY)
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_MEMCPY GLOBAL_MEMCPY
|
||||
#elif X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB == 1
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_MEMCPY memcpy
|
||||
#else
|
||||
#error The macro X86_64_QUANTA_IX1B_RGLBMC_MEMCPY is required but cannot be defined.
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_STRNCPY
|
||||
#if defined(GLOBAL_STRNCPY)
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_STRNCPY GLOBAL_STRNCPY
|
||||
#elif X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB == 1
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_STRNCPY strncpy
|
||||
#else
|
||||
#error The macro X86_64_QUANTA_IX1B_RGLBMC_STRNCPY is required but cannot be defined.
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_VSNPRINTF
|
||||
#if defined(GLOBAL_VSNPRINTF)
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_VSNPRINTF GLOBAL_VSNPRINTF
|
||||
#elif X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB == 1
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_VSNPRINTF vsnprintf
|
||||
#else
|
||||
#error The macro X86_64_QUANTA_IX1B_RGLBMC_VSNPRINTF is required but cannot be defined.
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_SNPRINTF
|
||||
#if defined(GLOBAL_SNPRINTF)
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_SNPRINTF GLOBAL_SNPRINTF
|
||||
#elif X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB == 1
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_SNPRINTF snprintf
|
||||
#else
|
||||
#error The macro X86_64_QUANTA_IX1B_RGLBMC_SNPRINTF is required but cannot be defined.
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef X86_64_QUANTA_IX1B_RGLBMC_STRLEN
|
||||
#if defined(GLOBAL_STRLEN)
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_STRLEN GLOBAL_STRLEN
|
||||
#elif X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB == 1
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_STRLEN strlen
|
||||
#else
|
||||
#error The macro X86_64_QUANTA_IX1B_RGLBMC_STRLEN is required but cannot be defined.
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* <auto.end.portingmacro(ALL).define> */
|
||||
|
||||
|
||||
#endif /* __X86_64_QUANTA_IX1B_RGLBMC_PORTING_H__ */
|
||||
/* @} */
|
||||
@@ -0,0 +1,10 @@
|
||||
###############################################################################
|
||||
#
|
||||
#
|
||||
#
|
||||
###############################################################################
|
||||
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
|
||||
x86_64_quanta_ix1b_rglbmc_INCLUDES := -I $(THIS_DIR)inc
|
||||
x86_64_quanta_ix1b_rglbmc_INTERNAL_INCLUDES := -I $(THIS_DIR)src
|
||||
x86_64_quanta_ix1b_rglbmc_DEPENDMODULE_ENTRIES := init:x86_64_quanta_ix1b_rglbmc ucli:x86_64_quanta_ix1b_rglbmc
|
||||
|
||||
@@ -0,0 +1,9 @@
|
||||
###############################################################################
|
||||
#
|
||||
# Local source generation targets.
|
||||
#
|
||||
###############################################################################
|
||||
|
||||
ucli:
|
||||
@../../../../tools/uclihandlers.py x86_64_quanta_ix1b_rglbmc_ucli.c
|
||||
|
||||
@@ -0,0 +1,75 @@
|
||||
/************************************************************
|
||||
* <bsn.cl fy=2014 v=onl>
|
||||
*
|
||||
* Copyright 2014 Big Switch Networks, Inc.
|
||||
*
|
||||
* Licensed under the Eclipse Public License, Version 1.0 (the
|
||||
* "License"); you may not use this file except in compliance
|
||||
* with the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.eclipse.org/legal/epl-v10.html
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing,
|
||||
* software distributed under the License is distributed on an
|
||||
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
* either express or implied. See the License for the specific
|
||||
* language governing permissions and limitations under the
|
||||
* License.
|
||||
*
|
||||
* </bsn.cl>
|
||||
************************************************************
|
||||
*
|
||||
*
|
||||
*
|
||||
***********************************************************/
|
||||
#include <onlp/platformi/fani.h>
|
||||
|
||||
#include "x86_64_quanta_ix1b_rglbmc_int.h"
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
|
||||
#include <onlplib/file.h>
|
||||
|
||||
int
|
||||
onlp_fani_init(void)
|
||||
{
|
||||
AIM_LOG_MSG("ONLP is not supported for FAN");
|
||||
return ONLP_STATUS_E_UNSUPPORTED;
|
||||
}
|
||||
|
||||
static int
|
||||
psu_fan_info_get__(onlp_fan_info_t* info, int id)
|
||||
{
|
||||
extern struct psu_info_s psu_info[];
|
||||
char* dir = psu_info[id].path;
|
||||
|
||||
return onlp_file_read_int(&info->rpm, "%s*fan1_input", dir);
|
||||
}
|
||||
|
||||
/* Onboard Fans */
|
||||
static onlp_fan_info_t fans__[] = {
|
||||
{ }, /* Not used */
|
||||
{ { FAN_OID_FAN1, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
|
||||
{ { FAN_OID_FAN2, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
|
||||
};
|
||||
|
||||
int
|
||||
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv)
|
||||
{
|
||||
int fid = ONLP_OID_ID_GET(id);
|
||||
|
||||
*rv = fans__[ONLP_OID_ID_GET(id)];
|
||||
rv->caps |= ONLP_FAN_CAPS_GET_RPM;
|
||||
|
||||
switch(fid) {
|
||||
case FAN_ID_FAN1:
|
||||
case FAN_ID_FAN2:
|
||||
return psu_fan_info_get__(rv, fid);
|
||||
break;
|
||||
|
||||
default:
|
||||
return ONLP_STATUS_E_INVALID;
|
||||
break;
|
||||
}
|
||||
|
||||
return ONLP_STATUS_E_INVALID;
|
||||
}
|
||||
@@ -0,0 +1,229 @@
|
||||
#include <onlp/platformi/ledi.h>
|
||||
#include <sys/mman.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
#include "x86_64_quanta_ix1b_rglbmc_int.h"
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_gpio_table.h>
|
||||
#include <onlplib/gpio.h>
|
||||
|
||||
/*
|
||||
* Get the information for the given LED OID.
|
||||
*/
|
||||
static onlp_led_info_t led_info[] =
|
||||
{
|
||||
{ }, /* Not used */
|
||||
{
|
||||
{ LED_OID_SYSTEM, "System LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
|
||||
},
|
||||
{
|
||||
{ LED_OID_FAN, "Front FAN LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
|
||||
},
|
||||
{
|
||||
{ LED_OID_PSU_1, "Front PSU(1) LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
|
||||
},
|
||||
{
|
||||
{ LED_OID_PSU_2, "Front PSU(2) LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_GREEN,
|
||||
},
|
||||
{
|
||||
{ LED_OID_FAN_FAIL_1, "FAN(1) fail LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED,
|
||||
},
|
||||
{
|
||||
{ LED_OID_FAN_FAIL_2, "FAN(2) fail LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED,
|
||||
},
|
||||
{
|
||||
{ LED_OID_FAN_FAIL_3, "FAN(3) fail LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED,
|
||||
},
|
||||
{
|
||||
{ LED_OID_FAN_FAIL_4, "FAN(4) fail LED", 0 },
|
||||
ONLP_LED_STATUS_PRESENT,
|
||||
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED,
|
||||
}
|
||||
};
|
||||
|
||||
int
|
||||
onlp_ledi_init(void)
|
||||
{
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
|
||||
{
|
||||
|
||||
int led_id;
|
||||
|
||||
led_id = ONLP_OID_ID_GET(id);
|
||||
|
||||
*info = led_info[led_id];
|
||||
info->status |= ONLP_LED_STATUS_ON;
|
||||
info->mode |= ONLP_LED_MODE_ON;
|
||||
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_System_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_GREEN){
|
||||
onlp_gpio_set(QUANTA_IX1B_CPU_BOARD_SYS_P1, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_CPU_BOARD_SYS_P2, 1);
|
||||
}
|
||||
else if(mode == ONLP_LED_MODE_ORANGE){
|
||||
onlp_gpio_set(QUANTA_IX1B_CPU_BOARD_SYS_P1, 1);
|
||||
onlp_gpio_set(QUANTA_IX1B_CPU_BOARD_SYS_P2, 0);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_CPU_BOARD_SYS_P1, 1);
|
||||
onlp_gpio_set(QUANTA_IX1B_CPU_BOARD_SYS_P2, 1);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Fan_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_GREEN){
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_FAN_GREEN_R, 1);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_FAN_RED_R, 0);
|
||||
}
|
||||
else if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_FAN_GREEN_R, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_FAN_RED_R, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_FAN_GREEN_R, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_FAN_RED_R, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Psu1_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_GREEN){
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU1_GREEN_R, 1);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU1_RED_R, 0);
|
||||
}
|
||||
else if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU1_GREEN_R, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU1_RED_R, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU1_GREEN_R, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU1_RED_R, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Psu2_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_GREEN){
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU2_GREEN_R, 1);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU2_RED_R, 0);
|
||||
}
|
||||
else if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU2_GREEN_R, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU2_RED_R, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU2_GREEN_R, 0);
|
||||
onlp_gpio_set(QUANTA_IX1B_PSU_GPIO_PSU2_RED_R, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Fan_Fail1_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_1, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_1, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Fan_Fail2_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_2, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_2, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Fan_Fail3_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_3, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_3, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
Sysfs_Set_Fan_Fail4_LED(onlp_led_mode_t mode)
|
||||
{
|
||||
if(mode == ONLP_LED_MODE_RED){
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_4, 1);
|
||||
}
|
||||
else{
|
||||
onlp_gpio_set(QUANTA_IX1B_FAN_FAIL_LED_4, 0);
|
||||
}
|
||||
}
|
||||
|
||||
int
|
||||
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
|
||||
{
|
||||
int led_id;
|
||||
|
||||
led_id = ONLP_OID_ID_GET(id);
|
||||
switch (led_id) {
|
||||
case LED_ID_SYSTEM:
|
||||
Sysfs_Set_System_LED(mode);
|
||||
break;
|
||||
case LED_ID_FAN:
|
||||
Sysfs_Set_Fan_LED(mode);
|
||||
break;
|
||||
case LED_ID_PSU_1:
|
||||
Sysfs_Set_Psu1_LED(mode);
|
||||
break;
|
||||
case LED_ID_PSU_2:
|
||||
Sysfs_Set_Psu2_LED(mode);
|
||||
break;
|
||||
case LED_ID_FAN_FAIL_1:
|
||||
Sysfs_Set_Fan_Fail1_LED(mode);
|
||||
break;
|
||||
case LED_ID_FAN_FAIL_2:
|
||||
Sysfs_Set_Fan_Fail2_LED(mode);
|
||||
break;
|
||||
case LED_ID_FAN_FAIL_3:
|
||||
Sysfs_Set_Fan_Fail3_LED(mode);
|
||||
break;
|
||||
case LED_ID_FAN_FAIL_4:
|
||||
Sysfs_Set_Fan_Fail4_LED(mode);
|
||||
break;
|
||||
default:
|
||||
return ONLP_STATUS_E_INTERNAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
@@ -0,0 +1,9 @@
|
||||
###############################################################################
|
||||
#
|
||||
#
|
||||
#
|
||||
###############################################################################
|
||||
|
||||
LIBRARY := x86_64_quanta_ix1b_rglbmc
|
||||
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
|
||||
include $(BUILDER)/lib.mk
|
||||
@@ -0,0 +1,119 @@
|
||||
/************************************************************
|
||||
* <bsn.cl fy=2014 v=onl>
|
||||
* </bsn.cl>
|
||||
************************************************************
|
||||
*
|
||||
*
|
||||
*
|
||||
***********************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_gpio_table.h>
|
||||
#include <onlp/platformi/psui.h>
|
||||
#include <onlplib/file.h>
|
||||
#include <onlplib/gpio.h>
|
||||
#include "x86_64_quanta_ix1b_rglbmc_int.h"
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
#include <AIM/aim_string.h>
|
||||
|
||||
struct psu_info_s psu_info[] = {
|
||||
{}, /* Not used */
|
||||
{ .path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/24-005f", .present = QUANTA_IX1B_PSU_GPIO_PSU1_PRSNT_N, .busno = 24, .addr = 0x5f},
|
||||
{ .path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/25-0059", .present = QUANTA_IX1B_PSU_GPIO_PSU2_PRSNT_N, .busno = 25, .addr = 0x59},
|
||||
};
|
||||
|
||||
int
|
||||
onlp_psui_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static onlp_psu_info_t psus__[] = {
|
||||
{ }, /* Not used */
|
||||
{
|
||||
{
|
||||
PSU_OID_PSU1,
|
||||
"Quanta IX1B RPSU-1",
|
||||
0,
|
||||
{
|
||||
FAN_OID_FAN1,
|
||||
},
|
||||
}
|
||||
},
|
||||
{
|
||||
{
|
||||
PSU_OID_PSU2,
|
||||
"Quanta IX1B RPSU-2",
|
||||
0,
|
||||
{
|
||||
FAN_OID_FAN2,
|
||||
},
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
#define PMBUS_MFR_MODEL 0x9A
|
||||
#define PMBUS_MFR_SERIAL 0x9E
|
||||
#define PMBUS_MFR_MODEL_LEN 20
|
||||
#define PMBUS_MFR_SERIAL_LEN 19
|
||||
|
||||
int
|
||||
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
|
||||
{
|
||||
int rv;
|
||||
int pid = ONLP_OID_ID_GET(id);
|
||||
*info = psus__[pid];
|
||||
const char* dir = psu_info[pid].path;
|
||||
unsigned char buffer[ONLP_CONFIG_INFO_STR_MAX];
|
||||
int value = -1, len;
|
||||
|
||||
rv = onlp_gpio_get(psu_info[pid].present, &value);
|
||||
if(rv < 0) {
|
||||
return rv;
|
||||
}
|
||||
else if(value == 1) {
|
||||
info->status &= ~1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
if(onlp_file_read_int(&info->mvin, "%s*in1_input", dir) == 0 && info->mvin >= 0) {
|
||||
info->caps |= ONLP_PSU_CAPS_VIN;
|
||||
}
|
||||
|
||||
/* PSU is present and powered. */
|
||||
info->status |= 1;
|
||||
|
||||
len = PMBUS_MFR_MODEL_LEN;
|
||||
if(onlp_file_read(buffer, sizeof(buffer), &len, "%s*mfr_model", dir) != 0){
|
||||
AIM_LOG_ERROR("Read PMBUS_MFR_MODEL ###ERROR###");;
|
||||
}
|
||||
aim_strlcpy(info->model, (char *) buffer, 16);
|
||||
|
||||
len = PMBUS_MFR_SERIAL_LEN;
|
||||
if(onlp_file_read(buffer, sizeof(buffer), &len, "%s*mfr_serial", dir) != 0){
|
||||
AIM_LOG_ERROR("Read PMBUS_MFR_SERIAL ###ERROR###");;
|
||||
}
|
||||
aim_strlcpy(info->serial, (char *) buffer, 14);
|
||||
|
||||
info->caps |= ONLP_PSU_CAPS_AC;
|
||||
|
||||
if(onlp_file_read_int(&info->miin, "%s*curr1_input", dir) == 0 && info->miin >= 0) {
|
||||
info->caps |= ONLP_PSU_CAPS_IIN;
|
||||
}
|
||||
if(onlp_file_read_int(&info->miout, "%s*curr2_input", dir) == 0 && info->miout >= 0) {
|
||||
info->caps |= ONLP_PSU_CAPS_IOUT;
|
||||
}
|
||||
if(onlp_file_read_int(&info->mvout, "%s*in2_input", dir) == 0 && info->mvout >= 0) {
|
||||
info->caps |= ONLP_PSU_CAPS_VOUT;
|
||||
}
|
||||
if(onlp_file_read_int(&info->mpin, "%s*power1_input", dir) == 0 && info->mpin >= 0) {
|
||||
info->caps |= ONLP_PSU_CAPS_PIN;
|
||||
/* The pmbus driver reports power in micro-units */
|
||||
info->mpin /= 1000;
|
||||
}
|
||||
if(onlp_file_read_int(&info->mpout, "%s*power2_input", dir) == 0 && info->mpout >= 0) {
|
||||
info->caps |= ONLP_PSU_CAPS_POUT;
|
||||
/* the pmbus driver reports power in micro-units */
|
||||
info->mpout /= 1000;
|
||||
}
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
@@ -0,0 +1,244 @@
|
||||
/************************************************************
|
||||
* <bsn.cl fy=2014 v=onl>
|
||||
*
|
||||
* Copyright 2014 Big Switch Networks, Inc.
|
||||
*
|
||||
* Licensed under the Eclipse Public License, Version 1.0 (the
|
||||
* "License"); you may not use this file except in compliance
|
||||
* with the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.eclipse.org/legal/epl-v10.html
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing,
|
||||
* software distributed under the License is distributed on an
|
||||
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
* either express or implied. See the License for the specific
|
||||
* language governing permissions and limitations under the
|
||||
* License.
|
||||
*
|
||||
* </bsn.cl>
|
||||
************************************************************
|
||||
*
|
||||
* SFPI Interface for the Quanta IX1B
|
||||
*
|
||||
***********************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_gpio_table.h>
|
||||
#include <onlp/platformi/sfpi.h>
|
||||
#include <onlplib/sfp.h>
|
||||
#include <onlplib/gpio.h>
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
#include <onlplib/file.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
/**
|
||||
* This table maps the presence gpio, reset gpio, and eeprom file
|
||||
* for each SFP port.
|
||||
*/
|
||||
typedef struct sfpmap_s {
|
||||
int port;
|
||||
const char* present_cpld;
|
||||
const char* reset_gpio;
|
||||
const char* eeprom;
|
||||
const char* dom;
|
||||
} sfpmap_t;
|
||||
|
||||
static sfpmap_t sfpmap__[] =
|
||||
{
|
||||
{ 1, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-1/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-32/32-0050/eeprom", NULL },
|
||||
{ 2, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-2/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-33/33-0050/eeprom", NULL },
|
||||
{ 3, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-3/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-34/34-0050/eeprom", NULL },
|
||||
{ 4, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-4/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-35/35-0050/eeprom", NULL },
|
||||
{ 5, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-5/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-36/36-0050/eeprom", NULL },
|
||||
{ 6, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-6/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-37/37-0050/eeprom", NULL },
|
||||
{ 7, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-7/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-38/38-0050/eeprom", NULL },
|
||||
{ 8, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-8/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-39/39-0050/eeprom", NULL },
|
||||
{ 9, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-9/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-40/40-0050/eeprom", NULL },
|
||||
{ 10, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-10/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-41/41-0050/eeprom", NULL },
|
||||
{ 11, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-11/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-42/42-0050/eeprom", NULL },
|
||||
{ 12, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-12/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-43/43-0050/eeprom", NULL },
|
||||
{ 13, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-13/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-44/44-0050/eeprom", NULL },
|
||||
{ 14, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-14/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-45/45-0050/eeprom", NULL },
|
||||
{ 15, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-15/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-46/46-0050/eeprom", NULL },
|
||||
{ 16, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-qsfp28/port-16/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-47/47-0050/eeprom", NULL },
|
||||
{ 17, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-17/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-48/48-0050/eeprom", NULL },
|
||||
{ 18, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-18/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-49/49-0050/eeprom", NULL },
|
||||
{ 19, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-19/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-50/50-0050/eeprom", NULL },
|
||||
{ 20, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-20/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-51/51-0050/eeprom", NULL },
|
||||
{ 21, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-21/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-52/52-0050/eeprom", NULL },
|
||||
{ 22, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-22/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-53/53-0050/eeprom", NULL },
|
||||
{ 23, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-23/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-54/54-0050/eeprom", NULL },
|
||||
{ 24, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-24/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/i2c-55/55-0050/eeprom", NULL },
|
||||
{ 25, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-25/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-56/56-0050/eeprom", NULL },
|
||||
{ 26, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-26/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-57/57-0050/eeprom", NULL },
|
||||
{ 27, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-27/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-58/58-0050/eeprom", NULL },
|
||||
{ 28, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-28/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-59/59-0050/eeprom", NULL },
|
||||
{ 29, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-29/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-60/60-0050/eeprom", NULL },
|
||||
{ 30, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-30/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-61/61-0050/eeprom", NULL },
|
||||
{ 31, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-31/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-62/62-0050/eeprom", NULL },
|
||||
{ 32, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0039/cpld-qsfp28/port-32/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/i2c-63/63-0050/eeprom", NULL },
|
||||
};
|
||||
|
||||
#define SFP_GET(_port) (sfpmap__ + _port - 1)
|
||||
#define MAX_SFP_PATH 128
|
||||
static char sfp_node_path[MAX_SFP_PATH] = {0};
|
||||
|
||||
static char*
|
||||
sfp_get_port_path(int port, char *node_name)
|
||||
{
|
||||
sfpmap_t* sfp = SFP_GET(port);
|
||||
|
||||
sprintf(sfp_node_path, sfp->present_cpld,
|
||||
node_name);
|
||||
return sfp_node_path;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
onlp_gpio_export(QUANTA_IX1B_ZQSFP_EN_GPIO_P3V3_PW_EN, ONLP_GPIO_DIRECTION_OUT);
|
||||
ret = onlp_gpio_set(QUANTA_IX1B_ZQSFP_EN_GPIO_P3V3_PW_EN, 1);
|
||||
sleep(1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
|
||||
{
|
||||
int p;
|
||||
|
||||
for(p = 1; p < 33; p++) {
|
||||
AIM_BITMAP_SET(bmap, p);
|
||||
}
|
||||
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_is_present(int port)
|
||||
{
|
||||
return onlplib_sfp_is_present_file(sfp_get_port_path(port, "module_present"), /* Present */ "1\n", /* Absent */ "0\n");
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
|
||||
{
|
||||
sfpmap_t* sfp = SFP_GET(port);
|
||||
return onlplib_sfp_eeprom_read_file(sfp->eeprom, data);
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_dom_read(int port, uint8_t data[256])
|
||||
{
|
||||
sfpmap_t* sfp = SFP_GET(port);
|
||||
return onlplib_sfp_eeprom_read_file(sfp->dom, data);
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
|
||||
{
|
||||
int rv;
|
||||
char* path = NULL;
|
||||
|
||||
switch(control){
|
||||
case ONLP_SFP_CONTROL_RESET_STATE:
|
||||
{
|
||||
path = sfp_get_port_path(port, "reset");
|
||||
|
||||
if (onlp_file_write_int(value, path) != 0) {
|
||||
AIM_LOG_ERROR("Unable to set reset status to port(%d)\r\n", port);
|
||||
rv = ONLP_STATUS_E_INTERNAL;
|
||||
}
|
||||
else {
|
||||
rv = ONLP_STATUS_OK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case ONLP_SFP_CONTROL_LP_MODE:
|
||||
{
|
||||
path = sfp_get_port_path(port, "lpmode");
|
||||
|
||||
if (onlp_file_write_int(value, path) != 0) {
|
||||
AIM_LOG_ERROR("Unable to set lp_mode status to port(%d)\r\n", port);
|
||||
rv = ONLP_STATUS_E_INTERNAL;
|
||||
}
|
||||
else {
|
||||
rv = ONLP_STATUS_OK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
rv = ONLP_STATUS_E_UNSUPPORTED;
|
||||
}
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
|
||||
{
|
||||
int rv;
|
||||
char* path = NULL;
|
||||
|
||||
switch(control){
|
||||
case ONLP_SFP_CONTROL_RESET_STATE:
|
||||
{
|
||||
path = sfp_get_port_path(port, "reset");
|
||||
|
||||
if (onlp_file_read_int(value, path) < 0) {
|
||||
AIM_LOG_ERROR("Unable to read reset status from port(%d)\r\n", port);
|
||||
rv = ONLP_STATUS_E_INTERNAL;
|
||||
}
|
||||
else {
|
||||
if(*value == 0){
|
||||
*value = 1;
|
||||
}
|
||||
else{
|
||||
*value = 0;
|
||||
}
|
||||
rv = ONLP_STATUS_OK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case ONLP_SFP_CONTROL_LP_MODE:
|
||||
{
|
||||
path = sfp_get_port_path(port, "lpmode");
|
||||
|
||||
if (onlp_file_read_int(value, path) < 0) {
|
||||
AIM_LOG_ERROR("Unable to read lpmode status from port(%d)\r\n", port);
|
||||
rv = ONLP_STATUS_E_INTERNAL;
|
||||
}
|
||||
else {
|
||||
rv = ONLP_STATUS_OK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case ONLP_SFP_CONTROL_RX_LOS:
|
||||
{
|
||||
*value = 0;
|
||||
rv = ONLP_STATUS_OK;
|
||||
break;
|
||||
}
|
||||
|
||||
case ONLP_SFP_CONTROL_TX_DISABLE:
|
||||
{
|
||||
*value = 0;
|
||||
rv = ONLP_STATUS_OK;
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
rv = ONLP_STATUS_E_UNSUPPORTED;
|
||||
}
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,253 @@
|
||||
/************************************************************
|
||||
* <bsn.cl fy=2014 v=onl>
|
||||
* </bsn.cl>
|
||||
************************************************************
|
||||
*
|
||||
*
|
||||
*
|
||||
***********************************************************/
|
||||
#include <onlp/platformi/sysi.h>
|
||||
#include "x86_64_quanta_ix1b_rglbmc_int.h"
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
#include <quanta_sys_eeprom/eeprom.h>
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_gpio_table.h>
|
||||
#include <onlplib/gpio.h>
|
||||
#include <onlplib/i2c.h>
|
||||
#include <onlp/platformi/ledi.h>
|
||||
|
||||
struct led_control_s led_control;
|
||||
|
||||
const char*
|
||||
onlp_sysi_platform_get(void)
|
||||
{
|
||||
return "x86-64-quanta-ix1b-rglbmc-r0";
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sysi_init(void)
|
||||
{
|
||||
/* Initial value */
|
||||
led_control.PMCnt = 0;
|
||||
led_control.psu1_present = 0;
|
||||
led_control.psu2_present = 0;
|
||||
led_control.psu1_power_good = 0;
|
||||
led_control.psu2_power_good = 0;
|
||||
|
||||
/* Config GPIO */
|
||||
/* LED Output */
|
||||
onlp_gpio_export(QUANTA_IX1B_CPU_BOARD_SYS_P1, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_CPU_BOARD_SYS_P2, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU1_GREEN_R, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU1_RED_R, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU2_GREEN_R, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU2_RED_R, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_FAIL_LED_1, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_FAIL_LED_2, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_FAIL_LED_3, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_FAIL_LED_4, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_FAN_GREEN_R, ONLP_GPIO_DIRECTION_OUT);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_FAN_RED_R, ONLP_GPIO_DIRECTION_OUT);
|
||||
|
||||
/* PSU Input */
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU1_PRSNT_N, ONLP_GPIO_DIRECTION_IN);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU1_PWRGD, ONLP_GPIO_DIRECTION_IN);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU2_PRSNT_N, ONLP_GPIO_DIRECTION_IN);
|
||||
onlp_gpio_export(QUANTA_IX1B_PSU_GPIO_PSU2_PWRGD, ONLP_GPIO_DIRECTION_IN);
|
||||
|
||||
/* FAN Input */
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_PRSNT_N_1, ONLP_GPIO_DIRECTION_IN);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_PRSNT_N_2, ONLP_GPIO_DIRECTION_IN);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_PRSNT_N_3, ONLP_GPIO_DIRECTION_IN);
|
||||
onlp_gpio_export(QUANTA_IX1B_FAN_PRSNT_N_4, ONLP_GPIO_DIRECTION_IN);
|
||||
|
||||
/* Set LED to green */
|
||||
onlp_ledi_mode_set(LED_OID_SYSTEM, ONLP_LED_MODE_GREEN);
|
||||
led_control.psu_status_changed = 1;
|
||||
led_control.fan_status_changed = 1;
|
||||
onlp_sysi_platform_manage_leds();
|
||||
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
|
||||
#define QUANTA_SYS_EEPROM_PATH \
|
||||
"/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/26-0054/eeprom"
|
||||
|
||||
int
|
||||
onlp_sysi_onie_info_get(onlp_onie_info_t* onie)
|
||||
{
|
||||
int rv;
|
||||
|
||||
rv = onlp_onie_decode_file(onie, QUANTA_SYS_EEPROM_PATH);
|
||||
if(rv >= 0) {
|
||||
onie->platform_name = aim_strdup("x86-64-quanta-ix1b-rglbmc-r0");
|
||||
rv = quanta_onie_sys_eeprom_custom_format(onie);
|
||||
}
|
||||
return rv;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sysi_oids_get(onlp_oid_t* table, int max)
|
||||
{
|
||||
onlp_oid_t* e = table;
|
||||
memset(table, 0, max*sizeof(onlp_oid_t));
|
||||
|
||||
/*
|
||||
* 2 PSUs
|
||||
*/
|
||||
*e++ = PSU_OID_PSU1;
|
||||
*e++ = PSU_OID_PSU2;
|
||||
|
||||
/*
|
||||
* 8 LEDs
|
||||
*/
|
||||
*e++ = LED_OID_SYSTEM;
|
||||
*e++ = LED_OID_FAN;
|
||||
*e++ = LED_OID_PSU_1;
|
||||
*e++ = LED_OID_PSU_2;
|
||||
*e++ = LED_OID_FAN_FAIL_1;
|
||||
*e++ = LED_OID_FAN_FAIL_2;
|
||||
*e++ = LED_OID_FAN_FAIL_3;
|
||||
*e++ = LED_OID_FAN_FAIL_4;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
update_rpsu_fan_status(void){
|
||||
int last_status, rv, value = -1/*, tmp*/;
|
||||
|
||||
last_status = led_control.psu1_present;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_PSU_GPIO_PSU1_PRSNT_N, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_PSU_GPIO_PSU1_PRSNT_N);
|
||||
return rv;
|
||||
}
|
||||
led_control.psu1_present = (value ? 0 : 1);
|
||||
if(last_status != led_control.psu1_present)
|
||||
led_control.psu_status_changed = 1;
|
||||
|
||||
last_status = led_control.psu1_power_good;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_PSU_GPIO_PSU1_PWRGD, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_PSU_GPIO_PSU1_PWRGD);
|
||||
return rv;
|
||||
}
|
||||
led_control.psu1_power_good = (value ? 1 : 0);
|
||||
if(last_status != led_control.psu1_power_good)
|
||||
led_control.psu_status_changed = 1;
|
||||
|
||||
last_status = led_control.psu2_present;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_PSU_GPIO_PSU2_PRSNT_N, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_PSU_GPIO_PSU2_PRSNT_N);
|
||||
return rv;
|
||||
}
|
||||
led_control.psu2_present = (value ? 0 : 1);
|
||||
if(last_status != led_control.psu2_present)
|
||||
led_control.psu_status_changed = 1;
|
||||
|
||||
last_status = led_control.psu2_power_good;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_PSU_GPIO_PSU2_PWRGD, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_PSU_GPIO_PSU2_PWRGD);
|
||||
return rv;
|
||||
}
|
||||
led_control.psu2_power_good = (value ? 1 : 0);
|
||||
if(last_status != led_control.psu2_power_good)
|
||||
led_control.psu_status_changed = 1;
|
||||
|
||||
last_status = led_control.fan1_present;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_FAN_PRSNT_N_1, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_FAN_PRSNT_N_1);
|
||||
return rv;
|
||||
}
|
||||
led_control.fan1_present = (value ? 0 : 1);
|
||||
if(last_status != led_control.fan1_present)
|
||||
led_control.fan_status_changed = 1;
|
||||
|
||||
last_status = led_control.fan2_present;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_FAN_PRSNT_N_2, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_FAN_PRSNT_N_2);
|
||||
return rv;
|
||||
}
|
||||
led_control.fan2_present = (value ? 0 : 1);
|
||||
if(last_status != led_control.fan2_present)
|
||||
led_control.fan_status_changed = 1;
|
||||
|
||||
last_status = led_control.fan3_present;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_FAN_PRSNT_N_3, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_FAN_PRSNT_N_3);
|
||||
return rv;
|
||||
}
|
||||
led_control.fan3_present = (value ? 0 : 1);
|
||||
if(last_status != led_control.fan3_present)
|
||||
led_control.fan_status_changed = 1;
|
||||
|
||||
last_status = led_control.fan4_present;
|
||||
rv = onlp_gpio_get(QUANTA_IX1B_FAN_PRSNT_N_4, &value);
|
||||
if(rv < 0) {
|
||||
AIM_LOG_ERROR("GPIO %d read Error!", QUANTA_IX1B_FAN_PRSNT_N_4);
|
||||
return rv;
|
||||
}
|
||||
led_control.fan4_present = (value ? 0 : 1);
|
||||
if(last_status != led_control.fan4_present)
|
||||
led_control.fan_status_changed = 1;
|
||||
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
|
||||
int
|
||||
onlp_sysi_platform_manage_leds(void)
|
||||
{
|
||||
int rv;
|
||||
|
||||
led_control.PMCnt++;
|
||||
if(led_control.PMCnt>300)
|
||||
led_control.PMCnt = 0;
|
||||
if(led_control.PMCnt % 5 == 1){/* Each 10 seconds detect one time */
|
||||
|
||||
rv = update_rpsu_fan_status();
|
||||
if(rv < 0){
|
||||
printf("onlp_sysi_platform_manage_leds error\n");
|
||||
return ONLP_STATUS_E_INVALID;
|
||||
}
|
||||
|
||||
if(led_control.psu_status_changed){
|
||||
if(led_control.psu1_present && led_control.psu1_power_good) {
|
||||
onlp_ledi_mode_set(LED_ID_PSU_1, ONLP_LED_MODE_GREEN);
|
||||
}
|
||||
else if(!led_control.psu1_present){
|
||||
onlp_ledi_mode_set(LED_ID_PSU_1, ONLP_LED_MODE_OFF);
|
||||
}
|
||||
else{
|
||||
onlp_ledi_mode_set(LED_ID_PSU_1, ONLP_LED_MODE_RED);
|
||||
}
|
||||
|
||||
if(led_control.psu2_present && led_control.psu2_power_good) {
|
||||
onlp_ledi_mode_set(LED_ID_PSU_2, ONLP_LED_MODE_GREEN);
|
||||
}
|
||||
else if(!led_control.psu2_present){
|
||||
onlp_ledi_mode_set(LED_ID_PSU_2, ONLP_LED_MODE_OFF);
|
||||
}
|
||||
else{
|
||||
onlp_ledi_mode_set(LED_ID_PSU_2, ONLP_LED_MODE_RED);
|
||||
}
|
||||
led_control.psu_status_changed = 0;
|
||||
}
|
||||
|
||||
if(led_control.fan_status_changed){
|
||||
if(led_control.fan1_present && led_control.fan2_present && led_control.fan3_present && led_control.fan4_present){
|
||||
onlp_ledi_mode_set(LED_ID_FAN, ONLP_LED_MODE_GREEN);
|
||||
}
|
||||
else{
|
||||
onlp_ledi_mode_set(LED_ID_FAN, ONLP_LED_MODE_RED);
|
||||
}
|
||||
led_control.fan_status_changed = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return ONLP_STATUS_OK;
|
||||
}
|
||||
@@ -0,0 +1,33 @@
|
||||
/************************************************************
|
||||
* <bsn.cl fy=2014 v=onl>
|
||||
*
|
||||
* Copyright 2014 Big Switch Networks, Inc.
|
||||
*
|
||||
* Licensed under the Eclipse Public License, Version 1.0 (the
|
||||
* "License"); you may not use this file except in compliance
|
||||
* with the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.eclipse.org/legal/epl-v10.html
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing,
|
||||
* software distributed under the License is distributed on an
|
||||
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
* either express or implied. See the License for the specific
|
||||
* language governing permissions and limitations under the
|
||||
* License.
|
||||
*
|
||||
* </bsn.cl>
|
||||
************************************************************
|
||||
*
|
||||
*
|
||||
*
|
||||
***********************************************************/
|
||||
#include <onlp/platformi/thermali.h>
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
|
||||
int
|
||||
onlp_thermali_init(void)
|
||||
{
|
||||
AIM_LOG_MSG("ONLP is not supported for THERMAL");
|
||||
return ONLP_STATUS_E_UNSUPPORTED;
|
||||
}
|
||||
@@ -0,0 +1,95 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
|
||||
/* <auto.start.cdefs(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_HEADER).source> */
|
||||
#define __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(_x) #_x
|
||||
#define __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(_x) __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(_x)
|
||||
x86_64_quanta_ix1b_rglbmc_config_settings_t x86_64_quanta_ix1b_rglbmc_config_settings[] =
|
||||
{
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_LOGGING(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_STDLIB(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
#ifdef X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS
|
||||
{ __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS), __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS) },
|
||||
#else
|
||||
{ X86_64_QUANTA_IX1B_RGLBMC_CONFIG_PHY_RESET_DELAY_MS(__x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
|
||||
#endif
|
||||
{ NULL, NULL }
|
||||
};
|
||||
#undef __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_VALUE
|
||||
#undef __x86_64_quanta_ix1b_rglbmc_config_STRINGIFY_NAME
|
||||
|
||||
const char*
|
||||
x86_64_quanta_ix1b_rglbmc_config_lookup(const char* setting)
|
||||
{
|
||||
int i;
|
||||
for(i = 0; x86_64_quanta_ix1b_rglbmc_config_settings[i].name; i++) {
|
||||
if(strcmp(x86_64_quanta_ix1b_rglbmc_config_settings[i].name, setting)) {
|
||||
return x86_64_quanta_ix1b_rglbmc_config_settings[i].value;
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int
|
||||
x86_64_quanta_ix1b_rglbmc_config_show(struct aim_pvs_s* pvs)
|
||||
{
|
||||
int i;
|
||||
for(i = 0; x86_64_quanta_ix1b_rglbmc_config_settings[i].name; i++) {
|
||||
aim_printf(pvs, "%s = %s\n", x86_64_quanta_ix1b_rglbmc_config_settings[i].name, x86_64_quanta_ix1b_rglbmc_config_settings[i].value);
|
||||
}
|
||||
return i;
|
||||
}
|
||||
|
||||
/* <auto.end.cdefs(X86_64_QUANTA_IX1B_RGLBMC_CONFIG_HEADER).source> */
|
||||
@@ -0,0 +1,10 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
|
||||
/* <--auto.start.enum(ALL).source> */
|
||||
/* <auto.end.enum(ALL).source> */
|
||||
|
||||
@@ -0,0 +1,311 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
* x86_64_quanta_ix1b_rglbmc Internal Header
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef __X86_64_QUANTA_IX1B_RGLBMC_INT_H__
|
||||
#define __X86_64_QUANTA_IX1B_RGLBMC_INT_H__
|
||||
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
#include <limits.h>
|
||||
|
||||
/* <auto.start.enum(ALL).header> */
|
||||
/** thermal_oid */
|
||||
typedef enum thermal_oid_e {
|
||||
THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1),
|
||||
THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2),
|
||||
THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3),
|
||||
THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4),
|
||||
THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5),
|
||||
THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6),
|
||||
THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7),
|
||||
THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8),
|
||||
THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9),
|
||||
THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10),
|
||||
THERMAL_OID_THERMAL11 = ONLP_THERMAL_ID_CREATE(11),
|
||||
THERMAL_OID_THERMAL12 = ONLP_THERMAL_ID_CREATE(12),
|
||||
THERMAL_OID_THERMAL13 = ONLP_THERMAL_ID_CREATE(13),
|
||||
THERMAL_OID_THERMAL14 = ONLP_THERMAL_ID_CREATE(14),
|
||||
THERMAL_OID_THERMAL15 = ONLP_THERMAL_ID_CREATE(15),
|
||||
THERMAL_OID_THERMAL16 = ONLP_THERMAL_ID_CREATE(16),
|
||||
} thermal_oid_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* thermal_oid_name(thermal_oid_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int thermal_oid_value(const char* str, thermal_oid_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* thermal_oid_desc(thermal_oid_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int thermal_oid_valid(thermal_oid_t e);
|
||||
|
||||
/** validator */
|
||||
#define THERMAL_OID_VALID(_e) \
|
||||
(thermal_oid_valid((_e)))
|
||||
|
||||
/** thermal_oid_map table. */
|
||||
extern aim_map_si_t thermal_oid_map[];
|
||||
/** thermal_oid_desc_map table. */
|
||||
extern aim_map_si_t thermal_oid_desc_map[];
|
||||
|
||||
/** psu_oid */
|
||||
typedef enum psu_oid_e {
|
||||
PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1),
|
||||
PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2),
|
||||
} psu_oid_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* psu_oid_name(psu_oid_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int psu_oid_value(const char* str, psu_oid_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* psu_oid_desc(psu_oid_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int psu_oid_valid(psu_oid_t e);
|
||||
|
||||
/** validator */
|
||||
#define PSU_OID_VALID(_e) \
|
||||
(psu_oid_valid((_e)))
|
||||
|
||||
/** psu_oid_map table. */
|
||||
extern aim_map_si_t psu_oid_map[];
|
||||
/** psu_oid_desc_map table. */
|
||||
extern aim_map_si_t psu_oid_desc_map[];
|
||||
|
||||
/** thermal_id */
|
||||
typedef enum thermal_id_e {
|
||||
THERMAL_ID_THERMAL1 = 1,
|
||||
THERMAL_ID_THERMAL2 = 2,
|
||||
THERMAL_ID_THERMAL3 = 3,
|
||||
THERMAL_ID_THERMAL4 = 4,
|
||||
THERMAL_ID_THERMAL5 = 5,
|
||||
THERMAL_ID_THERMAL6 = 6,
|
||||
THERMAL_ID_THERMAL7 = 7,
|
||||
THERMAL_ID_THERMAL8 = 8,
|
||||
THERMAL_ID_THERMAL9 = 9,
|
||||
THERMAL_ID_THERMAL10 = 10,
|
||||
THERMAL_ID_THERMAL11 = 11,
|
||||
THERMAL_ID_THERMAL12 = 12,
|
||||
THERMAL_ID_THERMAL13 = 13,
|
||||
THERMAL_ID_THERMAL14 = 14,
|
||||
THERMAL_ID_THERMAL15 = 15,
|
||||
THERMAL_ID_THERMAL16 = 16,
|
||||
} thermal_id_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* thermal_id_name(thermal_id_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int thermal_id_value(const char* str, thermal_id_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* thermal_id_desc(thermal_id_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int thermal_id_valid(thermal_id_t e);
|
||||
|
||||
/** validator */
|
||||
#define THERMAL_ID_VALID(_e) \
|
||||
(thermal_id_valid((_e)))
|
||||
|
||||
/** thermal_id_map table. */
|
||||
extern aim_map_si_t thermal_id_map[];
|
||||
/** thermal_id_desc_map table. */
|
||||
extern aim_map_si_t thermal_id_desc_map[];
|
||||
|
||||
/** fan_id */
|
||||
typedef enum fan_id_e {
|
||||
FAN_ID_FAN1 = 1,
|
||||
FAN_ID_FAN2 = 2,
|
||||
FAN_ID_FAN3 = 3,
|
||||
FAN_ID_FAN4 = 4,
|
||||
FAN_ID_FAN5 = 5,
|
||||
FAN_ID_FAN6 = 6,
|
||||
FAN_ID_FAN7 = 7,
|
||||
FAN_ID_FAN8 = 8,
|
||||
FAN_ID_FAN9 = 9,
|
||||
FAN_ID_FAN10 = 10,
|
||||
} fan_id_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* fan_id_name(fan_id_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int fan_id_value(const char* str, fan_id_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* fan_id_desc(fan_id_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int fan_id_valid(fan_id_t e);
|
||||
|
||||
/** validator */
|
||||
#define FAN_ID_VALID(_e) \
|
||||
(fan_id_valid((_e)))
|
||||
|
||||
/** fan_id_map table. */
|
||||
extern aim_map_si_t fan_id_map[];
|
||||
/** fan_id_desc_map table. */
|
||||
extern aim_map_si_t fan_id_desc_map[];
|
||||
|
||||
/** psu_id */
|
||||
typedef enum psu_id_e {
|
||||
PSU_ID_PSU1 = 1,
|
||||
PSU_ID_PSU2 = 2,
|
||||
} psu_id_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* psu_id_name(psu_id_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int psu_id_value(const char* str, psu_id_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* psu_id_desc(psu_id_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int psu_id_valid(psu_id_t e);
|
||||
|
||||
/** validator */
|
||||
#define PSU_ID_VALID(_e) \
|
||||
(psu_id_valid((_e)))
|
||||
|
||||
/** psu_id_map table. */
|
||||
extern aim_map_si_t psu_id_map[];
|
||||
/** psu_id_desc_map table. */
|
||||
extern aim_map_si_t psu_id_desc_map[];
|
||||
|
||||
/** fan_oid */
|
||||
typedef enum fan_oid_e {
|
||||
FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1),
|
||||
FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2),
|
||||
FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3),
|
||||
FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4),
|
||||
FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5),
|
||||
FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6),
|
||||
FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7),
|
||||
FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8),
|
||||
FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9),
|
||||
FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10),
|
||||
} fan_oid_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* fan_oid_name(fan_oid_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int fan_oid_value(const char* str, fan_oid_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* fan_oid_desc(fan_oid_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int fan_oid_valid(fan_oid_t e);
|
||||
|
||||
/** validator */
|
||||
#define FAN_OID_VALID(_e) \
|
||||
(fan_oid_valid((_e)))
|
||||
|
||||
/** fan_oid_map table. */
|
||||
extern aim_map_si_t fan_oid_map[];
|
||||
/** fan_oid_desc_map table. */
|
||||
extern aim_map_si_t fan_oid_desc_map[];
|
||||
/* <auto.end.enum(ALL).header> */
|
||||
|
||||
/* psu info table */
|
||||
struct psu_info_s {
|
||||
char path[PATH_MAX];
|
||||
int present;
|
||||
int busno;
|
||||
int addr;
|
||||
};
|
||||
|
||||
/** led_id */
|
||||
typedef enum led_id_e {
|
||||
LED_ID_SYSTEM = 1,
|
||||
LED_ID_FAN = 2,
|
||||
LED_ID_PSU_1 = 3,
|
||||
LED_ID_PSU_2 = 4,
|
||||
LED_ID_FAN_FAIL_1 = 5,
|
||||
LED_ID_FAN_FAIL_2 = 6,
|
||||
LED_ID_FAN_FAIL_3 = 7,
|
||||
LED_ID_FAN_FAIL_4 = 8,
|
||||
} led_id_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* led_id_name(led_id_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int led_id_value(const char* str, led_id_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* led_id_desc(led_id_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int led_id_valid(led_id_t e);
|
||||
|
||||
/** validator */
|
||||
#define LED_ID_VALID(_e) \
|
||||
(led_id_valid((_e)))
|
||||
|
||||
/** led_id_map table. */
|
||||
extern aim_map_si_t led_id_map[];
|
||||
/** led_id_desc_map table. */
|
||||
extern aim_map_si_t led_id_desc_map[];
|
||||
|
||||
/** led_oid */
|
||||
typedef enum led_oid_e {
|
||||
LED_OID_SYSTEM = ONLP_LED_ID_CREATE(LED_ID_SYSTEM),
|
||||
LED_OID_FAN = ONLP_LED_ID_CREATE(LED_ID_FAN),
|
||||
LED_OID_PSU_1 = ONLP_LED_ID_CREATE(LED_ID_PSU_1),
|
||||
LED_OID_PSU_2 = ONLP_LED_ID_CREATE(LED_ID_PSU_2),
|
||||
LED_OID_FAN_FAIL_1 = ONLP_LED_ID_CREATE(LED_ID_FAN_FAIL_1),
|
||||
LED_OID_FAN_FAIL_2 = ONLP_LED_ID_CREATE(LED_ID_FAN_FAIL_2),
|
||||
LED_OID_FAN_FAIL_3 = ONLP_LED_ID_CREATE(LED_ID_FAN_FAIL_3),
|
||||
LED_OID_FAN_FAIL_4 = ONLP_LED_ID_CREATE(LED_ID_FAN_FAIL_4),
|
||||
} led_oid_t;
|
||||
|
||||
/** Enum names. */
|
||||
const char* led_oid_name(led_oid_t e);
|
||||
|
||||
/** Enum values. */
|
||||
int led_oid_value(const char* str, led_oid_t* e, int substr);
|
||||
|
||||
/** Enum descriptions. */
|
||||
const char* led_oid_desc(led_oid_t e);
|
||||
|
||||
/** Enum validator. */
|
||||
int led_oid_valid(led_oid_t e);
|
||||
|
||||
/** validator */
|
||||
#define LED_OID_VALID(_e) \
|
||||
(led_oid_valid((_e)))
|
||||
|
||||
/** led_oid_map table. */
|
||||
extern aim_map_si_t led_oid_map[];
|
||||
/** led_oid_desc_map table. */
|
||||
extern aim_map_si_t led_oid_desc_map[];
|
||||
/* <auto.end.enum(ALL).header> */
|
||||
|
||||
struct led_control_s{
|
||||
int PMCnt;
|
||||
int psu_status_changed;
|
||||
int fan_status_changed;
|
||||
int psu1_present;
|
||||
int psu2_present;
|
||||
int psu1_power_good;
|
||||
int psu2_power_good;
|
||||
int fan1_present;
|
||||
int fan2_present;
|
||||
int fan3_present;
|
||||
int fan4_present;
|
||||
};
|
||||
|
||||
#define SYS_HWMON_PREFIX "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-004e"
|
||||
|
||||
#endif /* __X86_64_QUANTA_IX1B_RGLBMC_INT_H__ */
|
||||
@@ -0,0 +1,18 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
/*
|
||||
* x86_64_quanta_ix1b_rglbmc log struct.
|
||||
*/
|
||||
AIM_LOG_STRUCT_DEFINE(
|
||||
X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT,
|
||||
X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_BITS_DEFAULT,
|
||||
NULL, /* Custom log map */
|
||||
X86_64_QUANTA_IX1B_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
|
||||
);
|
||||
|
||||
@@ -0,0 +1,12 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef __X86_64_QUANTA_IX1B_RGLBMC_LOG_H__
|
||||
#define __X86_64_QUANTA_IX1B_RGLBMC_LOG_H__
|
||||
|
||||
#define AIM_LOG_MODULE_NAME x86_64_quanta_ix1b_rglbmc
|
||||
#include <AIM/aim_log.h>
|
||||
|
||||
#endif /* __X86_64_QUANTA_IX1B_RGLBMC_LOG_H__ */
|
||||
@@ -0,0 +1,24 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
|
||||
#include "x86_64_quanta_ix1b_rglbmc_log.h"
|
||||
|
||||
static int
|
||||
datatypes_init__(void)
|
||||
{
|
||||
#define X86_64_QUANTA_IX1B_RGLBMC_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc.x>
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __x86_64_quanta_ix1b_rglbmc_module_init__(void)
|
||||
{
|
||||
AIM_LOG_STRUCT_REGISTER();
|
||||
datatypes_init__();
|
||||
}
|
||||
|
||||
int __onlp_platform_version__ = 1;
|
||||
@@ -0,0 +1,50 @@
|
||||
/**************************************************************************//**
|
||||
*
|
||||
*
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <x86_64_quanta_ix1b_rglbmc/x86_64_quanta_ix1b_rglbmc_config.h>
|
||||
|
||||
#if X86_64_QUANTA_IX1B_RGLBMC_CONFIG_INCLUDE_UCLI == 1
|
||||
|
||||
#include <uCli/ucli.h>
|
||||
#include <uCli/ucli_argparse.h>
|
||||
#include <uCli/ucli_handler_macros.h>
|
||||
|
||||
static ucli_status_t
|
||||
x86_64_quanta_ix1b_rglbmc_ucli_ucli__config__(ucli_context_t* uc)
|
||||
{
|
||||
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_quanta_ix1b_rglbmc)
|
||||
}
|
||||
|
||||
/* <auto.ucli.handlers.start> */
|
||||
/* <auto.ucli.handlers.end> */
|
||||
|
||||
static ucli_module_t
|
||||
x86_64_quanta_ix1b_rglbmc_ucli_module__ =
|
||||
{
|
||||
"x86_64_quanta_ix1b_rglbmc_ucli",
|
||||
NULL,
|
||||
x86_64_quanta_ix1b_rglbmc_ucli_ucli_handlers__,
|
||||
NULL,
|
||||
NULL,
|
||||
};
|
||||
|
||||
ucli_node_t*
|
||||
x86_64_quanta_ix1b_rglbmc_ucli_node_create(void)
|
||||
{
|
||||
ucli_node_t* n;
|
||||
ucli_module_init(&x86_64_quanta_ix1b_rglbmc_ucli_module__);
|
||||
n = ucli_node_create("x86_64_quanta_ix1b_rglbmc", NULL, &x86_64_quanta_ix1b_rglbmc_ucli_module__);
|
||||
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_quanta_ix1b_rglbmc"));
|
||||
return n;
|
||||
}
|
||||
|
||||
#else
|
||||
void*
|
||||
x86_64_quanta_ix1b_rglbmc_ucli_node_create(void)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
include $(ONL)/make/pkg.mk
|
||||
@@ -0,0 +1 @@
|
||||
include $(ONL)/make/pkg.mk
|
||||
@@ -0,0 +1 @@
|
||||
!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ix1b-rglbmc REVISION=r0
|
||||
@@ -0,0 +1,31 @@
|
||||
---
|
||||
|
||||
######################################################################
|
||||
#
|
||||
# platform-config for IX1B
|
||||
#
|
||||
######################################################################
|
||||
|
||||
x86-64-quanta-ix1b-rglbmc-r0:
|
||||
|
||||
grub:
|
||||
|
||||
serial: >-
|
||||
--port=0x2f8
|
||||
--speed=115200
|
||||
--word=8
|
||||
--parity=no
|
||||
--stop=1
|
||||
|
||||
kernel:
|
||||
<<: *kernel-3-16
|
||||
|
||||
args: >-
|
||||
console=ttyS1,115200n8
|
||||
reboot=c,p
|
||||
|
||||
##network:
|
||||
## interfaces:
|
||||
## ma1:
|
||||
## name: ~
|
||||
## syspath: pci0000:00/0000:00:14.0
|
||||
@@ -0,0 +1,23 @@
|
||||
from onl.platform.base import *
|
||||
from onl.platform.quanta import *
|
||||
|
||||
class OnlPlatform_x86_64_quanta_ix1b_rglbmc_r0(OnlPlatformQuanta,
|
||||
OnlPlatformPortConfig_32x100):
|
||||
PLATFORM='x86-64-quanta-ix1b-rglbmc-r0'
|
||||
MODEL="IX1B"
|
||||
""" Define Quanta SYS_OBJECT_ID rule.
|
||||
|
||||
SYS_OBJECT_ID = .xxxx.ABCC
|
||||
"xxxx" define QCT device mark. For example, LB9->1048, LY2->3048
|
||||
"A" define QCT switch series name: LB define 1, LY define 2, IX define 3
|
||||
"B" define QCT switch series number 1: For example, LB9->9, LY2->2
|
||||
"CC" define QCT switch series number 2: For example, LY2->00, LY4R->18(R is 18th english letter)
|
||||
"""
|
||||
SYS_OBJECT_ID=".7032.3102"
|
||||
|
||||
def baseconfig(self):
|
||||
self.insmod("qci_pmbus")
|
||||
self.insmod("qci_cpld")
|
||||
self.insmod("quanta_platform_ix1b")
|
||||
|
||||
return True
|
||||
Reference in New Issue
Block a user