Upgrade to kernel lts-4.9.75 for arm64 platforms

Signed-off-by: Guo Hanyue <guo.hanyue@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
This commit is contained in:
Shengzhou Liu
2018-02-13 17:21:18 +08:00
parent 670b82d75c
commit 9e464d2075
25 changed files with 271007 additions and 2 deletions

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@@ -47,10 +47,10 @@ default:
<<: *arm-iproc-kernel-package
arm64-kernel-package: &arm64-kernel-package
package: onl-kernel-3.18.25-arm64-all:arm64
package: onl-kernel-4.9-arm64-all:arm64
arm64-kernel: &arm64-kernel
=: kernel-3.18.25-arm64-all.bin.gz
=: kernel-4.9-arm64-all.bin.gz
<<: *arm64-kernel-package
##############################

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@@ -0,0 +1,3 @@
linux-4.9.30
linux-4.9.30-mbuild
linux-4.9.30-dtbs

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@@ -0,0 +1 @@
kernel-*

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@@ -0,0 +1,28 @@
############################################################
#
# Default 4.9.30 configuration for arm64 platforms.
#
############################################################
THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
include $(ONL)/make/config.mk
ifndef K_TARGET_DIR
K_TARGET_DIR := $(THIS_DIR)
endif
MODSYNCLIST_EXTRA = arch/arm64/include arch/arm64/Makefile arch/arm64/lib
K_PATCH_SERIES=series.arm64
include ../../kconfig.mk
K_CONFIG := arm64-all.config
K_BUILD_TARGET := Image Image.gz freescale/fsl-ls1043a-rdb.dtb freescale/fsl-ls1046a-rdb.dtb freescale/fsl-ls2080a-rdb.dtb freescale/fsl-ls2088a-rdb.dtb freescale/fsl-ls1088a-rdb.dtb
K_COPY_SRC := arch/arm64/boot/Image
K_COPY_GZIP := 1
ifndef K_COPY_DST
K_COPY_DST := kernel-4.9-arm64-all.bin.gz
endif
export ARCH=arm64
DTS_LIST := fsl
include $(ONL)/make/kbuild.mk

File diff suppressed because it is too large Load Diff

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@@ -0,0 +1,28 @@
From 7dce678aa79947b235e0677822e32ba1e3905a6f Mon Sep 17 00:00:00 2001
From: Nipun Gupta <nipun.gupta@nxp.com>
Date: Fri, 27 Oct 2017 19:31:21 +0530
Subject: [PATCH 66/80] staging: fsl-mc: set coherent dma mask in devices on fsl-mc bus
Setting the dma cohernet mask is required to properly set the
DMA address range for the devices on fsl-mc bus
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
drivers/staging/fsl-mc/bus/fsl-mc-bus.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/staging/fsl-mc/bus/fsl-mc-bus.c b/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
index 30a48df..c70b630 100644
--- a/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
+++ b/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
@@ -662,6 +662,7 @@ int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
mc_dev->icid = parent_mc_dev->icid;
mc_dev->dma_mask = FSL_MC_DEFAULT_DMA_MASK;
mc_dev->dev.dma_mask = &mc_dev->dma_mask;
+ mc_dev->dev.coherent_dma_mask = mc_dev->dma_mask;
dev_set_msi_domain(&mc_dev->dev,
dev_get_msi_domain(&parent_mc_dev->dev));
}
--
1.7.1

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@@ -0,0 +1,61 @@
From 561e179a2e1474576c0c2ce5db576142dfab906b Mon Sep 17 00:00:00 2001
From: Guanhua Gao <guanhua.gao@nxp.com>
Date: Fri, 2 Mar 2018 11:03:17 +0800
Subject: [PATCH 67/80] crypto: caam/qi2 - fix probing order dependencies
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
1. If no DPIO devices are found during probe, it may be either because
there's none available or because they haven't been probed yet.
Request deferred probing in case it's the latter.
2. MC portals may not be available at probe time due to dependencies
on other modules.
Check the return value of the MC portal allocation function and
defer probing in case it's not available yet (-ENXIO).
For all other error cases the behaviour stays the same.
Integrated-by: Guanhua Gao <guanhua.gao@nxp.com>
Signed-off-by: Horia Geantă horia.geanta@nxp.com
---
drivers/crypto/caam/caamalg_qi2.c | 15 +++++++++++++--
1 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/caamalg_qi2.c b/drivers/crypto/caam/caamalg_qi2.c
index 1804094..23db390 100644
--- a/drivers/crypto/caam/caamalg_qi2.c
+++ b/drivers/crypto/caam/caamalg_qi2.c
@@ -5120,8 +5120,15 @@ static int __cold dpaa2_dpseci_dpio_setup(struct dpaa2_caam_priv *priv)
/* Register notification callbacks */
err = dpaa2_io_service_register(NULL, nctx);
if (unlikely(err)) {
- dev_err(dev, "notification register failed\n");
+ dev_dbg(dev, "No affine DPIO for cpu %d\n", cpu);
nctx->cb = NULL;
+ /*
+ * If no affine DPIO for this core, there's probably
+ * none available for next cores either. Signal we want
+ * to retry later, in case the DPIO devices weren't
+ * probed yet.
+ */
+ err = -EPROBE_DEFER;
goto err;
}
@@ -5599,7 +5606,11 @@ static int dpaa2_caam_probe(struct fsl_mc_device *dpseci_dev)
/* Obtain a MC portal */
err = fsl_mc_portal_allocate(dpseci_dev, 0, &priv->mc_io);
if (err) {
- dev_err(dev, "MC portal allocation failed\n");
+ if (err == -ENXIO)
+ err = -EPROBE_DEFER;
+ else
+ dev_err(dev, "MC portal allocation failed\n");
+
goto err_dma_mask;
}
--
1.7.1

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@@ -0,0 +1,39 @@
From 79fbbb04a03779c56101be7f022df931e0d54e03 Mon Sep 17 00:00:00 2001
From: Robert Baronescu <robert.baronescu@nxp.com>
Date: Tue, 10 Oct 2017 13:21:59 +0300
Subject: [PATCH 68/80] crypto: tcrypt - fix S/G table for test_aead_speed()
In case buffer length is a multiple of PAGE_SIZE,
the S/G table is incorrectly generated.
Fix this by handling buflen = k * PAGE_SIZE separately.
Signed-off-by: Robert Baronescu <robert.baronescu@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 5c6ac1d4f8fbdbed65dbeb8cf149d736409d16a1)
---
crypto/tcrypt.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c
index bbb35ee..ddef3fb 100644
--- a/crypto/tcrypt.c
+++ b/crypto/tcrypt.c
@@ -223,11 +223,13 @@ static void sg_init_aead(struct scatterlist *sg, char *xbuf[XBUFSIZE],
}
sg_init_table(sg, np + 1);
- np--;
+ if (rem)
+ np--;
for (k = 0; k < np; k++)
sg_set_buf(&sg[k + 1], xbuf[k], PAGE_SIZE);
- sg_set_buf(&sg[k + 1], xbuf[k], rem);
+ if (rem)
+ sg_set_buf(&sg[k + 1], xbuf[k], rem);
}
static void test_aead_speed(const char *algo, int enc, unsigned int secs,
--
1.7.1

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@@ -0,0 +1,34 @@
From 0f8843da350fd2a2e2be4df3c936d63ad7a24f08 Mon Sep 17 00:00:00 2001
From: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Date: Tue, 28 Nov 2017 15:47:45 +0530
Subject: [PATCH 69/80] ARM: dts: ls1021aqds: Add nand node for ifc controller
LS1021AQDS support NAND flash on IFC chip-select 2.
So add NAND node in device tree for IFC controller.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
arch/arm/boot/dts/ls1021a-qds.dts | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index f6280a6..bfd3746 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -252,6 +252,11 @@
device-width = <1>;
};
+ nand@2,0 {
+ compatible = "fsl,ifc-nand";
+ reg = <0x2 0x0 0x10000>;
+ };
+
fpga: board-control@3,0 {
#address-cells = <1>;
#size-cells = <1>;
--
1.7.1

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@@ -0,0 +1,219 @@
From 5517e15e16917ed3d2c112cb6c4895ea9b28d86d Mon Sep 17 00:00:00 2001
From: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Date: Mon, 5 Mar 2018 14:48:14 +0200
Subject: [PATCH 70/80] staging: fsl-dpaa2/ethsw: Refactor setting TCI
Avoid code duplication when configuring TCI on a switch port by using a
helper function. It makes sure that the port is disabled before setting the
TCI on a port.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
---
drivers/staging/fsl-dpaa2/ethsw/ethsw.c | 143 +++++++++++++------------------
1 files changed, 58 insertions(+), 85 deletions(-)
diff --git a/drivers/staging/fsl-dpaa2/ethsw/ethsw.c b/drivers/staging/fsl-dpaa2/ethsw/ethsw.c
index a4b4fb2..f9dc627 100644
--- a/drivers/staging/fsl-dpaa2/ethsw/ethsw.c
+++ b/drivers/staging/fsl-dpaa2/ethsw/ethsw.c
@@ -74,14 +74,60 @@ static int ethsw_add_vlan(struct ethsw_core *ethsw, u16 vid)
return 0;
}
+static int ethsw_port_set_tci(struct ethsw_port_priv *port_priv,
+ struct dpsw_tci_cfg *tci_cfg)
+{
+ struct ethsw_core *ethsw = port_priv->ethsw_data;
+ struct net_device *netdev = port_priv->netdev;
+ bool is_oper;
+ int err, ret;
+
+ /* Interface needs to be down to change PVID */
+ is_oper = netif_oper_up(netdev);
+ if (is_oper) {
+ err = dpsw_if_disable(ethsw->mc_io, 0,
+ ethsw->dpsw_handle,
+ port_priv->idx);
+ if (err) {
+ netdev_err(netdev, "dpsw_if_disable err %d\n", err);
+ return err;
+ }
+ }
+
+ err = dpsw_if_set_tci(ethsw->mc_io, 0, ethsw->dpsw_handle,
+ port_priv->idx, tci_cfg);
+ if (err) {
+ netdev_err(netdev, "dpsw_if_set_tci err %d\n", err);
+ goto set_tci_error;
+ }
+
+ /* Delete previous PVID info and mark the new one */
+ if (port_priv->pvid)
+ port_priv->vlans[port_priv->pvid] &= ~ETHSW_VLAN_PVID;
+ port_priv->vlans[tci_cfg->vlan_id] |= ETHSW_VLAN_PVID;
+ port_priv->pvid = tci_cfg->vlan_id;
+
+set_tci_error:
+ if (is_oper) {
+ ret = dpsw_if_enable(ethsw->mc_io, 0,
+ ethsw->dpsw_handle,
+ port_priv->idx);
+ if (ret) {
+ netdev_err(netdev, "dpsw_if_enable err %d\n", ret);
+ return ret;
+ }
+ }
+
+ return err;
+}
+
static int ethsw_port_add_vlan(struct ethsw_port_priv *port_priv,
u16 vid, u16 flags)
{
struct ethsw_core *ethsw = port_priv->ethsw_data;
struct net_device *netdev = port_priv->netdev;
struct dpsw_vlan_if_cfg vcfg;
- bool is_oper;
- int err, ret;
+ int err;
if (port_priv->vlans[vid]) {
netdev_warn(netdev, "VLAN %d already configured\n", vid);
@@ -117,46 +163,12 @@ static int ethsw_port_add_vlan(struct ethsw_port_priv *port_priv,
.vlan_id = vid,
};
- /* Interface needs to be down to change PVID */
- is_oper = netif_oper_up(netdev);
- if (is_oper) {
- err = dpsw_if_disable(ethsw->mc_io, 0,
- ethsw->dpsw_handle,
- port_priv->idx);
- if (err) {
- netdev_err(netdev,
- "dpsw_if_disable err %d\n", err);
- return err;
- }
- }
-
- err = dpsw_if_set_tci(ethsw->mc_io, 0, ethsw->dpsw_handle,
- port_priv->idx, &tci_cfg);
- if (!err) {
- /* Delete previous PVID info and mark the new one */
- if (port_priv->pvid)
- port_priv->vlans[port_priv->pvid]
- &= ~ETHSW_VLAN_PVID;
-
- port_priv->vlans[vid] |= ETHSW_VLAN_PVID;
- port_priv->pvid = vid;
- } else {
- netdev_err(netdev, "dpsw_if_set_tci err %d\n", err);
- }
-
- if (is_oper) {
- ret = dpsw_if_enable(ethsw->mc_io, 0,
- ethsw->dpsw_handle,
- port_priv->idx);
- if (ret) {
- netdev_err(netdev,
- "dpsw_if_enable err %d\n", ret);
- return ret;
- }
- }
+ err = ethsw_port_set_tci(port_priv, &tci_cfg);
+ if (err)
+ return err;
}
- return err;
+ return 0;
}
static int ethsw_set_learning(struct ethsw_core *ethsw, u8 flag)
@@ -781,51 +793,17 @@ static int ethsw_port_del_vlan(struct ethsw_port_priv *port_priv, u16 vid)
struct ethsw_core *ethsw = port_priv->ethsw_data;
struct net_device *netdev = port_priv->netdev;
struct dpsw_vlan_if_cfg vcfg;
- int i, err, ret;
- bool is_oper;
+ int i, err;
if (!port_priv->vlans[vid])
return -ENOENT;
if (port_priv->vlans[vid] & ETHSW_VLAN_PVID) {
struct dpsw_tci_cfg tci_cfg = { 0 };
- /* Interface needs to be down to change PVID */
- is_oper = netif_oper_up(netdev);
-
- if (is_oper) {
- err = dpsw_if_disable(ethsw->mc_io, 0,
- ethsw->dpsw_handle,
- port_priv->idx);
- if (err) {
- netdev_err(netdev, "dpsw_if_disable err %d\n",
- err);
- goto exit_err;
- }
- }
-
- err = dpsw_if_set_tci(ethsw->mc_io, 0,
- ethsw->dpsw_handle,
- port_priv->idx, &tci_cfg);
- if (!err) {
- port_priv->vlans[vid] &= ~ETHSW_VLAN_PVID;
- port_priv->pvid = 0;
- } else {
- netdev_err(netdev, "dpsw_if_set_tci err %d\n", err);
- }
-
- if (is_oper) {
- ret = dpsw_if_enable(ethsw->mc_io, 0,
- ethsw->dpsw_handle,
- port_priv->idx);
- if (ret) {
- netdev_err(netdev, "dpsw_if_enable err %d\n",
- ret);
- return ret;
- }
- }
+ err = ethsw_port_set_tci(port_priv, &tci_cfg);
if (err)
- goto exit_err;
+ return err;
}
vcfg.num_ifs = 1;
@@ -863,12 +841,10 @@ static int ethsw_port_del_vlan(struct ethsw_port_priv *port_priv, u16 vid)
err = ethsw_dellink_switch(ethsw, vid);
if (err)
- goto exit_err;
+ return err;
}
return 0;
-exit_err:
- return err;
}
static int port_vlans_del(struct net_device *netdev,
@@ -1230,12 +1206,9 @@ static int ethsw_port_init(struct ethsw_port_priv *port_priv, u16 port)
return err;
}
- err = dpsw_if_set_tci(ethsw->mc_io, 0, ethsw->dpsw_handle,
- port_priv->idx, &tci_cfg);
- if (err) {
- netdev_err(netdev, "dpsw_if_set_tci err %d\n", err);
+ err = ethsw_port_set_tci(port_priv, &tci_cfg);
+ if (err)
return err;
- }
err = dpsw_vlan_remove_if(ethsw->mc_io, 0, ethsw->dpsw_handle,
DEFAULT_VLAN_ID, &vcfg);
--
1.7.1

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@@ -0,0 +1,57 @@
From 89a4b48d812187acec3bd9df10dd17b865026016 Mon Sep 17 00:00:00 2001
From: Alison Wang <alison.wang@nxp.com>
Date: Thu, 8 Mar 2018 08:56:34 +0800
Subject: [PATCH 71/80] Revert "drm/fsl-dcu: Fix the interrupt issue in suspend/resume functions"
This reverts commit 3c9d544d91741b259bbd863ae9841be2e49de94c.
As upstream commit cffc01d24d2591cd2184c13fba32f50abfd20e68 can also fix
the original issue, the commit 3c9d544d91741b259bbd863ae9841be2e49de94c
needs to be reverted.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index 54f60ba..b1b4ab3 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -225,6 +225,7 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev)
if (!fsl_dev)
return 0;
+ disable_irq(fsl_dev->irq);
drm_kms_helper_poll_disable(fsl_dev->drm);
console_lock();
@@ -242,8 +243,6 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev)
return PTR_ERR(fsl_dev->state);
}
- disable_irq(fsl_dev->irq);
-
clk_disable_unprepare(fsl_dev->pix_clk);
clk_disable_unprepare(fsl_dev->clk);
@@ -270,8 +269,6 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
return ret;
}
- enable_irq(fsl_dev->irq);
-
if (fsl_dev->tcon)
fsl_tcon_bypass_enable(fsl_dev->tcon);
fsl_dcu_drm_init_planes(fsl_dev->drm);
@@ -282,6 +279,7 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
console_unlock();
drm_kms_helper_poll_enable(fsl_dev->drm);
+ enable_irq(fsl_dev->irq);
return 0;
}
--
1.7.1

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@@ -0,0 +1,49 @@
From dca4750eba8a9f0927eeb8462d99f911e3887456 Mon Sep 17 00:00:00 2001
From: Alison Wang <alison.wang@nxp.com>
Date: Thu, 8 Mar 2018 09:02:05 +0800
Subject: [PATCH 72/80] Revert "drm/fsl-dcu: Fix DCU pixel clock issue in suspend/resume functions"
This reverts commit 618875870eace8f96e83b48cb1ceff2042db8109.
As upstream commit 48f4d1f7fe48627a4c5c9332bcdf0f2a906e2f20 can also fix
the original issue, the commit 618875870eace8f96e83b48cb1ceff2042db8109
needs to be reverted.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 12 ------------
1 files changed, 0 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index b1b4ab3..cc2fde2 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -263,12 +263,6 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
return ret;
}
- ret = clk_prepare_enable(fsl_dev->pix_clk);
- if (ret < 0) {
- dev_err(dev, "failed to enable dcu pix clk\n");
- return ret;
- }
-
if (fsl_dev->tcon)
fsl_tcon_bypass_enable(fsl_dev->tcon);
fsl_dcu_drm_init_planes(fsl_dev->drm);
@@ -395,12 +389,6 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev)
goto disable_clk;
}
- ret = clk_prepare_enable(fsl_dev->pix_clk);
- if (ret < 0) {
- dev_err(dev, "failed to enable dcu pix clk\n");
- return ret;
- }
-
fsl_dev->tcon = fsl_tcon_init(dev);
drm = drm_dev_alloc(driver, dev);
--
1.7.1

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@@ -0,0 +1,36 @@
From 0ced0d50e4590f960e3bec793ac990b1fd69ecd8 Mon Sep 17 00:00:00 2001
From: Alison Wang <alison.wang@nxp.com>
Date: Thu, 8 Mar 2018 09:12:48 +0800
Subject: [PATCH 73/80] drm/fsl-dcu: Fix some issues caused by solving conflicts
This patch is to fix some issues caused by solving conflicts in merging
the patches.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index cc2fde2..956a439 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -243,7 +243,6 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev)
return PTR_ERR(fsl_dev->state);
}
- clk_disable_unprepare(fsl_dev->pix_clk);
clk_disable_unprepare(fsl_dev->clk);
return 0;
@@ -273,7 +272,6 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
console_unlock();
drm_kms_helper_poll_enable(fsl_dev->drm);
- enable_irq(fsl_dev->irq);
return 0;
}
--
1.7.1

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@@ -0,0 +1,62 @@
From e4ccfa475af0e2268fda483e3f3045eb0c6a7dc8 Mon Sep 17 00:00:00 2001
From: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Date: Thu, 17 Aug 2017 19:47:22 +0300
Subject: [PATCH 74/80] staging: dpaa2-evb: Update MTU update procedure
Set limits on the MTU to accommodate netdevice update. There is no need to
check the limits before setting the new value.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
---
drivers/staging/fsl-dpaa2/evb/evb.c | 18 ++++++++----------
1 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/staging/fsl-dpaa2/evb/evb.c b/drivers/staging/fsl-dpaa2/evb/evb.c
index 9ee09b4..d9df179 100644
--- a/drivers/staging/fsl-dpaa2/evb/evb.c
+++ b/drivers/staging/fsl-dpaa2/evb/evb.c
@@ -53,9 +53,9 @@
#define DPDMUX_MAX_IRQ_NUM 2
/* MAX FRAME LENGTH (currently 10k) */
-#define EVB_MAX_FRAME_LENGTH (10 * 1024)
-/* MIN FRAME LENGTH (64 bytes + 4 bytes CRC) */
-#define EVB_MIN_FRAME_LENGTH 68
+#define EVB_MAX_FRAME_LENGTH (10 * 1024)
+#define EVB_MAX_MTU (EVB_MAX_FRAME_LENGTH - VLAN_ETH_HLEN)
+#define EVB_MIN_MTU 68
struct evb_port_priv {
struct net_device *netdev;
@@ -456,16 +456,10 @@ static int evb_change_mtu(struct net_device *netdev,
if (port_priv->port_index > 0)
return -EPERM;
- if (mtu < EVB_MIN_FRAME_LENGTH || mtu > EVB_MAX_FRAME_LENGTH) {
- netdev_err(netdev, "Invalid MTU %d. Valid range is: %d..%d\n",
- mtu, EVB_MIN_FRAME_LENGTH, EVB_MAX_FRAME_LENGTH);
- return -EINVAL;
- }
-
err = dpdmux_set_max_frame_length(evb_priv->mc_io,
0,
evb_priv->mux_handle,
- (uint16_t)mtu);
+ (uint16_t)(mtu + VLAN_ETH_HLEN));
if (unlikely(err)) {
netdev_err(netdev, "dpdmux_ul_set_max_frame_length err %d\n",
@@ -1289,6 +1283,10 @@ static int evb_probe(struct fsl_mc_device *evb_dev)
list_add(&port_priv->list, &priv->port_list);
} else {
+ /* Set MTU limits only on uplink */
+ port_netdev->min_mtu = EVB_MIN_MTU;
+ port_netdev->max_mtu = EVB_MAX_MTU;
+
err = register_netdev(netdev);
if (err < 0) {
--
1.7.1

View File

@@ -0,0 +1,55 @@
From 598594852ab8bd742446e4051b08f6d83b0c6834 Mon Sep 17 00:00:00 2001
From: Pankaj Bansal <pankaj.bansal@nxp.com>
Date: Mon, 5 Mar 2018 12:37:04 +0530
Subject: [PATCH 75/80] arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.
NXP Erratum A008585 affects A57 core cluster used in LS2085rev1.
However this problem has been fixed in A72 core cluster used in LS2088.
Therefore remove the erratum from LS2088A. Keeping it only in LS2085.
Cc: <stable@vger.kernel.org> # 4.14
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com>
Acked-by: Priyanka Jain <priyanka.jain@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 ++++
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 3 +--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 71f15fa..3a64397 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -143,6 +143,10 @@
snps,dma-snooping;
};
+&timer {
+ fsl,erratum-a008585;
+};
+
&pcie1 {
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x10 0x00000000 0x0 0x00002000>; /* configuration space */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 9bef9e1..2a0a1df 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -111,13 +111,12 @@
mask = <0x2>;
};
- timer {
+ timer: timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
<1 14 4>, /* Physical Non-Secure PPI, active-low */
<1 11 4>, /* Virtual PPI, active-low */
<1 10 4>; /* Hypervisor PPI, active-low */
- fsl,erratum-a008585;
};
pmu {
--
1.7.1

View File

@@ -0,0 +1,78 @@
From d143455ee92126c9647a11c67b6db13ae50fc5d8 Mon Sep 17 00:00:00 2001
From: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Date: Wed, 7 Mar 2018 21:35:37 +0530
Subject: [PATCH 76/80] fsl-mc/dpio: aligned access of qbman cacheable region
Alignment requirement on ARM is lenient (In Linux) for regions
mapped as "Memory Type" but have very strict policy for regions
mapped as "Device Type". Unaligned access to regions mapped
as "Device Type" will always result to unaligned fault.
DPIO driver have un-aligned access to QBman cacheable region
and the Linux driver maps the region as "Memory Type". On Host
Linux this works because MMU Stage-1 configured by driver allows
unaligned access. In Virtual Machine cases, final region mapping type
is governed by combination of Stage-1 and Stage-2 MMU mapping.
Linux driver in VM controls maps the region as "Memory Type" in
Stage-1 MMU while Stage-2 is controlled by KVM. And current KVM
implementation does not allow device region to be mapped as
"Memory Type". Till we have a working/upstream-able solution
for Virtual Machine, we need to change un-aligned access in DPIO
driver to be aligned
While we reached to this point as we observed below alignment
exception in Virtual Machine when accessing qbman cacheable region.
kvm [2347]: Unsupported FSC: EC=0x24 xFSC=0x21
ESR_EL2=0x92000061
error: kvm run failed Bad address
PC=ffff000008398e78 SP=ffff800009bcb540
X00=ffff000008041000 X01=ffff800009bcb580 X02=ffff800009bcb650
X03=0000000000000180
X04=ffff000008041001 X05=ffff800009bcb581 X06=0200000000000000
X07=0000000000000000
X08=0000000000000000 X09=ffff000008041000 X10=0000000000000001
X11=0000000000de6cb0
X12=00000000fa83b2da X13=0000000000000001 X14=000000007f605ec8
X15=00000000e26f5d5e
X16=000000008521af1e X17=000000001076277e X18=ffff800009bcb5c0
X19=ffff800079da2b00
X20=ffff800009bcb650 X21=0000000000000002 X22=0000000000000000
X23=0000000000000000
X24=0000000000000000 X25=ffff8000099e7440 X26=ffff000008da6000
X27=ffff000008e7f000
X28=00000000499e7440 X29=ffff800009bcb540 X30=ffff00000839a160
PSTATE=20000145 --C- EL1h
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
---
drivers/staging/fsl-mc/bus/dpio/qbman-portal.c | 12 +++++++++++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
index 71a98ba..97fd356 100644
--- a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
+++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
@@ -439,7 +439,17 @@ int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
return -EBUSY;
p = qbman_get_cmd(s, QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
- memcpy(&p->dca, &d->dca, 31);
+ /* This is mapped as DEVICE type memory, writes are
+ * with address alignment:
+ * desc.dca address alignment = 1
+ * desc.seqnum address alignment = 2
+ * desc.orpid address alignment = 4
+ * desc.tgtid address alignment = 8
+ */
+ p->dca = d->dca;
+ p->seqnum = d->seqnum;
+ p->orpid = d->orpid;
+ memcpy(&p->tgtid, &d->tgtid, 24);
memcpy(&p->fd, fd, sizeof(*fd));
/* Set the verb byte, have to substitute in the valid-bit */
--
1.7.1

View File

@@ -0,0 +1,327 @@
From 2ec376cd862b5d62200bdce2f40f06175dfa33db Mon Sep 17 00:00:00 2001
From: Madalin Bucur <madalin.bucur@nxp.com>
Date: Fri, 9 Mar 2018 17:32:26 +0800
Subject: [PATCH 77/80] dpaa_eth: workaround for ERR010022
On LS1043A SoC there is a known erratum ERR010022 that results in split DMA
transfers in the FMan under certain conditions. This, combined with a fixed
size FIFO of ongoing DMA transfers that may overflow when a split occurs,
results in the FMan stalling DMA transfers under high traffic. To avoid the
problem, one needs to prevent the DMA transfer splits to occur by preparing
the buffers as follows.
In order to prevent split transactions, all frames need to be aligned to 16
bytes and not cross 4K address boundaries. To allow Jumbo frames (up to
9.6K), all data must be aligned to 256 byes. This way, 4K boundary crossings
will not trigger any transaction splits.
The errata is prevented from manifesting by realigning all outgoing frames to
256 byte boundaries. In the process, all S/G frames are linearized.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 223 ++++++++++++++++++++++--
1 files changed, 204 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 62f3b3a..250ab80 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -53,6 +53,9 @@
#include <linux/sort.h>
#include <soc/fsl/bman.h>
#include <soc/fsl/qman.h>
+#if !defined(CONFIG_PPC) && defined(CONFIG_SOC_BUS)
+#include <linux/sys_soc.h> /* soc_device_match */
+#endif
#include "fman.h"
#include "fman_port.h"
@@ -73,6 +76,10 @@
module_param(tx_timeout, ushort, 0444);
MODULE_PARM_DESC(tx_timeout, "The Tx timeout in ms");
+#ifndef CONFIG_PPC
+bool dpaa_errata_a010022;
+#endif
+
#define FM_FD_STAT_RX_ERRORS \
(FM_FD_ERR_DMA | FM_FD_ERR_PHYSICAL | \
FM_FD_ERR_SIZE | FM_FD_ERR_CLS_DISCARD | \
@@ -1458,7 +1465,19 @@ static int dpaa_bp_add_8_bufs(const struct dpaa_bp *dpaa_bp)
u8 i;
for (i = 0; i < 8; i++) {
+#ifndef CONFIG_PPC
+ if (dpaa_errata_a010022) {
+ struct page *page = alloc_page(GFP_KERNEL);
+
+ if (unlikely(!page))
+ goto release_previous_buffs;
+ new_buf = page_address(page);
+ } else {
+ new_buf = netdev_alloc_frag(dpaa_bp->raw_size);
+ }
+#else
new_buf = netdev_alloc_frag(dpaa_bp->raw_size);
+#endif
if (unlikely(!new_buf)) {
dev_err(dev, "netdev_alloc_frag() failed, size %zu\n",
dpaa_bp->raw_size);
@@ -1603,9 +1622,13 @@ static int dpaa_eth_refill_bpools(struct dpaa_priv *priv)
dma_unmap_page(dev, qm_sg_addr(&sgt[i]),
qm_sg_entry_get_len(&sgt[i]), dma_dir);
}
-
- /* Free the page frag that we allocated on Tx */
- skb_free_frag(phys_to_virt(addr));
+#ifndef CONFIG_PPC
+ if (dpaa_errata_a010022)
+ put_page(virt_to_page(sgt));
+ else
+#endif
+ /* Free the page frag that we allocated on Tx */
+ skb_free_frag(phys_to_virt(addr));
} else {
dma_unmap_single(dev, addr,
skb_tail_pointer(skb) - (u8 *)skbh, dma_dir);
@@ -1867,15 +1890,27 @@ static int skb_to_sg_fd(struct dpaa_priv *priv,
size_t frag_len;
void *sgt_buf;
- /* get a page frag to store the SGTable */
- sz = SKB_DATA_ALIGN(priv->tx_headroom +
- sizeof(struct qm_sg_entry) * (1 + nr_frags));
- sgt_buf = netdev_alloc_frag(sz);
- if (unlikely(!sgt_buf)) {
- netdev_err(net_dev, "netdev_alloc_frag() failed for size %d\n",
- sz);
- return -ENOMEM;
+#ifndef CONFIG_PPC
+ if (unlikely(dpaa_errata_a010022)) {
+ struct page *page = alloc_page(GFP_ATOMIC);
+ if (unlikely(!page))
+ return -ENOMEM;
+ sgt_buf = page_address(page);
+ } else {
+#endif
+ /* get a page frag to store the SGTable */
+ sz = SKB_DATA_ALIGN(priv->tx_headroom +
+ sizeof(struct qm_sg_entry) * (1 + nr_frags));
+ sgt_buf = netdev_alloc_frag(sz);
+ if (unlikely(!sgt_buf)) {
+ netdev_err(net_dev,
+ "netdev_alloc_frag() failed for size %d\n",
+ sz);
+ return -ENOMEM;
+ }
+#ifndef CONFIG_PPC
}
+#endif
/* Enable L3/L4 hardware checksum computation.
*
@@ -1994,6 +2029,122 @@ static inline int dpaa_xmit(struct dpaa_priv *priv,
return 0;
}
+#ifndef CONFIG_PPC
+/* On LS1043A SoC there is a known erratum ERR010022 that results in split DMA
+ * transfers in the FMan under certain conditions. This, combined with a fixed
+ * size FIFO of ongoing DMA transfers that may overflow when a split occurs,
+ * results in the FMan stalling DMA transfers under high traffic. To avoid the
+ * problem, one needs to prevent the DMA transfer splits to occur by preparing
+ * the buffers
+ */
+
+#define DPAA_A010022_HEADROOM 256
+#define CROSS_4K_BOUND(start, size) \
+ (((start) + (size)) > (((start) + 0x1000) & ~0xFFF))
+
+static bool dpaa_errata_a010022_has_dma_issue(struct sk_buff *skb,
+ struct dpaa_priv *priv)
+{
+ int nr_frags, i = 0;
+ skb_frag_t *frag;
+
+ /* Transfers that do not start at 16B aligned addresses will be split;
+ * Transfers that cross a 4K page boundary will also be split
+ */
+
+ /* Check if the frame data is aligned to 16 bytes */
+ if ((uintptr_t)skb->data % DPAA_FD_DATA_ALIGNMENT)
+ return true;
+
+ /* Check if the headroom crosses a boundary */
+ if (CROSS_4K_BOUND((uintptr_t)skb->head, skb_headroom(skb)))
+ return true;
+
+ /* Check if the non-paged data crosses a boundary */
+ if (CROSS_4K_BOUND((uintptr_t)skb->data, skb_headlen(skb)))
+ return true;
+
+ nr_frags = skb_shinfo(skb)->nr_frags;
+
+ while (i < nr_frags) {
+ frag = &skb_shinfo(skb)->frags[i];
+
+ /* Check if a paged fragment crosses a boundary from its
+ * offset to its end.
+ */
+ if (CROSS_4K_BOUND((uintptr_t)frag->page_offset, frag->size))
+ return true;
+
+ i++;
+ }
+
+ return false;
+}
+
+static struct sk_buff *dpaa_errata_a010022_prevent(struct sk_buff *skb,
+ struct dpaa_priv *priv)
+{
+ int trans_offset = skb_transport_offset(skb);
+ int net_offset = skb_network_offset(skb);
+ int nsize, npage_order, headroom;
+ struct sk_buff *nskb = NULL;
+ struct page *npage;
+ void *npage_addr;
+
+ if (!dpaa_errata_a010022_has_dma_issue(skb, priv))
+ return skb;
+
+ /* For the new skb we only need the old one's data (both non-paged and
+ * paged). We can skip the old tailroom.
+ *
+ * The headroom also needs to fit our private info (64 bytes) but we
+ * reserve 256 bytes instead in order to guarantee that the data is
+ * aligned to 256.
+ */
+ headroom = DPAA_A010022_HEADROOM;
+ nsize = headroom + skb->len +
+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
+
+ /* Reserve enough memory to accommodate Jumbo frames */
+ npage_order = (nsize - 1) / PAGE_SIZE;
+ npage = alloc_pages(GFP_ATOMIC | __GFP_COMP, npage_order);
+ if (unlikely(!npage)) {
+ WARN_ONCE(1, "Memory allocation failure\n");
+ return NULL;
+ }
+ npage_addr = page_address(npage);
+
+ nskb = build_skb(npage_addr, nsize);
+ if (unlikely(!nskb))
+ goto err;
+
+ /* Code borrowed and adapted from skb_copy() */
+ skb_reserve(nskb, headroom);
+ skb_put(nskb, skb->len);
+ if (skb_copy_bits(skb, 0, nskb->data, skb->len)) {
+ WARN_ONCE(1, "skb parsing failure\n");
+ goto err;
+ }
+ copy_skb_header(nskb, skb);
+
+ /* We move the headroom when we align it so we have to reset the
+ * network and transport header offsets relative to the new data
+ * pointer. The checksum offload relies on these offsets.
+ */
+ skb_set_network_header(nskb, net_offset);
+ skb_set_transport_header(nskb, trans_offset);
+
+ dev_kfree_skb(skb);
+ return nskb;
+
+err:
+ if (nskb)
+ dev_kfree_skb(nskb);
+ put_page(npage);
+ return NULL;
+}
+#endif
+
static int dpaa_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
{
const int queue_mapping = skb_get_queue_mapping(skb);
@@ -2027,19 +2178,32 @@ static int dpaa_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
/* MAX_SKB_FRAGS is equal or larger than our dpaa_SGT_MAX_ENTRIES;
* make sure we don't feed FMan with more fragments than it supports.
*/
- if (nonlinear &&
- likely(skb_shinfo(skb)->nr_frags < DPAA_SGT_MAX_ENTRIES)) {
- /* Just create a S/G fd based on the skb */
- err = skb_to_sg_fd(priv, skb, &fd);
- percpu_priv->tx_frag_skbuffs++;
- } else {
+ if (unlikely(nonlinear &&
+ (skb_shinfo(skb)->nr_frags >= DPAA_SGT_MAX_ENTRIES))) {
/* If the egress skb contains more fragments than we support
* we have no choice but to linearize it ourselves.
*/
- if (unlikely(nonlinear) && __skb_linearize(skb))
+ if (__skb_linearize(skb))
+ goto enomem;
+
+ nonlinear = skb_is_nonlinear(skb);
+ }
+
+#ifndef CONFIG_PPC
+ if (unlikely(dpaa_errata_a010022)) {
+ skb = dpaa_errata_a010022_prevent(skb, priv);
+ if (!skb)
goto enomem;
+ nonlinear = skb_is_nonlinear(skb);
+ }
+#endif
- /* Finally, create a contig FD from this skb */
+ if (nonlinear) {
+ /* Just create a S/G fd based on the skb */
+ err = skb_to_sg_fd(priv, skb, &fd);
+ percpu_priv->tx_frag_skbuffs++;
+ } else {
+ /* Create a contig FD from this skb */
err = skb_to_contig_fd(priv, skb, &fd, &offset);
}
if (unlikely(err < 0))
@@ -2827,6 +2991,23 @@ static int dpaa_remove(struct platform_device *pdev)
return err;
}
+#ifndef CONFIG_PPC
+static bool __init soc_has_errata_a010022(void)
+{
+#ifdef CONFIG_SOC_BUS
+ const struct soc_device_attribute soc_msi_matches[] = {
+ { .family = "QorIQ LS1043A",
+ .data = NULL },
+ { },
+ };
+
+ if (!soc_device_match(soc_msi_matches))
+ return false;
+#endif
+ return true; /* cannot identify SoC or errata applies */
+}
+#endif
+
static struct platform_device_id dpaa_devtype[] = {
{
.name = "dpaa-ethernet",
@@ -2851,6 +3032,10 @@ static int __init dpaa_load(void)
pr_debug("FSL DPAA Ethernet driver\n");
+#ifndef CONFIG_PPC
+ /* Detect if the current SoC requires the DMA transfer alignment workaround */
+ dpaa_errata_a010022 = soc_has_errata_a010022();
+#endif
/* initialize dpaa_eth mirror values */
dpaa_rx_extra_headroom = fman_get_rx_extra_headroom();
dpaa_max_frm = fman_get_max_frm();
--
1.7.1

View File

@@ -0,0 +1,34 @@
From e23a32afa9b8257cdc885d8ed3a704583da1041f Mon Sep 17 00:00:00 2001
From: Calvin Johnson <calvin.johnson@nxp.com>
Date: Thu, 8 Mar 2018 13:58:38 +0530
Subject: [PATCH 78/80] staging: fsl_ppfe/eth: calculate PFE_PKT_SIZE with SKB_DATA_ALIGN
pfe packet size was calculated without considering skb data alignment
and this resulted in jumbo frames crashing kernel when the
cacheline size increased from 64 to 128 bytes with
commit 97303480753e ("arm64: Increase the max granular size").
Modify pfe packet size caclulation to include skb data alignment of
sizeof(struct skb_shared_info).
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
---
drivers/staging/fsl_ppfe/pfe_hif_lib.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/staging/fsl_ppfe/pfe_hif_lib.h b/drivers/staging/fsl_ppfe/pfe_hif_lib.h
index d48eb14..08031f1 100644
--- a/drivers/staging/fsl_ppfe/pfe_hif_lib.h
+++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.h
@@ -146,7 +146,7 @@ struct tx_queue_desc {
#define PFE_BUF_SIZE 2048
#define PFE_PKT_HEADROOM 128
-#define SKB_SHARED_INFO_SIZE (sizeof(struct skb_shared_info))
+#define SKB_SHARED_INFO_SIZE SKB_DATA_ALIGN(sizeof(struct skb_shared_info))
#define PFE_PKT_SIZE (PFE_BUF_SIZE - PFE_PKT_HEADROOM \
- SKB_SHARED_INFO_SIZE)
#define MAX_L2_HDR_SIZE 14 /* Not correct for VLAN/PPPoE */
--
1.7.1

View File

@@ -0,0 +1,47 @@
From b4fefb1d0b6f8b669e6a3b6988dcf95c80f5e244 Mon Sep 17 00:00:00 2001
From: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Date: Wed, 7 Mar 2018 13:48:39 +0530
Subject: [PATCH 79/80] driver: mtd: ifc: increase eccstat array size for ver >= 2.0.0
Number of ECC status registers i.e. (ECCSTATx) has been increased
in IFC version 2.0.0 due to increase in SRAM size.
Fix the resulting eccstat array overflow.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
drivers/mtd/nand/fsl_ifc_nand.c | 10 ++++++++--
1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 785e9ee..6ec0b0e 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -221,7 +221,7 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc_nand_ctrl *nctrl = ifc_nand_ctrl;
struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
- u32 eccstat[4];
+ u32 eccstat[8];
int i;
/* set the chip select for NAND Transaction */
@@ -265,8 +265,14 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
else
eccstat_regs = ifc->ifc_nand.v1_nand_eccstat;
- for (i = sector / 4; i <= sector_end / 4; i++)
+ for (i = sector / 4; i <= sector_end / 4; i++) {
+ if (i >= ARRAY_SIZE(eccstat)) {
+ dev_err(priv->dev, "%s: eccstat small for %d\n",
+ __func__, i);
+ return;
+ }
eccstat[i] = ifc_in32(&eccstat_regs[i]);
+ }
for (i = sector; i <= sector_end; i++) {
errors = check_read_ecc(mtd, ctrl, eccstat, i);
--
1.7.1

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@@ -0,0 +1,37 @@
From 63ac44cb36b5e011ee5f04d533975c5eac83149c Mon Sep 17 00:00:00 2001
From: Zhao Qiang <qiang.zhao@nxp.com>
Date: Tue, 13 Mar 2018 15:51:49 +0800
Subject: [PATCH 80/80] Revert "DPAA: adjust DPAA to adapt to Linux 4.9"
This reverts commit 863f99812459396fe3431dbd1ba3f773a0d1285f.
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 250ab80..627a961 100644
--- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
@@ -328,8 +328,8 @@ static void dpaa_tx_timeout(struct net_device *net_dev)
/* Calculates the statistics for the given device by adding the statistics
* collected by each CPU.
*/
-static struct rtnl_link_stats64 *dpaa_get_stats64(struct net_device *net_dev,
- struct rtnl_link_stats64 *s)
+static void dpaa_get_stats64(struct net_device *net_dev,
+ struct rtnl_link_stats64 *s)
{
int numstats = sizeof(struct rtnl_link_stats64) / sizeof(u64);
struct dpaa_priv *priv = netdev_priv(net_dev);
@@ -347,8 +347,6 @@ static void dpaa_tx_timeout(struct net_device *net_dev)
for (j = 0; j < numstats; j++)
netstats[j] += cpustats[j];
}
-
- return s;
}
static int dpaa_setup_tc(struct net_device *net_dev, u32 handle, __be16 proto,
--
1.7.1

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@@ -0,0 +1,17 @@
0001-add-patch-support-for-linux-v4.9.75-on-ONL.patch
0002-staging-fsl-mc-set-coherent-dma-mask-in-devices-on-f.patch
0003-crypto-caam-qi2-fix-probing-order-dependencies.patch
0004-crypto-tcrypt-fix-S-G-table-for-test_aead_speed.patch
0005-ARM-dts-ls1021aqds-Add-nand-node-for-ifc-controller.patch
0006-staging-fsl-dpaa2-ethsw-Refactor-setting-TCI.patch
0007-Revert-drm-fsl-dcu-Fix-the-interrupt-issue-in-suspen.patch
0008-Revert-drm-fsl-dcu-Fix-DCU-pixel-clock-issue-in-susp.patch
0009-drm-fsl-dcu-Fix-some-issues-caused-by-solving-confli.patch
0010-staging-dpaa2-evb-Update-MTU-update-procedure.patch
0011-arm64-dts-ls208x-remove-NXP-Erratum-A008585-from-LS2.patch
0012-fsl-mc-dpio-aligned-access-of-qbman-cacheable-region.patch
0013-dpaa_eth-workaround-for-ERR010022.patch
0014-staging-fsl_ppfe-eth-calculate-PFE_PKT_SIZE-with-SKB.patch
0015-driver-mtd-ifc-increase-eccstat-array-size-for-ver-2.patch
0016-Revert-DPAA-adjust-DPAA-to-adapt-to-Linux-4.9.patch

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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

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@@ -0,0 +1,19 @@
common:
arch: arm64
version: 1.0.0
copyright: Copyright 2013, 2014, 2015 Big Switch Networks
maintainer: support@bigswitch.com
support: opennetworklinux@googlegroups.com
packages:
- name: onl-kernel-4.9-arm64-all
version: 1.0.0
summary: Open Network Linux Kernel 4.9 for ARM64 Integrated Processor Platforms.
files:
builds/kernel-4.9* : $$PKG_INSTALL/
builds/linux-4.9*-mbuild : $$PKG_INSTALL/mbuilds
builds/linux-4.9*-dtbs : $$PKG_INSTALL/dtbs
changelog: Change changes changes.,

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@@ -0,0 +1,10 @@
# -*- Makefile -*-
THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
include $(ONL)/make/config.mk
kernel:
$(MAKE) -C $(ONL)/packages/base/any/kernels/4.9-lts/configs/arm64-all K_TARGET_DIR=$(THIS_DIR) $(ONL_MAKE_PARALLEL)
clean:
rm -rf linux-4.9*