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Add to support as4222_28pe ONLP

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This commit is contained in:
Jostar Yang
2019-01-08 11:01:22 +08:00
parent 7e34979bbd
commit 9efa90fb58
45 changed files with 3623 additions and 0 deletions
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3
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/.gitignore vendored Executable file
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*x86*64*accton*as4222*28pe*.mk
onlpdump.mk

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/Makefile Executable file
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include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/modules/Makefile Executable file
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include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/modules/PKG.yml Executable file
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!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as4222-28pe ARCH=amd64 KERNELS="onl-kernel-4.14-lts-x86-64-all:amd64"

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/modules/builds/.gitignore vendored Executable file
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lib

6
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/modules/builds/Makefile Executable file
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KERNELS := onl-kernel-4.14-lts-x86-64-all:amd64
KMODULES := $(wildcard *.c)
VENDOR := accton
BASENAME := x86-64-accton-as4222-28pe
ARCH := x86_64
include $(ONL)/make/kmodule.mk

718
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/modules/builds/x86-64-accton-as4222-28pe-cpld.c Executable file
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/*
* Copyright (C) Brandon Chuang <brandon_chuang@accton.com.tw>
*
* This module supports the accton cpld that hold the channel select
* mechanism for other i2c slave devices, such as SFP.
* This includes the:
* Accton as4222_28pe CPLD
*
* Based on:
* pca954x.c from Kumar Gala <galak@kernel.crashing.org>
* Copyright (C) 2006
*
* Based on:
* pca954x.c from Ken Harrenstien
* Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
*
* Based on:
* i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
* and
* pca9540.c from Jean Delvare <khali@linux-fr.org>.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/version.h>
#include <linux/stat.h>
#include <linux/hwmon-sysfs.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#define I2C_RW_RETRY_COUNT 10
#define I2C_RW_RETRY_INTERVAL 60 /* ms */
#define FAN_DUTY_CYCLE_REG_MASK 0xF
#define FAN_MAX_DUTY_CYCLE 100
#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100
static LIST_HEAD(cpld_client_list);
static struct mutex list_lock;
struct cpld_client_node {
struct i2c_client *client;
struct list_head list;
};
enum cpld_type {
as4222_28pe_cpld,
};
static const u8 fan_reg[] = {
0x60, /* fan PWM(for all fan) */
0x61, /* front fan 1 speed(rpm) */
0x63, /* front fan 2 speed(rpm) */
0x65 /* front fan 3 speed(rpm) */
};
struct as4222_28pe_cpld_data {
enum cpld_type type;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* != 0 if registers are valid */
unsigned long last_updated; /* In jiffies */
u8 reg_fan_val[ARRAY_SIZE(fan_reg)]; /* Register value */
};
static const struct i2c_device_id as4222_28pe_cpld_id[] = {
{ "as4222_28pe_cpld", as4222_28pe_cpld},
{ }
};
MODULE_DEVICE_TABLE(i2c, as4222_28pe_cpld_id);
#define TRANSCEIVER_PRESENT_ATTR_ID(index) MODULE_PRESENT_##index
#define TRANSCEIVER_TXDISABLE_ATTR_ID(index) MODULE_TXDISABLE_##index
#define TRANSCEIVER_RXLOS_ATTR_ID(index) MODULE_RXLOS_##index
#define TRANSCEIVER_TXFAULT_ATTR_ID(index) MODULE_TXFAULT_##index
#define FAN_SPEED_RPM_ATTR_ID(index) FAN_SPEED_RPM_##index
enum as4222_28pe_cpld_sysfs_attributes {
CPLD_VERSION,
ACCESS,
/* transceiver attributes */
PSU_POWER_GOOD,
TRANSCEIVER_PRESENT_ATTR_ID(25),
TRANSCEIVER_PRESENT_ATTR_ID(26),
TRANSCEIVER_PRESENT_ATTR_ID(27),
TRANSCEIVER_PRESENT_ATTR_ID(28),
TRANSCEIVER_TXDISABLE_ATTR_ID(25),
TRANSCEIVER_TXDISABLE_ATTR_ID(26),
TRANSCEIVER_TXDISABLE_ATTR_ID(27),
TRANSCEIVER_TXDISABLE_ATTR_ID(28),
TRANSCEIVER_RXLOS_ATTR_ID(25),
TRANSCEIVER_RXLOS_ATTR_ID(26),
TRANSCEIVER_RXLOS_ATTR_ID(27),
TRANSCEIVER_RXLOS_ATTR_ID(28),
TRANSCEIVER_TXFAULT_ATTR_ID(25),
TRANSCEIVER_TXFAULT_ATTR_ID(26),
TRANSCEIVER_TXFAULT_ATTR_ID(27),
TRANSCEIVER_TXFAULT_ATTR_ID(28),
FAN_DUTY_CYCLE_PERCENTAGE,
FAN_SPEED_RPM_ATTR_ID(1),
FAN_SPEED_RPM_ATTR_ID(2),
FAN_SPEED_RPM_ATTR_ID(3)
};
/* sysfs attributes for hwmon
*/
static ssize_t show_status(struct device *dev, struct device_attribute *da,
char *buf);
static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da,
const char *buf, size_t count);
static ssize_t access(struct device *dev, struct device_attribute *da,
const char *buf, size_t count);
static ssize_t show_version(struct device *dev, struct device_attribute *da,
char *buf);
static int as4222_28pe_cpld_read_internal(struct i2c_client *client, u8 reg);
static int as4222_28pe_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value);
/*fan sysfs*/
static struct as4222_28pe_cpld_data *as4222_28pe_fan_update_device(struct device *dev);
static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf);
static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da,
const char *buf, size_t count);
static ssize_t show_power(struct device *dev, struct device_attribute *da,
char *buf);
/* transceiver attributes */
#define DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(index) \
static SENSOR_DEVICE_ATTR(module_present_##index, S_IRUGO, show_status, NULL, MODULE_PRESENT_##index); \
static SENSOR_DEVICE_ATTR(module_tx_disable_##index, S_IRUGO | S_IWUSR, show_status, set_tx_disable, MODULE_TXDISABLE_##index); \
static SENSOR_DEVICE_ATTR(module_rx_los_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index); \
static SENSOR_DEVICE_ATTR(module_tx_fault_##index, S_IRUGO, show_status, NULL, MODULE_RXLOS_##index);
#define DECLARE_SFP_TRANSCEIVER_ATTR(index) \
&sensor_dev_attr_module_present_##index.dev_attr.attr, \
&sensor_dev_attr_module_tx_disable_##index.dev_attr.attr, \
&sensor_dev_attr_module_rx_los_##index.dev_attr.attr, \
&sensor_dev_attr_module_tx_fault_##index.dev_attr.attr
#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \
static SENSOR_DEVICE_ATTR(fan_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN_DUTY_CYCLE_PERCENTAGE);
#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan_duty_cycle_percentage.dev_attr.attr
#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index) \
static SENSOR_DEVICE_ATTR(fan_speed_rpm_##index, S_IRUGO, fan_show_value, NULL, FAN_SPEED_RPM_##index)
#define DECLARE_FAN_SPEED_RPM_ATTR(index) &sensor_dev_attr_fan_speed_rpm_##index.dev_attr.attr
static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_power, NULL, PSU_POWER_GOOD);
static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, NULL, CPLD_VERSION);
static SENSOR_DEVICE_ATTR(access, S_IWUSR, NULL, access, ACCESS);
/* transceiver attributes */
DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(25);
DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(26);
DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(27);
DECLARE_SFP_TRANSCEIVER_SENSOR_DEVICE_ATTR(28);
/* fan attributes */
DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1);
DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2);
DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3);
DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(1);
static struct attribute *as4222_28pe_cpld_attributes[] = {
&sensor_dev_attr_version.dev_attr.attr,
&sensor_dev_attr_access.dev_attr.attr,
&sensor_dev_attr_psu_power_good.dev_attr.attr,
DECLARE_SFP_TRANSCEIVER_ATTR(25),
DECLARE_SFP_TRANSCEIVER_ATTR(26),
DECLARE_SFP_TRANSCEIVER_ATTR(27),
DECLARE_SFP_TRANSCEIVER_ATTR(28),
DECLARE_FAN_SPEED_RPM_ATTR(1),
DECLARE_FAN_SPEED_RPM_ATTR(2),
DECLARE_FAN_SPEED_RPM_ATTR(3),
DECLARE_FAN_DUTY_CYCLE_ATTR(1),
NULL
};
static const struct attribute_group as4222_28pe_cpld_group = {
.attrs = as4222_28pe_cpld_attributes,
};
static ssize_t show_status(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct as4222_28pe_cpld_data *data = i2c_get_clientdata(client);
int status = 0;
u8 reg = 0, mask = 0, revert = 0;
switch (attr->index)
{
case MODULE_PRESENT_25 ... MODULE_PRESENT_28:
reg = 0x9;
mask = 0x1 << (attr->index - MODULE_PRESENT_25);
break;
case MODULE_RXLOS_25 ... MODULE_RXLOS_26:
reg = 0x2;
mask = 0x1 << (attr->index==MODULE_RXLOS_25?0:4);
break;
case MODULE_RXLOS_27 ... MODULE_RXLOS_28:
reg = 0x3;
mask = 0x1<< (attr->index==MODULE_RXLOS_27?0:4);;
break;
case MODULE_TXFAULT_25 ... MODULE_TXFAULT_26:
reg = 0x2;
mask = 0x2 << (attr->index==MODULE_TXFAULT_25?0:4);
break;
case MODULE_TXFAULT_27 ... MODULE_TXFAULT_28:
reg = 0x3;
mask = 0x2 << (attr->index==MODULE_TXFAULT_27?0:4);
break;
case MODULE_TXDISABLE_25 ... MODULE_TXDISABLE_28:
reg = 0x9;
mask = 0x10 << (attr->index - MODULE_TXDISABLE_25);
break;
default:
return 0;
}
if( (attr->index >= MODULE_PRESENT_25 && attr->index <= MODULE_PRESENT_28) ||
(attr->index >= MODULE_TXDISABLE_25 && attr->index <= MODULE_TXDISABLE_28)
)
{
revert = 1;
}
mutex_lock(&data->update_lock);
status = as4222_28pe_cpld_read_internal(client, reg);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", revert ? !(status & mask) : !!(status & mask));
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t set_tx_disable(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct as4222_28pe_cpld_data *data = i2c_get_clientdata(client);
long disable;
int status;
u8 reg = 0, mask = 0;
status = kstrtol(buf, 10, &disable);
if (status) {
return status;
}
reg = 0x9;
switch (attr->index)
{
case MODULE_TXDISABLE_25:
mask = 0x10;
break;
case MODULE_TXDISABLE_26:
mask = 0x20;
break;
case MODULE_TXDISABLE_27:
mask = 0x40;
break;
case MODULE_TXDISABLE_28:
mask = 0x80;
break;
default:
return 0;
}
/* Read current status */
mutex_lock(&data->update_lock);
status = as4222_28pe_cpld_read_internal(client, reg);
if (unlikely(status < 0)) {
goto exit;
}
/* Update tx_disable status */
if (disable) {
status &= ~mask;
}
else {
status |= mask;
}
status = as4222_28pe_cpld_write_internal(client, reg, status);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return count;
exit:
mutex_unlock(&data->update_lock);
return status;
}
static ssize_t access(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int status;
u32 addr, val;
struct i2c_client *client = to_i2c_client(dev);
struct as4222_28pe_cpld_data *data = i2c_get_clientdata(client);
if (sscanf(buf, "0x%x 0x%x", &addr, &val) != 2) {
return -EINVAL;
}
if (addr > 0xFF || val > 0xFF) {
return -EINVAL;
}
mutex_lock(&data->update_lock);
status = as4222_28pe_cpld_write_internal(client, addr, val);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return count;
exit:
mutex_unlock(&data->update_lock);
return status;
}
static void as4222_28pe_cpld_add_client(struct i2c_client *client)
{
struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
if (!node) {
dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr);
return;
}
node->client = client;
mutex_lock(&list_lock);
list_add(&node->list, &cpld_client_list);
mutex_unlock(&list_lock);
}
static void as4222_28pe_cpld_remove_client(struct i2c_client *client)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int found = 0;
mutex_lock(&list_lock);
list_for_each(list_node, &cpld_client_list)
{
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client == client) {
found = 1;
break;
}
}
if (found) {
list_del(list_node);
kfree(cpld_node);
}
mutex_unlock(&list_lock);
}
static ssize_t show_version(struct device *dev, struct device_attribute *attr, char *buf)
{
int val = 0;
struct i2c_client *client = to_i2c_client(dev);
val = i2c_smbus_read_byte_data(client, 0x1);
if (val < 0) {
dev_dbg(&client->dev, "cpld(0x%x) reg(0x1) err %d\n", client->addr, val);
}
return sprintf(buf, "%d\n", val);
}
/* fan utility functions
*/
static u32 reg_val_to_duty_cycle(u8 reg_val)
{
reg_val &= FAN_DUTY_CYCLE_REG_MASK;
return ((u32)(reg_val) * 1250 + 50)/ 100;
}
static u8 duty_cycle_to_reg_val(u8 duty_cycle)
{
return ((u32)duty_cycle * 100 / 1250);
}
static u32 reg_val_to_speed_rpm(u8 reg_val)
{
return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP;
}
static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da,
const char *buf, size_t count)
{
int error, value;
struct i2c_client *client = to_i2c_client(dev);
error = kstrtoint(buf, 10, &value);
if (error)
return error;
if (value < 0 || value > FAN_MAX_DUTY_CYCLE)
return -EINVAL;
as4222_28pe_cpld_write_internal(client, fan_reg[0], duty_cycle_to_reg_val(value));
return count;
}
static ssize_t fan_show_value(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 duty_cycle;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct as4222_28pe_cpld_data *data = as4222_28pe_fan_update_device(dev);
ssize_t ret = 0;
if (data->valid) {
switch (attr->index)
{
case FAN_DUTY_CYCLE_PERCENTAGE:
duty_cycle = reg_val_to_duty_cycle(data->reg_fan_val[0] & 0xf);
ret = sprintf(buf, "%u\n", duty_cycle);
break;
case FAN_SPEED_RPM_1:
case FAN_SPEED_RPM_2:
case FAN_SPEED_RPM_3:
ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_fan_val[attr->index-FAN_DUTY_CYCLE_PERCENTAGE]));
break;
default:
break;
}
}
return ret;
}
static struct as4222_28pe_cpld_data *as4222_28pe_fan_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct as4222_28pe_cpld_data *data = i2c_get_clientdata(client);
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
!data->valid) {
int i;
dev_dbg(&client->dev, "Starting as4222_28pe_fan update\n");
data->valid = 0;
/* Update fan data
*/
for (i = 0; i < ARRAY_SIZE(data->reg_fan_val); i++) {
int status = as4222_28pe_cpld_read_internal(client, fan_reg[i]);
if (status < 0) {
data->valid = 0;
mutex_unlock(&data->update_lock);
dev_dbg(&client->dev, "reg 0x%x, err %d\n", fan_reg[i], status);
return data;
}
else {
data->reg_fan_val[i] = status & 0xff;
}
}
data->last_updated = jiffies;
data->valid = 1;
}
mutex_unlock(&data->update_lock);
return data;
}
static ssize_t show_power(struct device *dev, struct device_attribute *da,
char *buf)
{
struct i2c_client *client = to_i2c_client(dev);
struct as4222_28pe_cpld_data *data = i2c_get_clientdata(client);
int status = 0;
u8 reg = 0, mask = 0;
reg=0xc;
mask=0x2;
mutex_lock(&data->update_lock);
status = as4222_28pe_cpld_read_internal(client, reg);
if (unlikely(status < 0)) {
goto exit;
}
mutex_unlock(&data->update_lock);
return sprintf(buf, "%d\n", !(status & mask));
exit:
mutex_unlock(&data->update_lock);
return status;
}
/*
* I2C init/probing/exit functions
*/
static int as4222_28pe_cpld_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
struct as4222_28pe_cpld_data *data;
int ret = -ENODEV;
int status;
const struct attribute_group *group = NULL;
if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
goto exit;
data = kzalloc(sizeof(struct as4222_28pe_cpld_data), GFP_KERNEL);
if (!data) {
ret = -ENOMEM;
goto exit;
}
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
data->type = id->driver_data;
/* Register sysfs hooks */
switch (data->type)
{
case as4222_28pe_cpld:
group = &as4222_28pe_cpld_group;
break;
default:
break;
}
if (group)
{
ret = sysfs_create_group(&client->dev.kobj, group);
if (ret) {
goto exit_free;
}
}
as4222_28pe_cpld_add_client(client);
return 0;
exit_free:
kfree(data);
exit:
return ret;
}
static int as4222_28pe_cpld_remove(struct i2c_client *client)
{
struct as4222_28pe_cpld_data *data = i2c_get_clientdata(client);
const struct attribute_group *group = NULL;
as4222_28pe_cpld_remove_client(client);
/* Remove sysfs hooks */
switch (data->type)
{
case as4222_28pe_cpld:
group = &as4222_28pe_cpld_group;
break;
default:
break;
}
if (group) {
sysfs_remove_group(&client->dev.kobj, group);
}
kfree(data);
return 0;
}
static int as4222_28pe_cpld_read_internal(struct i2c_client *client, u8 reg)
{
int status = 0, retry = I2C_RW_RETRY_COUNT;
while (retry) {
status = i2c_smbus_read_byte_data(client, reg);
if (unlikely(status < 0)) {
msleep(I2C_RW_RETRY_INTERVAL);
retry--;
continue;
}
break;
}
return status;
}
static int as4222_28pe_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value)
{
int status = 0, retry = I2C_RW_RETRY_COUNT;
while (retry) {
status = i2c_smbus_write_byte_data(client, reg, value);
if (unlikely(status < 0)) {
msleep(I2C_RW_RETRY_INTERVAL);
retry--;
continue;
}
break;
}
return status;
}
int as4222_28pe_cpld_read(unsigned short cpld_addr, u8 reg)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int ret = -EPERM;
mutex_lock(&list_lock);
list_for_each(list_node, &cpld_client_list)
{
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client->addr == cpld_addr) {
ret = as4222_28pe_cpld_read_internal(cpld_node->client, reg);
break;
}
}
mutex_unlock(&list_lock);
return ret;
}
EXPORT_SYMBOL(as4222_28pe_cpld_read);
int as4222_28pe_cpld_write(unsigned short cpld_addr, u8 reg, u8 value)
{
struct list_head *list_node = NULL;
struct cpld_client_node *cpld_node = NULL;
int ret = -EIO;
mutex_lock(&list_lock);
list_for_each(list_node, &cpld_client_list)
{
cpld_node = list_entry(list_node, struct cpld_client_node, list);
if (cpld_node->client->addr == cpld_addr) {
ret = as4222_28pe_cpld_write_internal(cpld_node->client, reg, value);
break;
}
}
mutex_unlock(&list_lock);
return ret;
}
EXPORT_SYMBOL(as4222_28pe_cpld_write);
static struct i2c_driver as4222_28pe_cpld_driver = {
.driver = {
.name = "as4222_28pe_cpld",
.owner = THIS_MODULE,
},
.probe = as4222_28pe_cpld_probe,
.remove = as4222_28pe_cpld_remove,
.id_table = as4222_28pe_cpld_id,
};
static int __init as4222_28pe_cpld_init(void)
{
mutex_init(&list_lock);
return i2c_add_driver(&as4222_28pe_cpld_driver);
}
static void __exit as4222_28pe_cpld_exit(void)
{
i2c_del_driver(&as4222_28pe_cpld_driver);
}
MODULE_AUTHOR("Jostar Yang <jostar_yang@accton.com.tw>");
MODULE_DESCRIPTION("Accton I2C CPLD driver");
MODULE_LICENSE("GPL");
module_init(as4222_28pe_cpld_init);
module_exit(as4222_28pe_cpld_exit);

443
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/modules/builds/x86-64-accton-as4222-28pe-leds.c Executable file
View File

@@ -0,0 +1,443 @@
/*
* A LED driver for the accton_as4222_28pe_led
*
* Copyright (C) 2014 Accton Technology Corporation.
* Brandon Chuang <brandon_chuang@accton.com.tw>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*#define DEBUG*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/leds.h>
#include <linux/slab.h>
#include <linux/dmi.h>
extern int as4222_28pe_cpld_read (unsigned short cpld_addr, u8 reg);
extern int as4222_28pe_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
#define DRVNAME "accton_as4222_28pe_led"
struct accton_as4222_28pe_led_data {
struct platform_device *pdev;
struct mutex update_lock;
char valid; /* != 0 if registers are valid */
unsigned long last_updated; /* In jiffies */
u8 reg_val[1]; /* only 1 register*/
};
static struct accton_as4222_28pe_led_data *ledctl = NULL;
/* LED related data
*/
#define LED_CNTRLER_I2C_ADDRESS (0x60)
#define LED_TYPE_DIAG_REG_MASK 0x4
#define LED_MODE_DIAG_AMBER_BLINK_VALUE 0x4
#define LED_MODE_DIAG_OFF_VALUE 0x0
#define LED_TYPE_PSU_REG_MASK 0x40
#define LED_MODE_PSU_AMBER_BLINK_VALUE 0x40
#define LED_MODE_PSU_OFF_VALUE 0x0
#define LED_TYPE_POE_REG_MASK 0x40
#define LED_MODE_POE_AMBER_BLINK_VALUE 0x40
#define LED_MODE_POE_OFF_VALUE 0x0
#define LED_TYPE_FAN_REG_MASK 0x4
#define LED_MODE_FAN_AMBER_BLINK_VALUE 0x4
#define LED_MODE_FAN_OFF_VALUE 0x0
enum led_type {
LED_TYPE_DIAG,
LED_TYPE_PSU,
LED_TYPE_FAN,
LED_TYPE_POE,
};
struct led_reg {
u32 types;
u8 reg_addr;
};
static const struct led_reg led_reg_map[] = {
{(1<<LED_TYPE_PSU) | (1<<LED_TYPE_DIAG), 0x1a},
{(1<<LED_TYPE_POE) | (1<<LED_TYPE_FAN) , 0x1b},
};
enum led_light_mode {
LED_MODE_OFF = 0,
LED_MODE_GREEN,
LED_MODE_AMBER,
LED_MODE_RED,
LED_MODE_BLUE,
LED_MODE_GREEN_BLINK,
LED_MODE_AMBER_BLINK,
LED_MODE_RED_BLINK,
LED_MODE_BLUE_BLINK,
LED_MODE_AUTO,
LED_MODE_UNKNOWN
};
struct led_type_mode {
enum led_type type;
enum led_light_mode mode;
int reg_bit_mask;
int mode_value;
};
static struct led_type_mode led_type_mode_data[] = {
{LED_TYPE_POE, LED_MODE_OFF, LED_TYPE_POE_REG_MASK, LED_MODE_POE_OFF_VALUE},
{LED_TYPE_POE, LED_MODE_AMBER_BLINK, LED_TYPE_POE_REG_MASK, LED_MODE_POE_AMBER_BLINK_VALUE},
{LED_TYPE_DIAG,LED_MODE_OFF, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_OFF_VALUE},
{LED_TYPE_DIAG,LED_MODE_AMBER_BLINK, LED_TYPE_DIAG_REG_MASK, LED_MODE_DIAG_AMBER_BLINK_VALUE},
{LED_TYPE_FAN,LED_MODE_OFF, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_OFF_VALUE},
{LED_TYPE_FAN,LED_MODE_AMBER_BLINK, LED_TYPE_FAN_REG_MASK, LED_MODE_FAN_AMBER_BLINK_VALUE},
{LED_TYPE_PSU,LED_MODE_OFF, LED_TYPE_PSU_REG_MASK, LED_MODE_PSU_OFF_VALUE},
{LED_TYPE_PSU,LED_MODE_AMBER_BLINK, LED_TYPE_PSU_REG_MASK, LED_MODE_PSU_AMBER_BLINK_VALUE},
};
static void accton_as4222_28pe_led_set(struct led_classdev *led_cdev,
enum led_brightness led_light_mode, enum led_type type);
static int accton_getLedReg(enum led_type type, u8 *reg)
{
int i;
for (i = 0; i < ARRAY_SIZE(led_reg_map); i++) {
if(led_reg_map[i].types & (1<<type)) {
*reg = led_reg_map[i].reg_addr;
return 0;
}
}
return 1;
}
static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) {
int i;
for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) {
if (type != led_type_mode_data[i].type)
continue;
if ((led_type_mode_data[i].reg_bit_mask & reg_val) ==
led_type_mode_data[i].mode_value)
{
return led_type_mode_data[i].mode;
}
}
return 0;
}
static u8 led_light_mode_to_reg_val(enum led_type type,
enum led_light_mode mode, u8 reg_val) {
int i;
for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) {
if (type != led_type_mode_data[i].type)
continue;
if (mode != led_type_mode_data[i].mode)
continue;
reg_val = led_type_mode_data[i].mode_value |
(reg_val & (~led_type_mode_data[i].reg_bit_mask));
break;
}
return reg_val;
}
static int accton_as4222_28pe_led_read_value(u8 reg)
{
return as4222_28pe_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
}
static int accton_as4222_28pe_led_write_value(u8 reg, u8 value)
{
return as4222_28pe_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
}
static void accton_as4222_28pe_led_update(void)
{
mutex_lock(&ledctl->update_lock);
if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2)
|| !ledctl->valid) {
int i;
dev_dbg(&ledctl->pdev->dev, "Starting accton_as4222_28pe_led update\n");
/* Update LED data
*/
for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) {
int status = accton_as4222_28pe_led_read_value(led_reg_map[i].reg_addr);
if (status < 0) {
ledctl->valid = 0;
dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status);
goto exit;
}
else
{
ledctl->reg_val[i] = status;
}
}
ledctl->last_updated = jiffies;
ledctl->valid = 1;
}
exit:
mutex_unlock(&ledctl->update_lock);
}
static void accton_as4222_28pe_led_set(struct led_classdev *led_cdev,
enum led_brightness led_light_mode,
enum led_type type)
{
int reg_val;
u8 reg ;
mutex_lock(&ledctl->update_lock);
if( !accton_getLedReg(type, &reg))
{
dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type);
}
reg_val = accton_as4222_28pe_led_read_value(reg);
if (reg_val < 0) {
dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val);
goto exit;
}
reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val);
accton_as4222_28pe_led_write_value(reg, reg_val);
/* to prevent the slow-update issue */
ledctl->valid = 0;
exit:
mutex_unlock(&ledctl->update_lock);
}
static void accton_as4222_28pe_led_diag_set(struct led_classdev *led_cdev,
enum led_brightness led_light_mode)
{
accton_as4222_28pe_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG);
}
static enum led_brightness accton_as4222_28pe_led_diag_get(struct led_classdev *cdev)
{
accton_as4222_28pe_led_update();
return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]);
}
static void accton_as4222_28pe_led_poe_set(struct led_classdev *led_cdev,
enum led_brightness led_light_mode)
{
accton_as4222_28pe_led_set(led_cdev, led_light_mode, LED_TYPE_POE);
}
static enum led_brightness accton_as4222_28pe_led_poe_get(struct led_classdev *cdev)
{
accton_as4222_28pe_led_update();
return led_reg_val_to_light_mode(LED_TYPE_POE, ledctl->reg_val[0]);
}
static void accton_as4222_28pe_led_fan_set(struct led_classdev *led_cdev,
enum led_brightness led_light_mode)
{
accton_as4222_28pe_led_set(led_cdev, led_light_mode, LED_TYPE_FAN);
}
static enum led_brightness accton_as4222_28pe_led_fan_get(struct led_classdev *cdev)
{
accton_as4222_28pe_led_update();
return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]);
}
static void accton_as4222_28pe_led_psu_set(struct led_classdev *led_cdev,
enum led_brightness led_light_mode)
{
accton_as4222_28pe_led_set(led_cdev, led_light_mode, LED_TYPE_PSU);
}
static enum led_brightness accton_as4222_28pe_led_psu_get(struct led_classdev *cdev)
{
accton_as4222_28pe_led_update();
return led_reg_val_to_light_mode(LED_TYPE_PSU, ledctl->reg_val[0]);
}
static struct led_classdev accton_as4222_28pe_leds[] = {
[LED_TYPE_DIAG] = {
.name = "accton_as4222_28pe_led::diag",
.default_trigger = "unused",
.brightness_set = accton_as4222_28pe_led_diag_set,
.brightness_get = accton_as4222_28pe_led_diag_get,
.flags = LED_CORE_SUSPENDRESUME,
.max_brightness = LED_MODE_AMBER_BLINK,
},
[LED_TYPE_POE] = {
.name = "accton_as4222_28pe_led::poe",
.default_trigger = "unused",
.brightness_set = accton_as4222_28pe_led_poe_set,
.brightness_get = accton_as4222_28pe_led_poe_get,
.flags = LED_CORE_SUSPENDRESUME,
.max_brightness = LED_MODE_AMBER_BLINK,
},
[LED_TYPE_FAN] = {
.name = "accton_as4222_28pe_led::fan",
.default_trigger = "unused",
.brightness_set = accton_as4222_28pe_led_fan_set,
.brightness_get = accton_as4222_28pe_led_fan_get,
.flags = LED_CORE_SUSPENDRESUME,
.max_brightness = LED_MODE_AMBER_BLINK,
},
[LED_TYPE_PSU] = {
.name = "accton_as4222_28pe_led::psu",
.default_trigger = "unused",
.brightness_set = accton_as4222_28pe_led_psu_set,
.brightness_get = accton_as4222_28pe_led_psu_get,
.flags = LED_CORE_SUSPENDRESUME,
.max_brightness = LED_MODE_AMBER_BLINK,
},
};
static int accton_as4222_28pe_led_suspend(struct platform_device *dev,
pm_message_t state)
{
int i = 0;
for (i = 0; i < ARRAY_SIZE(accton_as4222_28pe_leds); i++) {
led_classdev_suspend(&accton_as4222_28pe_leds[i]);
}
return 0;
}
static int accton_as4222_28pe_led_resume(struct platform_device *dev)
{
int i = 0;
for (i = 0; i < ARRAY_SIZE(accton_as4222_28pe_leds); i++) {
led_classdev_resume(&accton_as4222_28pe_leds[i]);
}
return 0;
}
static int accton_as4222_28pe_led_probe(struct platform_device *pdev)
{
int ret, i;
for (i = 0; i < ARRAY_SIZE(accton_as4222_28pe_leds); i++) {
ret = led_classdev_register(&pdev->dev, &accton_as4222_28pe_leds[i]);
if (ret < 0)
break;
}
/* Check if all LEDs were successfully registered */
if (i != ARRAY_SIZE(accton_as4222_28pe_leds)) {
int j;
/* only unregister the LEDs that were successfully registered */
for (j = 0; j < i; j++) {
led_classdev_unregister(&accton_as4222_28pe_leds[i]);
}
}
return ret;
}
static int accton_as4222_28pe_led_remove(struct platform_device *pdev)
{
int i;
for (i = 0; i < ARRAY_SIZE(accton_as4222_28pe_leds); i++) {
led_classdev_unregister(&accton_as4222_28pe_leds[i]);
}
return 0;
}
static struct platform_driver accton_as4222_28pe_led_driver = {
.probe = accton_as4222_28pe_led_probe,
.remove = accton_as4222_28pe_led_remove,
.suspend = accton_as4222_28pe_led_suspend,
.resume = accton_as4222_28pe_led_resume,
.driver = {
.name = DRVNAME,
.owner = THIS_MODULE,
},
};
static int __init accton_as4222_28pe_led_init(void)
{
int ret;
ret = platform_driver_register(&accton_as4222_28pe_led_driver);
if (ret < 0) {
goto exit;
}
ledctl = kzalloc(sizeof(struct accton_as4222_28pe_led_data), GFP_KERNEL);
if (!ledctl) {
ret = -ENOMEM;
platform_driver_unregister(&accton_as4222_28pe_led_driver);
goto exit;
}
mutex_init(&ledctl->update_lock);
ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
if (IS_ERR(ledctl->pdev)) {
ret = PTR_ERR(ledctl->pdev);
platform_driver_unregister(&accton_as4222_28pe_led_driver);
kfree(ledctl);
goto exit;
}
exit:
return ret;
}
static void __exit accton_as4222_28pe_led_exit(void)
{
platform_device_unregister(ledctl->pdev);
platform_driver_unregister(&accton_as4222_28pe_led_driver);
kfree(ledctl);
}
module_init(accton_as4222_28pe_led_init);
module_exit(accton_as4222_28pe_led_exit);
MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
MODULE_DESCRIPTION("accton_as4222_28pe_led driver");
MODULE_LICENSE("GPL");

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/Makefile Executable file
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@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/PKG.yml Executable file
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@@ -0,0 +1 @@
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-accton-as4222-28pe ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

2
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/Makefile Executable file
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@@ -0,0 +1,2 @@
FILTER=src
include $(ONL)/make/subdirs.mk

45
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/lib/Makefile Executable file
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@@ -0,0 +1,45 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-accton-as4222-28pe
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_accton_as4222_28pe onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-accton-as4222-28pe.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

46
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/onlpdump/Makefile Executable file
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@@ -0,0 +1,46 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_accton_as4222_28pe onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

0
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/.gitignore vendored Executable file
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1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/.module Executable file
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@@ -0,0 +1 @@
name: x86_64_accton_as4222_28pe

9
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/Makefile Executable file
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@@ -0,0 +1,9 @@
###############################################################################
#
#
#
###############################################################################
include $(ONL)/make/config.mk
MODULE := x86_64_accton_as4222_28pe
AUTOMODULE := x86_64_accton_as4222_28pe
include $(BUILDER)/definemodule.mk

6
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/README Executable file
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@@ -0,0 +1,6 @@
###############################################################################
#
# x86_64_accton_as4222_28pe README
#
###############################################################################

50
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/auto/x86_64_accton_as4222_28pe.yml Executable file
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@@ -0,0 +1,50 @@
###############################################################################
#
# x86_64_accton_as4222_28pe Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB
- X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION:
doc: "Assume chassis fan direction is the same as the PSU fan direction."
default: 0
definitions:
cdefs:
X86_64_ACCTON_AS4222_28PE_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_accton_as4222_28pe_config
portingmacro:
x86_64_accton_as4222_28pe:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/inc/x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe.x Executable file
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@@ -0,0 +1,14 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

137
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/inc/x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h Executable file
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@@ -0,0 +1,137 @@
/**************************************************************************//**
*
* @file
* @brief x86_64_accton_as4222_28pe Configuration Header
*
* @addtogroup x86_64_accton_as4222_28pe-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_AS4222_28PE_CONFIG_H__
#define __X86_64_ACCTON_AS4222_28PE_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_INCLUDE_CUSTOM_CONFIG
#include <x86_64_accton_as4222_28pe_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_ACCTON_AS4222_28PE_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING
#define X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT
#define X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB
#define X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI
#define X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
*
* Assume chassis fan direction is the same as the PSU fan direction. */
#ifndef X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
#define X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_accton_as4222_28pe_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_accton_as4222_28pe_config_settings_t;
/** Configuration settings table. */
/** x86_64_accton_as4222_28pe_config_settings table. */
extern x86_64_accton_as4222_28pe_config_settings_t x86_64_accton_as4222_28pe_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_accton_as4222_28pe_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_accton_as4222_28pe_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_ACCTON_AS4222_28PE_CONFIG_HEADER).header> */
#include "x86_64_accton_as4222_28pe_porting.h"
#endif /* __X86_64_ACCTON_AS4222_28PE_CONFIG_H__ */
/* @} */

26
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/inc/x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_dox.h Executable file
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/**************************************************************************//**
*
* x86_64_accton_as4222_28pe Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_AS4222_28PE_DOX_H__
#define __X86_64_ACCTON_AS4222_28PE_DOX_H__
/**
* @defgroup x86_64_accton_as4222_28pe x86_64_accton_as4222_28pe - x86_64_accton_as4222_28pe Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_accton_as4222_28pe-x86_64_accton_as4222_28pe Public Interface
* @defgroup x86_64_accton_as4222_28pe-config Compile Time Configuration
* @defgroup x86_64_accton_as4222_28pe-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_ACCTON_AS4222_28PE_DOX_H__ */

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packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/inc/x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_porting.h Executable file
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/**************************************************************************//**
*
* @file
* @brief x86_64_accton_as4222_28pe Porting Macros.
*
* @addtogroup x86_64_accton_as4222_28pe-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_ACCTON_AS4222_28PE_PORTING_H__
#define __X86_64_ACCTON_AS4222_28PE_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_MALLOC
#if defined(GLOBAL_MALLOC)
#define X86_64_ACCTON_AS4222_28PE_MALLOC GLOBAL_MALLOC
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_MALLOC malloc
#else
#error The macro X86_64_ACCTON_AS4222_28PE_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_FREE
#if defined(GLOBAL_FREE)
#define X86_64_ACCTON_AS4222_28PE_FREE GLOBAL_FREE
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_FREE free
#else
#error The macro X86_64_ACCTON_AS4222_28PE_FREE is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_MEMSET
#if defined(GLOBAL_MEMSET)
#define X86_64_ACCTON_AS4222_28PE_MEMSET GLOBAL_MEMSET
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_MEMSET memset
#else
#error The macro X86_64_ACCTON_AS4222_28PE_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define X86_64_ACCTON_AS4222_28PE_MEMCPY GLOBAL_MEMCPY
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_MEMCPY memcpy
#else
#error The macro X86_64_ACCTON_AS4222_28PE_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define X86_64_ACCTON_AS4222_28PE_STRNCPY GLOBAL_STRNCPY
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_STRNCPY strncpy
#else
#error The macro X86_64_ACCTON_AS4222_28PE_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define X86_64_ACCTON_AS4222_28PE_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_VSNPRINTF vsnprintf
#else
#error The macro X86_64_ACCTON_AS4222_28PE_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define X86_64_ACCTON_AS4222_28PE_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_SNPRINTF snprintf
#else
#error The macro X86_64_ACCTON_AS4222_28PE_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_ACCTON_AS4222_28PE_STRLEN
#if defined(GLOBAL_STRLEN)
#define X86_64_ACCTON_AS4222_28PE_STRLEN GLOBAL_STRLEN
#elif X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB == 1
#define X86_64_ACCTON_AS4222_28PE_STRLEN strlen
#else
#error The macro X86_64_ACCTON_AS4222_28PE_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_ACCTON_AS4222_28PE_PORTING_H__ */
/* @} */

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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_accton_as4222_28pe_INCLUDES := -I $(THIS_DIR)inc
x86_64_accton_as4222_28pe_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_accton_as4222_28pe_DEPENDMODULE_ENTRIES := init:x86_64_accton_as4222_28pe ucli:x86_64_accton_as4222_28pe

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###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_accton_as4222_28pe_ucli.c

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packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/fani.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlp/platformi/fani.h>
#include "platform_lib.h"
#define PSU_PREFIX_PATH "/sys/bus/i2c/devices/"
enum fan_id {
FAN_1_ON_FAN_BOARD = 1,
FAN_2_ON_FAN_BOARD,
FAN_3_ON_FAN_BOARD,
};
#define CHASSIS_FAN_INFO(fid) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fid##_ON_FAN_BOARD), "Fan - "#fid, 0 },\
0x0,\
ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,\
0,\
0,\
ONLP_FAN_MODE_INVALID,\
}
#if 0
#define PSU_FAN_INFO(pid, fid) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fid##_ON_PSU_##pid), "PSU "#pid" - Fan "#fid, 0 },\
0x0,\
ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,\
0,\
0,\
ONLP_FAN_MODE_INVALID,\
}
#endif
/* Static fan information */
onlp_fan_info_t finfo[] = {
{ }, /* Not used */
CHASSIS_FAN_INFO(1),
CHASSIS_FAN_INFO(2),
CHASSIS_FAN_INFO(3),
//PSU_FAN_INFO(1,1),
//PSU_FAN_INFO(2,1)
};
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
_onlp_fani_info_get_fan(int fid, onlp_fan_info_t* info)
{
int value;
char path[64] = {0};
/* get fan present status
*/
info->status |= ONLP_FAN_STATUS_PRESENT;
/* get fan speed
*/
sprintf(path, "%s""fan_speed_rpm_%d", FAN_BOARD_PATH, fid);
DEBUG_PRINT("Fan (%d), speed path = (%s)", fid, path);
if (onlp_file_read_int(&value, path) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
info->rpm = value;
/* get speed percentage
*/
sprintf(path, "%s/fan_duty_cycle_percentage", FAN_BOARD_PATH);
DEBUG_PRINT("Fan (%d), front speed path = (%s)", fid, path);
if (onlp_file_read_int(&value, path) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
info->percentage = value;
return ONLP_STATUS_OK;
}
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
int rc = 0;
int fid;
VALIDATE(id);
fid = ONLP_OID_ID_GET(id);
*info = finfo[fid];
switch (fid)
{
case FAN_1_ON_FAN_BOARD:
case FAN_2_ON_FAN_BOARD:
case FAN_3_ON_FAN_BOARD:
rc =_onlp_fani_info_get_fan(fid, info);
break;
default:
rc = ONLP_STATUS_E_INVALID;
break;
}
return rc;
}
/*
* This function sets the speed of the given fan in RPM.
*
* This function will only be called if the fan supprots the RPM_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_rpm_set(onlp_oid_t id, int rpm)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan speed of the given OID as a percentage.
*
* This will only be called if the OID has the PERCENTAGE_SET
* capability.
*
* It is optional if you have no fans at all with this feature.
*/
int
onlp_fani_percentage_set(onlp_oid_t id, int p)
{
int fid;
char *path = NULL;
VALIDATE(id);
fid = ONLP_OID_ID_GET(id);
/* reject p=0 (p=0, stop fan) */
if (p == 0){
return ONLP_STATUS_E_INVALID;
}
switch (fid)
{
case FAN_1_ON_FAN_BOARD:
case FAN_2_ON_FAN_BOARD:
case FAN_3_ON_FAN_BOARD:
path = FAN_NODE(fan_duty_cycle_percentage);
break;
default:
return ONLP_STATUS_E_INVALID;
}
DEBUG_PRINT("Fan path = (%s)", path);
if (onlp_file_write_integer(path, p) < 0) {
AIM_LOG_ERROR("Unable to write data to file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
*
* This function is only relevant if the fan OID supports both direction
* capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/ledi.h>
#include <sys/mman.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <onlplib/mmap.h>
#include "platform_lib.h"
#define prefix_path "/sys/class/leds/accton_as4222_28pe_led::"
#define filename "brightness"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
/* LED related data
*/
enum onlp_led_id
{
LED_RESERVED = 0,
LED_DIAG,
LED_POE,
LED_FAN,
LED_PSU,
};
enum led_light_mode {
LED_MODE_OFF = 0,
LED_MODE_GREEN,
LED_MODE_AMBER,
LED_MODE_RED,
LED_MODE_BLUE,
LED_MODE_GREEN_BLINK,
LED_MODE_AMBER_BLINK,
LED_MODE_RED_BLINK,
LED_MODE_BLUE_BLINK,
LED_MODE_AUTO,
LED_MODE_UNKNOWN
};
typedef struct led_light_mode_map {
enum onlp_led_id id;
enum led_light_mode driver_led_mode;
enum onlp_led_mode_e onlp_led_mode;
} led_light_mode_map_t;
led_light_mode_map_t led_map[] = {
{LED_DIAG, LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_DIAG, LED_MODE_AMBER_BLINK, ONLP_LED_MODE_ORANGE_BLINKING},
{LED_POE, LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_POE, LED_MODE_AMBER_BLINK, ONLP_LED_MODE_ORANGE_BLINKING},
{LED_FAN, LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_FAN, LED_MODE_AMBER_BLINK, ONLP_LED_MODE_ORANGE_BLINKING},
{LED_PSU, LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_PSU, LED_MODE_AMBER_BLINK, ONLP_LED_MODE_ORANGE_BLINKING},
};
static char last_path[][10] = /* must map with onlp_led_id */
{
"reserved",
"diag",
"poe",
"fan",
"psu"
};
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t linfo[] =
{
{ }, /* Not used */
{
{ ONLP_LED_ID_CREATE(LED_DIAG), "LED 1 (DIAG LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE_BLINKING,
},
{
{ ONLP_LED_ID_CREATE(LED_POE), "LED 2 (POE LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE_BLINKING,
},
{
{ ONLP_LED_ID_CREATE(LED_FAN), "LED 3 (FAN LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE_BLINKING ,
},
{
{ ONLP_LED_ID_CREATE(LED_PSU), "LED 4 (PSU LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE_BLINKING ,
},
};
static int driver_to_onlp_led_mode(enum onlp_led_id id, enum led_light_mode driver_led_mode)
{
int i, nsize = sizeof(led_map)/sizeof(led_map[0]);
for (i = 0; i < nsize; i++)
{
if (id == led_map[i].id && driver_led_mode == led_map[i].driver_led_mode)
{
return led_map[i].onlp_led_mode;
}
}
return 0;
}
static int onlp_to_driver_led_mode(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
{
int i, nsize = sizeof(led_map)/sizeof(led_map[0]);
for(i = 0; i < nsize; i++)
{
if (id == led_map[i].id && onlp_led_mode == led_map[i].onlp_led_mode)
{
return led_map[i].driver_led_mode;
}
}
return 0;
}
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_DIAG), ONLP_LED_MODE_OFF);
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), ONLP_LED_MODE_OFF);
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN), ONLP_LED_MODE_OFF);
onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_POE), ONLP_LED_MODE_OFF);
return ONLP_STATUS_OK;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int local_id;
char data[2] = {0};
char fullpath[50] = {0};
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
/* get fullpath */
sprintf(fullpath, "%s%s/%s", prefix_path, last_path[local_id], filename);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[ONLP_OID_ID_GET(id)];
/* Set LED mode */
if (onlp_file_read_string(fullpath, data, sizeof(data), 0) != 0) {
DEBUG_PRINT("%s(%d)\r\n", __FUNCTION__, __LINE__);
return ONLP_STATUS_E_INTERNAL;
}
info->mode = driver_to_onlp_led_mode(local_id, atoi(data));
/* Set the on/off status */
if (info->mode != ONLP_LED_MODE_OFF) {
info->status |= ONLP_LED_STATUS_ON;
}
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
VALIDATE(id);
if (!on_or_off) {
return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
}
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int local_id;
char fullpath[50] = {0};
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);
sprintf(fullpath, "%s%s/%s", prefix_path, last_path[local_id], filename);
if (onlp_file_write_integer(fullpath, onlp_to_driver_led_mode(local_id, mode)) != 0)
{
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
/*
* Generic LED ioctl interface.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

9
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/make.mk Executable file
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###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_accton_as4222_28pe
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

93
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/platform_lib.c Executable file
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#include <onlp/onlp.h>
#include <onlplib/file.h>
#include <unistd.h>
#include <fcntl.h>
#include "platform_lib.h"
#include <onlp/platformi/sfpi.h>
#include "x86_64_accton_as4222_28pe_log.h"
static int _onlp_file_write(char *filename, char *buffer, int buf_size, int data_len)
{
int fd;
int len;
if ((buffer == NULL) || (buf_size < 0)) {
return -1;
}
if ((fd = open(filename, O_WRONLY, S_IWUSR)) == -1) {
return -1;
}
if ((len = write(fd, buffer, buf_size)) < 0) {
close(fd);
return -1;
}
if ((close(fd) == -1)) {
return -1;
}
if ((len > buf_size) || (data_len != 0 && len != data_len)) {
return -1;
}
return 0;
}
int onlp_file_write_integer(char *filename, int value)
{
char buf[8] = {0};
sprintf(buf, "%d", value);
return _onlp_file_write(filename, buf, (int)strlen(buf), 0);
}
int onlp_file_read_binary(char *filename, char *buffer, int buf_size, int data_len)
{
int fd;
int len;
if ((buffer == NULL) || (buf_size < 0)) {
return -1;
}
if ((fd = open(filename, O_RDONLY)) == -1) {
return -1;
}
if ((len = read(fd, buffer, buf_size)) < 0) {
close(fd);
return -1;
}
if ((close(fd) == -1)) {
return -1;
}
if ((len > buf_size) || (data_len != 0 && len != data_len)) {
return -1;
}
return 0;
}
int onlp_file_read_string(char *filename, char *buffer, int buf_size, int data_len)
{
int ret;
if (data_len >= buf_size) {
return -1;
}
ret = onlp_file_read_binary(filename, buffer, buf_size-1, data_len);
if (ret == 0) {
buffer[buf_size-1] = '\0';
}
return ret;
}

77
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/platform_lib.h Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __PLATFORM_LIB_H__
#define __PLATFORM_LIB_H__
#include <onlplib/file.h>
#include "x86_64_accton_as4222_28pe_log.h"
#define CHASSIS_FAN_COUNT 3
#define CHASSIS_THERMAL_COUNT 5
#define CHASSIS_PSU_COUNT 1
#define CHASSIS_LED_COUNT 4
#define PSU1_ID 1
#define PSU2_ID 2
#define PSU_NODE_MAX_INT_LEN 8
#define PSU_NODE_MAX_PATH_LEN 64
#define PSU1_AC_PMBUS_NODE(node) PSU1_AC_PMBUS_PREFIX#node
#define PSU2_AC_PMBUS_NODE(node) PSU2_AC_PMBUS_PREFIX#node
#define PSU_PREFIX "/sys/bus/i2c/devices/1-0060/"
#define FAN_BOARD_PATH "/sys/bus/i2c/devices/1-0060/"
#define FAN_NODE(node) FAN_BOARD_PATH#node
#define IDPROM_PATH "/sys/class/i2c-adapter/i2c-3/3-0057/eeprom"
int onlp_file_write_integer(char *filename, int value);
int onlp_file_read_binary(char *filename, char *buffer, int buf_size, int data_len);
int onlp_file_read_string(char *filename, char *buffer, int buf_size, int data_len);
typedef enum psu_type {
PSU_TYPE_UNKNOWN,
PSU_TYPE_ACBEL,
PSU_TYPE_YM2651Y,
PSU_TYPE_AC_F2B,
PSU_TYPE_AC_B2F
} psu_type_t;
//#define DEBUG_MODE 1
#if (DEBUG_MODE == 1)
#define DEBUG_PRINT(format, ...) printf(format, __VA_ARGS__)
#else
#define DEBUG_PRINT(format, ...)
#endif
#endif /* __PLATFORM_LIB_H__ */

112
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/psui.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/psui.h>
#include <onlplib/mmap.h>
#include <string.h>
#include "platform_lib.h"
#define PSU_STATUS_PRESENT 1
#define PSU_STATUS_POWER_GOOD 1
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
psu_status_info_get(int id, char *node, int *value)
{
int ret = 0;
char path[PSU_NODE_MAX_PATH_LEN] = {0};
*value = 0;
if (PSU1_ID == id) {
sprintf(path, "%s%s", PSU_PREFIX, node);
}
else
return ONLP_STATUS_E_INTERNAL;
if (onlp_file_read_int(value, path) < 0) {
AIM_LOG_ERROR("Unable to read status from file(%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
return ret;
}
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Get all information about the given PSU oid.
*/
static onlp_psu_info_t pinfo[] =
{
{ }, /* Not used */
{
{ ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 },
},
};
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int val = 0;
int ret = ONLP_STATUS_OK;
int index = ONLP_OID_ID_GET(id);
VALIDATE(id);
memset(info, 0, sizeof(onlp_psu_info_t));
*info = pinfo[index]; /* Set the onlp_oid_hdr_t */
info->status |= ONLP_PSU_STATUS_PRESENT;
/* Get power good status */
if (psu_status_info_get(index, "psu_power_good", &val) != 0) {
AIM_LOG_ERROR("Unable to read PSU(%d) node(psu_power_good)\r\n", index);
}
if (val != PSU_STATUS_POWER_GOOD) {
info->status |= ONLP_PSU_STATUS_FAILED;
}
return ret;
}
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

295
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/sfpi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2013 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include "x86_64_accton_as4222_28pe_int.h"
#include "x86_64_accton_as4222_28pe_log.h"
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
#define MODULE_PRESENT_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_present_%d"
#define MODULE_RXLOS_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_rx_los_%d"
#define MODULE_TXFAULT_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_tx_fault_%d"
#define MODULE_TXDISABLE_FORMAT "/sys/bus/i2c/devices/%d-00%d/module_tx_disable_%d"
int sfp_map_bus[] ={5, 6, 7, 8};
/************************************************************
*
* SFPI Entry Points
*
***********************************************************/
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
return ONLP_STATUS_OK;
}
int
onlp_sfpi_map_bus_index(int port)
{
if(port < 24 || port >=27)
return ONLP_STATUS_E_INTERNAL;
port= port-24;
return sfp_map_bus[port];
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
/*
* Ports {24, 27}
*/
int p;
for(p = 24; p <= 27; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_is_present(int port)
{
/*
* Return 1 if present.
* Return 0 if not present.
* Return < 0 if error.
*/
int present;
int bus, addr;
if(port <24 || port > 27)
return ONLP_STATUS_E_INTERNAL;
addr = 60;
bus = 1;
if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return present;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[4];
int i = 0;
uint64_t rx_los_all = 0;
bytes[0]=bytes[1]=bytes[2]=0x0;
bytes[3]=0xf;
for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
rx_los_all <<= 8;
rx_los_all |= bytes[i];
}
/* Populate bitmap */
for(i = 0; rx_los_all; i++) {
AIM_BITMAP_MOD(dst, i, (rx_los_all & 1));
rx_los_all >>= 1;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
int size = 0;
if(port <24 || port > 27)
return ONLP_STATUS_E_INTERNAL;
memset(data, 0, 256);
if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, onlp_sfpi_map_bus_index(port)) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
if (size != 256) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
FILE* fp;
char file[64] = {0};
sprintf(file, PORT_EEPROM_FORMAT, onlp_sfpi_map_bus_index(port));
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
if (fseek(fp, 256, SEEK_CUR) != 0) {
fclose(fp);
AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
int ret = fread(data, 1, 256, fp);
fclose(fp);
if (ret != 256) {
AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
{
int bus = onlp_sfpi_map_bus_index(port);
return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
{
int bus = onlp_sfpi_map_bus_index(port);
return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
{
int bus = onlp_sfpi_map_bus_index(port);
return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
{
int bus = onlp_sfpi_map_bus_index(port);
return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
int rv;
int addr = 60;
int bus = 1;
if(port <24 || port >27)
return ONLP_STATUS_E_UNSUPPORTED;
switch(control)
{
case ONLP_SFP_CONTROL_TX_DISABLE:
{
if (onlp_file_write_int(0, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else
rv = ONLP_STATUS_OK;
break;
}
default:
rv = ONLP_STATUS_E_UNSUPPORTED;
break;
}
return rv;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int rv;
int addr = 60;
int bus = 1;
if(port <24 || port >27)
return ONLP_STATUS_E_UNSUPPORTED;
switch(control)
{
case ONLP_SFP_CONTROL_RX_LOS:
{
if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, bus, addr, (port+1)) < 0)
{
AIM_LOG_ERROR("Unable to read rx_loss status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else
rv = ONLP_STATUS_OK;
break;
}
case ONLP_SFP_CONTROL_TX_FAULT:
{
if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else
rv = ONLP_STATUS_OK;
break;
}
case ONLP_SFP_CONTROL_TX_DISABLE:
{
if (onlp_file_read_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else
rv = ONLP_STATUS_OK;
break;
}
default:
rv = ONLP_STATUS_E_UNSUPPORTED;
}
return rv;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

479
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/sysi.c Executable file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <unistd.h>
#include <fcntl.h>
#include <limits.h>
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlp/platformi/psui.h>
#include "platform_lib.h"
#include "x86_64_accton_as4222_28pe_int.h"
#include "x86_64_accton_as4222_28pe_log.h"
#define PREFIX_PATH_ON_CPLD_DEV "/sys/bus/i2c/devices/1-0060/"
#define NUM_OF_CPLD 1
#define FAN_DUTY_CYCLE_MAX (100)
#define FAN_DUTY_CYCLE_DEFAULT (32)
#define FAN_DUTY_PLUS_FOR_DIR (13)
/* Note, all chassis fans share 1 single duty setting.
* Here use fan 1 to represent global fan duty value.*/
#define FAN_ID_FOR_SET_FAN_DUTY (1)
#define CELSIUS_RECORD_NUMBER (2) /*Must >= 2*/
typedef struct fan_ctrl_policy {
int duty_cycle; /* In percetage */
int step_up_thermal; /* In mini-Celsius */
int step_dn_thermal; /* In mini-Celsius */
} fan_ctrl_policy_t;
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-accton-as4222-28pe-r0";
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
uint8_t* rdata = aim_zmalloc(256);
if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
if(*size == 256) {
*data = rdata;
return ONLP_STATUS_OK;
}
}
aim_free(rdata);
*size = 0;
return ONLP_STATUS_E_INTERNAL;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
int i;
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/* 5 Thermal sensors on the chassis */
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* 4 LEDs on the chassis */
for (i = 1; i <= CHASSIS_LED_COUNT; i++) {
*e++ = ONLP_LED_ID_CREATE(i);
}
/* PSU on the chassis */
for (i = 1; i <= CHASSIS_PSU_COUNT; i++) {
*e++ = ONLP_PSU_ID_CREATE(i);
}
/* 3 Fans on the chassis */
for (i = 1; i <= CHASSIS_FAN_COUNT; i++) {
*e++ = ONLP_FAN_ID_CREATE(i);
}
return 0;
}
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
int val=0;
if(onlp_file_read_int(&val, "%s/version", PREFIX_PATH_ON_CPLD_DEV) < 0) {
return ONLP_STATUS_E_INTERNAL;
}
pi->cpld_versions = aim_fstrdup("%d", val);
return 0;
}
void
onlp_sysi_platform_info_free(onlp_platform_info_t* pi)
{
aim_free(pi->cpld_versions);
}
/* Thermal plan:
* $TMP = (CPU_core + LM75_1+ LM75_2 + LM75_3 + LM75_4)/5
* 1. If any FAN failed, set all the other fans as full speed, 100%.
* 2. If any sensor is high than 45 degrees, set fan speed to duty 62.5%.
* 3. If any sensor is high than 50 degrees, set fan speed to duty 100%.
* 4. When $TMP >= 40 C, set fan speed to duty 62.5%.
* 5. When $TMP >= 45 C, set fan speed to duty 100%.
* 6. When $TMP < 35 C, set fan speed to duty 31.25%.
* 7. Direction factor, when B2F, duty + 12.5%.
*
* Note, all chassis fans share 1 single duty setting.
*/
fan_ctrl_policy_t fan_ctrl_policy_avg[] = {
{FAN_DUTY_CYCLE_MAX , 45000, INT_MIN},
{63 , 40000, INT_MIN},
{32 , INT_MAX, 35000},
};
fan_ctrl_policy_t fan_ctrl_policy_single[] = {
{FAN_DUTY_CYCLE_MAX , 50000, INT_MIN},
{63 , 45000, INT_MIN},
};
struct fan_control_data_s {
int duty_cycle;
int dir_plus;
int mc_avg_pre[CELSIUS_RECORD_NUMBER];
int mc_high_pre[CELSIUS_RECORD_NUMBER];
} fan_control_data_pre =
{
.duty_cycle = FAN_DUTY_CYCLE_DEFAULT,
.dir_plus = 0,
.mc_avg_pre = {INT_MIN+1, INT_MIN}, /*init as thermal rising to avoid full speed.*/
.mc_high_pre = {INT_MIN+1, INT_MIN}, /*init as thermal rising to avoid full speed.*/
};
static int
sysi_check_fan(uint32_t *fan_dir){
int i, present;
for (i = 1; i <= CHASSIS_FAN_COUNT; i++)
{
onlp_fan_info_t fan_info;
if (onlp_fani_info_get(ONLP_FAN_ID_CREATE(i), &fan_info) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to get fan(%d) status\r\n", i);
return ONLP_STATUS_E_INTERNAL;
}
present = fan_info.status & ONLP_FAN_STATUS_PRESENT;
if ((fan_info.status & ONLP_FAN_STATUS_FAILED) || !present) {
AIM_LOG_WARN("Fan(%d) is not working, set the other fans as full speed\r\n", i);
int ret = onlp_fani_percentage_set(
ONLP_FAN_ID_CREATE(FAN_ID_FOR_SET_FAN_DUTY), FAN_DUTY_CYCLE_MAX);
if (ret != ONLP_STATUS_OK)
return ret;
else
return ONLP_STATUS_E_MISSING;
}
/* Get fan direction (Only get the first one since all fan direction are the same)
*/
if (i == 1) {
*fan_dir = fan_info.status & (ONLP_FAN_STATUS_F2B|ONLP_FAN_STATUS_B2F);
}
}
return ONLP_STATUS_OK;
}
static int
sysi_get_fan_duty(int *cur_duty_cycle){
int fd, len;
char buf[10] = {0};
char *node = FAN_NODE(fan_duty_cycle_percentage);
/* Get current fan duty*/
fd = open(node, O_RDONLY);
if (fd == -1){
AIM_LOG_ERROR("Unable to open fan speed control node (%s)", node);
return ONLP_STATUS_E_INTERNAL;
}
len = read(fd, buf, sizeof(buf));
close(fd);
if (len <= 0) {
AIM_LOG_ERROR("Unable to read fan speed from (%s)", node);
return ONLP_STATUS_E_INTERNAL;
}
*cur_duty_cycle = atoi(buf);
return ONLP_STATUS_OK;
}
static int
sysi_get_thermal_sum(int *mcelsius){
onlp_thermal_info_t thermal_info;
int i;
*mcelsius = 0;
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
if (onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(i), &thermal_info)
!= ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read thermal status");
return ONLP_STATUS_E_INTERNAL;
}
*mcelsius += thermal_info.mcelsius;
DEBUG_PRINT("Thermal %d: %d \n ", i, thermal_info.mcelsius);
}
return ONLP_STATUS_OK;
}
static int
sysi_get_highest_thermal(int *mcelsius){
onlp_thermal_info_t thermal_info;
int i, highest;
highest = 0;
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
if (onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(i), &thermal_info)
!= ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read thermal status");
return ONLP_STATUS_E_INTERNAL;
}
highest = (thermal_info.mcelsius > highest)?
thermal_info.mcelsius : highest;
}
*mcelsius = highest;
return ONLP_STATUS_OK;
}
/* Anaylze thermal changing history to judge if the change is a stable trend. */
static int _is_thermal_a_trend(int *mc_history){
int i, trend, trended;
if (mc_history == NULL) {
AIM_LOG_ERROR("Unable to get history of thermal\n");
return 0;
}
/* Get heat up/down trend. */
trend = 0;
for (i = 0; i < CELSIUS_RECORD_NUMBER; i++) {
if (( mc_history[i+1] < mc_history[i])){
trend++;
}else if (( mc_history[i+1] > mc_history[i])){
trend--;
}
}
trended = (abs(trend) >= ((CELSIUS_RECORD_NUMBER+1)/2))? 1:0;
#if (DEBUG_MODE == 1)
DEBUG_PRINT("[INFO]%s#%d, trended: %d, UP/DW: %d mcelsius:",
__func__, __LINE__, trended, trend );
for (i = 0; i <= CELSIUS_RECORD_NUMBER; i++) {
DEBUG_PRINT(" %d =>", mc_history[i]);
}
DEBUG_PRINT("%c\n", ' ');
#endif
/*For more than half changes are same direction, it's a firm trend.*/
return trended;
}
/* Decide duty by highest value of thermal sensors.*/
static int
sysi_get_duty_by_highest(int *duty_cycle){
int i, ret, maxtrix_len;
int new_duty_cycle = 0 ;
int mc_history[CELSIUS_RECORD_NUMBER+1] = {0};
int *mcelsius_pre_p = &mc_history[1];
int *mcelsius_now_p = &mc_history[0];
/* Fill up mcelsius array,
* [0] is current temperature, others are history.
*/
ret = sysi_get_highest_thermal(mcelsius_now_p);
if(ONLP_STATUS_OK != ret){
return ret;
}
memcpy (mcelsius_pre_p, fan_control_data_pre.mc_high_pre,
sizeof(fan_control_data_pre.mc_high_pre));
DEBUG_PRINT("[INFO]%s#%d, highest mcelsius:%d!\n",
__func__, __LINE__, *mcelsius_now_p);
/* Shift records to the right */
for (i = 0; i < CELSIUS_RECORD_NUMBER; i++) {
fan_control_data_pre.mc_high_pre[i] = mc_history[i];
}
/* Only change duty on consecutive heat rising or falling.*/
maxtrix_len = AIM_ARRAYSIZE(fan_ctrl_policy_single);
/* Only change duty when the thermal changing are firm. */
if (_is_thermal_a_trend(mc_history))
{
int matched = 0;
for (i = 0; i < maxtrix_len; i++) {
if ((*mcelsius_now_p > fan_ctrl_policy_single[i].step_up_thermal)) {
new_duty_cycle = fan_ctrl_policy_single[i].duty_cycle;
matched = !matched;
break;
}
}
/* if (!matched) {
DEBUG_PRINT("%s#%d, celsius(%d) falls into undefined range!!\n",
__func__, __LINE__, *mcelsius_now_p);
} */
}
*duty_cycle = new_duty_cycle;
return ONLP_STATUS_OK;
}
/* Decide duty by average value of thermal sensors.*/
static int
sysi_get_duty_by_average(int *duty_cycle){
int i, mcelsius_avg, ret, maxtrix_len;
int new_duty_cycle=0;
int mc_history[CELSIUS_RECORD_NUMBER+1] = {0};
int *mcelsius_pre_p = &mc_history[1];
int *mcelsius_now_p = &mc_history[0];
/* Fill up mcelsius array,
* [0] is current temperature, others are history.
*/
*mcelsius_now_p = 0;
ret = sysi_get_thermal_sum(mcelsius_now_p);
if(ONLP_STATUS_OK != ret){
return ret;
}
mcelsius_avg = (*mcelsius_now_p)/CHASSIS_THERMAL_COUNT;
memcpy (mcelsius_pre_p, fan_control_data_pre.mc_avg_pre,
sizeof(fan_control_data_pre.mc_avg_pre));
DEBUG_PRINT("[INFO]%s#%d, mcelsius:%d!\n", __func__, __LINE__, mcelsius_avg);
/* Shift records to the right */
for (i = 0; i < CELSIUS_RECORD_NUMBER; i++) {
fan_control_data_pre.mc_avg_pre[i] = mc_history[i];
}
/* Only change duty on consecutive heat rising or falling.*/
maxtrix_len = AIM_ARRAYSIZE(fan_ctrl_policy_avg);
/* Only change duty when the thermal changing are firm. */
if (_is_thermal_a_trend(mc_history))
{
int matched = 0;
for (i = 0; i < maxtrix_len; i++) {
if ((mcelsius_avg >= fan_ctrl_policy_avg[i].step_up_thermal)) {
new_duty_cycle = fan_ctrl_policy_avg[i].duty_cycle;
matched = !matched;
break;
}
}
for (i = maxtrix_len-1; i>=0; i--) {
if ((mcelsius_avg < fan_ctrl_policy_avg[i].step_dn_thermal)) {
new_duty_cycle = fan_ctrl_policy_avg[i].duty_cycle;
matched = !matched;
break;
}
}
/*if (!matched) {
DEBUG_PRINT("%s#%d, celsius(%d) falls into undefined range!!\n",
__func__, __LINE__, mcelsius_avg);
} */
}
*duty_cycle = new_duty_cycle;
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_fans(void)
{
uint32_t fan_dir;
int ret;
int cur_duty_cycle, new_duty_cycle, tmp;
int direct_addon = 0;
onlp_oid_t fan_duty_oid = ONLP_FAN_ID_CREATE(FAN_ID_FOR_SET_FAN_DUTY);
/**********************************************************
* Decision 1: Set fan as full speed if any fan is failed.
**********************************************************/
return 0;
ret = sysi_check_fan(&fan_dir);
if(ONLP_STATUS_OK != ret){
return ret;
}
if (fan_dir & ONLP_FAN_STATUS_B2F) {
direct_addon = FAN_DUTY_PLUS_FOR_DIR;
}
/**********************************************************
* Decision 2: If no matched fan speed is found from the policy,
* use FAN_DUTY_CYCLE_MIN as default speed
**********************************************************/
ret = sysi_get_fan_duty(&cur_duty_cycle);
if(ONLP_STATUS_OK != ret){
return ret;
}
/**********************************************************
* Decision 3: Decide new fan speed depend on fan direction and temperature
**********************************************************/
ret = sysi_get_duty_by_average(&new_duty_cycle);
if (ONLP_STATUS_OK != ret){
return ret;
}
ret = sysi_get_duty_by_highest(&tmp);
if (ONLP_STATUS_OK != ret){
return ret;
}
new_duty_cycle = (tmp > new_duty_cycle)? tmp : new_duty_cycle;
if (new_duty_cycle == 0)
{
new_duty_cycle = fan_control_data_pre.duty_cycle;
} else {
fan_control_data_pre.duty_cycle = new_duty_cycle;
}
fan_control_data_pre.dir_plus = direct_addon;
DEBUG_PRINT("[INFO]%s#%d, new duty: %d = %d + %d (%d)!\n", __func__, __LINE__,
new_duty_cycle + direct_addon, new_duty_cycle, direct_addon, cur_duty_cycle);
new_duty_cycle += direct_addon;
new_duty_cycle = (new_duty_cycle > FAN_DUTY_CYCLE_MAX)?
FAN_DUTY_CYCLE_MAX : new_duty_cycle;
if (new_duty_cycle == cur_duty_cycle) {
/* Duty cycle does not change, just return */
return ONLP_STATUS_OK;
}
return onlp_fani_percentage_set(fan_duty_oid, new_duty_cycle);
}
int
onlp_sysi_platform_manage_leds(void)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

149
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/thermali.c Executable file
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@@ -0,0 +1,149 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Thermal Sensor Platform Implementation.
*
***********************************************************/
//#include <unistd.h>
#include <onlplib/file.h>
#include <onlp/platformi/thermali.h>
#include "platform_lib.h"
#define THERMAL_PATH_FORMAT "/sys/bus/i2c/devices/%s/*temp1_input"
#define PSU_THERMAL_PATH_FORMAT "/sys/bus/i2c/devices/%s/*psu_temp1_input"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
enum onlp_thermal_id
{
THERMAL_RESERVED = 0,
THERMAL_CPU_CORE,
THERMAL_1_ON_MAIN_BROAD,
THERMAL_2_ON_MAIN_BROAD,
THERMAL_3_ON_MAIN_BROAD,
THERMAL_4_ON_MAIN_BROAD,
};
static char* directory[] = /* must map with onlp_thermal_id */
{
NULL,
NULL, /* CPU_CORE files */
"9-0048",
"9-0049",
"9-004a",
"9-004b",
};
static char* cpu_coretemp_files[] =
{
"/sys/devices/platform/coretemp.0*temp2_input",
"/sys/devices/platform/coretemp.0*temp3_input",
NULL,
};
/* Static values */
static onlp_thermal_info_t linfo[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BROAD), "LM75-1-48", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BROAD), "LM75-2-49", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BROAD), "LM75-3-4A", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BROAD), "LM75-4-4B", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int tid;
char *format = NULL;
char path[64] = {0};
VALIDATE(id);
tid = ONLP_OID_ID_GET(id);
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[tid];
if(tid == THERMAL_CPU_CORE) {
return onlp_file_read_int_max(&info->mcelsius, cpu_coretemp_files);
}
switch (tid) {
case THERMAL_1_ON_MAIN_BROAD:
case THERMAL_2_ON_MAIN_BROAD:
case THERMAL_3_ON_MAIN_BROAD:
case THERMAL_4_ON_MAIN_BROAD:
format = THERMAL_PATH_FORMAT;
break;
default:
return ONLP_STATUS_E_INVALID;
};
/* get path */
sprintf(path, format, directory[tid], tid);
if (onlp_file_read_int(&info->mcelsius, path) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}

80
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_config.c Executable file
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@@ -0,0 +1,80 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
/* <auto.start.cdefs(X86_64_ACCTON_AS4222_28PE_CONFIG_HEADER).source> */
#define __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(_x) __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(_x)
x86_64_accton_as4222_28pe_config_settings_t x86_64_accton_as4222_28pe_config_settings[] =
{
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_LOGGING(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_STDLIB(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_UCLI(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
{ __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME(X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE(X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) },
#else
{ X86_64_ACCTON_AS4222_28PE_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_accton_as4222_28pe_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_accton_as4222_28pe_config_STRINGIFY_VALUE
#undef __x86_64_accton_as4222_28pe_config_STRINGIFY_NAME
const char*
x86_64_accton_as4222_28pe_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_accton_as4222_28pe_config_settings[i].name; i++) {
if(!strcmp(x86_64_accton_as4222_28pe_config_settings[i].name, setting)) {
return x86_64_accton_as4222_28pe_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_accton_as4222_28pe_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_accton_as4222_28pe_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_accton_as4222_28pe_config_settings[i].name, x86_64_accton_as4222_28pe_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_ACCTON_AS4222_28PE_CONFIG_HEADER).source> */

10
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_enums.c Executable file
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@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

12
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_int.h Executable file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
* x86_64_accton_as4222_28pe Internal Header
*
*****************************************************************************/
#ifndef __x86_64_accton_as4222_28pe_INT_H__
#define __x86_64_accton_as4222_28pe_INT_H__
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
#endif /* __x86_64_accton_as4222_28pe_INT_H__ */

18
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_log.c Executable file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
#include "x86_64_accton_as4222_28pe_log.h"
/*
* x86_64_accton_as4222_28pe log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_ACCTON_AS4222_28PE_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_log.h Executable file
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@@ -0,0 +1,12 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __x86_64_accton_as4222_28pe_LOG_H__
#define __x86_64_accton_as4222_28pe_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_accton_as4222_28pe
#include <AIM/aim_log.h>
#endif /* __x86_64_accton_as4222_28pe_LOG_H__ */

24
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_module.c Executable file
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@@ -0,0 +1,24 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
#include "x86_64_accton_as4222_28pe_log.h"
static int
datatypes_init__(void)
{
#define x86_64_accton_as4222_28pe_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe.x>
return 0;
}
void __x86_64_accton_as4222_28pe_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

50
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/onlp/builds/src/module/src/x86_64_accton_as4222_28pe_ucli.c Executable file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_accton_as4222_28pe/x86_64_accton_as4222_28pe_config.h>
#if x86_64_accton_as4222_28pe_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_accton_as4222_28pe_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_accton_as4222_28pe)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_accton_as4222_28pe_ucli_module__ =
{
"x86_64_accton_as4222_28pe_ucli",
NULL,
x86_64_accton_as4222_28pe_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_accton_as4222_28pe_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_accton_as4222_28pe_ucli_module__);
n = ucli_node_create("x86_64_accton_as4222_28pe", NULL, &x86_64_accton_as4222_28pe_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_accton_as4222_28pe"));
return n;
}
#else
void*
x86_64_accton_as4222_28pe_ucli_node_create(void)
{
return NULL;
}
#endif

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/platform-config/Makefile Executable file
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include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/platform-config/r0/Makefile Executable file
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include $(ONL)/make/pkg.mk

1
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/platform-config/r0/PKG.yml Executable file
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!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as4222-28pe REVISION=r0

31
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/platform-config/r0/src/lib/x86-64-accton-as4222-28pe-r0.yml Executable file
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---
######################################################################
#
# platform-config for AS4222
#
######################################################################
x86-64-accton-as4222-28pe-r0:
grub:
serial: >-
--port=0x3f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-4-14
args: >-
nopat
console=ttyS1,115200n8
##network:
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:1c.0/0000:0a:00.0

39
packages/platforms/accton/x86-64/x86-64-accton-as4222-28pe/platform-config/r0/src/python/x86_64_accton_as4222_28pe_r0/__init__.py Executable file
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from onl.platform.base import *
from onl.platform.accton import *
class OnlPlatform_x86_64_accton_as4222_28pe_r0(OnlPlatformAccton,
OnlPlatformPortConfig_48x25_6x100):
PLATFORM='x86-64-accton-as4222-28pe-r0'
MODEL="AS4222-28PE"
SYS_OBJECT_ID=".4222.28"
def baseconfig(self):
self.insmod('optoe')
for m in [ 'cpld', 'leds' ]:
self.insmod("x86-64-accton-as4222-28pe-%s.ko" % m)
########### initialize I2C bus 0 ###########
# initialize multiplexer (PCA9548)
self.new_i2c_device('pca9548', 0x72, 0)
self.new_i2c_devices([
# initialize CPLD
#initiate CPLD
('as4222_28pe_cpld', 0x60, 1)
])
self.new_i2c_devices([
# inititate LM75
('lm75', 0x48, 9),
('lm75', 0x49, 9),
('lm75', 0x4a, 9),
('lm75', 0x4b, 9),
])
# initialize QSFP port 1~34
for port in range(1, 5):
self.new_i2c_device('optoe1', 0x50, port+4)
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port+24, port+4), shell=True)
self.new_i2c_device('24c02', 0x57, 3)
return True