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Merge pull request #304 from jonathantsai-qci/master

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Add Support for QuantaMesh T4048-IX8:
This commit is contained in:
Jeffrey Townsend
2018-02-16 11:50:11 -08:00
committed by GitHub
parent 5a6d1d5787 3fe92a69f1
commit a0d115e001
42 changed files with 2215 additions and 0 deletions
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2
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/.gitignore vendored Normal file
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*x86*64*quanta*ix8*rglbmc.mk
onlpdump.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/Makefile Normal file
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include $(ONL)/make/pkg.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/modules/Makefile Normal file
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include $(ONL)/make/pkg.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/modules/PKG.yml Normal file
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!include $ONL_TEMPLATES/platform-modules.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ix8-rglbmc KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/modules/builds/.gitignore vendored Normal file
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lib

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/modules/builds/Makefile Normal file
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KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64
KMODULES := $(wildcard *.c)
VENDOR := quanta
BASENAME := x86-64-quanta-ix8-rglbmc
ARCH := x86_64
include $(ONL)/make/kmodule.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/modules/builds/qci_platform_ix8.c Normal file
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/*
* Quanta IX8 platform driver
*
*
* Copyright (C) 2017 Quanta Computer inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/err.h>
#include <linux/proc_fs.h>
#include <linux/backlight.h>
#include <linux/fb.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/input.h>
#include <linux/input/sparse-keymap.h>
#include <linux/input-polldev.h>
#include <linux/rfkill.h>
#include <linux/slab.h>
#include <linux/i2c/pca954x.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0))
#include <linux/i2c/pca953x.h>
#else
#include <linux/platform_data/pca953x.h>
#endif
#define MUX_INFO(bus, deselect) \
{.adap_id = bus, .deselect_on_exit = deselect}
static struct pca954x_platform_mode pca9548sfp1_modes[] = {
MUX_INFO(0x20, 1),
MUX_INFO(0x21, 1),
MUX_INFO(0x22, 1),
MUX_INFO(0x23, 1),
MUX_INFO(0x24, 1),
MUX_INFO(0x25, 1),
MUX_INFO(0x26, 1),
MUX_INFO(0x27, 1),
};
static struct pca954x_platform_data pca9548sfp1_data = {
.modes = pca9548sfp1_modes,
.num_modes = 8,
};
static struct pca954x_platform_mode pca9548sfp2_modes[] = {
MUX_INFO(0x28, 1),
MUX_INFO(0x29, 1),
MUX_INFO(0x2a, 1),
MUX_INFO(0x2b, 1),
MUX_INFO(0x2c, 1),
MUX_INFO(0x2d, 1),
MUX_INFO(0x2e, 1),
MUX_INFO(0x2f, 1),
};
static struct pca954x_platform_data pca9548sfp2_data = {
.modes = pca9548sfp2_modes,
.num_modes = 8,
};
static struct pca954x_platform_mode pca9548sfp3_modes[] = {
MUX_INFO(0x30, 1),
MUX_INFO(0x31, 1),
MUX_INFO(0x32, 1),
MUX_INFO(0x33, 1),
MUX_INFO(0x34, 1),
MUX_INFO(0x35, 1),
MUX_INFO(0x36, 1),
MUX_INFO(0x37, 1),
};
static struct pca954x_platform_data pca9548sfp3_data = {
.modes = pca9548sfp3_modes,
.num_modes = 8,
};
static struct pca954x_platform_mode pca9548sfp4_modes[] = {
MUX_INFO(0x38, 1),
MUX_INFO(0x39, 1),
MUX_INFO(0x3a, 1),
MUX_INFO(0x3b, 1),
MUX_INFO(0x3c, 1),
MUX_INFO(0x3d, 1),
MUX_INFO(0x3e, 1),
MUX_INFO(0x3f, 1),
};
static struct pca954x_platform_data pca9548sfp4_data = {
.modes = pca9548sfp4_modes,
.num_modes = 8,
};
static struct pca954x_platform_mode pca9548sfp5_modes[] = {
MUX_INFO(0x40, 1),
MUX_INFO(0x41, 1),
MUX_INFO(0x42, 1),
MUX_INFO(0x43, 1),
MUX_INFO(0x44, 1),
MUX_INFO(0x45, 1),
MUX_INFO(0x46, 1),
MUX_INFO(0x47, 1),
};
static struct pca954x_platform_data pca9548sfp5_data = {
.modes = pca9548sfp5_modes,
.num_modes = 8,
};
static struct pca954x_platform_mode pca9548sfp6_modes[] = {
MUX_INFO(0x48, 1),
MUX_INFO(0x49, 1),
MUX_INFO(0x4a, 1),
MUX_INFO(0x4b, 1),
MUX_INFO(0x4c, 1),
MUX_INFO(0x4d, 1),
MUX_INFO(0x4e, 1),
MUX_INFO(0x4f, 1),
};
static struct pca954x_platform_data pca9548sfp6_data = {
.modes = pca9548sfp6_modes,
.num_modes = 8,
};
//ZQSFP
static struct pca954x_platform_mode pca9548sfp7_modes[] = {
MUX_INFO(0x50, 1),
MUX_INFO(0x51, 1),
MUX_INFO(0x52, 1),
MUX_INFO(0x53, 1),
MUX_INFO(0x54, 1),
MUX_INFO(0x55, 1),
MUX_INFO(0x56, 1),
MUX_INFO(0x57, 1),
};
static struct pca954x_platform_data pca9548sfp7_data = {
.modes = pca9548sfp7_modes,
.num_modes = 8,
};
// end port
static struct pca954x_platform_mode pca9546_modes[] = {
MUX_INFO(0x10, 1),
MUX_INFO(0x11, 1),
MUX_INFO(0x12, 1),
MUX_INFO(0x13, 1),
};
static struct pca954x_platform_data pca9546_data = {
.modes = pca9546_modes,
.num_modes = 4,
};
static struct pca954x_platform_mode pca9548_modes[] = {
MUX_INFO(0x14, 1),
MUX_INFO(0x15, 1),
MUX_INFO(0x16, 1),
MUX_INFO(0x17, 1),
MUX_INFO(0x18, 1),
MUX_INFO(0x19, 1),
MUX_INFO(0x1a, 1),
MUX_INFO(0x1b, 1),
};
static struct pca954x_platform_data pca9548_data = {
.modes = pca9548_modes,
.num_modes = 8,
};
/* CPU Board i2c device */
static struct pca954x_platform_mode pca9546_cpu_modes[] = {
MUX_INFO(0x02, 1),
MUX_INFO(0x03, 1),
MUX_INFO(0x04, 1),
MUX_INFO(0x05, 1),
};
static struct pca954x_platform_data pca9546_cpu_data = {
.modes = pca9546_cpu_modes,
.num_modes = 4,
};
//MB Board Data
static struct pca953x_platform_data pca9555_1_data = {
.gpio_base = 0x10,
};
//QSFP28 49-56 IO Expander
static struct pca953x_platform_data pca9698_2_data = {
.gpio_base = 0x20,
};
//CPU Board pca9555
static struct pca953x_platform_data pca9555_CPU_data = {
.gpio_base = 0x40,
};
static struct i2c_board_info ix8_i2c_devices[] = {
{
I2C_BOARD_INFO("pca9546", 0x72), // 0
.platform_data = &pca9546_data,
},
{
I2C_BOARD_INFO("pca9548", 0x77), // 1
.platform_data = &pca9548_data,
},
{
I2C_BOARD_INFO("24c02", 0x54), // 2 eeprom
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 3 0x77 ch0
.platform_data = &pca9548sfp1_data,
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 4 0x77 ch1
.platform_data = &pca9548sfp2_data,
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 5 0x77 ch2
.platform_data = &pca9548sfp3_data,
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 6 0x77 ch3
.platform_data = &pca9548sfp4_data,
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 7 0x77 ch4
.platform_data = &pca9548sfp5_data,
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 8 0x77 ch5
.platform_data = &pca9548sfp6_data,
},
{
I2C_BOARD_INFO("pca9548", 0x73), // 9 0x77 ch6
.platform_data = &pca9548sfp7_data,
},
{
I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 10 0x72 ch0 CPLD1_:SFP28 1~16
},
{
I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 11 0x72 ch1 CPLD2_:SFP28 17~32
},
{
I2C_BOARD_INFO("CPLD-SFP28", 0x38), // 12 0x72 ch2 CPLD_3:SFP28 33~48
},
{
I2C_BOARD_INFO("pca9555", 0x23), // 13 0x72 ch3 MB Board Data
.platform_data = &pca9555_1_data,
},
{
I2C_BOARD_INFO("pca9698", 0x21), // 14 0x72 ch3 QSFP:49~52
.platform_data = &pca9698_2_data,
},
{
I2C_BOARD_INFO("24c02", 0x50), // 15 0x50 SFP28, QSFP EEPROM
},
{
I2C_BOARD_INFO("pca9546", 0x71), // 16
.platform_data = &pca9546_cpu_data,
},
{
I2C_BOARD_INFO("pca9555", 0x20), // 17 0x71 ch0 CPU Board Data
.platform_data = &pca9555_CPU_data,
},
};
static struct platform_driver ix8_platform_driver = {
.driver = {
.name = "qci-ix8",
.owner = THIS_MODULE,
},
};
static struct platform_device *ix8_device;
static int __init ix8_platform_init(void)
{
struct i2c_client *client;
struct i2c_adapter *adapter;
int ret, i;
ret = platform_driver_register(&ix8_platform_driver);
if (ret < 0)
return ret;
/* Register platform stuff */
ix8_device = platform_device_alloc("qci-ix8", -1);
if (!ix8_device) {
ret = -ENOMEM;
goto fail_platform_driver;
}
ret = platform_device_add(ix8_device);
if (ret)
goto fail_platform_device;
adapter = i2c_get_adapter(0);
client = i2c_new_device(adapter, &ix8_i2c_devices[0]); // pca9546
client = i2c_new_device(adapter, &ix8_i2c_devices[1]); // pca9548
client = i2c_new_device(adapter, &ix8_i2c_devices[16]); // pca9546cpu
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x02);
client = i2c_new_device(adapter, &ix8_i2c_devices[17]); // CPU Board Data
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x10);
client = i2c_new_device(adapter, &ix8_i2c_devices[10]); // CPLD_1
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x11);
client = i2c_new_device(adapter, &ix8_i2c_devices[11]); // CPLD_2
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x12);
client = i2c_new_device(adapter, &ix8_i2c_devices[12]); // CPLD_3
client = i2c_new_device(adapter, &ix8_i2c_devices[2]); // MB_BOARDINFO_EEPROM
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x13);
client = i2c_new_device(adapter, &ix8_i2c_devices[13]); // MB Board Data
client = i2c_new_device(adapter, &ix8_i2c_devices[14]); // QSFP:49~52
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x14);
client = i2c_new_device(adapter, &ix8_i2c_devices[3]); // pca9548_1 SFP
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x15);
client = i2c_new_device(adapter, &ix8_i2c_devices[4]); // pca9548_2 SFP
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x16);
client = i2c_new_device(adapter, &ix8_i2c_devices[5]); // pca9548_3 SFP
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x17);
client = i2c_new_device(adapter, &ix8_i2c_devices[6]); // pca9548_4 SFP
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x18);
client = i2c_new_device(adapter, &ix8_i2c_devices[7]); // pca9548_5 SFP
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x19);
client = i2c_new_device(adapter, &ix8_i2c_devices[8]); // pca9548_6 SFP
i2c_put_adapter(adapter);
adapter = i2c_get_adapter(0x1a);
client = i2c_new_device(adapter, &ix8_i2c_devices[9]); // pca9548_7 QSFP
i2c_put_adapter(adapter);
for(i = 32; i < 88; i ++){ // SFP28 1~48 & QSFP 49~56 EEPROM
adapter = i2c_get_adapter(i);
client = i2c_new_device(adapter, &ix8_i2c_devices[15]);
i2c_put_adapter(adapter);
}
return 0;
fail_platform_device:
platform_device_put(ix8_device);
fail_platform_driver:
platform_driver_unregister(&ix8_platform_driver);
return ret;
}
static void __exit ix8_platform_exit(void)
{
platform_device_unregister(ix8_device);
platform_driver_unregister(&ix8_platform_driver);
}
module_init(ix8_platform_init);
module_exit(ix8_platform_exit);
MODULE_AUTHOR("Jonathan Tsai <jonathan.tsai@quantatw.com>");
MODULE_VERSION("1.0");
MODULE_DESCRIPTION("Quanta IX8 Platform Driver");
MODULE_LICENSE("GPL");

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/Makefile Normal file
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include $(ONL)/make/pkg.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/PKG.yml Normal file
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!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-quanta-ix8-rglbmc ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/Makefile Normal file
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FILTER=src
include $(ONL)/make/subdirs.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/lib/Makefile Normal file
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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-quanta-ix8-rglbmc
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_quanta_ix8_rglbmc quanta_sys_eeprom onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-quanta-ix8-rglbmc.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

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############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_quanta_ix8_rglbmc quanta_sys_eeprom onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/.module Normal file
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name: x86_64_quanta_ix8_rglbmc

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/Makefile Normal file
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###############################################################################
#
#
#
###############################################################################
include $(ONL)/make/config.mk
MODULE := x86_64_quanta_ix8_rglbmc
AUTOMODULE := x86_64_quanta_ix8_rglbmc
include $(BUILDER)/definemodule.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/auto/make.mk Normal file
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###############################################################################
#
# x86_64_quanta_ix8_rglbmc Autogeneration
#
###############################################################################
x86_64_quanta_ix8_rglbmc_AUTO_DEFS := module/auto/x86_64_quanta_ix8_rglbmc.yml
x86_64_quanta_ix8_rglbmc_AUTO_DIRS := module/inc/x86_64_quanta_ix8_rglbmc module/src
include $(BUILDER)/auto.mk

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/auto/x86_64_quanta_ix8_rglbmc.yml Normal file
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###############################################################################
#
# x86_64_quanta_ix8_rglbmc Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD:
doc: "RPM Threshold at which the fan is considered to have failed."
default: 3000
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX:
doc: "Maximum system front-to-back fan speed."
default: 18000
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX:
doc: "Maximum system back-to-front fan speed."
default: 18000
- X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS:
doc: "Time to hold Phy GPIO in reset, in ms"
default: 100
definitions:
cdefs:
X86_64_QUANTA_IX8_RGLBMC_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_quanta_ix8_rglbmc_config
enum: &enums
fan_id:
members:
- FAN1 : 1
- FAN2 : 2
- FAN3 : 3
- FAN4 : 4
- FAN5 : 5
- FAN6 : 6
- FAN7 : 7
- FAN8 : 8
- FAN9 : 9
- FAN10 : 10
fan_oid:
members:
- FAN1 : ONLP_FAN_ID_CREATE(1)
- FAN2 : ONLP_FAN_ID_CREATE(2)
- FAN3 : ONLP_FAN_ID_CREATE(3)
- FAN4 : ONLP_FAN_ID_CREATE(4)
- FAN5 : ONLP_FAN_ID_CREATE(5)
- FAN6 : ONLP_FAN_ID_CREATE(6)
- FAN7 : ONLP_FAN_ID_CREATE(7)
- FAN8 : ONLP_FAN_ID_CREATE(8)
- FAN9 : ONLP_FAN_ID_CREATE(9)
- FAN10 : ONLP_FAN_ID_CREATE(10)
psu_id:
members:
- PSU1 : 1
- PSU2 : 2
psu_oid:
members:
- PSU1 : ONLP_PSU_ID_CREATE(1)
- PSU2 : ONLP_PSU_ID_CREATE(2)
thermal_id:
members:
- THERMAL1 : 1
- THERMAL2 : 2
- THERMAL3 : 3
- THERMAL4 : 4
- THERMAL5 : 5
- THERMAL6 : 6
- THERMAL7 : 7
- THERMAL8 : 8
- THERMAL9 : 9
- THERMAL10 : 10
- THERMAL11 : 11
- THERMAL12 : 12
- THERMAL13 : 13
- THERMAL14 : 14
- THERMAL15 : 15
- THERMAL16 : 16
thermal_oid:
members:
- THERMAL1 : ONLP_THERMAL_ID_CREATE(1)
- THERMAL2 : ONLP_THERMAL_ID_CREATE(2)
- THERMAL3 : ONLP_THERMAL_ID_CREATE(3)
- THERMAL4 : ONLP_THERMAL_ID_CREATE(4)
- THERMAL5 : ONLP_THERMAL_ID_CREATE(5)
- THERMAL6 : ONLP_THERMAL_ID_CREATE(6)
- THERMAL7 : ONLP_THERMAL_ID_CREATE(7)
- THERMAL8 : ONLP_THERMAL_ID_CREATE(8)
- THERMAL9 : ONLP_THERMAL_ID_CREATE(9)
- THERMAL10 : ONLP_THERMAL_ID_CREATE(10)
- THERMAL11 : ONLP_THERMAL_ID_CREATE(11)
- THERMAL12 : ONLP_THERMAL_ID_CREATE(12)
- THERMAL13 : ONLP_THERMAL_ID_CREATE(13)
- THERMAL14 : ONLP_THERMAL_ID_CREATE(14)
- THERMAL15 : ONLP_THERMAL_ID_CREATE(15)
- THERMAL16 : ONLP_THERMAL_ID_CREATE(16)
portingmacro:
X86_64_QUANTA_IX8_RGLBMC:
macros:
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

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/**************************************************************************//**
*
* @file
* @brief x86_64_quanta_ix8_rglbmc Configuration Header
*
* @addtogroup x86_64_quanta_ix8_rglbmc-config
* @{
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_IX8_RGLBMC_CONFIG_H__
#define __X86_64_QUANTA_IX8_RGLBMC_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_INCLUDE_CUSTOM_CONFIG
#include <x86_64_quanta_ix8_rglbmc_custom_config.h>
#endif
/* <auto.start.cdefs(X86_64_QUANTA_IX8_RGLBMC_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB 1
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI 0
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
*
* RPM Threshold at which the fan is considered to have failed. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX
*
* Maximum system front-to-back fan speed. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX 18000
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX
*
* Maximum system back-to-front fan speed. */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX 18000
#endif
/**
* X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS
*
* Time to hold Phy GPIO in reset, in ms */
#ifndef X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS
#define X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS 100
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_quanta_ix8_rglbmc_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_quanta_ix8_rglbmc_config_settings_t;
/** Configuration settings table. */
/** x86_64_quanta_ix8_rglbmc_config_settings table. */
extern x86_64_quanta_ix8_rglbmc_config_settings_t x86_64_quanta_ix8_rglbmc_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_quanta_ix8_rglbmc_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_quanta_ix8_rglbmc_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(X86_64_QUANTA_IX8_RGLBMC_CONFIG_HEADER).header> */
#include "x86_64_quanta_ix8_rglbmc_porting.h"
#endif /* __X86_64_QUANTA_IX8_RGLBMC_CONFIG_H__ */
/* @} */

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/**************************************************************************//**
*
* x86_64_quanta_ix8_rglbmc Doxygen Header
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_IX8_RGLBMC_DOX_H__
#define __X86_64_QUANTA_IX8_RGLBMC_DOX_H__
/**
* @defgroup x86_64_quanta_ix8_rglbmc x86_64_quanta_ix8_rglbmc - x86_64_quanta_ix8_rglbmc Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_quanta_ix8_rglbmc-x86_64_quanta_ix8_rglbmc Public Interface
* @defgroup x86_64_quanta_ix8_rglbmc-config Compile Time Configuration
* @defgroup x86_64_quanta_ix8_rglbmc-porting Porting Macros
*
* @}
*
*/
#endif /* __X86_64_QUANTA_IX8_RGLBMC_DOX_H__ */

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#ifndef __X86_64_QUANTA_IX8_RGLBMC_GPIO_TABLE_H__
#define __X86_64_QUANTA_IX8_RGLBMC_GPIO_TABLE_H__
/*
* defined within platform/quanta_switch.c
* Quanta Switch Platform driver
*/
#define QUANTA_IX8_PCA953x_GPIO(P1, P2) (P1*8+P2)
#define QUANTA_IX8_PCA9555_GPIO_SIZE 0x10
#define QUANTA_IX8_I2C_GPIO_BASE 0x10
#define QUANTA_IX8_I2C_GPIO_CPU_BASE 0x40
#define QUANTA_IX8_CPU_BOARD_GPIO_BASE (QUANTA_IX8_I2C_GPIO_CPU_BASE)
#define QUANTA_IX8_CPU_BOARD_SYS_P1 (QUANTA_IX8_CPU_BOARD_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,2))
#define QUANTA_IX8_CPU_BOARD_SYS_P2 (QUANTA_IX8_CPU_BOARD_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,3))
#define QUANTA_IX8_ZQSFP_EN_GPIO_BASE QUANTA_IX8_I2C_GPIO_BASE
#define QUANTA_IX8_ZQSFP_EN_GPIO_SIZE QUANTA_IX8_PCA9555_GPIO_SIZE
#define QUANTA_IX8_ZQSFP_EN_GPIO_P3V3_PW_GD (QUANTA_IX8_ZQSFP_EN_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,4))
#define QUANTA_IX8_ZQSFP_EN_GPIO_P3V3_PW_EN (QUANTA_IX8_ZQSFP_EN_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,5))
#define QUANTA_IX8_PCA9698_2_GPIO_BASE (QUANTA_IX8_I2C_GPIO_BASE + QUANTA_IX8_PCA9555_GPIO_SIZE)
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_49_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,0))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_49_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,2))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_49_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,3))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_50_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,4))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_50_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,6))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_50_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(0,7))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_51_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,0))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_51_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,2))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_51_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,3))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_52_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,4))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_52_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,6))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_52_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(1,7))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_53_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(2,0))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_53_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(2,2))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_53_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(2,3))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_54_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(2,4))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_54_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(2,6))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_54_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(2,7))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_55_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(3,0))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_55_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(3,2))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_55_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(3,3))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_56_RESET_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(3,4))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_56_PRSNT_N (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(3,6))
#define QUANTA_IX8_PCA9698_2_GPIO_QSFP_56_LPMOD_P (QUANTA_IX8_PCA9698_2_GPIO_BASE + QUANTA_IX8_PCA953x_GPIO(3,7))
#endif /* __X86_64_QUANTA_IX8_RGLBMC_GPIO_TABLE_H__ */

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/**************************************************************************//**
*
* @file
* @brief x86_64_quanta_ix8_rglbmc Porting Macros.
*
* @addtogroup x86_64_quanta_ix8_rglbmc-porting
* @{
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_IX8_RGLBMC_PORTING_H__
#define __X86_64_QUANTA_IX8_RGLBMC_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef X86_64_QUANTA_IX8_RGLBMC_MEMSET
#if defined(GLOBAL_MEMSET)
#define X86_64_QUANTA_IX8_RGLBMC_MEMSET GLOBAL_MEMSET
#elif X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_IX8_RGLBMC_MEMSET memset
#else
#error The macro X86_64_QUANTA_IX8_RGLBMC_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_IX8_RGLBMC_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define X86_64_QUANTA_IX8_RGLBMC_MEMCPY GLOBAL_MEMCPY
#elif X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_IX8_RGLBMC_MEMCPY memcpy
#else
#error The macro X86_64_QUANTA_IX8_RGLBMC_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_IX8_RGLBMC_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define X86_64_QUANTA_IX8_RGLBMC_STRNCPY GLOBAL_STRNCPY
#elif X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_IX8_RGLBMC_STRNCPY strncpy
#else
#error The macro X86_64_QUANTA_IX8_RGLBMC_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_IX8_RGLBMC_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define X86_64_QUANTA_IX8_RGLBMC_VSNPRINTF GLOBAL_VSNPRINTF
#elif X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_IX8_RGLBMC_VSNPRINTF vsnprintf
#else
#error The macro X86_64_QUANTA_IX8_RGLBMC_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_IX8_RGLBMC_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define X86_64_QUANTA_IX8_RGLBMC_SNPRINTF GLOBAL_SNPRINTF
#elif X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_IX8_RGLBMC_SNPRINTF snprintf
#else
#error The macro X86_64_QUANTA_IX8_RGLBMC_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef X86_64_QUANTA_IX8_RGLBMC_STRLEN
#if defined(GLOBAL_STRLEN)
#define X86_64_QUANTA_IX8_RGLBMC_STRLEN GLOBAL_STRLEN
#elif X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB == 1
#define X86_64_QUANTA_IX8_RGLBMC_STRLEN strlen
#else
#error The macro X86_64_QUANTA_IX8_RGLBMC_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __X86_64_QUANTA_IX8_RGLBMC_PORTING_H__ */
/* @} */

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###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_quanta_ix8_rglbmc_INCLUDES := -I $(THIS_DIR)inc
x86_64_quanta_ix8_rglbmc_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_quanta_ix8_rglbmc_DEPENDMODULE_ENTRIES := init:x86_64_quanta_ix8_rglbmc ucli:x86_64_quanta_ix8_rglbmc

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###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_quanta_ix8_rglbmc_ucli.c

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/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/fani.h>
int
onlp_fani_init(void)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

78
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/ledi.c Normal file
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@@ -0,0 +1,78 @@
#include <onlp/platformi/ledi.h>
#include <sys/mman.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include "x86_64_quanta_ix8_rglbmc_int.h"
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_gpio_table.h>
#include <onlplib/gpio.h>
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t led_info[] =
{
{ }, /* Not used */
{
{ LED_OID_SYSTEM, "System LED", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
}
};
int
onlp_ledi_init(void)
{
return ONLP_STATUS_OK;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int led_id;
led_id = ONLP_OID_ID_GET(id);
*info = led_info[led_id];
info->status |= ONLP_LED_STATUS_ON;
info->mode |= ONLP_LED_MODE_ON;
return ONLP_STATUS_OK;
}
void
Sysfs_Set_System_LED(onlp_led_mode_t mode)
{
if(mode == ONLP_LED_MODE_GREEN){
onlp_gpio_set(QUANTA_IX8_CPU_BOARD_SYS_P1, 0);
onlp_gpio_set(QUANTA_IX8_CPU_BOARD_SYS_P2, 1);
}
else if(mode == ONLP_LED_MODE_ORANGE){
onlp_gpio_set(QUANTA_IX8_CPU_BOARD_SYS_P1, 1);
onlp_gpio_set(QUANTA_IX8_CPU_BOARD_SYS_P2, 0);
}
else{
onlp_gpio_set(QUANTA_IX8_CPU_BOARD_SYS_P1, 1);
onlp_gpio_set(QUANTA_IX8_CPU_BOARD_SYS_P2, 1);
}
}
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int led_id;
led_id = ONLP_OID_ID_GET(id);
switch (led_id) {
case LED_ID_SYSTEM:
Sysfs_Set_System_LED(mode);
break;
default:
return ONLP_STATUS_E_INTERNAL;
break;
}
return ONLP_STATUS_OK;
}

9
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/make.mk Normal file
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@@ -0,0 +1,9 @@
###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_quanta_ix8_rglbmc
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

15
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/psui.c Normal file
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@@ -0,0 +1,15 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/psui.h>
int
onlp_psui_init(void)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

413
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/sfpi.c Normal file
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@@ -0,0 +1,413 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* SFPI Interface for the Quanta IX8
*
***********************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_gpio_table.h>
#include <onlp/platformi/sfpi.h>
#include <onlplib/sfp.h>
#include <onlplib/gpio.h>
#include "x86_64_quanta_ix8_rglbmc_log.h"
#include <onlplib/file.h>
#include <unistd.h>
#include <fcntl.h>
/**
* This table maps the presence gpio, reset gpio, and eeprom file
* for each SFP port.
*/
typedef struct sfpmap_s {
int port;
const char* present_cpld;
const char* reset_gpio;
const char* eeprom;
const char* dom;
} sfpmap_t;
static sfpmap_t sfpmap__[] =
{
{ 1, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-1/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-32/32-0050/eeprom", NULL },
{ 2, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-2/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-33/33-0050/eeprom", NULL },
{ 3, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-3/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-34/34-0050/eeprom", NULL },
{ 4, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-4/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-35/35-0050/eeprom", NULL },
{ 5, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-5/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-36/36-0050/eeprom", NULL },
{ 6, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-6/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-37/37-0050/eeprom", NULL },
{ 7, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-7/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-38/38-0050/eeprom", NULL },
{ 8, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-8/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-20/i2c-39/39-0050/eeprom", NULL },
{ 9, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-9/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-40/40-0050/eeprom", NULL },
{ 10, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-10/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-41/41-0050/eeprom", NULL },
{ 11, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-11/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-42/42-0050/eeprom", NULL },
{ 12, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-12/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-43/43-0050/eeprom", NULL },
{ 13, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-13/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-44/44-0050/eeprom", NULL },
{ 14, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-14/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-45/45-0050/eeprom", NULL },
{ 15, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-15/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-46/46-0050/eeprom", NULL },
{ 16, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-16/16-0038/cpld-sfp28/port-16/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-47/47-0050/eeprom", NULL },
{ 17, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-17/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-48/48-0050/eeprom", NULL },
{ 18, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-18/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-49/49-0050/eeprom", NULL },
{ 19, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-19/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-50/50-0050/eeprom", NULL },
{ 20, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-20/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-51/51-0050/eeprom", NULL },
{ 21, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-21/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-52/52-0050/eeprom", NULL },
{ 22, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-22/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-53/53-0050/eeprom", NULL },
{ 23, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-23/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-54/54-0050/eeprom", NULL },
{ 24, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-24/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-22/i2c-55/55-0050/eeprom", NULL },
{ 25, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-25/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-56/56-0050/eeprom", NULL },
{ 26, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-26/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-57/57-0050/eeprom", NULL },
{ 27, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-27/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-58/58-0050/eeprom", NULL },
{ 28, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-28/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-59/59-0050/eeprom", NULL },
{ 29, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-29/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-60/60-0050/eeprom", NULL },
{ 30, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-30/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-61/61-0050/eeprom", NULL },
{ 31, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-31/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-62/62-0050/eeprom", NULL },
{ 32, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-17/17-0038/cpld-sfp28/port-32/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-63/63-0050/eeprom", NULL },
{ 33, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-33/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-64/64-0050/eeprom", NULL },
{ 34, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-34/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-65/65-0050/eeprom", NULL },
{ 35, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-35/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-66/66-0050/eeprom", NULL },
{ 36, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-36/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-67/67-0050/eeprom", NULL },
{ 37, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-37/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-68/68-0050/eeprom", NULL },
{ 38, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-38/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-69/69-0050/eeprom", NULL },
{ 39, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-39/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-70/70-0050/eeprom", NULL },
{ 40, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-40/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/i2c-71/71-0050/eeprom", NULL },
{ 41, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-41/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-72/72-0050/eeprom", NULL },
{ 42, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-42/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-73/73-0050/eeprom", NULL },
{ 43, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-43/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-74/74-0050/eeprom", NULL },
{ 44, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-44/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-75/75-0050/eeprom", NULL },
{ 45, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-45/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-76/76-0050/eeprom", NULL },
{ 46, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-46/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-77/77-0050/eeprom", NULL },
{ 47, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-47/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-78/78-0050/eeprom", NULL },
{ 48, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0038/cpld-sfp28/port-48/%s", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/i2c-79/79-0050/eeprom", NULL },
};
typedef struct qsfpmap_s {
int port;
int present_gpio;
int reset_gpio;
int lplmod_gpio;
const char* eeprom;
const char* dom;
} qsfpmap_t;
static qsfpmap_t qsfpmap__[] =
{
{ 49, QUANTA_IX8_PCA9698_2_GPIO_QSFP_49_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_49_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_49_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-80/80-0050/eeprom", NULL },
{ 50, QUANTA_IX8_PCA9698_2_GPIO_QSFP_50_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_50_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_50_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-81/81-0050/eeprom", NULL },
{ 51, QUANTA_IX8_PCA9698_2_GPIO_QSFP_51_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_51_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_51_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-82/82-0050/eeprom", NULL },
{ 52, QUANTA_IX8_PCA9698_2_GPIO_QSFP_52_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_52_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_52_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-83/83-0050/eeprom", NULL },
{ 53, QUANTA_IX8_PCA9698_2_GPIO_QSFP_53_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_53_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_53_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-84/84-0050/eeprom", NULL },
{ 54, QUANTA_IX8_PCA9698_2_GPIO_QSFP_54_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_54_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_54_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-85/85-0050/eeprom", NULL },
{ 55, QUANTA_IX8_PCA9698_2_GPIO_QSFP_55_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_55_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_55_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-86/86-0050/eeprom", NULL },
{ 56, QUANTA_IX8_PCA9698_2_GPIO_QSFP_56_PRSNT_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_56_RESET_N, QUANTA_IX8_PCA9698_2_GPIO_QSFP_56_LPMOD_P, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-26/i2c-87/87-0050/eeprom", NULL },
};
#define SFP_GET(_port) (sfpmap__ + _port - 1)
#define QSFP_GET(_port) (qsfpmap__ + _port - 49)
#define MAX_SFP_PATH 128
static char sfp_node_path[MAX_SFP_PATH] = {0};
static char*
sfp_get_port_path(int port, char *node_name)
{
sfpmap_t* sfp = SFP_GET(port);
sprintf(sfp_node_path, sfp->present_cpld,
node_name);
return sfp_node_path;
}
int
onlp_sfpi_init(void)
{
int ret, i;
qsfpmap_t* qsfp;
onlp_gpio_export(QUANTA_IX8_ZQSFP_EN_GPIO_P3V3_PW_EN, ONLP_GPIO_DIRECTION_OUT);
ret = onlp_gpio_set(QUANTA_IX8_ZQSFP_EN_GPIO_P3V3_PW_EN, 1);
sleep(1);
for(i = 49; i < 57 ; i ++) {
qsfp = QSFP_GET(i);
onlp_gpio_export(qsfp->present_gpio, ONLP_GPIO_DIRECTION_IN);
onlp_gpio_export(qsfp->reset_gpio, ONLP_GPIO_DIRECTION_OUT);
onlp_gpio_set(qsfp->reset_gpio, 1);
onlp_gpio_export(qsfp->lplmod_gpio, ONLP_GPIO_DIRECTION_OUT);
onlp_gpio_set(qsfp->lplmod_gpio, 0);
}
return ret;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
int p;
for(p = 1; p < 57; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_is_present(int port)
{
if(port > 48){
int value = 0;
qsfpmap_t* qsfp = QSFP_GET(port);
if(qsfp->present_gpio > 0) {
if(onlp_gpio_get(qsfp->present_gpio, &value) == ONLP_STATUS_OK)
return (value == 0);
else
return ONLP_STATUS_E_MISSING;
}
else {
/**
* If we can open and read a byte from the EEPROM file
* then we consider it present.
*/
int fd = open(qsfp->eeprom, O_RDONLY);
if (fd < 0) {
/* Not Present */
return 0;
}
int rv;
uint8_t byte;
if(read(fd, &byte, 1) == 1) {
/* Present */
rv = 1;
}
else {
/* No Present */
rv = 0;
}
close(fd);
return rv;
}
}
else{
return onlplib_sfp_is_present_file(sfp_get_port_path(port, "pre_n"), /* Present */ "1\n", /* Absent */ "0\n");
}
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
if(port > 48){
qsfpmap_t* qsfp = QSFP_GET(port);
return onlplib_sfp_eeprom_read_file(qsfp->eeprom, data);
}
else{
sfpmap_t* sfp = SFP_GET(port);
return onlplib_sfp_eeprom_read_file(sfp->eeprom, data);
}
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
if(port > 48){
qsfpmap_t* qsfp = QSFP_GET(port);
return onlplib_sfp_eeprom_read_file(qsfp->dom, data);
}
else{
sfpmap_t* sfp = SFP_GET(port);
return onlplib_sfp_eeprom_read_file(sfp->dom, data);
}
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
{
int rv;
if(port > 48){
qsfpmap_t* qsfp = QSFP_GET(port);
switch(control){
case ONLP_SFP_CONTROL_RESET_STATE:
{
if(onlp_gpio_set(qsfp->reset_gpio, value) == ONLP_STATUS_OK){
rv = ONLP_STATUS_OK;
}
else{
AIM_LOG_ERROR("Unable to set reset status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
break;
}
case ONLP_SFP_CONTROL_LP_MODE:
{
if(onlp_gpio_set(qsfp->lplmod_gpio, value) == ONLP_STATUS_OK){
rv = ONLP_STATUS_OK;
}
else{
AIM_LOG_ERROR("Unable to set lp_mode status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
break;
}
default:
rv = ONLP_STATUS_E_UNSUPPORTED;
}
}
else{
switch(control){
case ONLP_SFP_CONTROL_TX_DISABLE:
{
char* path = sfp_get_port_path(port, "tx_dis");
if (onlp_file_write_int(value, path) != 0) {
AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else {
rv = ONLP_STATUS_OK;
}
break;
}
default:
rv = ONLP_STATUS_E_UNSUPPORTED;
break;
}
}
return rv;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
{
int rv;
char* path = NULL;
if(port > 48){
qsfpmap_t* qsfp = QSFP_GET(port);
switch(control){
case ONLP_SFP_CONTROL_RESET_STATE:
{
if(onlp_gpio_get(qsfp->reset_gpio, value) == ONLP_STATUS_OK){
if(*value == 0){
*value = 1;
}
else{
*value = 0;
}
rv = ONLP_STATUS_OK;
}
else{
AIM_LOG_ERROR("Unable to read reset status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
break;
}
case ONLP_SFP_CONTROL_LP_MODE:
{
if(onlp_gpio_get(qsfp->lplmod_gpio, value) == ONLP_STATUS_OK){
rv = ONLP_STATUS_OK;
}
else{
AIM_LOG_ERROR("Unable to read lp_mode status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
break;
}
case ONLP_SFP_CONTROL_RX_LOS:
{
*value = 0;
rv = ONLP_STATUS_OK;
break;
}
case ONLP_SFP_CONTROL_TX_DISABLE:
{
*value = 0;
rv = ONLP_STATUS_OK;
break;
}
default:
rv = ONLP_STATUS_E_UNSUPPORTED;
}
}
else{
switch(control){
case ONLP_SFP_CONTROL_RX_LOS:
{
path = sfp_get_port_path(port, "rx_los");
if (onlp_file_read_int(value, path) < 0) {
AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else {
rv = ONLP_STATUS_OK;
}
break;
}
case ONLP_SFP_CONTROL_TX_FAULT:
{
path = sfp_get_port_path(port, "tx_fault");
if (onlp_file_read_int(value, path) < 0) {
AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else {
rv = ONLP_STATUS_OK;
}
break;
}
case ONLP_SFP_CONTROL_TX_DISABLE:
{
path = sfp_get_port_path(port, "tx_dis");
if (onlp_file_read_int(value, path) < 0) {
AIM_LOG_ERROR("Unable to read tx_disable status from port(%d)\r\n", port);
rv = ONLP_STATUS_E_INTERNAL;
}
else {
if(*value == 0){
*value = 1;
}
else{
*value = 0;
}
rv = ONLP_STATUS_OK;
}
break;
}
default:
rv = ONLP_STATUS_E_UNSUPPORTED;
}
}
return rv;
}

66
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/sysi.c Normal file
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/************************************************************
* <bsn.cl fy=2014 v=onl>
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sysi.h>
#include "x86_64_quanta_ix8_rglbmc_int.h"
#include "x86_64_quanta_ix8_rglbmc_log.h"
#include <quanta_sys_eeprom/eeprom.h>
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_gpio_table.h>
#include <onlplib/gpio.h>
#include <onlplib/i2c.h>
#include <onlp/platformi/ledi.h>
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-quanta-ix8-rglbmc-r0";
}
int
onlp_sysi_init(void)
{
/* Config GPIO */
/* LED Output */
onlp_gpio_export(QUANTA_IX8_CPU_BOARD_SYS_P1, ONLP_GPIO_DIRECTION_OUT);
onlp_gpio_export(QUANTA_IX8_CPU_BOARD_SYS_P2, ONLP_GPIO_DIRECTION_OUT);
/* Set LED to green */
onlp_ledi_mode_set(LED_OID_SYSTEM, ONLP_LED_MODE_GREEN);
return ONLP_STATUS_OK;
}
#define QUANTA_SYS_EEPROM_PATH \
"/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-18/18-0054/eeprom"
int
onlp_sysi_onie_info_get(onlp_onie_info_t* onie)
{
int rv;
rv = onlp_onie_decode_file(onie, QUANTA_SYS_EEPROM_PATH);
if(rv >= 0) {
onie->platform_name = aim_strdup("x86-64-quanta-ix8-rglbmc-r0");
rv = quanta_onie_sys_eeprom_custom_format(onie);
}
return rv;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/*
* 1 LEDs
*/
*e++ = LED_OID_SYSTEM;
return 0;
}

31
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/thermali.c Normal file
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@@ -0,0 +1,31 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/thermali.h>
int
onlp_thermali_init(void)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

95
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_config.c Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
/* <auto.start.cdefs(X86_64_QUANTA_IX8_RGLBMC_CONFIG_HEADER).source> */
#define __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(_x) __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(_x)
x86_64_quanta_ix8_rglbmc_config_settings_t x86_64_quanta_ix8_rglbmc_config_settings[] =
{
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_LOGGING(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_STDLIB(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_F2B_RPM_MAX(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_SYSFAN_B2F_RPM_MAX(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS
{ __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME(X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS), __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE(X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS) },
#else
{ X86_64_QUANTA_IX8_RGLBMC_CONFIG_PHY_RESET_DELAY_MS(__x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_VALUE
#undef __x86_64_quanta_ix8_rglbmc_config_STRINGIFY_NAME
const char*
x86_64_quanta_ix8_rglbmc_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_quanta_ix8_rglbmc_config_settings[i].name; i++) {
if(strcmp(x86_64_quanta_ix8_rglbmc_config_settings[i].name, setting)) {
return x86_64_quanta_ix8_rglbmc_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_quanta_ix8_rglbmc_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_quanta_ix8_rglbmc_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_quanta_ix8_rglbmc_config_settings[i].name, x86_64_quanta_ix8_rglbmc_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(X86_64_QUANTA_IX8_RGLBMC_CONFIG_HEADER).source> */

10
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_enums.c Normal file
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@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

281
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_int.h Normal file
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@@ -0,0 +1,281 @@
/**************************************************************************//**
*
* x86_64_quanta_ix8_rglbmc Internal Header
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_IX8_RGLBMC_INT_H__
#define __X86_64_QUANTA_IX8_RGLBMC_INT_H__
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
#include <limits.h>
/* <auto.start.enum(ALL).header> */
/** thermal_oid */
typedef enum thermal_oid_e {
THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1),
THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2),
THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3),
THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4),
THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5),
THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6),
THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7),
THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8),
THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9),
THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10),
THERMAL_OID_THERMAL11 = ONLP_THERMAL_ID_CREATE(11),
THERMAL_OID_THERMAL12 = ONLP_THERMAL_ID_CREATE(12),
THERMAL_OID_THERMAL13 = ONLP_THERMAL_ID_CREATE(13),
THERMAL_OID_THERMAL14 = ONLP_THERMAL_ID_CREATE(14),
THERMAL_OID_THERMAL15 = ONLP_THERMAL_ID_CREATE(15),
THERMAL_OID_THERMAL16 = ONLP_THERMAL_ID_CREATE(16),
} thermal_oid_t;
/** Enum names. */
const char* thermal_oid_name(thermal_oid_t e);
/** Enum values. */
int thermal_oid_value(const char* str, thermal_oid_t* e, int substr);
/** Enum descriptions. */
const char* thermal_oid_desc(thermal_oid_t e);
/** Enum validator. */
int thermal_oid_valid(thermal_oid_t e);
/** validator */
#define THERMAL_OID_VALID(_e) \
(thermal_oid_valid((_e)))
/** thermal_oid_map table. */
extern aim_map_si_t thermal_oid_map[];
/** thermal_oid_desc_map table. */
extern aim_map_si_t thermal_oid_desc_map[];
/** psu_oid */
typedef enum psu_oid_e {
PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1),
PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2),
} psu_oid_t;
/** Enum names. */
const char* psu_oid_name(psu_oid_t e);
/** Enum values. */
int psu_oid_value(const char* str, psu_oid_t* e, int substr);
/** Enum descriptions. */
const char* psu_oid_desc(psu_oid_t e);
/** Enum validator. */
int psu_oid_valid(psu_oid_t e);
/** validator */
#define PSU_OID_VALID(_e) \
(psu_oid_valid((_e)))
/** psu_oid_map table. */
extern aim_map_si_t psu_oid_map[];
/** psu_oid_desc_map table. */
extern aim_map_si_t psu_oid_desc_map[];
/** thermal_id */
typedef enum thermal_id_e {
THERMAL_ID_THERMAL1 = 1,
THERMAL_ID_THERMAL2 = 2,
THERMAL_ID_THERMAL3 = 3,
THERMAL_ID_THERMAL4 = 4,
THERMAL_ID_THERMAL5 = 5,
THERMAL_ID_THERMAL6 = 6,
THERMAL_ID_THERMAL7 = 7,
THERMAL_ID_THERMAL8 = 8,
THERMAL_ID_THERMAL9 = 9,
THERMAL_ID_THERMAL10 = 10,
THERMAL_ID_THERMAL11 = 11,
THERMAL_ID_THERMAL12 = 12,
THERMAL_ID_THERMAL13 = 13,
THERMAL_ID_THERMAL14 = 14,
THERMAL_ID_THERMAL15 = 15,
THERMAL_ID_THERMAL16 = 16,
} thermal_id_t;
/** Enum names. */
const char* thermal_id_name(thermal_id_t e);
/** Enum values. */
int thermal_id_value(const char* str, thermal_id_t* e, int substr);
/** Enum descriptions. */
const char* thermal_id_desc(thermal_id_t e);
/** Enum validator. */
int thermal_id_valid(thermal_id_t e);
/** validator */
#define THERMAL_ID_VALID(_e) \
(thermal_id_valid((_e)))
/** thermal_id_map table. */
extern aim_map_si_t thermal_id_map[];
/** thermal_id_desc_map table. */
extern aim_map_si_t thermal_id_desc_map[];
/** fan_id */
typedef enum fan_id_e {
FAN_ID_FAN1 = 1,
FAN_ID_FAN2 = 2,
FAN_ID_FAN3 = 3,
FAN_ID_FAN4 = 4,
FAN_ID_FAN5 = 5,
FAN_ID_FAN6 = 6,
FAN_ID_FAN7 = 7,
FAN_ID_FAN8 = 8,
FAN_ID_FAN9 = 9,
FAN_ID_FAN10 = 10,
} fan_id_t;
/** Enum names. */
const char* fan_id_name(fan_id_t e);
/** Enum values. */
int fan_id_value(const char* str, fan_id_t* e, int substr);
/** Enum descriptions. */
const char* fan_id_desc(fan_id_t e);
/** Enum validator. */
int fan_id_valid(fan_id_t e);
/** validator */
#define FAN_ID_VALID(_e) \
(fan_id_valid((_e)))
/** fan_id_map table. */
extern aim_map_si_t fan_id_map[];
/** fan_id_desc_map table. */
extern aim_map_si_t fan_id_desc_map[];
/** psu_id */
typedef enum psu_id_e {
PSU_ID_PSU1 = 1,
PSU_ID_PSU2 = 2,
} psu_id_t;
/** Enum names. */
const char* psu_id_name(psu_id_t e);
/** Enum values. */
int psu_id_value(const char* str, psu_id_t* e, int substr);
/** Enum descriptions. */
const char* psu_id_desc(psu_id_t e);
/** Enum validator. */
int psu_id_valid(psu_id_t e);
/** validator */
#define PSU_ID_VALID(_e) \
(psu_id_valid((_e)))
/** psu_id_map table. */
extern aim_map_si_t psu_id_map[];
/** psu_id_desc_map table. */
extern aim_map_si_t psu_id_desc_map[];
/** fan_oid */
typedef enum fan_oid_e {
FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1),
FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2),
FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3),
FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4),
FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5),
FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6),
FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7),
FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8),
FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9),
FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10),
} fan_oid_t;
/** Enum names. */
const char* fan_oid_name(fan_oid_t e);
/** Enum values. */
int fan_oid_value(const char* str, fan_oid_t* e, int substr);
/** Enum descriptions. */
const char* fan_oid_desc(fan_oid_t e);
/** Enum validator. */
int fan_oid_valid(fan_oid_t e);
/** validator */
#define FAN_OID_VALID(_e) \
(fan_oid_valid((_e)))
/** fan_oid_map table. */
extern aim_map_si_t fan_oid_map[];
/** fan_oid_desc_map table. */
extern aim_map_si_t fan_oid_desc_map[];
/* <auto.end.enum(ALL).header> */
/* psu info table */
struct psu_info_s {
char path[PATH_MAX];
int present;
int busno;
int addr;
};
/** led_id */
typedef enum led_id_e {
LED_ID_SYSTEM = 1,
} led_id_t;
/** Enum names. */
const char* led_id_name(led_id_t e);
/** Enum values. */
int led_id_value(const char* str, led_id_t* e, int substr);
/** Enum descriptions. */
const char* led_id_desc(led_id_t e);
/** Enum validator. */
int led_id_valid(led_id_t e);
/** validator */
#define LED_ID_VALID(_e) \
(led_id_valid((_e)))
/** led_id_map table. */
extern aim_map_si_t led_id_map[];
/** led_id_desc_map table. */
extern aim_map_si_t led_id_desc_map[];
/** led_oid */
typedef enum led_oid_e {
LED_OID_SYSTEM = ONLP_LED_ID_CREATE(LED_ID_SYSTEM),
} led_oid_t;
/** Enum names. */
const char* led_oid_name(led_oid_t e);
/** Enum values. */
int led_oid_value(const char* str, led_oid_t* e, int substr);
/** Enum descriptions. */
const char* led_oid_desc(led_oid_t e);
/** Enum validator. */
int led_oid_valid(led_oid_t e);
/** validator */
#define LED_OID_VALID(_e) \
(led_oid_valid((_e)))
/** led_oid_map table. */
extern aim_map_si_t led_oid_map[];
/** led_oid_desc_map table. */
extern aim_map_si_t led_oid_desc_map[];
/* <auto.end.enum(ALL).header> */
#endif /* __X86_64_QUANTA_IX8_RGLBMC_INT_H__ */

18
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_log.c Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
#include "x86_64_quanta_ix8_rglbmc_log.h"
/*
* x86_64_quanta_ix8_rglbmc log struct.
*/
AIM_LOG_STRUCT_DEFINE(
X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_OPTIONS_DEFAULT,
X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
X86_64_QUANTA_IX8_RGLBMC_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_log.h Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __X86_64_QUANTA_IX8_RGLBMC_LOG_H__
#define __X86_64_QUANTA_IX8_RGLBMC_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_quanta_ix8_rglbmc
#include <AIM/aim_log.h>
#endif /* __X86_64_QUANTA_IX8_RGLBMC_LOG_H__ */

24
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_module.c Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
#include "x86_64_quanta_ix8_rglbmc_log.h"
static int
datatypes_init__(void)
{
#define X86_64_QUANTA_IX8_RGLBMC_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc.x>
return 0;
}
void __x86_64_quanta_ix8_rglbmc_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

50
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/onlp/builds/src/x86_64_quanta_ix8_rglbmc/module/src/x86_64_quanta_ix8_rglbmc_ucli.c Normal file
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/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_quanta_ix8_rglbmc/x86_64_quanta_ix8_rglbmc_config.h>
#if X86_64_QUANTA_IX8_RGLBMC_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_quanta_ix8_rglbmc_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_quanta_ix8_rglbmc)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_quanta_ix8_rglbmc_ucli_module__ =
{
"x86_64_quanta_ix8_rglbmc_ucli",
NULL,
x86_64_quanta_ix8_rglbmc_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_quanta_ix8_rglbmc_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_quanta_ix8_rglbmc_ucli_module__);
n = ucli_node_create("x86_64_quanta_ix8_rglbmc", NULL, &x86_64_quanta_ix8_rglbmc_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_quanta_ix8_rglbmc"));
return n;
}
#else
void*
x86_64_quanta_ix8_rglbmc_ucli_node_create(void)
{
return NULL;
}
#endif

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packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/platform-config/Makefile Normal file
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include $(ONL)/make/pkg.mk

1
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/platform-config/r0/Makefile Normal file
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include $(ONL)/make/pkg.mk

1
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/platform-config/r0/PKG.yml Normal file
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!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ix8-rglbmc REVISION=r0

31
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/platform-config/r0/src/lib/x86-64-quanta-ix8-rglbmc-r0.yml Normal file
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---
######################################################################
#
# platform-config for IX8
#
######################################################################
x86-64-quanta-ix8-rglbmc-r0:
grub:
serial: >-
--port=0x2f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-3-16
args: >-
console=ttyS1,115200n8
reboot=c,p
##network:
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:14.0

22
packages/platforms/quanta/x86-64/x86-64-quanta-ix8-rglbmc/platform-config/r0/src/python/x86_64_quanta_ix8_rglbmc_r0/__init__.py Normal file
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from onl.platform.base import *
from onl.platform.quanta import *
class OnlPlatform_x86_64_quanta_ix8_rglbmc_r0(OnlPlatformQuanta,
OnlPlatformPortConfig_48x25_8x100):
PLATFORM='x86-64-quanta-ix8-rglbmc-r0'
MODEL="IX8"
""" Define Quanta SYS_OBJECT_ID rule.
SYS_OBJECT_ID = .xxxx.ABCC
"xxxx" define QCT device mark. For example, LB9->1048, LY2->3048
"A" define QCT switch series name: LB define 1, LY define 2, IX define 3
"B" define QCT switch series number 1: For example, LB9->9, LY2->2
"CC" define QCT switch series number 2: For example, LY2->00, LY4R->18(R is 18th english letter)
"""
SYS_OBJECT_ID=".4048.3800"
def baseconfig(self):
self.insmod("qci_cpld_sfp28")
self.insmod("qci_platform_ix8")
return True