scottk/OpenNetworkLinux
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenNetworkLinux.git synced 2025-12-24 16:57:02 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #540 from rick-yhchen1013/master

Browse Source 
Add new platform support for MiTAC ly1200.
This commit is contained in:
Jeffrey Townsend
2019-04-24 13:22:25 -07:00
committed by GitHub
parent 9888206e6e e72e8ad3e0
commit afd2ce2d64
74 changed files with 7802 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
builds/any/rootfs/stretch/common/all-base-packages.yml
View File

@@ -79,3 +79,11 @@
- tcpdump
- strace
- sysstat
- tmux
- lm-sensors
- hddtemp
- bc
- vim
- htop
- tree
- memtester

1
builds/any/rootfs/stretch/common/amd64-base-packages.yml
View File

@@ -13,3 +13,4 @@
- onl-kernel-4.14-lts-x86-64-all-modules
- efibootmgr
- gdisk
- acpid

35
packages/base/any/kernels/4.14-lts/configs/x86_64-all/x86_64-all.config
View File

@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/x86_64 4.14.49 Kernel Configuration
# Linux/x86 4.14.49 Kernel Configuration
#
CONFIG_64BIT=y
CONFIG_X86_64=y
@@ -2628,7 +2628,7 @@ CONFIG_SENSORS_CORETEMP=y
# CONFIG_SENSORS_MAX6642 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_MAX6697 is not set
# CONFIG_SENSORS_MAX31790 is not set
CONFIG_SENSORS_MAX31790=y
# CONFIG_SENSORS_MCP3021 is not set
# CONFIG_SENSORS_TC654 is not set
# CONFIG_SENSORS_ADCXX is not set
@@ -2810,6 +2810,8 @@ CONFIG_SSB_PCIHOST=y
# CONFIG_SSB_B43_PCI_BRIDGE is not set
CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
# CONFIG_SSB_PCMCIAHOST is not set
CONFIG_SSB_SDIOHOST_POSSIBLE=y
# CONFIG_SSB_SDIOHOST is not set
# CONFIG_SSB_SILENT is not set
# CONFIG_SSB_DEBUG is not set
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
@@ -3251,7 +3253,32 @@ CONFIG_USB_SERIAL_CONSOLE=y
# CONFIG_USB_LED_TRIG is not set
# CONFIG_USB_ULPI_BUS is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=8
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
#
# MMC/SD/SDIO Host Controller Drivers
#
# CONFIG_MMC_DEBUG is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PCI=y
# CONFIG_MMC_RICOH_MMC is not set
# CONFIG_MMC_SDHCI_ACPI is not set
# CONFIG_MMC_SDHCI_PLTFM is not set
# CONFIG_MMC_WBSD is not set
# CONFIG_MMC_TIFM_SD is not set
# CONFIG_MMC_SPI is not set
# CONFIG_MMC_SDRICOH_CS is not set
# CONFIG_MMC_CB710 is not set
# CONFIG_MMC_VIA_SDMMC is not set
# CONFIG_MMC_VUB300 is not set
# CONFIG_MMC_USHC is not set
# CONFIG_MMC_USDHI6ROL0 is not set
# CONFIG_MMC_TOSHIBA_PCI is not set
# CONFIG_MMC_MTK is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@@ -3556,7 +3583,7 @@ CONFIG_AMD_IOMMU_V2=y
CONFIG_DMAR_TABLE=y
CONFIG_INTEL_IOMMU=y
# CONFIG_INTEL_IOMMU_SVM is not set
# CONFIG_INTEL_IOMMU_DEFAULT_ON is not set
CONFIG_INTEL_IOMMU_DEFAULT_ON=y
CONFIG_INTEL_IOMMU_FLOPPY_WA=y
CONFIG_IRQ_REMAP=y

1
packages/platforms/mitac/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/vendor-config/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/vendor-config/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-config-vendor.yml VENDOR=mitac Vendor=MiTAC

7
packages/platforms/mitac/vendor-config/src/python/mitac/__init__.py Normal file
View File

@@ -0,0 +1,7 @@
#!/usr/bin/python
from onl.platform.base import *
class OnlPlatformMiTAC(OnlPlatformBase):
MANUFACTURER='MiTAC'
PRIVATE_ENTERPRISE_NUMBER=11183

1
packages/platforms/mitac/x86-64/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/x86-64/modules/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/x86-64/modules/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=mitac KERNELS="onl-kernel-4.14-lts-x86-64-all:amd64"

3
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/.gitignore vendored Normal file
View File

@@ -0,0 +1,3 @@
*x86*64*mitac*ly1200*b32h0*c3*.mk
onlpdump.mk

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/platform-modules.yml VENDOR=mitac BASENAME=x86-64-mitac-ly1200-b32h0-c3 ARCH=amd64 KERNELS="onl-kernel-4.14-lts-x86-64-all:amd64"

2
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/.gitignore vendored Normal file
View File

@@ -0,0 +1,2 @@
lib
Kbuild

11
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/Makefile Normal file
View File

@@ -0,0 +1,11 @@
# Generate Kbuild dynamically
OBJLIST=$(addsuffix .o, $(basename $(wildcard *.c)))
$(shell rm -f Kbuild)
$(foreach f, $(OBJLIST), $(file >> Kbuild, obj-m += $(f)))
# Settings used by ONL
KERNELS := onl-kernel-4.14-lts-x86-64-all:amd64
KMODULES := $(ONL)/packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds
VENDOR := mitac
BASENAME := x86-64-mitac-ly1200-b32h0-c3
ARCH := x86_64
include $(ONL)/make/kmodule.mk

26
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/bms_i2c.h Normal file
View File

@@ -0,0 +1,26 @@
#ifndef _BMS_I2C_H_
#define _BMS_I2C_H_
const char *bms_i2c_adapter_names[] = {
"SMBus I801 adapter",
"SMBus iSMT adapter",
};
enum i2c_adapter_type {
I2C_ADAPTER_I801 = 0,
I2C_ADAPTER_ISMT,
};
enum bms_module_switch_bus {
I2C_STAGE1_MUX_CHAN0 = 0,
I2C_STAGE1_MUX_CHAN1,
I2C_STAGE1_MUX_CHAN2,
I2C_STAGE1_MUX_CHAN3,
I2C_STAGE1_MUX_CHAN4,
I2C_STAGE1_MUX_CHAN5,
I2C_STAGE1_MUX_CHAN6,
I2C_STAGE1_MUX_CHAN7,
};
#endif /* _BMS_I2C_H_ */

275
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/master_cpld_reg.h Normal file
View File

@@ -0,0 +1,275 @@
#ifndef __MASTER_CPLD_REG
#define __MASTER_CPLD_REG
static int master_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name);
static int master_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name);
/* generic CPLD read function */
#define FLD_RAW_RD_FUNC(_reg, _fld, _wdh) static ssize_t \
master_cpld_##_fld##_raw_read(struct device *dev, struct device_attribute *attr, char *buf) { \
return master_cpld_raw_read(dev, attr, buf, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \
}
/* generic CPLD write function */
#define FLD_RAW_WR_FUNC(_reg, _fld, _wdh) static ssize_t \
master_cpld_##_fld##_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { \
return master_cpld_raw_write(dev, attr, buf, count, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \
}
/* CPLD register definition macros */
#define REG_DEF(_reg, _off, _wdh) \
static unsigned int _reg##_offset = (unsigned int)(_off); \
static unsigned int _reg##_width = (unsigned int)(_wdh);
/* CPLD register field definition macros, with generic read/write function */
#define FLD_RAW_RO_DEF(_reg, _fld, _sft, _wdh) \
static unsigned int _fld##_shift = (unsigned int)(_sft); \
static unsigned int _fld##_width = (unsigned int)(_wdh); \
static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \
FLD_RAW_RD_FUNC(_reg, _fld, _wdh)
#define FLD_RAW_RW_DEF(_reg, _fld, _sft, _wdh) \
static unsigned int _fld##_shift = (unsigned int)(_sft); \
static unsigned int _fld##_width = (unsigned int)(_wdh); \
static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \
FLD_RAW_RD_FUNC(_reg, _fld, _wdh) FLD_RAW_WR_FUNC(_reg, _fld, _wdh)
/* declare master CPLD registers */
/* register name offset width */
/* --------------------------------------- ------- ----- */
REG_DEF( mstr_cpld_rev, 0x00, 8)
REG_DEF( mstr_cpld_gpr, 0x01, 8)
REG_DEF( mb_brd_rev_type, 0x02, 8)
REG_DEF( mstr_srr, 0x03, 8)
REG_DEF( eeprom_wp, 0x04, 8)
REG_DEF( mstr_irq, 0x05, 8)
REG_DEF( system_led, 0x06, 8)
REG_DEF( fan_tray_3_1_led, 0x07, 8)
REG_DEF( fan_tray_6_4_led, 0x08, 8)
REG_DEF( fan_tray_status, 0x09, 8)
REG_DEF( fan_type_status, 0x0A, 8)
REG_DEF( psu_en_status, 0x0B, 8)
REG_DEF( mb_pwr_en_status, 0x0C, 8)
REG_DEF( mb_pwr_status, 0x0D, 8)
REG_DEF( zqsfp28_present_8_1_status, 0x10, 8)
REG_DEF( zqsfp28_present_16_9_status, 0x11, 8)
REG_DEF( zqsfp28_rst_8_1, 0x12, 8)
REG_DEF( zqsfp28_rst_16_9, 0x13, 8)
REG_DEF( zqsfp28_modsel_8_1, 0x14, 8)
REG_DEF( zqsfp28_modsel_16_9, 0x15, 8)
REG_DEF( zqsfp28_lpmode_8_1, 0x16, 8)
REG_DEF( zqsfp28_lpmode_16_9, 0x17, 8)
REG_DEF( zqsfp28_irq_8_1_status, 0x18, 8)
REG_DEF( zqsfp28_irq_16_9_status, 0x19, 8)
REG_DEF( zqsfp28_irq_msk_8_1_status, 0x1A, 8)
REG_DEF( zqsfp28_irq_msk_16_9_status, 0x1B, 8)
/* declare master CPLD register's fields */
/* register name field name shift width */
/* ---------------------- ---------------- ------ ----- */
FLD_RAW_RO_DEF( mstr_cpld_rev, mjr_rev, 4, 4)
FLD_RAW_RO_DEF( mstr_cpld_rev, mnr_rev, 0, 4)
FLD_RAW_RW_DEF( mstr_cpld_gpr, scrtch_reg, 0, 8)
FLD_RAW_RO_DEF( mb_brd_rev_type, brd_rev, 4, 4)
FLD_RAW_RO_DEF( mb_brd_rev_type, brd_type, 0, 4)
FLD_RAW_RW_DEF( mstr_srr, mb_rst, 2, 1)
FLD_RAW_RW_DEF( mstr_srr, npu_rst, 1, 1)
FLD_RAW_RW_DEF( mstr_srr, mgmt_phy_rst, 0, 1)
FLD_RAW_RW_DEF( eeprom_wp, mb_eeprom_wp, 2, 1)
FLD_RAW_RW_DEF( eeprom_wp, cpld_spi_wp, 1, 1)
FLD_RAW_RW_DEF( eeprom_wp, fan_eeprom_wp, 0, 1)
FLD_RAW_RW_DEF( mstr_irq, ps2_int_msk, 7, 1)
FLD_RAW_RW_DEF( mstr_irq, ps1_int_msk, 6, 1)
FLD_RAW_RW_DEF( mstr_irq, usb_fault_msk, 5, 1)
FLD_RAW_RW_DEF( mstr_irq, pcie_int_msk, 4, 1)
FLD_RAW_RW_DEF( mstr_irq, fan_alert_int_msk, 3, 1)
FLD_RAW_RO_DEF( mstr_irq, usb_fault, 2, 1)
FLD_RAW_RO_DEF( mstr_irq, pcie_int, 1, 1)
FLD_RAW_RO_DEF( mstr_irq, fan_alert_int, 0, 1)
FLD_RAW_RW_DEF( system_led, system_led_fld, 6, 2)
FLD_RAW_RW_DEF( system_led, power_led, 4, 2)
FLD_RAW_RW_DEF( system_led, fan_led, 2, 2)
FLD_RAW_RW_DEF( system_led, locate_led, 1, 1)
FLD_RAW_RW_DEF( fan_tray_3_1_led, led_test, 6, 2)
FLD_RAW_RW_DEF( fan_tray_3_1_led, fan_tray3_led, 4, 2)
FLD_RAW_RW_DEF( fan_tray_3_1_led, fan_tray2_led, 2, 2)
FLD_RAW_RW_DEF( fan_tray_3_1_led, fan_tray1_led, 0, 2)
FLD_RAW_RW_DEF( fan_tray_6_4_led, fan_tray6_led, 4, 2)
FLD_RAW_RW_DEF( fan_tray_6_4_led, fan_tray5_led, 2, 2)
FLD_RAW_RW_DEF( fan_tray_6_4_led, fan_tray4_led, 0, 2)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray6_present, 5, 1)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray5_present, 4, 1)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray4_present, 3, 1)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray3_present, 2, 1)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray2_present, 1, 1)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray1_present, 0, 1)
FLD_RAW_RO_DEF( fan_type_status, fan_type6, 5, 1)
FLD_RAW_RO_DEF( fan_type_status, fan_type5, 4, 1)
FLD_RAW_RO_DEF( fan_type_status, fan_type4, 3, 1)
FLD_RAW_RO_DEF( fan_type_status, fan_type3, 2, 1)
FLD_RAW_RO_DEF( fan_type_status, fan_type2, 1, 1)
FLD_RAW_RO_DEF( fan_type_status, fan_type1, 0, 1)
FLD_RAW_RO_DEF( psu_en_status, ps1_ps, 7, 1)
FLD_RAW_RO_DEF( psu_en_status, ps1_pg, 6, 1)
FLD_RAW_RO_DEF( psu_en_status, ps1_int, 5, 1)
FLD_RAW_RW_DEF( psu_en_status, ps1_on, 4, 1)
FLD_RAW_RO_DEF( psu_en_status, ps2_ps, 3, 1)
FLD_RAW_RO_DEF( psu_en_status, ps2_pg, 2, 1)
FLD_RAW_RO_DEF( psu_en_status, ps2_int, 1, 1)
FLD_RAW_RW_DEF( psu_en_status, ps2_on, 0, 1)
FLD_RAW_RW_DEF( mb_pwr_en_status, usb1_vbus_en, 7, 1)
FLD_RAW_RO_DEF( mb_pwr_en_status, v5p0_en, 5, 1)
FLD_RAW_RO_DEF( mb_pwr_en_status, v3p3_en, 4, 1)
FLD_RAW_RO_DEF( mb_pwr_en_status, vcc_1v8_en, 3, 1)
FLD_RAW_RO_DEF( mb_pwr_en_status, mac_avs1v_en, 2, 1)
FLD_RAW_RO_DEF( mb_pwr_en_status, mac1v_en, 1, 1)
FLD_RAW_RO_DEF( mb_pwr_en_status, vcc_1v25_en, 0, 1)
FLD_RAW_RO_DEF( mb_pwr_status, vcc_3p3_cpld, 6, 1)
FLD_RAW_RO_DEF( mb_pwr_status, vcc5v_pg, 5, 1)
FLD_RAW_RO_DEF( mb_pwr_status, vcc3v3_pg, 4, 1)
FLD_RAW_RO_DEF( mb_pwr_status, vcc_1v8_pg, 3, 1)
FLD_RAW_RO_DEF( mb_pwr_status, mac_avs1v_pg, 2, 1)
FLD_RAW_RO_DEF( mb_pwr_status, mac1v_pg, 1, 1)
FLD_RAW_RO_DEF( mb_pwr_status, vcc_1v25_pg, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port8_present, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port7_present, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port6_present, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port5_present, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port4_present, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port3_present, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port2_present, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port1_present, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port16_present, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port15_present, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port14_present, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port13_present, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port12_present, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port11_present, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port10_present, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port9_present, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port8_rst, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port7_rst, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port6_rst, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port5_rst, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port4_rst, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port3_rst, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port2_rst, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port1_rst, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port16_rst, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port15_rst, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port14_rst, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port13_rst, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port12_rst, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port11_rst, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port10_rst, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port9_rst, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port8_modsel, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port7_modsel, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port6_modsel, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port5_modsel, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port4_modsel, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port3_modsel, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port2_modsel, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port1_modsel, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port16_modsel, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port15_modsel, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port14_modsel, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port13_modsel, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port12_modsel, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port11_modsel, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port10_modsel, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port9_modsel, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port8_lpmode, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port7_lpmode, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port6_lpmode, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port5_lpmode, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port4_lpmode, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port3_lpmode, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port2_lpmode, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port1_lpmode, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port16_lpmode, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port15_lpmode, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port14_lpmode, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port13_lpmode, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port12_lpmode, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port11_lpmode, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port10_lpmode, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port9_lpmode, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port8_irq_status, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port7_irq_status, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port6_irq_status, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port5_irq_status, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port4_irq_status, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port3_irq_status, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port2_irq_status, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port1_irq_status, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port16_irq_status, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port15_irq_status, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port14_irq_status, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port13_irq_status, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port12_irq_status, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port11_irq_status, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port10_irq_status, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port9_irq_status, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port8_irq_msk, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port7_irq_msk, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port6_irq_msk, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port5_irq_msk, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port4_irq_msk, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port3_irq_msk, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port2_irq_msk, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port1_irq_msk, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port16_irq_msk, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port15_irq_msk, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port14_irq_msk, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port13_irq_msk, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port12_irq_msk, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port11_irq_msk, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port10_irq_msk, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port9_irq_msk, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_present_8_1_status, port_1_8_present, 0, 8)
FLD_RAW_RO_DEF( zqsfp28_present_16_9_status,port_9_16_present, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_rst_8_1, port_1_8_rst, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_rst_16_9, port_9_16_rst, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_modsel_8_1, port_1_8_modsel, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_modsel_16_9, port_9_16_modsel, 0, 8)
FLD_RAW_RO_DEF( zqsfp28_irq_8_1_status, port_1_8_irq_status, 0, 8)
FLD_RAW_RO_DEF( zqsfp28_irq_16_9_status, port_9_16_irq_status,0, 8)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_8_1_status, port_1_8_irq_msk, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_16_9_status,port_9_16_irq_msk, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_lpmode_8_1, port_1_8_lpmode, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_lpmode_16_9, port_9_16_lpmode, 0, 8)
FLD_RAW_RO_DEF( fan_tray_status, fan_tray1_6_present, 0, 8)
FLD_RAW_RO_DEF( psu_en_status, psu_en_status_fld, 0, 8)
#endif /* __MASTER_CPLD_REG */

226
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/master_cpld_sysfs.h Normal file
View File

@@ -0,0 +1,226 @@
#ifndef __MASTER_CPLD_SYSFS
#define __MASTER_CPLD_SYSFS
/* generic CPLD sysfs file definition macros */
#define SYSFS_RAW_RO_ATTR_DEF(field) \
struct device_attribute field \
= __ATTR(field, S_IRUGO, master_cpld_##field##_raw_read, NULL);
#define SYSFS_RAW_RW_ATTR_DEF(field) \
struct device_attribute field \
= __ATTR(field, S_IRUGO | S_IWUSR | S_IWGRP, master_cpld_##field##_raw_read, master_cpld_##field##_raw_write);
#define SYSFS_MISC_RO_ATTR_DEF(field, _read) \
struct device_attribute field \
= __ATTR(field, S_IRUGO, _read, NULL);
#define SYSFS_MISC_RW_ATTR_DEF(field, _read, _write) \
struct device_attribute field \
= __ATTR(field, S_IRUGO | S_IWUSR | S_IWGRP, _read, _write);
#define SYSFS_ATTR_PTR(field) \
&field.attr
/* declare master CPLD file system */
SYSFS_RAW_RO_ATTR_DEF(mjr_rev)
SYSFS_RAW_RO_ATTR_DEF(mnr_rev)
SYSFS_RAW_RW_ATTR_DEF(scrtch_reg)
SYSFS_RAW_RO_ATTR_DEF(brd_rev)
SYSFS_RAW_RO_ATTR_DEF(brd_type)
SYSFS_RAW_RW_ATTR_DEF(mb_rst)
SYSFS_RAW_RW_ATTR_DEF(npu_rst)
SYSFS_RAW_RW_ATTR_DEF(mgmt_phy_rst)
SYSFS_RAW_RW_ATTR_DEF(mb_eeprom_wp)
SYSFS_RAW_RW_ATTR_DEF(cpld_spi_wp)
SYSFS_RAW_RW_ATTR_DEF(fan_eeprom_wp)
SYSFS_RAW_RW_ATTR_DEF(ps2_int_msk)
SYSFS_RAW_RW_ATTR_DEF(ps1_int_msk)
SYSFS_RAW_RW_ATTR_DEF(usb_fault_msk)
SYSFS_RAW_RW_ATTR_DEF(pcie_int_msk)
SYSFS_RAW_RW_ATTR_DEF(fan_alert_int_msk)
SYSFS_RAW_RO_ATTR_DEF(usb_fault)
SYSFS_RAW_RO_ATTR_DEF(pcie_int)
SYSFS_RAW_RO_ATTR_DEF(fan_alert_int)
SYSFS_RAW_RW_ATTR_DEF(system_led_fld)
SYSFS_RAW_RW_ATTR_DEF(power_led)
SYSFS_RAW_RW_ATTR_DEF(fan_led)
SYSFS_RAW_RW_ATTR_DEF(locate_led)
SYSFS_RAW_RW_ATTR_DEF(led_test)
SYSFS_RAW_RW_ATTR_DEF(fan_tray3_led)
SYSFS_RAW_RW_ATTR_DEF(fan_tray2_led)
SYSFS_RAW_RW_ATTR_DEF(fan_tray1_led)
SYSFS_RAW_RW_ATTR_DEF(fan_tray6_led)
SYSFS_RAW_RW_ATTR_DEF(fan_tray5_led)
SYSFS_RAW_RW_ATTR_DEF(fan_tray4_led)
SYSFS_RAW_RO_ATTR_DEF(fan_tray6_present)
SYSFS_RAW_RO_ATTR_DEF(fan_tray5_present)
SYSFS_RAW_RO_ATTR_DEF(fan_tray4_present)
SYSFS_RAW_RO_ATTR_DEF(fan_tray3_present)
SYSFS_RAW_RO_ATTR_DEF(fan_tray2_present)
SYSFS_RAW_RO_ATTR_DEF(fan_tray1_present)
SYSFS_RAW_RO_ATTR_DEF(fan_type6)
SYSFS_RAW_RO_ATTR_DEF(fan_type5)
SYSFS_RAW_RO_ATTR_DEF(fan_type4)
SYSFS_RAW_RO_ATTR_DEF(fan_type3)
SYSFS_RAW_RO_ATTR_DEF(fan_type2)
SYSFS_RAW_RO_ATTR_DEF(fan_type1)
SYSFS_RAW_RO_ATTR_DEF(ps1_ps)
SYSFS_RAW_RO_ATTR_DEF(ps1_pg)
SYSFS_RAW_RO_ATTR_DEF(ps1_int)
SYSFS_RAW_RW_ATTR_DEF(ps1_on)
SYSFS_RAW_RO_ATTR_DEF(ps2_ps)
SYSFS_RAW_RO_ATTR_DEF(ps2_pg)
SYSFS_RAW_RO_ATTR_DEF(ps2_int)
SYSFS_RAW_RW_ATTR_DEF(ps2_on)
SYSFS_RAW_RW_ATTR_DEF(usb1_vbus_en)
SYSFS_RAW_RO_ATTR_DEF(v5p0_en)
SYSFS_RAW_RO_ATTR_DEF(v3p3_en)
SYSFS_RAW_RO_ATTR_DEF(vcc_1v8_en)
SYSFS_RAW_RO_ATTR_DEF(mac_avs1v_en)
SYSFS_RAW_RO_ATTR_DEF(mac1v_en)
SYSFS_RAW_RO_ATTR_DEF(vcc_1v25_en)
SYSFS_RAW_RO_ATTR_DEF(vcc_3p3_cpld)
SYSFS_RAW_RO_ATTR_DEF(vcc5v_pg)
SYSFS_RAW_RO_ATTR_DEF(vcc3v3_pg)
SYSFS_RAW_RO_ATTR_DEF(vcc_1v8_pg)
SYSFS_RAW_RO_ATTR_DEF(mac_avs1v_pg)
SYSFS_RAW_RO_ATTR_DEF(mac1v_pg)
SYSFS_RAW_RO_ATTR_DEF(vcc_1v25_pg)
SYSFS_RAW_RO_ATTR_DEF(port8_present)
SYSFS_RAW_RO_ATTR_DEF(port7_present)
SYSFS_RAW_RO_ATTR_DEF(port6_present)
SYSFS_RAW_RO_ATTR_DEF(port5_present)
SYSFS_RAW_RO_ATTR_DEF(port4_present)
SYSFS_RAW_RO_ATTR_DEF(port3_present)
SYSFS_RAW_RO_ATTR_DEF(port2_present)
SYSFS_RAW_RO_ATTR_DEF(port1_present)
SYSFS_RAW_RO_ATTR_DEF(port16_present)
SYSFS_RAW_RO_ATTR_DEF(port15_present)
SYSFS_RAW_RO_ATTR_DEF(port14_present)
SYSFS_RAW_RO_ATTR_DEF(port13_present)
SYSFS_RAW_RO_ATTR_DEF(port12_present)
SYSFS_RAW_RO_ATTR_DEF(port11_present)
SYSFS_RAW_RO_ATTR_DEF(port10_present)
SYSFS_RAW_RO_ATTR_DEF(port9_present)
SYSFS_RAW_RW_ATTR_DEF(port8_rst)
SYSFS_RAW_RW_ATTR_DEF(port7_rst)
SYSFS_RAW_RW_ATTR_DEF(port6_rst)
SYSFS_RAW_RW_ATTR_DEF(port5_rst)
SYSFS_RAW_RW_ATTR_DEF(port4_rst)
SYSFS_RAW_RW_ATTR_DEF(port3_rst)
SYSFS_RAW_RW_ATTR_DEF(port2_rst)
SYSFS_RAW_RW_ATTR_DEF(port1_rst)
SYSFS_RAW_RW_ATTR_DEF(port16_rst)
SYSFS_RAW_RW_ATTR_DEF(port15_rst)
SYSFS_RAW_RW_ATTR_DEF(port14_rst)
SYSFS_RAW_RW_ATTR_DEF(port13_rst)
SYSFS_RAW_RW_ATTR_DEF(port12_rst)
SYSFS_RAW_RW_ATTR_DEF(port11_rst)
SYSFS_RAW_RW_ATTR_DEF(port10_rst)
SYSFS_RAW_RW_ATTR_DEF(port9_rst)
SYSFS_RAW_RW_ATTR_DEF(port8_modsel)
SYSFS_RAW_RW_ATTR_DEF(port7_modsel)
SYSFS_RAW_RW_ATTR_DEF(port6_modsel)
SYSFS_RAW_RW_ATTR_DEF(port5_modsel)
SYSFS_RAW_RW_ATTR_DEF(port4_modsel)
SYSFS_RAW_RW_ATTR_DEF(port3_modsel)
SYSFS_RAW_RW_ATTR_DEF(port2_modsel)
SYSFS_RAW_RW_ATTR_DEF(port1_modsel)
SYSFS_RAW_RW_ATTR_DEF(port16_modsel)
SYSFS_RAW_RW_ATTR_DEF(port15_modsel)
SYSFS_RAW_RW_ATTR_DEF(port14_modsel)
SYSFS_RAW_RW_ATTR_DEF(port13_modsel)
SYSFS_RAW_RW_ATTR_DEF(port12_modsel)
SYSFS_RAW_RW_ATTR_DEF(port11_modsel)
SYSFS_RAW_RW_ATTR_DEF(port10_modsel)
SYSFS_RAW_RW_ATTR_DEF(port9_modsel)
SYSFS_RAW_RW_ATTR_DEF(port8_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port7_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port6_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port5_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port4_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port3_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port2_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port1_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port16_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port15_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port14_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port13_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port12_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port11_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port10_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port9_lpmode)
SYSFS_RAW_RO_ATTR_DEF(port8_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port7_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port6_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port5_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port4_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port3_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port2_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port1_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port16_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port15_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port14_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port13_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port12_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port11_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port10_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port9_irq_status)
SYSFS_RAW_RW_ATTR_DEF(port8_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port7_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port6_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port5_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port4_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port3_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port2_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port1_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port16_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port15_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port14_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port13_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port12_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port11_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port10_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port9_irq_msk)
SYSFS_RAW_RO_ATTR_DEF(port_1_8_present)
SYSFS_RAW_RO_ATTR_DEF(port_9_16_present)
SYSFS_RAW_RW_ATTR_DEF(port_1_8_rst)
SYSFS_RAW_RW_ATTR_DEF(port_9_16_rst)
SYSFS_RAW_RW_ATTR_DEF(port_1_8_modsel)
SYSFS_RAW_RW_ATTR_DEF(port_9_16_modsel)
SYSFS_RAW_RO_ATTR_DEF(port_1_8_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port_9_16_irq_status)
SYSFS_RAW_RW_ATTR_DEF(port_1_8_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port_9_16_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port_1_8_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port_9_16_lpmode)
SYSFS_RAW_RO_ATTR_DEF(fan_tray1_6_present)
SYSFS_RAW_RO_ATTR_DEF(psu_en_status_fld)
#endif /* __MASTER_CPLD_SYSFS */

192
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/slave_cpld_reg.h Normal file
View File

@@ -0,0 +1,192 @@
#ifndef __SLAVE_CPLD_REG
#define __SLAVE_CPLD_REG
static int slave_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name);
static int slave_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name);
/* generic CPLD read function */
#define FLD_RAW_RD_FUNC(_reg, _fld, _wdh) static ssize_t \
slave_cpld_##_fld##_raw_read(struct device *dev, struct device_attribute *attr, char *buf) { \
return slave_cpld_raw_read(dev, attr, buf, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \
}
/* generic CPLD write function */
#define FLD_RAW_WR_FUNC(_reg, _fld, _wdh) static ssize_t \
slave_cpld_##_fld##_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { \
return slave_cpld_raw_write(dev, attr, buf, count, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \
}
/* CPLD register definition macros */
#define REG_DEF(_reg, _off, _wdh) \
static unsigned int _reg##_offset = (unsigned int)(_off); \
static unsigned int _reg##_width = (unsigned int)(_wdh);
/* CPLD register field definition macros, with generic read/write function */
#define FLD_RAW_RO_DEF(_reg, _fld, _sft, _wdh) \
static unsigned int _fld##_shift = (unsigned int)(_sft); \
static unsigned int _fld##_width = (unsigned int)(_wdh); \
static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \
FLD_RAW_RD_FUNC(_reg, _fld, _wdh)
#define FLD_RAW_RW_DEF(_reg, _fld, _sft, _wdh) \
static unsigned int _fld##_shift = (unsigned int)(_sft); \
static unsigned int _fld##_width = (unsigned int)(_wdh); \
static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \
FLD_RAW_RD_FUNC(_reg, _fld, _wdh) FLD_RAW_WR_FUNC(_reg, _fld, _wdh)
/* declare slave CPLD registers */
/* register name offset width */
/* --------------------------------------- ------- ----- */
REG_DEF( slv_cpld_rev, 0x00, 8)
REG_DEF( slv_cpld_gpr, 0x01, 8)
REG_DEF( mb_brd_rev_type, 0x02, 8)
REG_DEF( zqsfp28_present_24_17_status, 0x10, 8)
REG_DEF( zqsfp28_present_32_25_status, 0x11, 8)
REG_DEF( zqsfp28_rst_24_17, 0x12, 8)
REG_DEF( zqsfp28_rst_32_25, 0x13, 8)
REG_DEF( zqsfp28_modsel_24_17, 0x14, 8)
REG_DEF( zqsfp28_modsel_32_25, 0x15, 8)
REG_DEF( zqsfp28_lpmode_24_17, 0x16, 8)
REG_DEF( zqsfp28_lpmode_32_25, 0x17, 8)
REG_DEF( zqsfp28_irq_24_17_status, 0x18, 8)
REG_DEF( zqsfp28_irq_32_25_status, 0x19, 8)
REG_DEF( zqsfp28_irq_msk_24_17_status, 0x1A, 8)
REG_DEF( zqsfp28_irq_msk_32_25_status, 0x1B, 8)
/* declare slave CPLD register's fields */
/* register name field name shift width */
/* ---------------------- ---------------- ------ ----- */
FLD_RAW_RO_DEF( slv_cpld_rev, mjr_rev, 4, 4)
FLD_RAW_RO_DEF( slv_cpld_rev, mnr_rev, 0, 4)
FLD_RAW_RW_DEF( slv_cpld_gpr, scrtch_reg, 0, 8)
FLD_RAW_RO_DEF( mb_brd_rev_type, brd_rev, 4, 4)
FLD_RAW_RO_DEF( mb_brd_rev_type, brd_type, 0, 4)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port24_present, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port23_present, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port22_present, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port21_present, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port20_present, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port19_present, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port18_present, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port17_present, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port32_present, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port31_present, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port30_present, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port29_present, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port28_present, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port27_present, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port26_present, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port25_present, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port24_rst, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port23_rst, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port22_rst, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port21_rst, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port20_rst, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port19_rst, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port18_rst, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port17_rst, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port32_rst, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port31_rst, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port30_rst, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port29_rst, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port28_rst, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port27_rst, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port26_rst, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port25_rst, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port24_modsel, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port23_modsel, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port22_modsel, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port21_modsel, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port20_modsel, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port19_modsel, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port18_modsel, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port17_modsel, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port32_modsel, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port31_modsel, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port30_modsel, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port29_modsel, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port28_modsel, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port27_modsel, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port26_modsel, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port25_modsel, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port24_lpmode, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port23_lpmode, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port22_lpmode, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port21_lpmode, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port20_lpmode, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port19_lpmode, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port18_lpmode, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port17_lpmode, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port32_lpmode, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port31_lpmode, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port30_lpmode, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port29_lpmode, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port28_lpmode, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port27_lpmode, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port26_lpmode, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port25_lpmode, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port24_irq_status, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port23_irq_status, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port22_irq_status, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port21_irq_status, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port20_irq_status, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port19_irq_status, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port18_irq_status, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port17_irq_status, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port32_irq_status, 7, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port31_irq_status, 6, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port30_irq_status, 5, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port29_irq_status, 4, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port28_irq_status, 3, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port27_irq_status, 2, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port26_irq_status, 1, 1)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port25_irq_status, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port24_irq_msk, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port23_irq_msk, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port22_irq_msk, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port21_irq_msk, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port20_irq_msk, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port19_irq_msk, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port18_irq_msk, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port17_irq_msk, 0, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port32_irq_msk, 7, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port31_irq_msk, 6, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port30_irq_msk, 5, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port29_irq_msk, 4, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port28_irq_msk, 3, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port27_irq_msk, 2, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port26_irq_msk, 1, 1)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port25_irq_msk, 0, 1)
FLD_RAW_RO_DEF( zqsfp28_present_24_17_status, port_17_24_present, 0, 8)
FLD_RAW_RO_DEF( zqsfp28_present_32_25_status, port_25_32_present, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_rst_24_17, port_17_24_rst, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_rst_32_25, port_25_32_rst, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_modsel_24_17, port_17_24_modsel, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_modsel_32_25, port_25_32_modsel, 0, 8)
FLD_RAW_RO_DEF( zqsfp28_irq_24_17_status, port_17_24_irq_status,0, 8)
FLD_RAW_RO_DEF( zqsfp28_irq_32_25_status, port_25_32_irq_status,0, 8)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_24_17_status, port_17_24_irq_msk, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_irq_msk_32_25_status, port_25_32_irq_msk, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_lpmode_24_17, port_17_24_lpmode, 0, 8)
FLD_RAW_RW_DEF( zqsfp28_lpmode_32_25, port_25_32_lpmode, 0, 8)
#endif /* __SLAVE_CPLD_REG */

155
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/slave_cpld_sysfs.h Normal file
View File

@@ -0,0 +1,155 @@
#ifndef __SLAVE_CPLD_SYSFS
#define __SLAVE_CPLD_SYSFS
/* generic CPLD sysfs file definition macros */
#define SYSFS_RAW_RO_ATTR_DEF(field) \
struct device_attribute field \
= __ATTR(field, S_IRUGO, slave_cpld_##field##_raw_read, NULL);
#define SYSFS_RAW_RW_ATTR_DEF(field) \
struct device_attribute field \
= __ATTR(field, S_IRUGO | S_IWUSR | S_IWGRP, slave_cpld_##field##_raw_read, slave_cpld_##field##_raw_write);
#define SYSFS_MISC_RO_ATTR_DEF(field, _read) \
struct device_attribute field \
= __ATTR(field, S_IRUGO, _read, NULL);
#define SYSFS_MISC_RW_ATTR_DEF(field, _read, _write) \
struct device_attribute field \
= __ATTR(field, S_IRUGO | S_IWUSR | S_IWGRP, _read, _write);
#define SYSFS_ATTR_PTR(field) \
&field.attr
/* declare slave CPLD file system */
SYSFS_RAW_RO_ATTR_DEF(mjr_rev)
SYSFS_RAW_RO_ATTR_DEF(mnr_rev)
SYSFS_RAW_RW_ATTR_DEF(scrtch_reg)
SYSFS_RAW_RO_ATTR_DEF(brd_rev)
SYSFS_RAW_RO_ATTR_DEF(brd_type)
SYSFS_RAW_RO_ATTR_DEF(port24_present)
SYSFS_RAW_RO_ATTR_DEF(port23_present)
SYSFS_RAW_RO_ATTR_DEF(port22_present)
SYSFS_RAW_RO_ATTR_DEF(port21_present)
SYSFS_RAW_RO_ATTR_DEF(port20_present)
SYSFS_RAW_RO_ATTR_DEF(port19_present)
SYSFS_RAW_RO_ATTR_DEF(port18_present)
SYSFS_RAW_RO_ATTR_DEF(port17_present)
SYSFS_RAW_RO_ATTR_DEF(port32_present)
SYSFS_RAW_RO_ATTR_DEF(port31_present)
SYSFS_RAW_RO_ATTR_DEF(port30_present)
SYSFS_RAW_RO_ATTR_DEF(port29_present)
SYSFS_RAW_RO_ATTR_DEF(port28_present)
SYSFS_RAW_RO_ATTR_DEF(port27_present)
SYSFS_RAW_RO_ATTR_DEF(port26_present)
SYSFS_RAW_RO_ATTR_DEF(port25_present)
SYSFS_RAW_RW_ATTR_DEF(port24_rst)
SYSFS_RAW_RW_ATTR_DEF(port23_rst)
SYSFS_RAW_RW_ATTR_DEF(port22_rst)
SYSFS_RAW_RW_ATTR_DEF(port21_rst)
SYSFS_RAW_RW_ATTR_DEF(port20_rst)
SYSFS_RAW_RW_ATTR_DEF(port19_rst)
SYSFS_RAW_RW_ATTR_DEF(port18_rst)
SYSFS_RAW_RW_ATTR_DEF(port17_rst)
SYSFS_RAW_RW_ATTR_DEF(port32_rst)
SYSFS_RAW_RW_ATTR_DEF(port31_rst)
SYSFS_RAW_RW_ATTR_DEF(port30_rst)
SYSFS_RAW_RW_ATTR_DEF(port29_rst)
SYSFS_RAW_RW_ATTR_DEF(port28_rst)
SYSFS_RAW_RW_ATTR_DEF(port27_rst)
SYSFS_RAW_RW_ATTR_DEF(port26_rst)
SYSFS_RAW_RW_ATTR_DEF(port25_rst)
SYSFS_RAW_RW_ATTR_DEF(port24_modsel)
SYSFS_RAW_RW_ATTR_DEF(port23_modsel)
SYSFS_RAW_RW_ATTR_DEF(port22_modsel)
SYSFS_RAW_RW_ATTR_DEF(port21_modsel)
SYSFS_RAW_RW_ATTR_DEF(port20_modsel)
SYSFS_RAW_RW_ATTR_DEF(port19_modsel)
SYSFS_RAW_RW_ATTR_DEF(port18_modsel)
SYSFS_RAW_RW_ATTR_DEF(port17_modsel)
SYSFS_RAW_RW_ATTR_DEF(port32_modsel)
SYSFS_RAW_RW_ATTR_DEF(port31_modsel)
SYSFS_RAW_RW_ATTR_DEF(port30_modsel)
SYSFS_RAW_RW_ATTR_DEF(port29_modsel)
SYSFS_RAW_RW_ATTR_DEF(port28_modsel)
SYSFS_RAW_RW_ATTR_DEF(port27_modsel)
SYSFS_RAW_RW_ATTR_DEF(port26_modsel)
SYSFS_RAW_RW_ATTR_DEF(port25_modsel)
SYSFS_RAW_RW_ATTR_DEF(port24_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port23_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port22_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port21_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port20_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port19_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port18_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port17_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port32_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port31_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port30_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port29_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port28_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port27_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port26_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port25_lpmode)
SYSFS_RAW_RO_ATTR_DEF(port24_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port23_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port22_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port21_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port20_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port19_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port18_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port17_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port32_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port31_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port30_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port29_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port28_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port27_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port26_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port25_irq_status)
SYSFS_RAW_RW_ATTR_DEF(port24_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port23_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port22_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port21_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port20_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port19_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port18_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port17_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port32_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port31_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port30_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port29_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port28_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port27_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port26_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port25_irq_msk)
SYSFS_RAW_RO_ATTR_DEF(port_17_24_present)
SYSFS_RAW_RO_ATTR_DEF(port_25_32_present)
SYSFS_RAW_RW_ATTR_DEF(port_17_24_rst)
SYSFS_RAW_RW_ATTR_DEF(port_25_32_rst)
SYSFS_RAW_RW_ATTR_DEF(port_17_24_modsel)
SYSFS_RAW_RW_ATTR_DEF(port_25_32_modsel)
SYSFS_RAW_RO_ATTR_DEF(port_17_24_irq_status)
SYSFS_RAW_RO_ATTR_DEF(port_25_32_irq_status)
SYSFS_RAW_RW_ATTR_DEF(port_17_24_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port_25_32_irq_msk)
SYSFS_RAW_RW_ATTR_DEF(port_17_24_lpmode)
SYSFS_RAW_RW_ATTR_DEF(port_25_32_lpmode)
#endif /* __SLAVE_CPLD_SYSFS */

110
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/system_cpld_reg.h Normal file
View File

@@ -0,0 +1,110 @@
#ifndef __SYSTEM_CPLD_REG
#define __SYSTEM_CPLD_REG
static int system_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name);
static int system_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name);
/* generic CPLD read function */
#define FLD_RAW_RD_FUNC(_reg, _fld, _wdh) static ssize_t \
system_cpld_##_fld##_raw_read(struct device *dev, struct device_attribute *attr, char *buf) { \
return system_cpld_raw_read(dev, attr, buf, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \
}
/* generic CPLD write function */
#define FLD_RAW_WR_FUNC(_reg, _fld, _wdh) static ssize_t \
system_cpld_##_fld##_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { \
return system_cpld_raw_write(dev, attr, buf, count, _reg##_offset, _reg##_width, _fld##_shift, _fld##_width, _fld##_mask, #_reg); \
}
/* CPLD register definition macros */
#define REG_DEF(_reg, _off, _wdh) \
static unsigned int _reg##_offset = (unsigned int)(_off); \
static unsigned int _reg##_width = (unsigned int)(_wdh);
/* CPLD register field definition macros, with generic read/write function */
#define FLD_RAW_RO_DEF(_reg, _fld, _sft, _wdh) \
static unsigned int _fld##_shift = (unsigned int)(_sft); \
static unsigned int _fld##_width = (unsigned int)(_wdh); \
static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \
FLD_RAW_RD_FUNC(_reg, _fld, _wdh)
#define FLD_RAW_RW_DEF(_reg, _fld, _sft, _wdh) \
static unsigned int _fld##_shift = (unsigned int)(_sft); \
static unsigned int _fld##_width = (unsigned int)(_wdh); \
static unsigned int _fld##_mask = ((((unsigned int)1) << (_wdh)) - 1); \
FLD_RAW_RD_FUNC(_reg, _fld, _wdh) FLD_RAW_WR_FUNC(_reg, _fld, _wdh)
/* declare system CPLD registers */
/* register name offset width */
/* --------------------------------------- ------- ----- */
REG_DEF( sys_cpld_rev, 0x00, 8)
REG_DEF( sys_cpld_gpr, 0x01, 8)
REG_DEF( cpu_brd_rev_type, 0x02, 8)
REG_DEF( sys_srr, 0x03, 8)
REG_DEF( sys_eeprom_wp, 0x04, 8)
REG_DEF( sys_irq, 0x05, 8)
REG_DEF( sys_wd, 0x06, 8)
REG_DEF( sys_mb_rst_en, 0x07, 8)
REG_DEF( cpu_pwr_en_status, 0x08, 8)
REG_DEF( cpu_pwr_status, 0x09, 8)
REG_DEF( sys_reboot_cause, 0x0A, 8)
/* declare system CPLD register's fields */
/* register name field name shift width */
/* ---------------------- ---------------- ------ ----- */
FLD_RAW_RO_DEF( sys_cpld_rev, mjr_rev, 4, 4)
FLD_RAW_RO_DEF( sys_cpld_rev, mnr_rev, 0, 4)
FLD_RAW_RW_DEF( sys_cpld_gpr, scrtch_reg, 0, 8)
FLD_RAW_RO_DEF( cpu_brd_rev_type, brd_rev, 4, 4)
FLD_RAW_RO_DEF( cpu_brd_rev_type, brd_type, 0, 4)
FLD_RAW_RO_DEF( sys_srr, ssd_present, 3, 1)
FLD_RAW_RW_DEF( sys_srr, spi_cs_sel, 2, 1)
FLD_RAW_RW_DEF( sys_srr, rst_bios_switch, 1, 1)
FLD_RAW_RW_DEF( sys_srr, cpld_upgrade_rst, 0, 1)
FLD_RAW_RW_DEF( sys_eeprom_wp, cpld_spi_wp, 4, 1)
FLD_RAW_RW_DEF( sys_eeprom_wp, system_id_eeprom_wp, 3, 1)
FLD_RAW_RW_DEF( sys_eeprom_wp, spi_me_wp, 2, 1)
FLD_RAW_RW_DEF( sys_eeprom_wp, spi_bios_wp, 1, 1)
FLD_RAW_RW_DEF( sys_eeprom_wp, spi_bak_bios_wp, 0, 1)
FLD_RAW_RW_DEF( sys_irq, vrhot_irq_en, 6, 1)
FLD_RAW_RW_DEF( sys_irq, cpu_thermtrip_irq_en,5, 1)
FLD_RAW_RW_DEF( sys_irq, temp_alert_irq_en, 4, 1)
FLD_RAW_RO_DEF( sys_irq, vrhot_irq, 2, 1)
FLD_RAW_RO_DEF( sys_irq, cpu_thermtrip_irq, 1, 1)
FLD_RAW_RO_DEF( sys_irq, temp_alert_irq, 0, 1)
FLD_RAW_RW_DEF( sys_wd, wd_timer, 4, 4)
FLD_RAW_RW_DEF( sys_wd, wd_en, 1, 1)
FLD_RAW_RW_DEF( sys_wd, wd_punch, 0, 1)
FLD_RAW_RW_DEF( sys_mb_rst_en, mb_rst_en, 0, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v3p3_en, 7, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vcc_vnn_en, 6, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vccsram_en, 5, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vddq_en, 4, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_vcc_ref_en, 3, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v1p05_en, 2, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v1p8_en, 1, 1)
FLD_RAW_RO_DEF( cpu_pwr_en_status, pwr_v2p5_en, 0, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_v3p3, 7, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_vcc_vnn, 6, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_vccsram, 5, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_vddq, 4, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_vcc_ref, 3, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_v1p05, 2, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_v1p8, 1, 1)
FLD_RAW_RO_DEF( cpu_pwr_status, pg_v2p5, 0, 1)
FLD_RAW_RO_DEF( sys_reboot_cause, sys_reboot_cause_fld,0, 8)
#endif /* __SYSTEM_CPLD_REG */

78
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/system_cpld_sysfs.h Normal file
View File

@@ -0,0 +1,78 @@
#ifndef __SYSTEM_CPLD_SYSFS
#define __SYSTEM_CPLD_SYSFS
/* generic CPLD sysfs file definition macros */
#define SYSFS_RAW_RO_ATTR_DEF(field) \
struct device_attribute field \
= __ATTR(field, S_IRUGO, system_cpld_##field##_raw_read, NULL);
#define SYSFS_RAW_RW_ATTR_DEF(field) \
struct device_attribute field \
= __ATTR(field, S_IRUGO | S_IWUSR | S_IWGRP, system_cpld_##field##_raw_read, system_cpld_##field##_raw_write);
#define SYSFS_MISC_RO_ATTR_DEF(field, _read) \
struct device_attribute field \
= __ATTR(field, S_IRUGO, _read, NULL);
#define SYSFS_MISC_RW_ATTR_DEF(field, _read, _write) \
struct device_attribute field \
= __ATTR(field, S_IRUGO | S_IWUSR | S_IWGRP, _read, _write);
#define SYSFS_ATTR_PTR(field) \
&field.attr
/* declare system CPLD file system */
SYSFS_RAW_RO_ATTR_DEF(mjr_rev)
SYSFS_RAW_RO_ATTR_DEF(mnr_rev)
SYSFS_RAW_RW_ATTR_DEF(scrtch_reg)
SYSFS_RAW_RO_ATTR_DEF(brd_rev)
SYSFS_RAW_RO_ATTR_DEF(brd_type)
SYSFS_RAW_RO_ATTR_DEF(ssd_present)
SYSFS_RAW_RW_ATTR_DEF(spi_cs_sel)
SYSFS_RAW_RW_ATTR_DEF(rst_bios_switch)
SYSFS_RAW_RW_ATTR_DEF(cpld_upgrade_rst)
SYSFS_RAW_RW_ATTR_DEF(cpld_spi_wp)
SYSFS_RAW_RW_ATTR_DEF(system_id_eeprom_wp)
SYSFS_RAW_RW_ATTR_DEF(spi_me_wp)
SYSFS_RAW_RW_ATTR_DEF(spi_bios_wp)
SYSFS_RAW_RW_ATTR_DEF(spi_bak_bios_wp)
SYSFS_RAW_RW_ATTR_DEF(vrhot_irq_en)
SYSFS_RAW_RW_ATTR_DEF(cpu_thermtrip_irq_en)
SYSFS_RAW_RW_ATTR_DEF(temp_alert_irq_en)
SYSFS_RAW_RO_ATTR_DEF(vrhot_irq)
SYSFS_RAW_RO_ATTR_DEF(cpu_thermtrip_irq)
SYSFS_RAW_RO_ATTR_DEF(temp_alert_irq)
SYSFS_RAW_RW_ATTR_DEF(wd_timer)
SYSFS_RAW_RW_ATTR_DEF(wd_en)
SYSFS_RAW_RW_ATTR_DEF(wd_punch)
SYSFS_RAW_RW_ATTR_DEF(mb_rst_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_v3p3_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_vcc_vnn_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_vccsram_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_vddq_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_vcc_ref_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_v1p05_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_v1p8_en)
SYSFS_RAW_RO_ATTR_DEF(pwr_v2p5_en)
SYSFS_RAW_RO_ATTR_DEF(pg_v3p3)
SYSFS_RAW_RO_ATTR_DEF(pg_vcc_vnn)
SYSFS_RAW_RO_ATTR_DEF(pg_vccsram)
SYSFS_RAW_RO_ATTR_DEF(pg_vddq)
SYSFS_RAW_RO_ATTR_DEF(pg_vcc_ref)
SYSFS_RAW_RO_ATTR_DEF(pg_v1p05)
SYSFS_RAW_RO_ATTR_DEF(pg_v1p8)
SYSFS_RAW_RO_ATTR_DEF(pg_v2p5)
SYSFS_RAW_RO_ATTR_DEF(sys_reboot_cause_fld)
#endif /* __SYSTEM_CPLD_SYSFS */

163
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-cb_i2c.c Normal file
View File

@@ -0,0 +1,163 @@
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/delay.h>
#include "bms_i2c.h"
#define BMS_CB_I2C_CLIENT_NUM 5
#define BMS_CB_ADAPTER_BASE 0
static struct i2c_client *bms_cb_clients[BMS_CB_I2C_CLIENT_NUM] = {NULL};
static int bms_cb_client_index = 0;
static int __init __find_i2c_adap(struct device *dev, void *data)
{
const char *name = data;
static const char *prefix = "i2c-";
struct i2c_adapter *adapter;
if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0)
{
return 0;
}
adapter = to_i2c_adapter(dev);
return (strncmp(adapter->name, name, strlen(name)) == 0);
}
static int __init find_i2c_adapter_num(enum i2c_adapter_type type)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
const char *name = bms_i2c_adapter_names[type];
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static __init struct i2c_client *bms_cb_setup_spd(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("spd", addr),
};
return i2c_new_device(adap, &info_spd);
}
static __init struct i2c_client *bms_cb_setup_eeprom_24c02(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("24c02", addr),
};
return i2c_new_device(adap, &info_spd);
}
static __init struct i2c_client *bms_cb_setup_tmp75(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("tmp75", addr),
};
return i2c_new_device(adap, &info_spd);
}
static __init struct i2c_client *bms_cb_setup_system_cpld(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("system_cpld", 0x31),
};
return i2c_new_device(adap, &info);
}
static int __init bms_cb_setup_devices_i801(void)
{
struct i2c_adapter *adap;
int adap_num = find_i2c_adapter_num(I2C_ADAPTER_I801);
if (adap_num < 0)
return adap_num;
adap = i2c_get_adapter(adap_num);
if (!adap) {
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
goto exit;
}
bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_spd(adap, 0x50);
bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_spd(adap, 0x52);
bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_tmp75(adap, 0x4e);
exit:
return 0;
}
static int __init bms_cb_setup_devices_ismt(void)
{
struct i2c_adapter *adap;
int adap_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT);
if (adap_num < 0)
return adap_num;
adap = i2c_get_adapter(adap_num);
if (!adap) {
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
return 0;
}
bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_system_cpld(adap);
bms_cb_clients[bms_cb_client_index++] = bms_cb_setup_eeprom_24c02(adap, 0x56);
return 0;
}
static int __init bms_cb_i2c_init(void)
{
/* Initial bms_cb_slients array. */
memset(bms_cb_clients, 0x0, BMS_CB_I2C_CLIENT_NUM);
bms_cb_setup_devices_i801();
mdelay(200);
bms_cb_setup_devices_ismt();
return 0;
}
static void __exit bms_cb_i2c_exit(void){
int i;
for (i=(bms_cb_client_index-1); i>=0; i--) {
if (bms_cb_clients[i]) {
i2c_unregister_device(bms_cb_clients[i]);
bms_cb_clients[i] = NULL;
}
}
bms_cb_client_index = 0;
}
module_init(bms_cb_i2c_init);
module_exit(bms_cb_i2c_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_cb_i2c driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

153
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-fb_i2c.c Normal file
View File

@@ -0,0 +1,153 @@
#include <linux/i2c.h>
#include <linux/module.h>
#include "bms_i2c.h"
#define BMS_FB_I2C_CLIENT_NUM 3
static struct i2c_client *bms_fb_clients[BMS_FB_I2C_CLIENT_NUM] = {NULL};
static int bms_fb_client_index = 0;
static int __init __find_i2c_adap(struct device *dev, void *data)
{
const char *name = data;
static const char *prefix = "i2c-";
struct i2c_adapter *adapter;
if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0)
{
return 0;
}
adapter = to_i2c_adapter(dev);
return (strncmp(adapter->name, name, strlen(name)) == 0);
}
static int __init find_i2c_adapter_num(enum i2c_adapter_type type)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
const char *name = bms_i2c_adapter_names[type];
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static int __init find_i2c_mux_adapter_num(int parent_num, int num)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
char name[48];
snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)",
parent_num, num);
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static __init struct i2c_client *bms_fb_setup_tmp75(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("tmp75", addr),
};
return i2c_new_device(adap, &info_spd);
}
static __init struct i2c_client *bms_fb_setup_max31790(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("max31790", addr),
};
return i2c_new_device(adap, &info_spd);
}
static int __init bms_fb_setup_devices(void)
{
struct i2c_adapter *adap;
int adap_num;
int parent_num;
parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT);
if (parent_num < 0)
return parent_num;
/* Mux chan1 steup */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN1);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_fb_clients[bms_fb_client_index++] = bms_fb_setup_max31790(adap, 0x20);
bms_fb_clients[bms_fb_client_index++] = bms_fb_setup_max31790(adap, 0x23);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN1);
}
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN2);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_fb_clients[bms_fb_client_index++] = bms_fb_setup_tmp75(adap, 0x4d);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN2);
}
return 0;
}
static int __init bms_fb_i2c_init(void)
{
bms_fb_setup_devices();
return 0;
}
static void __exit bms_fb_i2c_exit(void){
int i;
for (i=(bms_fb_client_index-1); i>=0; i--) {
if (bms_fb_clients[i]) {
i2c_unregister_device(bms_fb_clients[i]);
bms_fb_clients[i] = NULL;
}
}
bms_fb_client_index = 0;
}
module_init(bms_fb_i2c_init);
module_exit(bms_fb_i2c_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_fb_i2c driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

138
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-fb_module_i2c.c Normal file
View File

@@ -0,0 +1,138 @@
#include <linux/i2c.h>
#include <linux/module.h>
#include "bms_i2c.h"
#define BMS_FB_MODULE_I2C_CLIENT_NUM 6
static struct i2c_client *bms_fb_module_clients[BMS_FB_MODULE_I2C_CLIENT_NUM] = {NULL};
static int bms_fb_module_client_index = 0;
static int __init __find_i2c_adap(struct device *dev, void *data)
{
const char *name = data;
static const char *prefix = "i2c-";
struct i2c_adapter *adapter;
if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0)
{
return 0;
}
adapter = to_i2c_adapter(dev);
return (strncmp(adapter->name, name, strlen(name)) == 0);
}
static int __init find_i2c_adapter_num(enum i2c_adapter_type type)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
const char *name = bms_i2c_adapter_names[type];
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static int __init find_i2c_mux_adapter_num(int parent_num, int num)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
char name[48];
snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)",
parent_num, num);
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static __init struct i2c_client *bms_fb_module_setup_eeprom_24c02(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("24c02", addr),
};
return i2c_new_device(adap, &info_spd);
}
static int __init bms_fb_module_setup_devices(void)
{
struct i2c_adapter *adap;
int adap_num;
int parent_num;
parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT);
if (parent_num < 0)
return parent_num;
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN1);
if (adap_num < 0)
return adap_num;
adap = i2c_get_adapter(adap_num);
if (!adap) {
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
goto exit;
}
bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x50);
bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x51);
bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x52);
bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x53);
bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x54);
bms_fb_module_clients[bms_fb_module_client_index++] = bms_fb_module_setup_eeprom_24c02(adap, 0x55);
exit:
return 0;
}
static int __init bms_fb_module_i2c_init(void)
{
/* Initial bms_sb_slients array. */
memset(bms_fb_module_clients, 0x0, BMS_FB_MODULE_I2C_CLIENT_NUM);
bms_fb_module_setup_devices();
return 0;
}
static void __exit bms_fb_module_i2c_exit(void){
int i;
for (i=(bms_fb_module_client_index-1); i>=0; i--) {
if (bms_fb_module_clients[i]) {
i2c_unregister_device(bms_fb_module_clients[i]);
bms_fb_module_clients[i] = NULL;
}
}
bms_fb_module_client_index = 0;
}
module_init(bms_fb_module_i2c_init);
module_exit(bms_fb_module_i2c_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_fb_module_i2c driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

1787
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-fse000.c Normal file
View File

File diff suppressed because it is too large Load Diff

93
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-gpe.c Normal file
View File

@@ -0,0 +1,93 @@
#include <linux/module.h>
#include <linux/acpi.h>
#define BMS_GPE_CLASS "bms_acpi"
#define BMS_GPE_DRIVER_NAME "bms_gpe"
#define BMS_GPE_DEVICE_NAME "bms_acpi_gpe"
static int bms_gpe[] = {0x01, 0x02, 0x47};
static int bms_gpe_num = sizeof(bms_gpe) / sizeof(bms_gpe[0]);
static u32 bms_gpe_handler(acpi_handle handle, u32 gpe_num, void *context)
{
struct acpi_device *device = context;
acpi_bus_generate_netlink_event(device->pnp.device_class,dev_name(&device->dev),
gpe_num, 0);
return ACPI_INTERRUPT_HANDLED; /* GPE will be disable afterward */
}
static int bms_gpe_add(struct acpi_device *device)
{
acpi_status status;
int i = 0;
char info_str[60] = { 0 };
char temp[6] = { 0 };
if (!device) {
printk("No device of BMS GPE\n");
return -EINVAL;
}
strcpy(acpi_device_name(device), BMS_GPE_DEVICE_NAME);
strcpy(acpi_device_class(device), BMS_GPE_CLASS);
strncat(info_str, "Initialized GPE list = ", 23);
for (i = 0; i < bms_gpe_num; i++) {
status = acpi_install_gpe_handler(NULL, bms_gpe[i],
ACPI_GPE_LEVEL_TRIGGERED,
&bms_gpe_handler, device);
if (status != AE_OK) {
printk("Fail to claim BMS GPE%X (code:0x%X)\n",bms_gpe[i],status);
return -EINVAL;
}
snprintf(temp, sizeof(temp), "0x%.2X ", bms_gpe[i]);
strncat(info_str, temp, 6);
}
dev_info(&device->dev, "%s.\n", info_str);
return 0;
}
static int bms_gpe_remove(struct acpi_device *device)
{
int i = 0;
for (i = 0; i < bms_gpe_num; i++) {
acpi_remove_gpe_handler(NULL, bms_gpe[i], &bms_gpe_handler);
}
return 0;
}
static const struct acpi_device_id bms_acpi_device_ids[] = {
{ "PNP0C01", 0 },
{ /* END OF LIST */ }
};
static struct acpi_driver bms_gpe_driver = {
.name = BMS_GPE_DRIVER_NAME,
.class = BMS_GPE_CLASS,
.ids = bms_acpi_device_ids,
.ops = {
.add = bms_gpe_add,
.remove = bms_gpe_remove,
},
};
static int __init bms_gpe_init(void)
{
printk(KERN_INFO "%s: init.\n", __FUNCTION__);
return acpi_bus_register_driver(&bms_gpe_driver);
}
static void __exit bms_gpe_exit(void)
{
printk(KERN_INFO "%s: exit.\n", __FUNCTION__);
acpi_bus_unregister_driver(&bms_gpe_driver);
}
module_init(bms_gpe_init);
module_exit(bms_gpe_exit);
MODULE_AUTHOR("Yencheng Lin <yencheng.lin@mic.com.tw>");
MODULE_DESCRIPTION("mitac_ly1200_32x_gpe driver");
MODULE_LICENSE("GPL");

503
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-master_cpld.c Normal file
View File

@@ -0,0 +1,503 @@
#include <linux/module.h>
#include <linux/i2c.h>
#include "master_cpld_reg.h"
#include "master_cpld_sysfs.h"
static int debug_flag = 0;
struct master_cpld_data {
struct mutex lock;
struct i2c_client *client;
struct device_attribute bin;
};
static const struct i2c_device_id master_cpld_ids[] = {
{ "master_cpld", 0 },
{ /* END OF LIST */ }
};
MODULE_DEVICE_TABLE(i2c, master_cpld_ids);
static int master_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){
unsigned int reg_val = 0, fld_val;
static int debug_flag;
struct master_cpld_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int err;
if (reg_width != 8){
printk("%s: Register table width setting failed.\n", reg_name);
return -EINVAL;
}
mutex_lock(&data->lock);
if ((err = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) {
/* CPLD read error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c read failed, error code = %d.\n", reg_name, err);
return err;
}
reg_val = err;
if (debug_flag) {
printk("%s: reg_offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
mutex_unlock(&data->lock);
if (fld_width == reg_width) {fld_val = reg_val & fld_mask;}
else {fld_val = (reg_val >> fld_shift) & fld_mask;}
return sprintf(buf, "0x%x\n", fld_val);
}
static int master_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){
int ret_code;
unsigned int reg_val, fld_val;
unsigned long val;
static int debug_flag;
struct master_cpld_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
if (reg_width != 8){
printk("%s: Register table width setting failed.\n", reg_name);
return -EINVAL;
}
/* Parse buf and store to fld_val */
if ((ret_code = kstrtoul(buf, 16, &val))){
printk("%s: Conversion value = %s failed, errno = %d.\n", reg_name, buf, ret_code);
return ret_code;
}
fld_val = (unsigned int)val;
mutex_lock(&data->lock);
if ((ret_code = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) {
/* Handle CPLD read error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c read failed, error code = %d.\n", reg_name, ret_code);
return ret_code;
}
reg_val = ret_code;
if (debug_flag) {
printk("%s: offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
if (fld_width == reg_width) {reg_val = fld_val & fld_mask;}
else {reg_val = (reg_val & ~(fld_mask << fld_shift)) |
((fld_val & (fld_mask)) << fld_shift);}
if ((ret_code = i2c_smbus_write_byte_data(client, (u8)reg_offset, (u8)reg_val)) != 0) {
/* Handle CPLD write error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c write failed, error code = %d.\n", reg_name, ret_code);
return ret_code;
}
else if (debug_flag) {
printk("%s: offset = %d, width = %d, new value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
mutex_unlock(&data->lock);
return count;
}
/*--------------------special file for debug---------------------- */
static ssize_t master_cpld_debug_read(struct device *dev, struct device_attribute *attr,
char *buf){
return sprintf(buf, "%d\n", debug_flag);
}
static ssize_t master_cpld_debug_write(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int temp;
int error;
error = kstrtoint(buf, 10, &temp);
if (error){
printk(KERN_INFO "%s: Conversion value = %s failed.\n", __FUNCTION__, buf);
return count;
}
debug_flag = temp;
if(debug_flag)
printk("%s, debug_flag = %d\n", __FUNCTION__, debug_flag);
return count;
}
SYSFS_MISC_RW_ATTR_DEF(debug, master_cpld_debug_read, master_cpld_debug_write)
/* ----------------define port group---------------------------- */
static struct attribute *port1_attributes[] = {
SYSFS_ATTR_PTR(port1_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port1_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port1_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port1_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port1_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port1_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port2_attributes[] = {
SYSFS_ATTR_PTR(port2_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port2_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port2_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port2_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port2_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port2_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port3_attributes[] = {
SYSFS_ATTR_PTR(port3_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port3_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port3_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port3_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port3_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port3_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port4_attributes[] = {
SYSFS_ATTR_PTR(port4_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port4_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port4_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port4_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port4_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port4_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port5_attributes[] = {
SYSFS_ATTR_PTR(port5_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port5_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port5_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port5_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port5_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port5_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port6_attributes[] = {
SYSFS_ATTR_PTR(port6_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port6_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port6_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port6_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port6_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port6_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port7_attributes[] = {
SYSFS_ATTR_PTR(port7_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port7_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port7_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port7_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port7_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port7_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port8_attributes[] = {
SYSFS_ATTR_PTR(port8_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port8_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port8_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port8_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port8_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port8_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
NULL
};
static struct attribute *port9_attributes[] = {
SYSFS_ATTR_PTR(port9_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port9_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port9_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port9_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port9_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port9_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port10_attributes[] = {
SYSFS_ATTR_PTR(port10_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port10_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port10_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port10_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port10_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port10_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port11_attributes[] = {
SYSFS_ATTR_PTR(port11_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port11_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port11_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port11_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port11_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port11_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port12_attributes[] = {
SYSFS_ATTR_PTR(port12_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port12_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port12_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port12_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port12_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port12_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port13_attributes[] = {
SYSFS_ATTR_PTR(port13_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port13_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port13_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port13_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port13_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port13_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port14_attributes[] = {
SYSFS_ATTR_PTR(port14_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port14_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port14_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port14_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port14_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port14_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port15_attributes[] = {
SYSFS_ATTR_PTR(port15_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port15_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port15_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port15_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port15_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port15_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static struct attribute *port16_attributes[] = {
SYSFS_ATTR_PTR(port16_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port16_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port16_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port16_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(port16_irq_status), /* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port16_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
NULL
};
static const struct attribute_group master_cpld_port_group[] = {
{.attrs = port1_attributes,
.name = "port1",},
{.attrs = port2_attributes,
.name = "port2",},
{.attrs = port3_attributes,
.name = "port3",},
{.attrs = port4_attributes,
.name = "port4",},
{.attrs = port5_attributes,
.name = "port5",},
{.attrs = port6_attributes,
.name = "port6",},
{.attrs = port7_attributes,
.name = "port7",},
{.attrs = port8_attributes,
.name = "port8",},
{.attrs = port9_attributes,
.name = "port9",},
{.attrs = port10_attributes,
.name = "port10",},
{.attrs = port11_attributes,
.name = "port11",},
{.attrs = port12_attributes,
.name = "port12",},
{.attrs = port13_attributes,
.name = "port13",},
{.attrs = port14_attributes,
.name = "port14",},
{.attrs = port15_attributes,
.name = "port15",},
{.attrs = port16_attributes,
.name = "port16",}
};
/* ----------------define misc group---------------------------- */
static struct attribute *misc_attributes[] = {
SYSFS_ATTR_PTR(mjr_rev), /* register: mstr_cpld_rev */
SYSFS_ATTR_PTR(mnr_rev), /* register: mstr_cpld_rev */
SYSFS_ATTR_PTR(scrtch_reg), /* register: mstr_cpld_gpr */
SYSFS_ATTR_PTR(brd_rev), /* register: mb_brd_rev_type */
SYSFS_ATTR_PTR(brd_type), /* register: mb_brd_rev_type */
SYSFS_ATTR_PTR(mb_rst), /* register: mstr_srr */
SYSFS_ATTR_PTR(npu_rst), /* register: mstr_srr */
SYSFS_ATTR_PTR(mgmt_phy_rst), /* register: mstr_srr */
SYSFS_ATTR_PTR(mb_eeprom_wp), /* register: eeprom_wp */
SYSFS_ATTR_PTR(cpld_spi_wp), /* register: eeprom_wp */
SYSFS_ATTR_PTR(fan_eeprom_wp), /* register: eeprom_wp */
SYSFS_ATTR_PTR(ps2_int_msk), /* register: mstr_irq */
SYSFS_ATTR_PTR(ps1_int_msk), /* register: mstr_irq */
SYSFS_ATTR_PTR(usb_fault_msk), /* register: mstr_irq */
SYSFS_ATTR_PTR(pcie_int_msk), /* register: mstr_irq */
SYSFS_ATTR_PTR(fan_alert_int_msk), /* register: mstr_irq */
SYSFS_ATTR_PTR(usb_fault), /* register: mstr_irq */
SYSFS_ATTR_PTR(pcie_int), /* register: mstr_irq */
SYSFS_ATTR_PTR(fan_alert_int), /* register: mstr_irq */
SYSFS_ATTR_PTR(system_led_fld), /* register: mstr_irq */
SYSFS_ATTR_PTR(power_led), /* register: mstr_irq */
SYSFS_ATTR_PTR(fan_led), /* register: mstr_irq */
SYSFS_ATTR_PTR(locate_led), /* register: mstr_irq */
SYSFS_ATTR_PTR(led_test), /* register: fan_tray_3_1_led */
SYSFS_ATTR_PTR(fan_tray3_led), /* register: fan_tray_3_1_led */
SYSFS_ATTR_PTR(fan_tray2_led), /* register: fan_tray_3_1_led */
SYSFS_ATTR_PTR(fan_tray1_led), /* register: fan_tray_3_1_led */
SYSFS_ATTR_PTR(fan_tray6_led), /* register: fan_tray_6_4_led */
SYSFS_ATTR_PTR(fan_tray5_led), /* register: fan_tray_6_4_led */
SYSFS_ATTR_PTR(fan_tray4_led), /* register: fan_tray_6_4_led */
SYSFS_ATTR_PTR(fan_tray6_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(fan_tray5_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(fan_tray4_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(fan_tray3_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(fan_tray2_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(fan_tray1_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(fan_type6), /* register: fan_type_status */
SYSFS_ATTR_PTR(fan_type5), /* register: fan_type_status */
SYSFS_ATTR_PTR(fan_type4), /* register: fan_type_status */
SYSFS_ATTR_PTR(fan_type3), /* register: fan_type_status */
SYSFS_ATTR_PTR(fan_type2), /* register: fan_type_status */
SYSFS_ATTR_PTR(fan_type1), /* register: fan_type_status */
SYSFS_ATTR_PTR(ps1_ps), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps1_pg), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps1_int), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps1_on), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps2_ps), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps2_pg), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps2_int), /* register: psu_en_status */
SYSFS_ATTR_PTR(ps2_on), /* register: psu_en_status */
SYSFS_ATTR_PTR(usb1_vbus_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(v5p0_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(v3p3_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(vcc_1v8_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(mac_avs1v_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(mac1v_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(vcc_1v25_en), /* register: mb_pwr_en_status */
SYSFS_ATTR_PTR(vcc_3p3_cpld), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(vcc5v_pg), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(vcc3v3_pg), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(vcc_1v8_pg), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(mac_avs1v_pg), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(mac1v_pg), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(vcc_1v25_pg), /* register: mb_pwr_status */
SYSFS_ATTR_PTR(port_1_8_present), /* register: zqsfp28_present_8_1_status */
SYSFS_ATTR_PTR(port_9_16_present), /* register: zqsfp28_present_16_9_status */
SYSFS_ATTR_PTR(port_1_8_rst), /* register: zqsfp28_rst_8_1 */
SYSFS_ATTR_PTR(port_9_16_rst), /* register: zqsfp28_rst_16_9 */
SYSFS_ATTR_PTR(port_1_8_modsel), /* register: zqsfp28_modsel_8_1 */
SYSFS_ATTR_PTR(port_9_16_modsel), /* register: zqsfp28_modsel_16_9 */
SYSFS_ATTR_PTR(port_1_8_irq_status), /* register: zqsfp28_irq_8_1_status */
SYSFS_ATTR_PTR(port_9_16_irq_status),/* register: zqsfp28_irq_16_9_status */
SYSFS_ATTR_PTR(port_1_8_irq_msk), /* register: zqsfp28_irq_msk_8_1_status */
SYSFS_ATTR_PTR(port_9_16_irq_msk), /* register: zqsfp28_irq_msk_16_9_status */
SYSFS_ATTR_PTR(port_1_8_lpmode), /* register: zqsfp28_lpmode_8_1 */
SYSFS_ATTR_PTR(port_9_16_lpmode), /* register: zqsfp28_lpmode_16_9 */
SYSFS_ATTR_PTR(fan_tray1_6_present), /* register: fan_tray_status */
SYSFS_ATTR_PTR(psu_en_status_fld), /* register: psu_en_status*/
SYSFS_ATTR_PTR(debug), /* debug flag for print more messages */
NULL
};
static const struct attribute_group master_cpld_group_misc = {
.attrs = misc_attributes,
};
static int master_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct master_cpld_data *master_cpld;
int err, i;
int grp_number = (int)( sizeof(master_cpld_port_group) / sizeof(master_cpld_port_group[0]));
/* allocate memory to master_cpld */
master_cpld = devm_kzalloc(&client->dev, sizeof(struct master_cpld_data) , GFP_KERNEL);
if (!master_cpld)
return -ENOMEM;
mutex_init(&master_cpld->lock);
for(i = 0 ; i < grp_number ; i++){
err = sysfs_create_group(&client->dev.kobj, &master_cpld_port_group[i]);
if (err){
printk("%s: Error creeat port group %d.\n", __FUNCTION__, i+1);
}
}
err = sysfs_create_group(&client->dev.kobj, &master_cpld_group_misc);
if (err){
printk("%s: Error creeat misc group.\n", __FUNCTION__);
}
master_cpld->client = client;
i2c_set_clientdata(client, master_cpld);
printk(KERN_INFO "%s: Master CPLD LCMXO3LF created.\n", __FUNCTION__);
return 0;
}
static int master_cpld_remove(struct i2c_client *client)
{
int i;
int grp_number = (int)( sizeof(master_cpld_port_group) / sizeof(master_cpld_port_group[0]));
for(i = 0 ; i < grp_number ; i++){
sysfs_remove_group(&client->dev.kobj, &master_cpld_port_group[i]);
}
sysfs_remove_group(&client->dev.kobj, &master_cpld_group_misc);
printk(KERN_INFO "%s: Master CPLD removed.\n", __FUNCTION__);
return 0;
}
static struct i2c_driver master_cpld_driver = {
.driver = {
.name = "master_cpld",
.owner = THIS_MODULE,
},
.probe = master_cpld_probe,
.remove = master_cpld_remove,
.id_table = master_cpld_ids,
};
static int __init master_cpld_init(void)
{
printk(KERN_INFO "%s: init.\n", __FUNCTION__);
return i2c_add_driver(&master_cpld_driver);
}
module_init(master_cpld_init);
static void __exit master_cpld_exit(void)
{
printk(KERN_INFO "%s: exit.\n", __FUNCTION__);
i2c_del_driver(&master_cpld_driver);
}
module_exit(master_cpld_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_master_cpld driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

136
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-pb_i2c.c Normal file
View File

@@ -0,0 +1,136 @@
#include <linux/i2c.h>
#include <linux/module.h>
#include "bms_i2c.h"
#define BMS_PB_I2C_CLIENT_NUM 2
static struct i2c_client *bms_pb_clients[BMS_PB_I2C_CLIENT_NUM] = {NULL};
static int bms_pb_client_index = 0;
static int __init __find_i2c_adap(struct device *dev, void *data)
{
const char *name = data;
static const char *prefix = "i2c-";
struct i2c_adapter *adapter;
if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0)
{
return 0;
}
adapter = to_i2c_adapter(dev);
return (strncmp(adapter->name, name, strlen(name)) == 0);
}
static int __init find_i2c_adapter_num(enum i2c_adapter_type type)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
const char *name = bms_i2c_adapter_names[type];
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static int __init find_i2c_mux_adapter_num(int parent_num, int num)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
char name[48];
snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)",
parent_num, num);
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static __init struct i2c_client *bms_pb_setup_eeprom_24c01(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("24c01", addr),
};
return i2c_new_device(adap, &info_spd);
}
static int __init bms_pb_setup_devices(void)
{
struct i2c_adapter *adap;
int adap_num;
int parent_num;
parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT);
if (parent_num < 0)
return parent_num;
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN3);
if (adap_num < 0)
return adap_num;
adap = i2c_get_adapter(adap_num);
if (!adap) {
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
goto exit;
}
bms_pb_clients[bms_pb_client_index++] = bms_pb_setup_eeprom_24c01(adap, 0x50);
bms_pb_clients[bms_pb_client_index++] = bms_pb_setup_eeprom_24c01(adap, 0x51);
exit:
return 0;
}
static int __init bms_pb_i2c_init(void)
{
/* Initial bms_sb_slients array. */
memset(bms_pb_clients, 0x0, BMS_PB_I2C_CLIENT_NUM);
bms_pb_setup_devices();
return 0;
}
static void __exit bms_pb_i2c_exit(void){
int i;
for (i=(bms_pb_client_index-1); i>=0; i--) {
if (bms_pb_clients[i]) {
i2c_unregister_device(bms_pb_clients[i]);
bms_pb_clients[i] = NULL;
}
}
bms_pb_client_index = 0;
}
module_init(bms_pb_i2c_init);
module_exit(bms_pb_i2c_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_pb_i2c driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

436
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-sb_i2c.c Normal file
View File

@@ -0,0 +1,436 @@
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/platform_data/pca953x.h>
#include <linux/platform_data/pca954x.h>
#include <linux/platform_data/at24.h>
#include <linux/delay.h>
#include "bms_i2c.h"
/* Don't include MAC_AVS_1V amd ZQSFP Modules */
#define BMS_SB_I2C_CLIENT_NUM 11
#define BMS_SB_ADAPTER_BASE 2
#define BMS_SB_STAGE2_MUX_BUS_BASE 6
static struct i2c_client *bms_sb_clients[BMS_SB_I2C_CLIENT_NUM] = {NULL};
static int bms_sb_client_index = 0;
enum bms_sb_switch_stage2_mux0_bus {
I2C_STAGE2_MUX0_CHAN0 = 0,
I2C_STAGE2_MUX0_CHAN1,
I2C_STAGE2_MUX0_CHAN2,
I2C_STAGE2_MUX0_CHAN3,
I2C_STAGE2_MUX0_CHAN4,
I2C_STAGE2_MUX0_CHAN5,
I2C_STAGE2_MUX0_CHAN6,
I2C_STAGE2_MUX0_CHAN7,
};
enum bms_sb_switch_stage2_mux1_bus {
I2C_STAGE2_MUX1_CHAN8 = 0,
I2C_STAGE2_MUX1_CHAN9,
I2C_STAGE2_MUX1_CHAN10,
I2C_STAGE2_MUX1_CHAN11,
I2C_STAGE2_MUX1_CHAN12,
I2C_STAGE2_MUX1_CHAN13,
I2C_STAGE2_MUX1_CHAN14,
I2C_STAGE2_MUX1_CHAN15,
};
enum bms_sb_switch_stage2_mux2_bus {
I2C_STAGE2_MUX2_CHAN16 = 0,
I2C_STAGE2_MUX2_CHAN17,
I2C_STAGE2_MUX2_CHAN18,
I2C_STAGE2_MUX2_CHAN19,
I2C_STAGE2_MUX2_CHAN20,
I2C_STAGE2_MUX2_CHAN21,
I2C_STAGE2_MUX2_CHAN22,
I2C_STAGE2_MUX2_CHAN23,
};
enum bms_sb_switch_stage2_mux3_bus {
I2C_STAGE2_MUX3_CHAN24 = 0,
I2C_STAGE2_MUX3_CHAN25,
I2C_STAGE2_MUX3_CHAN26,
I2C_STAGE2_MUX3_CHAN27,
I2C_STAGE2_MUX3_CHAN28,
I2C_STAGE2_MUX3_CHAN29,
I2C_STAGE2_MUX3_CHAN30,
I2C_STAGE2_MUX3_CHAN31,
};
static struct pca954x_platform_mode pmode_pca9548_mux[] = {
{ .adap_id = BMS_SB_ADAPTER_BASE + 0, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 1, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 2, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 3, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 4, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 5, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 6, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 7, },
};
static struct pca954x_platform_data platdata_pca9548_mux = {
.modes = pmode_pca9548_mux,
.num_modes = ARRAY_SIZE(pmode_pca9548_mux),
};
static struct pca954x_platform_mode pmode_stage1_pca9548_mux0[] = {
{ .adap_id = BMS_SB_ADAPTER_BASE + 8, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 9, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 10, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 11, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 12, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 13, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 14, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 15, },
};
static struct pca954x_platform_data platdata_stage1_pca9548_mux0 = {
.modes = pmode_stage1_pca9548_mux0,
.num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux0),
};
static struct pca954x_platform_mode pmode_stage1_pca9548_mux1[] = {
{ .adap_id = BMS_SB_ADAPTER_BASE + 16, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 17, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 18, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 19, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 20, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 21, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 22, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 23, },
};
static struct pca954x_platform_data platdata_stage1_pca9548_mux1 = {
.modes = pmode_stage1_pca9548_mux1,
.num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux1),
};
static struct pca954x_platform_mode pmode_stage1_pca9548_mux2[] = {
{ .adap_id = BMS_SB_ADAPTER_BASE + 24, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 25, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 26, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 27, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 28, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 29, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 30, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 31, },
};
static struct pca954x_platform_data platdata_stage1_pca9548_mux2 = {
.modes = pmode_stage1_pca9548_mux2,
.num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux2),
};
static struct pca954x_platform_mode pmode_stage1_pca9548_mux3[] = {
{ .adap_id = BMS_SB_ADAPTER_BASE + 32, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 33, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 34, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 35, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 36, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 37, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 38, },
{ .adap_id = BMS_SB_ADAPTER_BASE + 39, },
};
static struct pca954x_platform_data platdata_stage1_pca9548_mux3 = {
.modes = pmode_stage1_pca9548_mux3,
.num_modes = ARRAY_SIZE(pmode_stage1_pca9548_mux3),
};
static int __init __find_i2c_adap(struct device *dev, void *data)
{
const char *name = data;
static const char *prefix = "i2c-";
struct i2c_adapter *adapter;
if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0)
{
return 0;
}
adapter = to_i2c_adapter(dev);
return (strncmp(adapter->name, name, strlen(name)) == 0);
}
static int __init find_i2c_adapter_num(enum i2c_adapter_type type)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
const char *name = bms_i2c_adapter_names[type];
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static int __init find_i2c_mux_adapter_num(int parent_num, int num)
{
struct device *dev = NULL;
struct i2c_adapter *adapter;
char name[48];
snprintf(name, sizeof(name), "i2c-%d-mux (chan_id %d)",
parent_num, num);
/* find the adapter by name */
dev = bus_find_device(&i2c_bus_type, NULL, (void *)name,
__find_i2c_adap);
if (!dev) {
pr_err("%s: i2c adapter %s not found on system.\n",
__func__, name);
return -ENODEV;
}
adapter = to_i2c_adapter(dev);
return adapter->nr;
}
static __init struct i2c_client *bms_sb_setup_eeprom_24c04(
struct i2c_adapter *adap)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("24c04", 0x50),
};
return i2c_new_device(adap, &info_spd);
}
static __init struct i2c_client *bms_sb_setup_tmp75(
struct i2c_adapter *adap, int addr)
{
struct i2c_board_info info_spd = {
I2C_BOARD_INFO("tmp75", addr),
};
return i2c_new_device(adap, &info_spd);
}
static __init struct i2c_client *bms_sb_setup_switch(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("pca9548", 0x70),
.platform_data = &platdata_pca9548_mux,
};
return i2c_new_device(adap, &info);
}
static __init struct i2c_client *bms_sb_setup_stage1_mux0(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("pca9548", 0x71),
.platform_data = &platdata_stage1_pca9548_mux0,
};
return i2c_new_device(adap, &info);
}
static __init struct i2c_client *bms_sb_setup_stage1_mux1(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("pca9548", 0x72),
.platform_data = &platdata_stage1_pca9548_mux1,
};
return i2c_new_device(adap, &info);
}
static __init struct i2c_client *bms_sb_setup_stage1_mux2(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("pca9548", 0x73),
.platform_data = &platdata_stage1_pca9548_mux2,
};
return i2c_new_device(adap, &info);
}
static __init struct i2c_client *bms_sb_setup_stage1_mux3(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("pca9548", 0x74),
.platform_data = &platdata_stage1_pca9548_mux3,
};
return i2c_new_device(adap, &info);
}
static __init struct i2c_client *bms_sb_setup_slave_cpld(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("slave_cpld", 0x33),
};
return i2c_new_device(adap, &info);
}
static __init struct i2c_client *bms_sb_setup_master_cpld(struct i2c_adapter *adap)
{
struct i2c_board_info info = {
I2C_BOARD_INFO("master_cpld", 0x32),
};
return i2c_new_device(adap, &info);
}
static int __init bms_sb_setup_devices_ismt(void)
{
struct i2c_adapter *adap;
int adap_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT);
if (adap_num < 0)
return adap_num;
adap = i2c_get_adapter(adap_num);
if (!adap) {
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
return 0;
}
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_switch(adap);
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_master_cpld(adap);
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_slave_cpld(adap);
return 0;
}
static int __init bms_sb_setup_devices_stage1(void)
{
struct i2c_adapter *adap;
int adap_num;
int parent_num;
parent_num = find_i2c_adapter_num(I2C_ADAPTER_ISMT);
if (parent_num < 0)
return parent_num;
/* Mux chan0 steup */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN0);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_eeprom_24c04(adap);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN0);
}
/* Mux chan1 connect to fan board */
/* Mux chan2 steup */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN2);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_tmp75(adap, 0x4a);
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_tmp75(adap, 0x4b);
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_tmp75(adap, 0x4c);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN2);
}
/* Mux chan3 connect to power board */
/* Mux chan4 setup for i2c mux0 */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN4);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux0(adap);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN4);
}
/* Mux chan5 setup for i2c mux1 */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN5);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux1(adap);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN5);
}
/* Mux chan6 setup for i2c mux2 */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN6);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux2(adap);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN6);
}
/* Mux chan7 setup for i2c mux3 */
adap_num = find_i2c_mux_adapter_num(parent_num, I2C_STAGE1_MUX_CHAN7);
if (adap_num >= 0){
adap = i2c_get_adapter(adap_num);
if(adap) {
bms_sb_clients[bms_sb_client_index++] = bms_sb_setup_stage1_mux3(adap);
}else{
pr_err("%s failed to get i2c adap %d.\n", __func__, adap_num);
}
}else{
pr_err("%s failed to find i2c mux adap number %d.\n", __func__, I2C_STAGE1_MUX_CHAN7);
}
return 0;
}
static int __init bms_sb_i2c_init(void)
{
/* Initial bms_sb_slients array. */
memset(bms_sb_clients, 0x0, BMS_SB_I2C_CLIENT_NUM);
bms_sb_setup_devices_ismt();
mdelay(200);
bms_sb_setup_devices_stage1();
return 0;
}
static void __exit bms_sb_i2c_exit(void){
int i;
for (i=(bms_sb_client_index-1); i>=0; i--) {
if (bms_sb_clients[i]) {
i2c_unregister_device(bms_sb_clients[i]);
bms_sb_clients[i] = NULL;
}
}
bms_sb_client_index = 0;
}
module_init(bms_sb_i2c_init);
module_exit(bms_sb_i2c_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_sb_i2c driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

427
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-slave_cpld.c Normal file
View File

@@ -0,0 +1,427 @@
#include <linux/module.h>
#include <linux/i2c.h>
#include "slave_cpld_reg.h"
#include "slave_cpld_sysfs.h"
static int debug_flag = 0;
struct slave_cpld_data {
struct mutex lock;
struct i2c_client *client;
struct device_attribute bin;
};
static const struct i2c_device_id slave_cpld_ids[] = {
{ "slave_cpld", 0 },
{ /* END OF LIST */ }
};
MODULE_DEVICE_TABLE(i2c, slave_cpld_ids);
static int slave_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){
unsigned int reg_val = 0, fld_val;
static int debug_flag;
struct slave_cpld_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int err;
if (reg_width != 8){
printk("%s: Register table width setting failed.\n", reg_name);
return -EINVAL;
}
mutex_lock(&data->lock);
if ((err = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) {
/* CPLD read error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c read failed, error code = %d.\n", reg_name, err);
return err;
}
reg_val = err;
if (debug_flag) {
printk("%s: reg_offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
mutex_unlock(&data->lock);
if (fld_width == reg_width) {fld_val = reg_val & fld_mask;}
else {fld_val = (reg_val >> fld_shift) & fld_mask;}
return sprintf(buf, "0x%x\n", fld_val);
}
static int slave_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){
int ret_code;
unsigned int reg_val, fld_val;
unsigned long val;
static int debug_flag;
struct slave_cpld_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
if (reg_width != 8){
printk("%s: Register table width setting failed.\n", reg_name);
return -EINVAL;
}
/* Parse buf and store to fld_val */
if ((ret_code = kstrtoul(buf, 16, &val))){
printk("%s: Conversion value = %s failed, errno = %d.\n", reg_name, buf, ret_code);
return ret_code;
}
fld_val = (unsigned int)val;
mutex_lock(&data->lock);
if ((ret_code = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) {
/* Handle CPLD read error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c read failed, error code = %d.\n", reg_name, ret_code);
return ret_code;
}
reg_val = ret_code;
if (debug_flag) {
printk("%s: offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
if (fld_width == reg_width) {reg_val = fld_val & fld_mask;}
else {reg_val = (reg_val & ~(fld_mask << fld_shift)) |
((fld_val & (fld_mask)) << fld_shift);}
if ((ret_code = i2c_smbus_write_byte_data(client, (u8)reg_offset, (u8)reg_val)) != 0) {
/* Handle CPLD write error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c write failed, error code = %d.\n", reg_name, ret_code);
return ret_code;
}
else if (debug_flag) {
printk("%s: offset = %d, width = %d, new value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
mutex_unlock(&data->lock);
return count;
}
/*--------------------special file for debug---------------------- */
static ssize_t slave_cpld_debug_read(struct device *dev, struct device_attribute *attr,
char *buf){
return sprintf(buf, "%d\n", debug_flag);
}
static ssize_t slave_cpld_debug_write(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int temp;
int error;
error = kstrtoint(buf, 10, &temp);
if (error){
printk(KERN_INFO "%s: Conversion value = %s failed.\n", __FUNCTION__, buf);
return count;
}
debug_flag = temp;
if(debug_flag)
printk("%s, debug_flag = %d\n", __FUNCTION__, debug_flag);
return count;
}
SYSFS_MISC_RW_ATTR_DEF(debug, slave_cpld_debug_read, slave_cpld_debug_write)
/* ----------------define port group---------------------------- */
static struct attribute *port17_attributes[] = {
SYSFS_ATTR_PTR(port17_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port17_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port17_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port17_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port17_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port17_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port18_attributes[] = {
SYSFS_ATTR_PTR(port18_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port18_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port18_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port18_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port18_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port18_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port19_attributes[] = {
SYSFS_ATTR_PTR(port19_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port19_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port19_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port19_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port19_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port19_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port20_attributes[] = {
SYSFS_ATTR_PTR(port20_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port20_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port20_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port20_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port20_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port20_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port21_attributes[] = {
SYSFS_ATTR_PTR(port21_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port21_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port21_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port21_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port21_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port21_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port22_attributes[] = {
SYSFS_ATTR_PTR(port22_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port22_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port22_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port22_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port22_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port22_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port23_attributes[] = {
SYSFS_ATTR_PTR(port23_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port23_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port23_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port23_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port23_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port23_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port24_attributes[] = {
SYSFS_ATTR_PTR(port24_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port24_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port24_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port24_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port24_irq_status), /* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port24_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
NULL
};
static struct attribute *port25_attributes[] = {
SYSFS_ATTR_PTR(port25_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port25_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port25_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port25_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port25_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port25_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port26_attributes[] = {
SYSFS_ATTR_PTR(port26_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port26_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port26_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port26_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port26_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port26_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port27_attributes[] = {
SYSFS_ATTR_PTR(port27_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port27_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port27_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port27_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port27_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port27_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port28_attributes[] = {
SYSFS_ATTR_PTR(port28_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port28_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port28_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port28_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port28_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port28_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port29_attributes[] = {
SYSFS_ATTR_PTR(port29_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port29_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port29_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port29_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port29_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port29_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port30_attributes[] = {
SYSFS_ATTR_PTR(port30_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port30_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port30_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port30_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port30_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port30_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port31_attributes[] = {
SYSFS_ATTR_PTR(port31_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port31_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port31_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port31_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port31_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port31_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static struct attribute *port32_attributes[] = {
SYSFS_ATTR_PTR(port32_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port32_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port32_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port32_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(port32_irq_status), /* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port32_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
NULL
};
static const struct attribute_group slave_cpld_port_group[] = {
{.attrs = port17_attributes,
.name = "port17",},
{.attrs = port18_attributes,
.name = "port18",},
{.attrs = port19_attributes,
.name = "port19",},
{.attrs = port20_attributes,
.name = "port20",},
{.attrs = port21_attributes,
.name = "port21",},
{.attrs = port22_attributes,
.name = "port22",},
{.attrs = port23_attributes,
.name = "port23",},
{.attrs = port24_attributes,
.name = "port24",},
{.attrs = port25_attributes,
.name = "port25",},
{.attrs = port26_attributes,
.name = "port26",},
{.attrs = port27_attributes,
.name = "port27",},
{.attrs = port28_attributes,
.name = "port28",},
{.attrs = port29_attributes,
.name = "port29",},
{.attrs = port30_attributes,
.name = "port30",},
{.attrs = port31_attributes,
.name = "port31",},
{.attrs = port32_attributes,
.name = "port32",}
};
/* ----------------define misc group---------------------------- */
static struct attribute *misc_attributes[] = {
SYSFS_ATTR_PTR(mjr_rev), /* register: slv_cpld_rev */
SYSFS_ATTR_PTR(mnr_rev), /* register: slv_cpld_rev */
SYSFS_ATTR_PTR(scrtch_reg), /* register: slv_cpld_gpr */
SYSFS_ATTR_PTR(brd_rev), /* register: mb_brd_rev_type */
SYSFS_ATTR_PTR(brd_type), /* register: mb_brd_rev_type */
SYSFS_ATTR_PTR(port_17_24_present), /* register: zqsfp28_present_24_17_status */
SYSFS_ATTR_PTR(port_25_32_present), /* register: zqsfp28_present_32_25_status */
SYSFS_ATTR_PTR(port_17_24_rst), /* register: zqsfp28_rst_24_17 */
SYSFS_ATTR_PTR(port_25_32_rst), /* register: zqsfp28_rst_32_25 */
SYSFS_ATTR_PTR(port_17_24_modsel), /* register: zqsfp28_modsel_24_17 */
SYSFS_ATTR_PTR(port_25_32_modsel), /* register: zqsfp28_modsel_32_25 */
SYSFS_ATTR_PTR(port_17_24_irq_status),/* register: zqsfp28_irq_24_17_status */
SYSFS_ATTR_PTR(port_25_32_irq_status),/* register: zqsfp28_irq_32_25_status */
SYSFS_ATTR_PTR(port_17_24_irq_msk), /* register: zqsfp28_irq_msk_24_17_status */
SYSFS_ATTR_PTR(port_25_32_irq_msk), /* register: zqsfp28_irq_msk_32_25_status */
SYSFS_ATTR_PTR(port_17_24_lpmode), /* register: zqsfp28_lpmode_24_17 */
SYSFS_ATTR_PTR(port_25_32_lpmode), /* register: zqsfp28_lpmode_32_25 */
SYSFS_ATTR_PTR(debug), /* debug flag for print more messages */
NULL
};
static const struct attribute_group slave_cpld_group_misc = {
.attrs = misc_attributes,
};
static int slave_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct slave_cpld_data *slave_cpld;
int err, i;
int grp_number = (int)( sizeof(slave_cpld_port_group) / sizeof(slave_cpld_port_group[0]));
/* allocate memory to slave_cpld */
slave_cpld = devm_kzalloc(&client->dev, sizeof(struct slave_cpld_data) , GFP_KERNEL);
if (!slave_cpld)
return -ENOMEM;
mutex_init(&slave_cpld->lock);
for(i = 0 ; i < grp_number ; i++){
err = sysfs_create_group(&client->dev.kobj, &slave_cpld_port_group[i]);
if (err){
printk("%s: Error creeat port group %d.\n", __FUNCTION__, i+1);
}
}
err = sysfs_create_group(&client->dev.kobj, &slave_cpld_group_misc);
if (err){
printk("%s: Error creeat misc group.\n", __FUNCTION__);
}
slave_cpld->client = client;
i2c_set_clientdata(client, slave_cpld);
printk(KERN_INFO "%s: Slave CPLD LCMXO3LF created.\n", __FUNCTION__);
return 0;
}
static int slave_cpld_remove(struct i2c_client *client)
{
int i;
int grp_number = (int)( sizeof(slave_cpld_port_group) / sizeof(slave_cpld_port_group[0]));
for(i = 0 ; i < grp_number ; i++){
sysfs_remove_group(&client->dev.kobj, &slave_cpld_port_group[i]);
}
sysfs_remove_group(&client->dev.kobj, &slave_cpld_group_misc);
printk(KERN_INFO "%s: Slave CPLD removed.\n", __FUNCTION__);
return 0;
}
static struct i2c_driver slave_cpld_driver = {
.driver = {
.name = "slave_cpld",
.owner = THIS_MODULE,
},
.probe = slave_cpld_probe,
.remove = slave_cpld_remove,
.id_table = slave_cpld_ids,
};
static int __init slave_cpld_init(void)
{
printk(KERN_INFO "%s: init.\n", __FUNCTION__);
return i2c_add_driver(&slave_cpld_driver);
}
module_init(slave_cpld_init);
static void __exit slave_cpld_exit(void)
{
printk(KERN_INFO "%s: exit.\n", __FUNCTION__);
i2c_del_driver(&slave_cpld_driver);
}
module_exit(slave_cpld_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_slave_cpld driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

556
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/modules/builds/x86-64-mitac-ly1200-b32h0-c3-system_cpld.c Normal file
View File

@@ -0,0 +1,556 @@
#define CONFIG_DRV_SYSCPLD_WDT 1
#include <linux/module.h>
#include <linux/i2c.h>
#include "system_cpld_reg.h"
#include "system_cpld_sysfs.h"
#define MIC_DEBUG_TAG " [mitac] "
#define MITAC_WDT_MINOR 135
#define MITAC_WDT_NAME "watchdog5"
#if CONFIG_DRV_SYSCPLD_WDT
#include <linux/fs.h>
#include <linux/ioctl.h>
#include <linux/miscdevice.h>
#include <linux/reboot.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>
#endif
static int debug_flag = 0;
struct system_cpld_data {
struct mutex lock;
struct i2c_client *client;
struct device_attribute bin;
};
struct system_cpld_data *system_cpld;
static const struct i2c_device_id system_cpld_ids[] = {
{ "system_cpld", 0 },
{ /* END OF LIST */ }
};
MODULE_DEVICE_TABLE(i2c, system_cpld_ids);
static int system_cpld_raw_read(struct device *dev, struct device_attribute *attr, char *buf,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){
unsigned int reg_val = 0, fld_val;
struct system_cpld_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
int err;
if (reg_width != 8){
printk("%s: Register table width setting failed.\n", reg_name);
return -EINVAL;
}
mutex_lock(&data->lock);
if ((err = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) {
/* CPLD read error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c read failed, error code = %d.\n", reg_name, err);
return err;
}
reg_val = err;
if (debug_flag) {
printk("%s: reg_offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
mutex_unlock(&data->lock);
if (fld_width == reg_width) {fld_val = reg_val & fld_mask;}
else {fld_val = (reg_val >> fld_shift) & fld_mask;}
return sprintf(buf, "0x%x\n", fld_val);
}
static int system_cpld_raw_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count,
int reg_offset, int reg_width, int fld_shift, int fld_width, int fld_mask, char* reg_name){
int ret_code;
unsigned int reg_val, fld_val;
unsigned long val;
struct system_cpld_data *data = dev_get_drvdata(dev);
struct i2c_client *client = data->client;
if (reg_width != 8){
printk("%s: Register table width setting failed.\n", reg_name);
return -EINVAL;
}
/* Parse buf and store to fld_val */
if ((ret_code = kstrtoul(buf, 16, &val))){
printk("%s: Conversion value = %s failed, errno = %d.\n", reg_name, buf, ret_code);
return ret_code;
}
fld_val = (unsigned int)val;
mutex_lock(&data->lock);
if ((ret_code = i2c_smbus_read_byte_data(client, (u8)reg_offset)) < 0) {
/* Handle CPLD read error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c read failed, error code = %d.\n", reg_name, ret_code);
return ret_code;
}
reg_val = ret_code;
if (debug_flag) {
printk("%s: offset = %d, width = %d, cur value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
if (fld_width == reg_width) {reg_val = fld_val & fld_mask;}
else {reg_val = (reg_val & ~(fld_mask << fld_shift)) |
((fld_val & (fld_mask)) << fld_shift);}
if ((ret_code = i2c_smbus_write_byte_data(client, (u8)reg_offset, (u8)reg_val)) != 0) {
/* Handle CPLD write error condition */;
mutex_unlock(&data->lock);
printk("%s: i2c write failed, error code = %d.\n", reg_name, ret_code);
return ret_code;
}
else if (debug_flag) {
printk("%s: offset = %d, width = %d, new value = 0x%x.\n", reg_name, reg_offset, reg_width, reg_val);
}
mutex_unlock(&data->lock);
return count;
}
/*--------------------special file for debug---------------------- */
static ssize_t system_cpld_debug_read(struct device *dev, struct device_attribute *attr,
char *buf){
return sprintf(buf, "%d\n", debug_flag);
}
static ssize_t system_cpld_debug_write(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int temp;
int error;
error = kstrtoint(buf, 10, &temp);
if (error){
printk(KERN_INFO "%s: Conversion value = %s failed.\n", __FUNCTION__, buf);
return count;
}
debug_flag = temp;
if(debug_flag)
printk("%s, debug_flag = %d\n", __FUNCTION__, debug_flag);
return count;
}
SYSFS_MISC_RW_ATTR_DEF(debug, system_cpld_debug_read, system_cpld_debug_write)
/* ----------------define misc group---------------------------- */
static struct attribute *misc_attributes[] = {
SYSFS_ATTR_PTR(mjr_rev), /* register: sys_cpld_rev */
SYSFS_ATTR_PTR(mnr_rev), /* register: sys_cpld_rev */
SYSFS_ATTR_PTR(scrtch_reg), /* register: sys_cpld_gpr */
SYSFS_ATTR_PTR(brd_rev), /* register: cpu_brd_rev_type */
SYSFS_ATTR_PTR(brd_type), /* register: cpu_brd_rev_type */
SYSFS_ATTR_PTR(ssd_present), /* register: sys_srr */
SYSFS_ATTR_PTR(spi_cs_sel), /* register: sys_srr */
SYSFS_ATTR_PTR(rst_bios_switch), /* register: sys_srr */
SYSFS_ATTR_PTR(cpld_upgrade_rst), /* register: sys_srr */
SYSFS_ATTR_PTR(cpld_spi_wp), /* register: sys_eeprom_wp */
SYSFS_ATTR_PTR(system_id_eeprom_wp), /* register: sys_eeprom_wp */
SYSFS_ATTR_PTR(spi_me_wp), /* register: sys_eeprom_wp */
SYSFS_ATTR_PTR(spi_bios_wp), /* register: sys_eeprom_wp */
SYSFS_ATTR_PTR(spi_bak_bios_wp), /* register: sys_eeprom_wp */
SYSFS_ATTR_PTR(vrhot_irq_en), /* register: sys_irq */
SYSFS_ATTR_PTR(cpu_thermtrip_irq_en), /* register: sys_irq */
SYSFS_ATTR_PTR(temp_alert_irq_en), /* register: sys_irq */
SYSFS_ATTR_PTR(vrhot_irq), /* register: sys_irq */
SYSFS_ATTR_PTR(cpu_thermtrip_irq), /* register: sys_irq */
SYSFS_ATTR_PTR(temp_alert_irq), /* register: sys_irq */
SYSFS_ATTR_PTR(wd_timer), /* register: sys_wd */
SYSFS_ATTR_PTR(wd_en), /* register: sys_wd */
SYSFS_ATTR_PTR(wd_punch), /* register: sys_wd */
SYSFS_ATTR_PTR(mb_rst_en), /* register: sys_mb_rst_en */
SYSFS_ATTR_PTR(pwr_v3p3_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_vcc_vnn_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_vccsram_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_vddq_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_vcc_ref_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_v1p05_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_v1p8_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pwr_v2p5_en), /* register: cpu_pwr_en_status */
SYSFS_ATTR_PTR(pg_v3p3), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_vcc_vnn), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_vccsram), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_vddq), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_vcc_ref), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_v1p05), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_v1p8), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(pg_v2p5), /* register: cpu_pwr_status */
SYSFS_ATTR_PTR(sys_reboot_cause_fld), /* register: sys_reboot_cause */
SYSFS_ATTR_PTR(debug), /* debug flag for print more messages */
NULL
};
static const struct attribute_group system_cpld_group_misc = {
.attrs = misc_attributes,
};
#if CONFIG_DRV_SYSCPLD_WDT
/*
*****************************************************************************
*
* Watchdog Driver
*
*****************************************************************************
*/
/* wdt_timeout[] are defined by CPLD spec , -1 means researved
300 sec is not supported */
int wdt_timeout[]={15,30,60,90,120,180,240,300,-1,-1,-1,-1,-1,-1,-1,-1};
#define WD_TIMO_MAX_NUM 16
/* Default margin */
#define WD_TIMO 30
static int wdt_margin = WD_TIMO;
module_param(wdt_margin, int, 0);
MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default "
__MODULE_STRING(WD_TIMO) "s)");
static unsigned long wdt_is_open;
static int boot_flag;
/**
* wdt_ping:
*
* Reload counter one with the watchdog timeout. We don't bother reloading
* the cascade counter.
*/
static void wdt_ping(void)
{
struct device *dev = &system_cpld->client->dev;
struct device_attribute *fake_attr=NULL;
char *buf="0";/* 0: punch is defined by CPLD spec */
int err;
err = system_cpld_wd_punch_raw_write(dev, fake_attr, buf, (size_t)0);
if(err < 0){
system_cpld_wd_punch_raw_write(dev, fake_attr, buf, (size_t)0);
}
}
/**
* wdt_disable:
*
* disables watchdog.
*/
static void wdt_disable(void)
{
struct device *dev = &system_cpld->client->dev;
struct device_attribute *fake_attr=NULL;
char *buf="0";/* 0: disable is defined by CPLD spec */
int err;
err = system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0);
if(err < 0){
system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0);
}
}
/**
* wdt_enable:
*
* enables watchdog.
*/
static void wdt_enable(void)
{
struct device *dev = &system_cpld->client->dev;
struct device_attribute *fake_attr=NULL;
char *buf="1";/* 1: enable is defined by CPLD spec */
int err;
err = system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0);
if(err < 0){
system_cpld_wd_en_raw_write(dev, fake_attr, buf, (size_t)0);
}
}
/**
* wdt_set_timeout:
*
* set watchdog timeout.
*/
static void wdt_set_timeout(int index)
{
struct device *dev = &system_cpld->client->dev;
struct device_attribute *fake_attr=NULL;
char buf[16];
if ( WD_TIMO_MAX_NUM == 16 ) {
snprintf(buf, 16, "%x",index);
system_cpld_wd_timer_raw_write(dev, fake_attr, buf, (size_t)0);
}
else
printk(KERN_INFO "%s: It is out of spec.\n", __FUNCTION__);
}
/**
* wdt_write:
* @file: file handle to the watchdog
* @buf: buffer to write (unused as data does not matter here
* @count: count of bytes
* @ppos: pointer to the position to write. No seeks allowed
*
* A write to a watchdog device is defined as a keepalive signal. Any
* write of data will do, as we we don't define content meaning.
*/
static ssize_t wdt_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
if (count) {
wdt_ping();
return 1;
}
return 0;
}
/**
* wdt_ioctl:
* @inode: inode of the device
* @file: file handle to the device
* @cmd: watchdog command
* @arg: argument pointer
*
* The watchdog API defines a common set of functions for all watchdogs
* according to their available features. We only actually usefully support
* querying capabilities and current status.
*/
static int wdt_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int new_margin, rv, i;
static struct watchdog_info ident = {
.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
.firmware_version = 1,
.identity = "SYS_CPLD WTD"
};
switch (cmd) {
case WDIOC_GETSUPPORT:
return copy_to_user((struct watchdog_info __user *)arg, &ident,
sizeof(ident)) ? -EFAULT : 0;
case WDIOC_GETSTATUS:
case WDIOC_GETBOOTSTATUS:
return put_user(boot_flag, (int __user *)arg);
case WDIOC_KEEPALIVE:
wdt_ping();
return 0;
case WDIOC_SETTIMEOUT:
if (get_user(new_margin, (int __user *)arg))
return -EFAULT;
/* Arbitrary, can't find the card's limits */
if (new_margin <= 1)
return -EINVAL;
for( i=0; i<WD_TIMO_MAX_NUM; i++)
{
if (new_margin == wdt_timeout[i])
break;
}
if ( i >= WD_TIMO_MAX_NUM || i < 0 )
return -EINVAL;
wdt_set_timeout(i);
case WDIOC_GETTIMEOUT:
return put_user(wdt_margin, (int __user *)arg);
case WDIOC_SETOPTIONS:
if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
return -EFAULT;
if (rv & WDIOS_DISABLECARD) {
pr_info("System CPLD: disable watchdog\n");
wdt_disable();
}
if (rv & WDIOS_ENABLECARD) {
pr_info("System CPLD: enable watchdog\n");
wdt_enable();
}
return -EINVAL;
}
return -ENOTTY;
}
static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int ret;
ret = wdt_ioctl(file, cmd, arg);
return ret;
}
/**
* wdt_open:
* @inode: inode of device
* @file: file handle to device
*
*/
static int wdt_open(struct inode *inode, struct file *file)
{
if (MINOR(inode->i_rdev) == MITAC_WDT_MINOR) {
if (test_and_set_bit(0, &wdt_is_open)) {
return -EBUSY;
}
/*
* Activate
*/
wdt_enable();
return nonseekable_open(inode, file);
}
return -ENODEV;
}
/**
* wdt_close:
* @inode: inode to board
* @file: file handle to board
*
*/
static int wdt_release(struct inode *inode, struct file *file)
{
if (MINOR(inode->i_rdev) == MITAC_WDT_MINOR)
clear_bit(0, &wdt_is_open);
return 0;
}
/**
* notify_sys:
* @this: our notifier block
* @code: the event being reported
* @unused: unused
*
* Our notifier is called on system shutdowns. We want to turn the card
* off at reboot otherwise the machine will reboot again during memory
* test or worse yet during the following fsck. This would suck, in fact
* trust me - if it happens it does suck.
*/
static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
void *unused)
{
if (code == SYS_DOWN || code == SYS_HALT)
/* Disable Watchdog */
wdt_disable();
return NOTIFY_DONE;
}
static const struct file_operations wdt_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.write = wdt_write,
.unlocked_ioctl = wdt_unlocked_ioctl,
.open = wdt_open,
.release = wdt_release,
};
static struct miscdevice wdt_dev = {
.minor = MITAC_WDT_MINOR,
.name = MITAC_WDT_NAME,
.fops = &wdt_fops,
};
/*
* The WDT card needs to learn about soft shutdowns in order to
* turn the timebomb registers off.
*/
static struct notifier_block wdt_notifier = {
.notifier_call = wdt_notify_sys,
};
static struct notifier_block *p_wdt_notifier = NULL;
#endif /* CONFIG_DRV_SYSCPLD_WDT */
static int system_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
int err;
/* allocate memory to system_cpld */
system_cpld = devm_kzalloc(&client->dev, sizeof(struct system_cpld_data) , GFP_KERNEL);
if (!system_cpld)
return -ENOMEM;
mutex_init(&system_cpld->lock);
err = sysfs_create_group(&client->dev.kobj, &system_cpld_group_misc);
if (err){
printk("%s: Error creeat misc group.\n", __FUNCTION__);
}
system_cpld->client = client;
i2c_set_clientdata(client, system_cpld);
printk(KERN_INFO "%s: System CPLD LCMXO3LF created.\n", __FUNCTION__);
#if CONFIG_DRV_SYSCPLD_WDT
wdt_dev.minor = MITAC_WDT_MINOR;
err = misc_register(&wdt_dev);
if (err) {
printk(MIC_DEBUG_TAG"%s-%d misc_register register watchdog (%s : %d) fail err=%d \n", __FUNCTION__, __LINE__, wdt_dev.name, wdt_dev.minor, err);
wdt_dev.minor = 0;
}
else {
p_wdt_notifier = &wdt_notifier;
err = register_reboot_notifier(p_wdt_notifier);
if (err) {
printk(MIC_DEBUG_TAG"%s-%d register_reboot_notifier fail err:%d \n", __FUNCTION__, __LINE__, err);
misc_deregister(&wdt_dev);
p_wdt_notifier = NULL;
wdt_dev.minor = 0;
}
}
printk(KERN_INFO "%s: System CPLD watchdog created.\n", __FUNCTION__);
#endif
return 0;
}
static int system_cpld_remove(struct i2c_client *client)
{
#if CONFIG_DRV_SYSCPLD_WDT
if(p_wdt_notifier) unregister_reboot_notifier(p_wdt_notifier);
if(wdt_dev.minor) misc_deregister(&wdt_dev);
#endif
sysfs_remove_group(&client->dev.kobj, &system_cpld_group_misc);
printk(KERN_INFO "%s: System CPLD removed.\n", __FUNCTION__);
return 0;
}
static struct i2c_driver system_cpld_driver = {
.driver = {
.name = "system_cpld",
.owner = THIS_MODULE,
},
.probe = system_cpld_probe,
.remove = system_cpld_remove,
.id_table = system_cpld_ids,
};
static int __init system_cpld_init(void)
{
printk(KERN_INFO "%s: init.\n", __FUNCTION__);
return i2c_add_driver(&system_cpld_driver);
}
module_init(system_cpld_init);
static void __exit system_cpld_exit(void)
{
printk(KERN_INFO "%s: exit.\n", __FUNCTION__);
i2c_del_driver(&system_cpld_driver);
}
module_exit(system_cpld_exit);
MODULE_DESCRIPTION("mitac_ly1200_32x_system_cpld driver");
MODULE_AUTHOR("Eddy Weng <eddy.weng@mic.com.tw>");
MODULE_LICENSE("GPL");

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/PKG.yml Normal file
View File

@@ -0,0 +1 @@
!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-mitac-ly1200-b32h0-c3 ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

2
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/Makefile Normal file
View File

@@ -0,0 +1,2 @@
FILTER=src
include $(ONL)/make/subdirs.mk

45
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/lib/Makefile Normal file
View File

@@ -0,0 +1,45 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
############################################################
include $(ONL)/make/config.amd64.mk
MODULE := libonlp-x86-64-mitac-ly1200-b32h0-c3
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF x86_64_mitac_ly1200_b32h0_c3 onlplib
DEPENDMODULE_HEADERS := sff
include $(BUILDER)/dependmodules.mk
SHAREDLIB := libonlp-x86-64-mitac-ly1200-b32h0-c3.so
$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
include $(BUILDER)/so.mk
.DEFAULT_GOAL := $(SHAREDLIB)
GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -fPIC
GLOBAL_LINK_LIBS += -lpthread
include $(BUILDER)/targets.mk

46
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/onlpdump/Makefile Normal file
View File

@@ -0,0 +1,46 @@
############################################################
# <bsn.cl fy=2014 v=onl>
#
# Copyright 2014 BigSwitch Networks, Inc.
#
# Licensed under the Eclipse Public License, Version 1.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.eclipse.org/legal/epl-v10.html
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
# either express or implied. See the License for the specific
# language governing permissions and limitations under the
# License.
#
# </bsn.cl>
############################################################
#
#
#
############################################################
include $(ONL)/make/config.amd64.mk
.DEFAULT_GOAL := onlpdump
MODULE := onlpdump
include $(BUILDER)/standardinit.mk
DEPENDMODULES := AIM IOF onlp x86_64_mitac_ly1200_b32h0_c3 onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
include $(BUILDER)/dependmodules.mk
BINARY := onlpdump
$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
include $(BUILDER)/bin.mk
GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
GLOBAL_LINK_LIBS += -lpthread -lm
include $(BUILDER)/targets.mk

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/.module Normal file
View File

@@ -0,0 +1 @@
name: x86_64_mitac_ly1200_b32h0_c3

9
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/Makefile Normal file
View File

@@ -0,0 +1,9 @@
###############################################################################
#
#
#
###############################################################################
include $(ONL)/make/config.mk
MODULE := x86_64_mitac_ly1200_b32h0_c3
AUTOMODULE := x86_64_mitac_ly1200_b32h0_c3
include $(BUILDER)/definemodule.mk

6
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/README Normal file
View File

@@ -0,0 +1,6 @@
###############################################################################
#
# x86_64_mitac_ly1200_b32h0_c3 README
#
###############################################################################

9
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/auto/make.mk Normal file
View File

@@ -0,0 +1,9 @@
###############################################################################
#
# x86_64_mitac_ly1200_b32h0_c3 Autogeneration
#
###############################################################################
x86_64_mitac_ly1200_b32h0_c3_AUTO_DEFS := module/auto/x86_64_mitac_ly1200_b32h0_c3.yml
x86_64_mitac_ly1200_b32h0_c3_AUTO_DIRS := module/inc/x86_64_mitac_ly1200_b32h0_c3 module/src
include $(BUILDER)/auto.mk

50
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/auto/x86_64_mitac_ly1200_b32h0_c3.yml Normal file
View File

@@ -0,0 +1,50 @@
###############################################################################
#
# x86_64_mitac_ly1200_b32h0_c3 Autogeneration Definitions.
#
###############################################################################
cdefs: &cdefs
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING:
doc: "Include or exclude logging."
default: 1
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT:
doc: "Default enabled log options."
default: AIM_LOG_OPTIONS_DEFAULT
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT:
doc: "Default enabled log bits."
default: AIM_LOG_BITS_DEFAULT
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
doc: "Default enabled custom log bits."
default: 0
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB:
doc: "Default all porting macros to use the C standard libraries."
default: 1
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
doc: "Include standard library headers for stdlib porting macros."
default: x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI:
doc: "Include generic uCli support."
default: 0
- x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION:
doc: "Assume chassis fan direction is the same as the PSU fan direction."
default: 0
definitions:
cdefs:
x86_64_mitac_ly1200_b32h0_c3_CONFIG_HEADER:
defs: *cdefs
basename: x86_64_mitac_ly1200_b32h0_c3_config
portingmacro:
x86_64_mitac_ly1200_b32h0_c3:
macros:
- malloc
- free
- memset
- memcpy
- strncpy
- vsnprintf
- snprintf
- strlen

14
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/inc/x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3.x Normal file
View File

@@ -0,0 +1,14 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
/* <--auto.start.xmacro(ALL).define> */
/* <auto.end.xmacro(ALL).define> */
/* <--auto.start.xenum(ALL).define> */
/* <auto.end.xenum(ALL).define> */

137
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/inc/x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h Normal file
View File

@@ -0,0 +1,137 @@
/**************************************************************************//**
*
* @file
* @brief x86_64_mitac_ly1200_b32h0_c3 Configuration Header
*
* @addtogroup x86_64_mitac_ly1200_b32h0_c3-config
* @{
*
*****************************************************************************/
#ifndef __x86_64_mitac_ly1200_b32h0_c3_CONFIG_H__
#define __x86_64_mitac_ly1200_b32h0_c3_CONFIG_H__
#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
#include <global_custom_config.h>
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_INCLUDE_CUSTOM_CONFIG
#include <x86_64_mitac_ly1200_b32h0_c3_custom_config.h>
#endif
/* <auto.start.cdefs(x86_64_mitac_ly1200_b32h0_c3_CONFIG_HEADER).header> */
#include <AIM/aim.h>
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING
*
* Include or exclude logging. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING 1
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT
*
* Default enabled log options. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT
*
* Default enabled log bits. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT
*
* Default enabled custom log bits. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB
*
* Default all porting macros to use the C standard libraries. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB 1
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
*
* Include standard library headers for stdlib porting macros. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI
*
* Include generic uCli support. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI 0
#endif
/**
* x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
*
* Assume chassis fan direction is the same as the PSU fan direction. */
#ifndef x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
#define x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0
#endif
/**
* All compile time options can be queried or displayed
*/
/** Configuration settings structure. */
typedef struct x86_64_mitac_ly1200_b32h0_c3_config_settings_s {
/** name */
const char* name;
/** value */
const char* value;
} x86_64_mitac_ly1200_b32h0_c3_config_settings_t;
/** Configuration settings table. */
/** x86_64_mitac_ly1200_b32h0_c3_config_settings table. */
extern x86_64_mitac_ly1200_b32h0_c3_config_settings_t x86_64_mitac_ly1200_b32h0_c3_config_settings[];
/**
* @brief Lookup a configuration setting.
* @param setting The name of the configuration option to lookup.
*/
const char* x86_64_mitac_ly1200_b32h0_c3_config_lookup(const char* setting);
/**
* @brief Show the compile-time configuration.
* @param pvs The output stream.
*/
int x86_64_mitac_ly1200_b32h0_c3_config_show(struct aim_pvs_s* pvs);
/* <auto.end.cdefs(x86_64_mitac_ly1200_b32h0_c3_CONFIG_HEADER).header> */
#include "x86_64_mitac_ly1200_b32h0_c3_porting.h"
#endif /* __x86_64_mitac_ly1200_b32h0_c3_CONFIG_H__ */
/* @} */

26
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/inc/x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_dox.h Normal file
View File

@@ -0,0 +1,26 @@
/**************************************************************************//**
*
* x86_64_mitac_ly1200_b32h0_c3 Doxygen Header
*
*****************************************************************************/
#ifndef __x86_64_mitac_ly1200_b32h0_c3_DOX_H__
#define __x86_64_mitac_ly1200_b32h0_c3_DOX_H__
/**
* @defgroup x86_64_mitac_ly1200_b32h0_c3 x86_64_mitac_ly1200_b32h0_c3 - x86_64_mitac_ly1200_b32h0_c3 Description
*
The documentation overview for this module should go here.
*
* @{
*
* @defgroup x86_64_mitac_ly1200_b32h0_c3-x86_64_mitac_ly1200_b32h0_c3 Public Interface
* @defgroup x86_64_mitac_ly1200_b32h0_c3-config Compile Time Configuration
* @defgroup x86_64_mitac_ly1200_b32h0_c3-porting Porting Macros
*
* @}
*
*/
#endif /* __x86_64_mitac_ly1200_b32h0_c3_DOX_H__ */

107
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/inc/x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_porting.h Normal file
View File

@@ -0,0 +1,107 @@
/**************************************************************************//**
*
* @file
* @brief x86_64_mitac_ly1200_b32h0_c3 Porting Macros.
*
* @addtogroup x86_64_mitac_ly1200_b32h0_c3-porting
* @{
*
*****************************************************************************/
#ifndef __x86_64_mitac_ly1200_b32h0_c3_PORTING_H__
#define __x86_64_mitac_ly1200_b32h0_c3_PORTING_H__
/* <auto.start.portingmacro(ALL).define> */
#if x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <memory.h>
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_MALLOC
#if defined(GLOBAL_MALLOC)
#define x86_64_mitac_ly1200_b32h0_c3_MALLOC GLOBAL_MALLOC
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_MALLOC malloc
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_MALLOC is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_FREE
#if defined(GLOBAL_FREE)
#define x86_64_mitac_ly1200_b32h0_c3_FREE GLOBAL_FREE
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_FREE free
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_FREE is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_MEMSET
#if defined(GLOBAL_MEMSET)
#define x86_64_mitac_ly1200_b32h0_c3_MEMSET GLOBAL_MEMSET
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_MEMSET memset
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_MEMSET is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_MEMCPY
#if defined(GLOBAL_MEMCPY)
#define x86_64_mitac_ly1200_b32h0_c3_MEMCPY GLOBAL_MEMCPY
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_MEMCPY memcpy
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_MEMCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_STRNCPY
#if defined(GLOBAL_STRNCPY)
#define x86_64_mitac_ly1200_b32h0_c3_STRNCPY GLOBAL_STRNCPY
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_STRNCPY strncpy
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_STRNCPY is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_VSNPRINTF
#if defined(GLOBAL_VSNPRINTF)
#define x86_64_mitac_ly1200_b32h0_c3_VSNPRINTF GLOBAL_VSNPRINTF
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_VSNPRINTF vsnprintf
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_VSNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_SNPRINTF
#if defined(GLOBAL_SNPRINTF)
#define x86_64_mitac_ly1200_b32h0_c3_SNPRINTF GLOBAL_SNPRINTF
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_SNPRINTF snprintf
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_SNPRINTF is required but cannot be defined.
#endif
#endif
#ifndef x86_64_mitac_ly1200_b32h0_c3_STRLEN
#if defined(GLOBAL_STRLEN)
#define x86_64_mitac_ly1200_b32h0_c3_STRLEN GLOBAL_STRLEN
#elif x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB == 1
#define x86_64_mitac_ly1200_b32h0_c3_STRLEN strlen
#else
#error The macro x86_64_mitac_ly1200_b32h0_c3_STRLEN is required but cannot be defined.
#endif
#endif
/* <auto.end.portingmacro(ALL).define> */
#endif /* __x86_64_mitac_ly1200_b32h0_c3_PORTING_H__ */
/* @} */

10
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/make.mk Normal file
View File

@@ -0,0 +1,10 @@
###############################################################################
#
#
#
###############################################################################
THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
x86_64_mitac_ly1200_b32h0_c3_INCLUDES := -I $(THIS_DIR)inc
x86_64_mitac_ly1200_b32h0_c3_INTERNAL_INCLUDES := -I $(THIS_DIR)src
x86_64_mitac_ly1200_b32h0_c3_DEPENDMODULE_ENTRIES := init:x86_64_mitac_ly1200_b32h0_c3 ucli:x86_64_mitac_ly1200_b32h0_c3

9
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/Makefile Normal file
View File

@@ -0,0 +1,9 @@
###############################################################################
#
# Local source generation targets.
#
###############################################################################
ucli:
@../../../../tools/uclihandlers.py x86_64_mitac_ly1200_b32h0_c3_ucli.c

45
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/debug.c Normal file
View File

@@ -0,0 +1,45 @@
#include "x86_64_mitac_ly1200_b32h0_c3_int.h"
#if x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEBUG == 1
#include <unistd.h>
static char help__[] =
"Usage: debug [options]\n"
" -c CPLD Versions\n"
" -h Help\n"
;
int
x86_64_mitac_ly1200_b32h0_c3_debug_main(int argc, char* argv[])
{
int c = 0;
int help = 0;
int rv = 0;
while( (c = getopt(argc, argv, "ch")) != -1) {
switch(c)
{
case 'c': c = 1; break;
case 'h': help = 1; rv = 0; break;
default: help = 1; rv = 1; break;
}
}
if(help || argc == 1) {
printf("%s", help__);
return rv;
}
if(c) {
printf("Not implemented.\n");
}
return 0;
}
#endif

145
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/fani.c Normal file
View File

@@ -0,0 +1,145 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Fan Platform Implementation Defaults.
*
***********************************************************/
#include <onlp/platformi/fani.h>
#include <onlplib/mmap.h>
#include <fcntl.h>
#include "platform_lib.h"
#define PREFIX_PATH_ON_MAIN_BOARD "/sys/bus/i2c/devices/9-0066/"
#define MAX_FAN_SPEED 23000
#define PROJECT_NAME
#define LEN_FILE_NAME 80
#define FAN_RESERVED 0
#define FAN_1_ON_MAIN_BOARD 1
#define FAN_2_ON_MAIN_BOARD 2
#define FAN_3_ON_MAIN_BOARD 3
#define FAN_4_ON_MAIN_BOARD 4
#define FAN_5_ON_MAIN_BOARD 5
#define FAN_6_ON_MAIN_BOARD 6
#define FAN_7_ON_MAIN_BOARD 7
#define FAN_8_ON_MAIN_BOARD 8
#define FAN_9_ON_MAIN_BOARD 9
#define FAN_10_ON_MAIN_BOARD 10
#define FAN_11_ON_MAIN_BOARD 11
#define FAN_12_ON_MAIN_BOARD 12
typedef struct fan_path_S
{
char present[LEN_FILE_NAME];
char status[LEN_FILE_NAME];
char speed[LEN_FILE_NAME];
char direction[LEN_FILE_NAME];
char ctrl_speed[LEN_FILE_NAME];
char r_speed[LEN_FILE_NAME];
}fan_path_T;
#define _MAKE_FAN_PATH_ON_MAIN_BOARD(prj,id) \
{ #prj"fan"#id"_present", #prj"fan"#id"_fault", #prj"fan"#id"_front_speed_rpm", \
#prj"fan"#id"_direction", #prj"fan"#id"_duty_cycle_percentage", #prj"fan"#id"_rear_speed_rpm" }
#define MAKE_FAN_PATH_ON_MAIN_BOARD(prj,id) _MAKE_FAN_PATH_ON_MAIN_BOARD(prj,id)
static fan_path_T fan_path[] = /* must map with onlp_fan_id */
{
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_RESERVED),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_1_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_2_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_3_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_4_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_5_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_6_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_7_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_8_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_9_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_10_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_11_ON_MAIN_BOARD),
MAKE_FAN_PATH_ON_MAIN_BOARD(PROJECT_NAME, FAN_12_ON_MAIN_BOARD)
};
#define MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(id) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##id##_ON_MAIN_BOARD), "Chassis Fan "#id, 0 }, \
0x0, \
(ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE), \
0, \
0, \
ONLP_FAN_MODE_INVALID, \
}
/* Static fan information */
onlp_fan_info_t linfo[] = {
{ }, /* Not used */
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(1),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(2),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(3),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(4),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(5),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(6),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(7),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(8),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(9),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(10),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(11),
MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(12)
};
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define OPEN_READ_FILE(fd,fullpath,data,nbytes,len) \
DEBUG_PRINT("[Debug][%s][%d][openfile: %s]\n", __FUNCTION__, __LINE__, fullpath); \
if ((fd = open(fullpath, O_RDONLY)) == -1) \
return ONLP_STATUS_E_INTERNAL; \
if ((len = read(fd, r_data, nbytes)) <= 0){ \
close(fd); \
return ONLP_STATUS_E_INTERNAL;} \
DEBUG_PRINT("[Debug][%s][%d][read data: %s]\n", __FUNCTION__, __LINE__, r_data); \
if (close(fd) == -1) \
return ONLP_STATUS_E_INTERNAL
/*
* This function will be called prior to all of onlp_fani_* functions.
*/
int
onlp_fani_init(void)
{
// FIXME: WARNING FREEZE
if ( 0 ) {
printf("%d\t%s", linfo[0].status, fan_path[0].speed);
}
// END WARNING FREEZE
return ONLP_STATUS_OK;
}

241
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/ledi.c Normal file
View File

@@ -0,0 +1,241 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/ledi.h>
#include <sys/mman.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <onlplib/mmap.h>
#include "platform_lib.h"
#define prefix_path "/sys/class/leds/mitac_ly1200_b32h0_c3_led::"
#define filename "brightness"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
/* LED related data
*/
enum onlp_led_id
{
LED_RESERVED = 0,
LED_DIAG,
LED_LOC,
LED_FAN,
LED_PSU1,
LED_PSU2
};
enum led_light_mode {
LED_MODE_OFF = 0,
LED_MODE_GREEN,
LED_MODE_AMBER,
LED_MODE_RED,
LED_MODE_BLUE,
LED_MODE_GREEN_BLINK,
LED_MODE_AMBER_BLINK,
LED_MODE_RED_BLINK,
LED_MODE_BLUE_BLINK,
LED_MODE_AUTO,
LED_MODE_UNKNOWN
};
typedef struct led_light_mode_map {
enum onlp_led_id id;
enum led_light_mode driver_led_mode;
enum onlp_led_mode_e onlp_led_mode;
} led_light_mode_map_t;
led_light_mode_map_t led_map[] = {
{LED_DIAG, LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_DIAG, LED_MODE_GREEN, ONLP_LED_MODE_GREEN},
{LED_DIAG, LED_MODE_AMBER, ONLP_LED_MODE_ORANGE},
{LED_DIAG, LED_MODE_RED, ONLP_LED_MODE_RED},
{LED_LOC, LED_MODE_OFF, ONLP_LED_MODE_OFF},
{LED_LOC, LED_MODE_BLUE, ONLP_LED_MODE_BLUE},
{LED_FAN, LED_MODE_AUTO, ONLP_LED_MODE_AUTO},
{LED_PSU1, LED_MODE_AUTO, ONLP_LED_MODE_AUTO},
{LED_PSU2, LED_MODE_AUTO, ONLP_LED_MODE_AUTO}
};
static char last_path[][10] = /* must map with onlp_led_id */
{
"reserved",
"diag",
"loc",
"fan",
"psu1",
"psu2"
};
/*
* Get the information for the given LED OID.
*/
static onlp_led_info_t linfo[] =
{
{ }, /* Not used */
{
{ ONLP_LED_ID_CREATE(LED_DIAG), "Chassis LED 1 (DIAG LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_ORANGE,
},
{
{ ONLP_LED_ID_CREATE(LED_LOC), "Chassis LED 2 (LOC LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_BLUE,
},
{
{ ONLP_LED_ID_CREATE(LED_FAN), "Chassis LED 3 (FAN LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_AUTO,
},
{
{ ONLP_LED_ID_CREATE(LED_PSU1), "Chassis LED 4 (PSU1 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_AUTO,
},
{
{ ONLP_LED_ID_CREATE(LED_PSU2), "Chassis LED 4 (PSU2 LED)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_AUTO,
},
};
static int driver_to_onlp_led_mode(enum onlp_led_id id, enum led_light_mode driver_led_mode)
{
int i, nsize = sizeof(led_map)/sizeof(led_map[0]);
for (i = 0; i < nsize; i++)
{
if (id == led_map[i].id && driver_led_mode == led_map[i].driver_led_mode)
{
return led_map[i].onlp_led_mode;
}
}
return 0;
}
static int onlp_to_driver_led_mode(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
{
int i, nsize = sizeof(led_map)/sizeof(led_map[0]);
for(i = 0; i < nsize; i++)
{
if (id == led_map[i].id && onlp_led_mode == led_map[i].onlp_led_mode)
{
return led_map[i].driver_led_mode;
}
}
return 0;
}
/*
* This function will be called prior to any other onlp_ledi_* functions.
*/
int
onlp_ledi_init(void)
{
// FIXME: WARNING FREEZE
if ( 0 ) {
printf("%s\t%d", last_path[0], linfo[0].status);
driver_to_onlp_led_mode(LED_RESERVED, LED_MODE_AUTO);
onlp_to_driver_led_mode(LED_RESERVED, ONLP_LED_MODE_BLINKING);
}
// END WARNING FREEZE
//printf("Hello, this is %s() in %s.\n", __func__, __FILE__);
return ONLP_STATUS_OK;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function puts the LED into the given mode. It is a more functional
* interface for multimode LEDs.
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
return ONLP_STATUS_OK;
}
/*
* Generic LED ioctl interface.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Additional Functions
*/
int
onlp_ledi_status_get(onlp_oid_t id, uint32_t* rv)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_ledi_hdr_get(onlp_oid_t id, onlp_oid_hdr_t* rv)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_ledi_char_set(onlp_oid_t id, char c)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

9
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/make.mk Normal file
View File

@@ -0,0 +1,9 @@
###############################################################################
#
#
#
###############################################################################
LIBRARY := x86_64_mitac_ly1200_b32h0_c3
$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
include $(BUILDER)/lib.mk

200
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/platform_lib.c Normal file
View File

@@ -0,0 +1,200 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <sys/mman.h>
#include <errno.h>
#include <string.h>
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <AIM/aim.h>
#include "platform_lib.h"
int deviceNodeWrite(char *filename, char *buffer, int buf_size, int data_len)
{
int fd;
int len;
if ((buffer == NULL) || (buf_size < 0)) {
return -1;
}
if ((fd = open(filename, O_WRONLY, S_IWUSR)) == -1) {
return -1;
}
if ((len = write(fd, buffer, buf_size)) < 0) {
close(fd);
return -1;
}
if ((close(fd) == -1)) {
return -1;
}
if ((len > buf_size) || (data_len != 0 && len != data_len)) {
return -1;
}
return 0;
}
int deviceNodeWriteInt(char *filename, int value, int data_len)
{
char buf[8] = {0};
sprintf(buf, "%d", value);
return deviceNodeWrite(filename, buf, (int)strlen(buf), data_len);
}
int deviceNodeReadBinary(char *filename, char *buffer, int buf_size, int data_len)
{
int fd;
int len;
if ((buffer == NULL) || (buf_size < 0)) {
return -1;
}
if ((fd = open(filename, O_RDONLY)) == -1) {
return -1;
}
if ((len = read(fd, buffer, buf_size)) < 0) {
close(fd);
return -1;
}
if ((close(fd) == -1)) {
return -1;
}
if ((len > buf_size) || (data_len != 0 && len != data_len)) {
return -1;
}
return 0;
}
int deviceNodeReadString(char *filename, char *buffer, int buf_size, int data_len)
{
int ret;
if (data_len >= buf_size) {
return -1;
}
ret = deviceNodeReadBinary(filename, buffer, buf_size-1, data_len);
if (ret == 0) {
buffer[buf_size-1] = '\0';
}
return ret;
}
#define I2C_PSU_MODEL_NAME_LEN 11
#define I2C_PSU_FAN_DIR_LEN 3
#include <ctype.h>
psu_type_t get_psu_type(int id, char* modelname, int modelname_len)
{
char *node = NULL;
char model_name[I2C_PSU_MODEL_NAME_LEN + 1] = {0};
char fan_dir[I2C_PSU_FAN_DIR_LEN + 1] = {0};
/* Check AC model name */
node = (id == PSU1_ID) ? PSU1_AC_HWMON_NODE(psu_model_name) : PSU2_AC_HWMON_NODE(psu_model_name);
if (deviceNodeReadString(node, model_name, sizeof(model_name), 0) != 0) {
return PSU_TYPE_UNKNOWN;
}
if(isspace(model_name[strlen(model_name)-1])) {
model_name[strlen(model_name)-1] = 0;
}
if (strncmp(model_name, "YM-2651Y", 8) == 0) {
if (modelname) {
strncpy(modelname, model_name, 8);
}
node = (id == PSU1_ID) ? PSU1_AC_PMBUS_NODE(psu_fan_dir) : PSU2_AC_PMBUS_NODE(psu_fan_dir);
if (deviceNodeReadString(node, fan_dir, sizeof(fan_dir), 0) != 0) {
return PSU_TYPE_UNKNOWN;
}
if (strncmp(fan_dir, "F2B", strlen("F2B")) == 0) {
return PSU_TYPE_AC_F2B;
}
if (strncmp(fan_dir, "B2F", strlen("B2F")) == 0) {
return PSU_TYPE_AC_B2F;
}
}
if (strncmp(model_name, "YM-2651V", 8) == 0) {
if (modelname) {
strncpy(modelname, model_name, 8);
}
node = (id == PSU1_ID) ? PSU1_AC_PMBUS_NODE(psu_fan_dir) : PSU2_AC_PMBUS_NODE(psu_fan_dir);
if (deviceNodeReadString(node, fan_dir, sizeof(fan_dir), 0) != 0) {
return PSU_TYPE_UNKNOWN;
}
if (strncmp(fan_dir, "F2B", strlen("F2B")) == 0) {
return PSU_TYPE_DC_48V_F2B;
}
if (strncmp(fan_dir, "B2F", strlen("B2F")) == 0) {
return PSU_TYPE_DC_48V_B2F;
}
}
if (strncmp(model_name, "PSU-12V-750", 11) == 0) {
if (modelname) {
strncpy(modelname, model_name, 11);
}
node = (id == PSU1_ID) ? PSU1_AC_HWMON_NODE(psu_fan_dir) : PSU2_AC_HWMON_NODE(psu_fan_dir);
if (deviceNodeReadString(node, fan_dir, sizeof(fan_dir), 0) != 0) {
return PSU_TYPE_UNKNOWN;
}
if (strncmp(fan_dir, "F2B", 3) == 0) {
return PSU_TYPE_DC_12V_F2B;
}
if (strncmp(fan_dir, "B2F", 3) == 0) {
return PSU_TYPE_DC_12V_B2F;
}
if (strncmp(fan_dir, "NON", 3) == 0) {
return PSU_TYPE_DC_12V_FANLESS;
}
}
return PSU_TYPE_UNKNOWN;
}

77
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/platform_lib.h Normal file
View File

@@ -0,0 +1,77 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#ifndef __PLATFORM_LIB_H__
#define __PLATFORM_LIB_H__
#include "x86_64_mitac_ly1200_b32h0_c3_log.h"
#define CHASSIS_FAN_COUNT 6
#define CHASSIS_THERMAL_COUNT 3
#define PSU1_ID 1
#define PSU2_ID 2
#define PSU1_AC_PMBUS_PREFIX "/sys/bus/i2c/devices/18-005b/"
#define PSU2_AC_PMBUS_PREFIX "/sys/bus/i2c/devices/17-0058/"
#define PSU1_AC_PMBUS_NODE(node) PSU1_AC_PMBUS_PREFIX#node
#define PSU2_AC_PMBUS_NODE(node) PSU2_AC_PMBUS_PREFIX#node
#define PSU1_AC_HWMON_PREFIX "/sys/bus/i2c/devices/18-0053/"
#define PSU2_AC_HWMON_PREFIX "/sys/bus/i2c/devices/17-0050/"
#define PSU1_AC_HWMON_NODE(node) PSU1_AC_HWMON_PREFIX#node
#define PSU2_AC_HWMON_NODE(node) PSU2_AC_HWMON_PREFIX#node
#define IDPROM_PATH "/sys/bus/i2c/devices/2-0050/eeprom"
int deviceNodeWriteInt(char *filename, int value, int data_len);
int deviceNodeReadBinary(char *filename, char *buffer, int buf_size, int data_len);
int deviceNodeReadString(char *filename, char *buffer, int buf_size, int data_len);
typedef enum psu_type {
PSU_TYPE_UNKNOWN,
PSU_TYPE_AC_F2B,
PSU_TYPE_AC_B2F,
PSU_TYPE_DC_48V_F2B,
PSU_TYPE_DC_48V_B2F,
PSU_TYPE_DC_12V_FANLESS,
PSU_TYPE_DC_12V_F2B,
PSU_TYPE_DC_12V_B2F
} psu_type_t;
psu_type_t get_psu_type(int id, char* modelname, int modelname_len);
#define DEBUG_MODE 0
#if (DEBUG_MODE == 1)
#define DEBUG_PRINT(format, ...) printf(format, __VA_ARGS__)
#else
#define DEBUG_PRINT(format, ...)
#endif
#endif /* __PLATFORM_LIB_H__ */

240
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/psui.c Normal file
View File

@@ -0,0 +1,240 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/psui.h>
#include <onlplib/mmap.h>
#include <stdio.h>
#include <string.h>
#include "platform_lib.h"
#define PSU_STATUS_PRESENT 1
#define PSU_STATUS_POWER_GOOD 1
#define PSU_NODE_MAX_INT_LEN 8
#define PSU_NODE_MAX_PATH_LEN 64
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
static int
psu_status_info_get(int id, char *node, int *value)
{
int ret = 0;
char buf[PSU_NODE_MAX_INT_LEN + 1] = {0};
char node_path[PSU_NODE_MAX_PATH_LEN] = {0};
*value = 0;
if (PSU1_ID == id) {
sprintf(node_path, "%s%s", PSU1_AC_HWMON_PREFIX, node);
}
else if (PSU2_ID == id) {
sprintf(node_path, "%s%s", PSU2_AC_HWMON_PREFIX, node);
}
ret = deviceNodeReadString(node_path, buf, sizeof(buf), 0);
if (ret == 0) {
*value = atoi(buf);
}
return ret;
}
static int
psu_ym2651_pmbus_info_get(int id, char *node, int *value)
{
int ret = 0;
char buf[PSU_NODE_MAX_INT_LEN + 1] = {0};
char node_path[PSU_NODE_MAX_PATH_LEN] = {0};
*value = 0;
if (PSU1_ID == id) {
sprintf(node_path, "%s%s", PSU1_AC_PMBUS_PREFIX, node);
}
else {
sprintf(node_path, "%s%s", PSU2_AC_PMBUS_PREFIX, node);
}
ret = deviceNodeReadString(node_path, buf, sizeof(buf), 0);
if (ret == 0) {
*value = atoi(buf);
}
return ret;
}
int
onlp_psui_init(void)
{
//printf("Hello, this is %s() in %s.\n", __func__, __FILE__);
return ONLP_STATUS_OK;
}
static int
psu_ym2651_info_get(onlp_psu_info_t* info)
{
int val = 0;
int index = ONLP_OID_ID_GET(info->hdr.id);
if (info->status & ONLP_PSU_STATUS_FAILED) {
return ONLP_STATUS_OK;
}
/* Set the associated oid_table */
info->hdr.coids[0] = ONLP_FAN_ID_CREATE(index + CHASSIS_FAN_COUNT);
info->hdr.coids[1] = ONLP_THERMAL_ID_CREATE(index + CHASSIS_THERMAL_COUNT);
/* Read voltage, current and power */
if (psu_ym2651_pmbus_info_get(index, "psu_v_out", &val) == 0) {
info->mvout = val;
info->caps |= ONLP_PSU_CAPS_VOUT;
}
if (psu_ym2651_pmbus_info_get(index, "psu_i_out", &val) == 0) {
info->miout = val;
info->caps |= ONLP_PSU_CAPS_IOUT;
}
if (psu_ym2651_pmbus_info_get(index, "psu_p_out", &val) == 0) {
info->mpout = val;
info->caps |= ONLP_PSU_CAPS_POUT;
}
return ONLP_STATUS_OK;
}
#include <onlplib/i2c.h>
#define DC12V_750_REG_TO_CURRENT(low, high) (((low << 4 | high >> 4) * 20 * 1000) / 754)
#define DC12V_750_REG_TO_VOLTAGE(low, high) ((low << 4 | high >> 4) * 25)
static int
psu_dc12v_750_info_get(onlp_psu_info_t* info)
{
int pid = ONLP_OID_ID_GET(info->hdr.id);
int bus = (PSU1_ID == pid) ? 18 : 17;
int iout_low, iout_high;
int vout_low, vout_high;
/* Set capability
*/
info->caps = ONLP_PSU_CAPS_DC12;
if (info->status & ONLP_PSU_STATUS_FAILED) {
return ONLP_STATUS_OK;
}
/* Get current
*/
iout_low = onlp_i2c_readb(bus, 0x6f, 0x0, ONLP_I2C_F_FORCE);
iout_high = onlp_i2c_readb(bus, 0x6f, 0x1, ONLP_I2C_F_FORCE);
if ((iout_low >= 0) && (iout_high >= 0)) {
info->miout = DC12V_750_REG_TO_CURRENT(iout_low, iout_high);
info->caps |= ONLP_PSU_CAPS_IOUT;
}
/* Get voltage
*/
vout_low = onlp_i2c_readb(bus, 0x6f, 0x2, ONLP_I2C_F_FORCE);
vout_high = onlp_i2c_readb(bus, 0x6f, 0x3, ONLP_I2C_F_FORCE);
if ((vout_low >= 0) && (vout_high >= 0)) {
info->mvout = DC12V_750_REG_TO_VOLTAGE(vout_low, vout_high);
info->caps |= ONLP_PSU_CAPS_VOUT;
}
/* Get power based on current and voltage
*/
if ((info->caps & ONLP_PSU_CAPS_IOUT) && (info->caps & ONLP_PSU_CAPS_VOUT)) {
info->mpout = (info->miout * info->mvout) / 1000;
info->caps |= ONLP_PSU_CAPS_POUT;
}
return ONLP_STATUS_OK;
}
/*
* Get all information about the given PSU oid.
*/
static onlp_psu_info_t pinfo[] =
{
{ }, /* Not used */
{
{ ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 },
},
{
{ ONLP_PSU_ID_CREATE(PSU2_ID), "PSU-2", 0 },
}
};
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
// FIXME: WARNING FREEZE
if ( 0 ) {
int ret = 0;
int index = 0;
/* Get the present state */
if (psu_status_info_get(index, "psu_present", &ret) != 0) {
printf("Unable to read PSU(%d) node(psu_present)\r\n", index);
}
ret = psu_ym2651_info_get(&pinfo[0]);
ret = psu_dc12v_750_info_get(&pinfo[0]);
printf("%dx", ret);
}
// END WARNING FREEZE
return ONLP_STATUS_OK;
}
/*
* Additional Functions
*/
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_psui_status_get(onlp_oid_t id, uint32_t* rv)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_psui_hdr_get(onlp_oid_t id, onlp_oid_hdr_t* rv)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

276
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/sfpi.c Normal file
View File

@@ -0,0 +1,276 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <onlp/platformi/sfpi.h>
#include <fcntl.h> /* For O_RDWR && open */
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <linux/i2c-dev.h>
#include <errno.h>
#include <stdlib.h>
#include "platform_lib.h"
#define MAX_SFP_PATH 64
static char sfp_node_path[MAX_SFP_PATH] = {0};
#define NUM_OF_SFP_PORT 32
#define XCVR_BUS_START_INDEX 9
#define FRONT_PORT_TO_BUS_INDEX(port) (port+XCVR_BUS_START_INDEX)
/* This is based on CPLD spec */
#define PRESENT_EN 0
#define MASTER_CPLD_START_PORT 1
#define SLAVE_CPLD_START_PORT 17
static int
ly1200_b32h0_c3_xcvr_open(uint8_t bus,
int *i2c_fd)
{
int err = 0;
char dev_name[20];
sprintf(dev_name, "/dev/i2c-%u", bus);
if ((*i2c_fd = open(dev_name, O_RDWR)) < 0) {
err = errno;
return -err;
}
return err;
}
static int
ly1200_b32h0_c3_xcvr_read(uint8_t bus,
uint8_t addr,
uint16_t offset,
uint8_t *val)
{
int err = 0, value;
int i2c_fd = 0;
if ((err = ly1200_b32h0_c3_xcvr_open(bus, &i2c_fd)) < 0) {goto quit;}
if ((ioctl(i2c_fd, I2C_SLAVE_FORCE, addr)) < 0) {
err = errno;
return -err;
}
value = i2c_smbus_read_byte_data(i2c_fd, offset);
if (value < 0) {
err = errno;
close(i2c_fd);
return -err;
}
*val = value;
quit:
close(i2c_fd);
return err;
}
static int
ly1200_b32h0_c3_sfp_node_read_file(char *filename,
uint32_t *value,
uint32_t mask)
{
char buf[4];
int fd, ret_code = 0, buf_size = sizeof(buf);
ssize_t count;
if ((fd = open(filename, O_RDONLY)) < 0) {
ret_code = errno;
return -ret_code;
}
if ((count = read(fd, buf, buf_size)) != (-1)) {
if (PRESENT_EN == 0)
*value = mask & ~strtol(buf, NULL, 16);
else
*value = mask & strtol(buf, NULL, 16);
}
else {
ret_code = (count >= 0) ? EIO : errno;
close(fd);
return -ret_code;
}
close(fd);
return ret_code;
}
static char*
ly1200_b32h0_c3_sfp_get_port_path(int port, char *node_name)
{
if (port == -1) {
sprintf(sfp_node_path, "/sys/bus/i2c/devices/%s",
node_name);
} else if (port >= MASTER_CPLD_START_PORT && port < SLAVE_CPLD_START_PORT) {
sprintf(sfp_node_path, "/sys/bus/i2c/devices/1-0032/port%d/port%d_%s",
port, port,
node_name);
} else if (port >= SLAVE_CPLD_START_PORT && port <= NUM_OF_SFP_PORT) {
sprintf(sfp_node_path, "/sys/bus/i2c/devices/1-0033/port%d/port%d_%s",
port, port,
node_name);
}
return sfp_node_path;
}
/************************************************************
*
* SFPI Entry Points
*
***********************************************************/
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
return ONLP_STATUS_OK;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
/*
* Ports {1, 32}
*/
int p;
AIM_BITMAP_CLR_ALL(bmap);
for(p = 1; p <= NUM_OF_SFP_PORT; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_is_present(int port)
{
/*
* Return 1 if present.
* Return 0 if not present.
* Return < 0 if error.
*/
int present = -1;
uint32_t value;
char* path = ly1200_b32h0_c3_sfp_get_port_path(port, "present");
if (ly1200_b32h0_c3_sfp_node_read_file(path, &value, 0x1) != 0) {
AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
present = value;
return present;
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
uint32_t bytes[4], value;
char* path;
path = ly1200_b32h0_c3_sfp_get_port_path(-1, "1-0032/port_1_8_present");
if (ly1200_b32h0_c3_sfp_node_read_file(path, &value, 0xFF) != 0) {
AIM_LOG_ERROR("Unable to read present status from port 1 to 8\r\n");
return ONLP_STATUS_E_INTERNAL;
}
bytes[0] = value;
path = ly1200_b32h0_c3_sfp_get_port_path(-1, "1-0032/port_9_16_present");
if (ly1200_b32h0_c3_sfp_node_read_file(path, &value, 0xFF) != 0) {
AIM_LOG_ERROR("Unable to read present status from port 8 to 16\r\n");
return ONLP_STATUS_E_INTERNAL;
}
bytes[1] = value;
path = ly1200_b32h0_c3_sfp_get_port_path(-1, "1-0033/port_17_24_present");
if (ly1200_b32h0_c3_sfp_node_read_file(path, &value, 0xFF) != 0) {
AIM_LOG_ERROR("Unable to read present status from port 17 to 24\r\n");
return ONLP_STATUS_E_INTERNAL;
}
bytes[2] = value;
path = ly1200_b32h0_c3_sfp_get_port_path(-1, "1-0033/port_25_32_present");
if (ly1200_b32h0_c3_sfp_node_read_file(path, &value, 0xFF) != 0) {
AIM_LOG_ERROR("Unable to read present status from port 25 to 32\r\n");
return ONLP_STATUS_E_INTERNAL;
}
bytes[3] = value;
/* Convert to 64 bit integer in port order */
int i = 0;
uint32_t presence_all = 0 ;
for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
presence_all <<= 8;
presence_all |= bytes[i];
}
/* Populate bitmap */
for(i = 1; presence_all; i++) {
AIM_BITMAP_MOD(dst, i, (presence_all & 1));
presence_all >>= 1;
}
return ONLP_STATUS_OK;
}
int
//onlp_sfpi_eeprom_read(int port, int dev_addr, uint8_t data[256])
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
uint16_t offset = 0;
uint8_t val = 0, addr = 0x50;//dev_addr;
uint8_t bus = FRONT_PORT_TO_BUS_INDEX(port);
if (data == NULL) {return ONLP_STATUS_E_INTERNAL;}
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
memset(data, 0, 256);
for(offset = 0; offset < 256; offset++) {
if (ly1200_b32h0_c3_xcvr_read( bus, addr, offset, &val) < 0) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
data[offset] = val & 0xFF;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

100
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/sysi.c Normal file
View File

@@ -0,0 +1,100 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <unistd.h>
#include <fcntl.h>
#include <onlplib/file.h>
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlp/platformi/psui.h>
#include "x86_64_mitac_ly1200_b32h0_c3_int.h"
#include "x86_64_mitac_ly1200_b32h0_c3_log.h"
#include "platform_lib.h"
#define NUM_OF_THERMAL_ON_DEVICE 5
#define NUM_OF_FAN_ON_DEVICE 6
#define NUM_OF_PSU_ON_DEVICE 2
#define NUM_OF_LED_ON_DEVICE 4
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-mitac-ly1200-b32h0-c3-r0";
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
uint8_t* rdata = aim_zmalloc(256);
if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
if(*size == 256) {
*data = rdata;
return ONLP_STATUS_OK;
}
}
aim_free(rdata);
*size = 0;
return ONLP_STATUS_E_INTERNAL;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
int i;
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/* Thermal sensors */
for (i = 1; i <= NUM_OF_THERMAL_ON_DEVICE; i++)
{
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* Fans */
for (i = 1; i <= NUM_OF_FAN_ON_DEVICE; i++)
{
*e++ = ONLP_FAN_ID_CREATE(i);
}
/* PSUs */
for (i = 1; i <= NUM_OF_PSU_ON_DEVICE; i++)
{
*e++ = ONLP_PSU_ID_CREATE(i);
}
/* LEDs */
for (i = 1; i <= NUM_OF_LED_ON_DEVICE; i++)
{
*e++ = ONLP_LED_ID_CREATE(i);
}
return ONLP_STATUS_OK;
}

104
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/thermali.c Normal file
View File

@@ -0,0 +1,104 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2017 MiTAC Computing Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
* Thermal Sensor Platform Implementation.
*
***********************************************************/
#include <unistd.h>
#include <onlplib/mmap.h>
#include <onlp/platformi/thermali.h>
#include <fcntl.h>
#include "platform_lib.h"
#include <onlplib/file.h>
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
enum onlp_thermal_id
{
THERMAL_RESERVED = 0,
THERMAL_1_ON_MAIN_BROAD,
THERMAL_2_ON_MAIN_BROAD,
THERMAL_3_ON_MAIN_BROAD,
THERMAL_1_ON_SWITCH_BROAD,
THERMAL_2_ON_SWITCH_BROAD,
THERMAL_3_ON_SWITCH_BROAD,
THERMAL_4_ON_SWITCH_BROAD,
THERMAL_1_ON_FAN_BOARD,
};
/* Static values */
static onlp_thermal_info_t linfo[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BROAD), "CPU_TEMP", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BROAD), "M2_TEMP", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BROAD), "TMP75_CB_1", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_SWITCH_BROAD), "SWITCH_TEMP", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_SWITCH_BROAD), "TMP75_SB_1", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_SWITCH_BROAD), "TMP75_SB_2", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_SWITCH_BROAD), "TMP75_SB_3", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_FAN_BOARD), "TMP75_FB_1", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
}
};
/*
* This will be called to intiialize the thermali subsystem.
*/
int
onlp_thermali_init(void)
{
// FIXME: WARNING FREEZE
if ( 0 ) {
printf("%d", linfo[0].status);
}
// END WARNING FREEZE
return ONLP_STATUS_OK;
}

81
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_config.c Normal file
View File

@@ -0,0 +1,81 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
/* <auto.start.cdefs(x86_64_mitac_ly1200_b32h0_c3_CONFIG_HEADER).source> */
#define __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(_x) #_x
#define __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(_x) __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(_x)
x86_64_mitac_ly1200_b32h0_c3_config_settings_t x86_64_mitac_ly1200_b32h0_c3_config_settings[] =
{
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_LOGGING(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_STDLIB(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
#ifdef x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION
{ __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME(x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE(x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) },
#else
{ x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME), "__undefined__" },
#endif
{ NULL, NULL }
};
#undef __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_VALUE
#undef __x86_64_mitac_ly1200_b32h0_c3_config_STRINGIFY_NAME
const char*
x86_64_mitac_ly1200_b32h0_c3_config_lookup(const char* setting)
{
int i;
for(i = 0; x86_64_mitac_ly1200_b32h0_c3_config_settings[i].name; i++) {
if(strcmp(x86_64_mitac_ly1200_b32h0_c3_config_settings[i].name, setting)) {
return x86_64_mitac_ly1200_b32h0_c3_config_settings[i].value;
}
}
return NULL;
}
int
x86_64_mitac_ly1200_b32h0_c3_config_show(struct aim_pvs_s* pvs)
{
int i;
for(i = 0; x86_64_mitac_ly1200_b32h0_c3_config_settings[i].name; i++) {
aim_printf(pvs, "%s = %s\n", x86_64_mitac_ly1200_b32h0_c3_config_settings[i].name, x86_64_mitac_ly1200_b32h0_c3_config_settings[i].value);
}
return i;
}
/* <auto.end.cdefs(x86_64_mitac_ly1200_b32h0_c3_CONFIG_HEADER).source> */

10
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_enums.c Normal file
View File

@@ -0,0 +1,10 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
/* <--auto.start.enum(ALL).source> */
/* <auto.end.enum(ALL).source> */

12
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_int.h Normal file
View File

@@ -0,0 +1,12 @@
/**************************************************************************//**
*
* x86_64_mitac_ly1200_b32h0_c3 Internal Header
*
*****************************************************************************/
#ifndef __x86_64_mitac_ly1200_b32h0_c3_INT_H__
#define __x86_64_mitac_ly1200_b32h0_c3_INT_H__
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
#endif /* __x86_64_mitac_ly1200_b32h0_c3_INT_H__ */

18
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_log.c Normal file
View File

@@ -0,0 +1,18 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
#include "x86_64_mitac_ly1200_b32h0_c3_log.h"
/*
* x86_64_mitac_ly1200_b32h0_c3 log struct.
*/
AIM_LOG_STRUCT_DEFINE(
x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_OPTIONS_DEFAULT,
x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_BITS_DEFAULT,
NULL, /* Custom log map */
x86_64_mitac_ly1200_b32h0_c3_CONFIG_LOG_CUSTOM_BITS_DEFAULT
);

12
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_log.h Normal file
View File

@@ -0,0 +1,12 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#ifndef __x86_64_mitac_ly1200_b32h0_c3_LOG_H__
#define __x86_64_mitac_ly1200_b32h0_c3_LOG_H__
#define AIM_LOG_MODULE_NAME x86_64_mitac_ly1200_b32h0_c3
#include <AIM/aim_log.h>
#endif /* __x86_64_mitac_ly1200_b32h0_c3_LOG_H__ */

24
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_module.c Normal file
View File

@@ -0,0 +1,24 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
#include "x86_64_mitac_ly1200_b32h0_c3_log.h"
static int
datatypes_init__(void)
{
#define x86_64_mitac_ly1200_b32h0_c3_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3.x>
return 0;
}
void __x86_64_mitac_ly1200_b32h0_c3_module_init__(void)
{
AIM_LOG_STRUCT_REGISTER();
datatypes_init__();
}
int __onlp_platform_version__ = 1;

50
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/onlp/builds/src/module/src/x86_64_mitac_ly1200_b32h0_c3_ucli.c Normal file
View File

@@ -0,0 +1,50 @@
/**************************************************************************//**
*
*
*
*****************************************************************************/
#include <x86_64_mitac_ly1200_b32h0_c3/x86_64_mitac_ly1200_b32h0_c3_config.h>
#if x86_64_mitac_ly1200_b32h0_c3_CONFIG_INCLUDE_UCLI == 1
#include <uCli/ucli.h>
#include <uCli/ucli_argparse.h>
#include <uCli/ucli_handler_macros.h>
static ucli_status_t
x86_64_mitac_ly1200_b32h0_c3_ucli_ucli__config__(ucli_context_t* uc)
{
UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_mitac_ly1200_b32h0_c3)
}
/* <auto.ucli.handlers.start> */
/* <auto.ucli.handlers.end> */
static ucli_module_t
x86_64_mitac_ly1200_b32h0_c3_ucli_module__ =
{
"x86_64_mitac_ly1200_b32h0_c3_ucli",
NULL,
x86_64_mitac_ly1200_b32h0_c3_ucli_ucli_handlers__,
NULL,
NULL,
};
ucli_node_t*
x86_64_mitac_ly1200_b32h0_c3_ucli_node_create(void)
{
ucli_node_t* n;
ucli_module_init(&x86_64_mitac_ly1200_b32h0_c3_ucli_module__);
n = ucli_node_create("x86_64_mitac_ly1200_b32h0_c3", NULL, &x86_64_mitac_ly1200_b32h0_c3_ucli_module__);
ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_mitac_ly1200_b32h0_c3"));
return n;
}
#else
void*
x86_64_mitac_ly1200_b32h0_c3_ucli_node_create(void)
{
return NULL;
}
#endif

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

1
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/Makefile Normal file
View File

@@ -0,0 +1 @@
include $(ONL)/make/pkg.mk

30
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/PKG.yml Normal file
View File

@@ -0,0 +1,30 @@
variables:
PLATFORM : x86-64-mitac-ly1200-b32h0-c3-r0
prerequisites:
packages:
- "onl-vendor-config-mitac:all"
- "onl-platform-modules-x86-64-mitac-ly1200-b32h0-c3:amd64"
common:
version: 1.0.0
arch: amd64
copyright: Copyright 2013, 2014, 2015 Big Switch Networks
maintainer: support@bigswitch.com
support: opennetworklinux@googlegroups.com
changelog: None
packages:
- name: onl-platform-config-$PLATFORM
depends: onl-vendor-config-mitac,onl-platform-modules-x86-64-mitac-ly1200-b32h0-c3
summary: ONL Platform Configuration Package for the $PLATFORM
files:
src/boot: /lib/platform-config/$PLATFORM/onl/boot
src/lib: /lib/platform-config/$PLATFORM/onl
src/python : ${PY_INSTALL}/onl/platform/
- name: onl-platform-build-$PLATFORM
summary: ONL Platform Build Package for the $PLATFORM
optional-files:
builds: $$PKG_INSTALL

3
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/src/boot/x86-64-mitac-ly1200-b32h0-c3-r0 Executable file
View File

@@ -0,0 +1,3 @@
#!/bin/sh
#insmod /lib/platform-config/x86-64-mitac-ly1200-b32h0-c3-r0/onl/boot/ixgbe.ko

8
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/src/lib/etc/default/watchdog Normal file
View File

@@ -0,0 +1,8 @@
# Start watchdog at boot time? 0 or 1
run_watchdog=1
# Start wd_keepalive after stopping watchdog? 0 or 1
run_wd_keepalive=0
# Load module before starting watchdog
watchdog_module="none"
# Specify additional watchdog options here (see manpage).
watchdog_options="/etc/watchdog.conf"

45
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/src/lib/etc/watchdog.conf Normal file
View File

@@ -0,0 +1,45 @@
#ping = 172.31.14.1
#ping = 172.26.1.255
#interface = eth0
#file = /var/log/messages
#change = 1407
# Uncomment to enable test. Setting one of these values to '0' disables it.
# These values will hopefully never reboot your machine during normal use
# (if your machine is really hung, the loadavg will go much higher than 25)
#max-load-1 = 24
#max-load-5 = 18
#max-load-15 = 12
# Note that this is the number of pages!
# To get the real size, check how large the pagesize is on your machine.
#min-memory = 1
#allocatable-memory = 1
#repair-binary = /usr/sbin/repair
#repair-timeout =
#test-binary =
#test-timeout =
watchdog-device = /dev/watchdog5
# Defaults compiled into the binary
#temperature-device =
#max-temperature = 120
# Defaults compiled into the binary
#admin = root
#interval = 1
#logtick = 1
#log-dir = /var/log/watchdog
# This greatly decreases the chance that watchdog won't be scheduled before
# your machine is really loaded
realtime = yes
priority = 99
# Check if rsyslogd is still running by enabling the following line
#pidfile = /var/run/rsyslogd.pid
# timeout : 15 , 30 , 60 , 90 , 120 , 180 , 240 sec
watchdog-timeout = 120

52
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/src/lib/x86-64-mitac-ly1200-b32h0-c3-r0.yml Normal file
View File

@@ -0,0 +1,52 @@
---
######################################################################
#
# platform-config for LY1200
#
######################################################################
x86-64-mitac-ly1200-b32h0-c3-r0:
grub:
serial: >-
--port=0x3f8
--speed=115200
--word=8
--parity=no
--stop=1
kernel:
<<: *kernel-4-14
args: >-
nopat
nohpet
intel_iommu=off
console=ttyS0,115200n8
acpi_enforce_resources=lax
pcie_aspm=off
irqpoll
i2c-ismt.delay=1000
installer:
- ONL-BOOT:
=: 128MiB
format: ext4
- ONL-CONFIG:
=: 128MiB
format: ext4
- ONL-IMAGES:
=: 1GiB
format: ext4
- ONL-DATA:
=: 10GiB
format: ext4
##network:
## interfaces:
## ma1:
## name: ~
## syspath: pci0000:00/0000:00:1c.0/0000:0a:00.0

19
packages/platforms/mitac/x86-64/x86-64-mitac-ly1200-b32h0-c3/platform-config/r0/src/python/x86_64_mitac_ly1200_b32h0_c3_r0/__init__.py Executable file
View File

@@ -0,0 +1,19 @@
from onl.platform.base import *
from onl.platform.mitac import *
class OnlPlatform_x86_64_mitac_ly1200_b32h0_c3_r0(OnlPlatformMiTAC,
OnlPlatformPortConfig_32x100):
PLATFORM='x86-64-mitac-ly1200-b32h0-c3-r0'
MODEL="LY1200-B32H0-C3"
SYS_OBJECT_ID=".1200.320"
def baseconfig(self):
for m in [ 'gpe', 'system_cpld', 'master_cpld', 'slave_cpld', 'cb_i2c', 'sb_i2c', 'pb_i2c', 'fb_i2c', 'fb_module_i2c', 'fse000' ]:
self.insmod("x86-64-mitac-ly1200-b32h0-c3-%s" % m)
platform_root='/lib/platform-config/current/onl'
os.system("ln -sf %s/etc/watchdog.conf /etc/watchdog.conf" % platform_root)
os.system("ln -sf %s/etc/default/watchdog /etc/default/watchdog" % platform_root)
return True