Merge branch 'master' of https://github.com/opencomputeproject/OpenNetworkLinux into as7816-64x

packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py

@@ -242,8 +242,9 @@ class OnieSysinfoApp(SubprocessMixin, object):
         with InitrdContext(initrd=initrd, log=self.log) as ctx:
             cmd = ['onie-sysinfo',]
             cmd.extend(self.args)
+            cmd = 'IFS=;' + " ".join(cmd)
             cmd = ('chroot', ctx.dir,
-                   '/bin/sh', '-c', 'IFS=;' + " ".join(cmd))
+                   '/bin/sh', '-c', cmd,)
             try:
                 self.output = self.check_output(cmd)
                 ret = 0

packages/base/all/vendor-config-onl/src/python/onl/pki/__init__.py

@@ -8,11 +8,8 @@ import sys
 import os
 import argparse
 import logging
-import tempfile
 import shutil
-import subprocess
 import tempfile
-import yaml
 from onl.mounts import OnlMountManager, OnlMountContextReadOnly, OnlMountContextReadWrite
 from onl.sysconfig import sysconfig
 from onl.util import *
@@ -50,39 +47,70 @@ class OnlPki(OnlServiceMixin):
         self.init_cert(force=force)
 
     def init_key(self, force=False):
-        with OnlPkiContextReadOnly(self.logger):
-            if not os.path.exists(self.kpath) or force:
-                self.logger.info("Generating private key...")
-                cmd = "openssl genrsa -out %s %s" % (self.kpath, sysconfig.pki.key.len)
-                with OnlPkiContextReadWrite(self.logger):
-                    if not os.path.isdir(self.CONFIG_PKI_DIR):
-                        os.makedirs(self.CONFIG_PKI_DIR)
-                    self._execute(cmd)
-                self.init_cert(force=True)
-            else:
-                self.logger.info("Using existing private key.")
+        need_key = False
+        need_cert = False
+
+        if force:
+            need_key = True
+        else:
+            with OnlPkiContextReadOnly(self.logger):
+                if not os.path.exists(self.kpath):
+                    need_key = True
+
+        if need_key:
+            self.logger.info("Generating private key...")
+            cmd = ('openssl', 'genrsa',
+                   '-out', self.kpath,
+                   str(sysconfig.pki.key.len),)
+            with OnlPkiContextReadWrite(self.logger):
+                if not os.path.isdir(self.CONFIG_PKI_DIR):
+                    os.makedirs(self.CONFIG_PKI_DIR)
+                self._execute(cmd, logLevel=logging.INFO)
+            need_cert = True
+        else:
+            self.logger.info("Using existing private key.")
+
+        if need_cert:
+            self.init_cert(force=True)
 
     def init_cert(self, force=False):
-        with OnlPkiContextReadOnly(self.logger):
-            if not os.path.exists(self.cpath) or force:
-                self.logger.info("Generating self-signed certificate...")
-                csr = tempfile.NamedTemporaryFile(prefix="pki-", suffix=".csr", delete=False)
-                csr.close()
-                fields = [ "%s=%s" % (k, v) for k,v in sysconfig.pki.cert.csr.fields.iteritems() ]
-                subject = "/" + "/".join(fields)
-                self.logger.debug("Subject: '%s'", subject)
-                self.logger.debug("CSR: %s", csr.name)
-                with OnlPkiContextReadWrite(self.logger):
-                    if not os.path.isdir(self.CONFIG_PKI_DIR):
-                        os.makedirs(self.CONFIG_PKI_DIR)
-                    self._execute("""openssl req -new -batch -subj "%s" -key %s -out %s""" % (
-                            subject, self.kpath, csr.name))
-                    self._execute("""openssl x509 -req -days %s -sha256 -in %s -signkey %s -out %s""" % (
-                            sysconfig.pki.cert.csr.cdays,
-                            csr.name, self.kpath, self.cpath))
-                os.unlink(csr.name)
-            else:
-                self.logger.info("Using existing certificate.")
+        need_cert = False
+
+        if force:
+            need_cert = True
+        else:
+            with OnlPkiContextReadOnly(self.logger):
+                if not os.path.exists(self.cpath):
+                    need_cert = True
+
+        if need_cert:
+            self.logger.info("Generating self-signed certificate...")
+            csr = tempfile.NamedTemporaryFile(prefix="pki-", suffix=".csr", delete=False)
+            csr.close()
+            fields = [ "%s=%s" % (k, v) for k,v in sysconfig.pki.cert.csr.fields.iteritems() ]
+            subject = "/" + "/".join(fields)
+            self.logger.debug("Subject: '%s'", subject)
+            self.logger.debug("CSR: %s", csr.name)
+            with OnlPkiContextReadWrite(self.logger):
+                if not os.path.isdir(self.CONFIG_PKI_DIR):
+                    os.makedirs(self.CONFIG_PKI_DIR)
+                self._execute(('openssl', 'req',
+                               '-new', '-batch',
+                               '-subj', subject,
+                               '-key', self.kpath,
+                               '-out', csr.name,),
+                              logLevel=logging.INFO)
+                self._execute(('openssl', 'x509',
+                               '-req',
+                               '-days', str(sysconfig.pki.cert.csr.cdays),
+                               '-sha256',
+                               '-in', csr.name,
+                               '-signkey', self.kpath,
+                               '-out', self.cpath,),
+                              logLevel=logging.INFO)
+            os.unlink(csr.name)
+        else:
+            self.logger.info("Using existing certificate.")
 
     @staticmethod
     def main():

packages/base/all/vendor-config-onl/src/python/onl/util/__init__.py

@@ -1,18 +1,49 @@
 import subprocess
+import logging
 
 class OnlServiceMixin(object):
-    def _execute(self, cmd, root=False, ex=True):
-        self.logger.debug("Executing: %s" % cmd)
+
+    def _execute(self, cmd,
+                 root=False, ex=True,
+                 logLevel=logging.DEBUG):
+        self.logger.log(logLevel, "Executing: %s", cmd)
+
+        if isinstance(cmd, basestring):
+            shell = True
+        else:
+            shell = False
+
         if root is True and os.getuid() != 0:
-            cmd = "sudo " + cmd
+            if isinstance(cmd, basestring):
+                cmd = "sudo " + cmd
+            else:
+                cmd = ['sudo',] + list(cmd)
+
         try:
-            subprocess.check_call(cmd, shell=True)
-        except Exception, e:
+            pipe = subprocess.Popen(cmd, shell=shell,
+                                    stdout=subprocess.PIPE,
+                                    stderr=subprocess.STDOUT)
+        except OSError as e:
             if ex:
-                self.logger.error("Command failed: %s" % e)
+                self.logger.error("Command did not start: %s (%s)",
+                                  str(e), str(e.child_traceback),)
                 raise
             else:
-                return e.returncode
+                return -1
+
+        out, _ = pipe.communicate()
+        code = pipe.wait()
+
+        lvl = logging.WARN if code else logLevel
+        out = (out or "").rstrip()
+        for line in out.splitlines(False):
+            self.logger.log(lvl, ">>> %s", line)
+
+        if ex and code:
+            self.logger.error("Command failed with code %s", code)
+            raise subprocess.CalledProcessError(code, cmd)
+
+        return code
 
     def _raise(self, msg, klass):
         self.logger.critical(msg)

packages/base/any/kernels/3.2-lts/configs/arm-iproc-all/arm-iproc-all.config

@@ -868,7 +868,7 @@ CONFIG_EEPROM_AT25=y
 # CONFIG_EEPROM_93CX6 is not set
 # CONFIG_EEPROM_93XX46 is not set
 # CONFIG_EEPROM_SFF_8436 is not set
-CONFIG_EEPROM_ACCTON_AS4610_SFP=y
+CONFIG_EEPROM_OPTOE=y
 # CONFIG_CB710_CORE is not set
 # CONFIG_IWMC3200TOP is not set
 
@@ -1497,7 +1497,7 @@ CONFIG_SENSORS_W83781D=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-CONFIG_SENSORS_ACCTON_I2C_CPLD=y
+CONFIG_SENSORS_ACCTON_AS4610_CPLD=y
 CONFIG_SENSORS_ACCTON_AS4610_FAN=y
 CONFIG_SENSORS_ACCTON_AS4610_PSU=y
 CONFIG_SENSORS_YM2651Y=y

packages/base/any/kernels/3.2-lts/configs/arm-iproc-all/patches/arch_arm_boot_dts_accton_as4610_54.dts.patch

@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/arch/arm/boot/dts/accton_as4610_54.dts
-@@ -0,0 +1,250 @@
+@@ -0,0 +1,256 @@
 +/*
 + * Accton AS4610 54 Device Tree Source
 + *
@@ -117,7 +117,7 @@
 +            cpld@1,0 {
 +                #address-cells = <1>;
 +                #size-cells = <1>;
-+                compatible = "accton,as4610-54-cpld";
++                compatible = "accton,as4610_54_cpld";
 +                label = "cpld";
 +                reg = <0x30>;
 +            };
@@ -142,8 +142,8 @@
 +                    #address-cells = <1>;
 +                    #size-cells = <0>;
 +                    reg = <0>;
-+                    sfp_eeprom@50 {
-+                        compatible = "at,24c04";
++                    optoe@50 {
++                        compatible = "optoe2";
 +                        reg = <0x50>;
 +                        label = "port49";
 +                    };
@@ -154,8 +154,8 @@
 +                #address-cells = <1>;
 +                #size-cells = <0>;
 +                reg = <1>;
-+                sfp_eeprom@50 {
-+                    compatible = "at,24c04";
++                optoe@50 {
++                    compatible = "optoe2";
 +                    reg = <0x50>;
 +                    label = "port50";
 +                };
@@ -166,8 +166,8 @@
 +                #address-cells = <1>;
 +                #size-cells = <0>;
 +                reg = <2>;
-+                sfp_eeprom@50 {
-+                    compatible = "at,24c04";
++                optoe@50 {
++                    compatible = "optoe2";
 +                    reg = <0x50>;
 +                    label = "port51";
 +                };
@@ -178,8 +178,8 @@
 +                #address-cells = <1>;
 +                #size-cells = <0>;
 +                reg = <3>;
-+                sfp_eeprom@50 {
-+                    compatible = "at,24c04";
++                optoe@50 {
++                    compatible = "optoe2";
 +                    reg = <0x50>;
 +                    label = "port52";
 +                };
@@ -190,9 +190,10 @@
 +                #address-cells = <1>;
 +                #size-cells = <0>;
 +                reg = <4>;
-+                sfp_eeprom@50 {
-+                    compatible = "at,24c04";
++                optoe@50 {
++                    compatible = "optoe1";
 +                    reg = <0x50>;
++                    label = "port53";
 +                };
 +            };
 +
@@ -201,9 +202,10 @@
 +                #address-cells = <1>;
 +                #size-cells = <0>;
 +                reg = <5>;
-+                sfp_eeprom@50 {
-+                    compatible = "at,24c04";
++                optoe@50 {
++                    compatible = "optoe1";
 +                    reg = <0x50>;
++                    label = "port54";
 +                };
 +            };
 +
@@ -212,17 +214,21 @@
 +                #address-cells = <1>;
 +                #size-cells = <0>;
 +                reg = <6>;
-+                psu_eeprom@50 {
-+                    compatible = "at,24c02";
++                psu1_eeprom@50 {
++                    compatible = "accton,as4610_psu1";
 +                    reg = <0x50>;
-+                    label = "psu1_eeprom";
-+                    read-only;
 +                };
-+                psu_eeprom@51 {
-+                    compatible = "at,24c02";
++                psu1_pmbus@58 {
++                    compatible = "3y-power,ym1921";
++                    reg = <0x58>;
++                };
++                psu2_eeprom@51 {
++                    compatible = "accton,as4610_psu2";
 +                    reg = <0x51>;
-+                    label = "psu2_eeprom";
-+                    read-only;
++                };
++                psu2_pmbus@59 {
++                    compatible = "3y-power,ym1921";
++                    reg = <0x59>;
 +                };
 +            };
 +

packages/base/any/kernels/4.14-lts/configs/x86_64-all/x86_64-all.config

@@ -37,6 +37,7 @@ CONFIG_ZONE_DMA32=y
 CONFIG_AUDIT_ARCH=y
 CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_HAVE_INTEL_TXT=y
 CONFIG_X86_64_SMP=y
 CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_FIX_EARLYCON_MEM=y
@@ -557,6 +558,7 @@ CONFIG_ARCH_ENABLE_THP_MIGRATION=y
 CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
+CONFIG_MMU_NOTIFIER=y
 CONFIG_KSM=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
@@ -1708,10 +1710,10 @@ CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 # CONFIG_MD_AUTODETECT is not set
 # CONFIG_MD_LINEAR is not set
-# CONFIG_MD_RAID0 is not set
-# CONFIG_MD_RAID1 is not set
-# CONFIG_MD_RAID10 is not set
-# CONFIG_MD_RAID456 is not set
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+CONFIG_MD_RAID10=y
+CONFIG_MD_RAID456=y
 # CONFIG_MD_MULTIPATH is not set
 # CONFIG_MD_FAULTY is not set
 # CONFIG_BCACHE is not set
@@ -1719,19 +1721,25 @@ CONFIG_BLK_DEV_DM_BUILTIN=y
 CONFIG_BLK_DEV_DM=y
 # CONFIG_DM_MQ_DEFAULT is not set
 # CONFIG_DM_DEBUG is not set
+CONFIG_DM_BUFIO=y
+# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set
+CONFIG_DM_BIO_PRISON=y
+CONFIG_DM_PERSISTENT_DATA=y
 CONFIG_DM_CRYPT=y
-# CONFIG_DM_SNAPSHOT is not set
-# CONFIG_DM_THIN_PROVISIONING is not set
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_THIN_PROVISIONING=y
 # CONFIG_DM_CACHE is not set
 # CONFIG_DM_ERA is not set
-# CONFIG_DM_MIRROR is not set
-# CONFIG_DM_RAID is not set
+CONFIG_DM_MIRROR=y
+# CONFIG_DM_LOG_USERSPACE is not set
+CONFIG_DM_RAID=y
 # CONFIG_DM_ZERO is not set
 # CONFIG_DM_MULTIPATH is not set
 # CONFIG_DM_DELAY is not set
-# CONFIG_DM_UEVENT is not set
+CONFIG_DM_UEVENT=y
 # CONFIG_DM_FLAKEY is not set
-# CONFIG_DM_VERITY is not set
+CONFIG_DM_VERITY=y
+# CONFIG_DM_VERITY_FEC is not set
 # CONFIG_DM_SWITCH is not set
 # CONFIG_DM_LOG_WRITES is not set
 # CONFIG_DM_INTEGRITY is not set
@@ -2270,7 +2278,7 @@ CONFIG_DEVPORT=y
 # I2C support
 #
 CONFIG_I2C=y
-# CONFIG_ACPI_I2C_OPREGION is not set
+CONFIG_ACPI_I2C_OPREGION=y
 CONFIG_I2C_BOARDINFO=y
 CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
@@ -2327,11 +2335,11 @@ CONFIG_I2C_PIIX4=y
 # CONFIG_I2C_DESIGNWARE_PCI is not set
 # CONFIG_I2C_EMEV2 is not set
 # CONFIG_I2C_GPIO is not set
-# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_OCORES=y
 CONFIG_I2C_PCA_PLATFORM=y
 # CONFIG_I2C_PXA_PCI is not set
 # CONFIG_I2C_SIMTEC is not set
-# CONFIG_I2C_XILINX is not set
+CONFIG_I2C_XILINX=y
 
 #
 # External I2C/SMBus adapter drivers
@@ -2804,6 +2812,7 @@ CONFIG_MFD_CORE=y
 CONFIG_LPC_ICH=y
 CONFIG_LPC_SCH=y
 # CONFIG_INTEL_SOC_PMIC is not set
+# CONFIG_INTEL_SOC_PMIC_BXTWC is not set
 # CONFIG_INTEL_SOC_PMIC_CHTWC is not set
 CONFIG_MFD_INTEL_LPSS=y
 CONFIG_MFD_INTEL_LPSS_ACPI=y
@@ -3411,15 +3420,16 @@ CONFIG_SYNC_FILE=y
 # CONFIG_SW_SYNC is not set
 # CONFIG_AUXDISPLAY is not set
 CONFIG_UIO=y
-# CONFIG_UIO_CIF is not set
-# CONFIG_UIO_PDRV_GENIRQ is not set
-# CONFIG_UIO_DMEM_GENIRQ is not set
+CONFIG_UIO_CIF=y
+CONFIG_UIO_PDRV_GENIRQ=y
+CONFIG_UIO_DMEM_GENIRQ=y
 # CONFIG_UIO_AEC is not set
 # CONFIG_UIO_SERCOS3 is not set
-# CONFIG_UIO_PCI_GENERIC is not set
+CONFIG_UIO_PCI_GENERIC=y
 # CONFIG_UIO_NETX is not set
 # CONFIG_UIO_PRUSS is not set
 # CONFIG_UIO_MF624 is not set
+# CONFIG_VFIO is not set
 CONFIG_VIRT_DRIVERS=y
 CONFIG_VIRTIO=y
 
@@ -3463,9 +3473,10 @@ CONFIG_X86_PLATFORM_DEVICES=y
 # CONFIG_INTEL_RST is not set
 # CONFIG_INTEL_SMARTCONNECT is not set
 # CONFIG_PVPANIC is not set
-# CONFIG_INTEL_PMC_IPC is not set
+CONFIG_INTEL_PMC_IPC=y
 # CONFIG_SURFACE_PRO3_BUTTON is not set
-# CONFIG_INTEL_PUNIT_IPC is not set
+CONFIG_INTEL_PUNIT_IPC=y
+CONFIG_INTEL_TELEMETRY=y
 # CONFIG_MLX_PLATFORM is not set
 # CONFIG_MLX_CPLD_PLATFORM is not set
 # CONFIG_INTEL_TURBO_MAX_3 is not set
@@ -3500,14 +3511,21 @@ CONFIG_CLKBLD_I8253=y
 CONFIG_MAILBOX=y
 CONFIG_PCC=y
 # CONFIG_ALTERA_MBOX is not set
+CONFIG_IOMMU_API=y
 CONFIG_IOMMU_SUPPORT=y
 
 #
 # Generic IOMMU Pagetable Support
 #
-# CONFIG_AMD_IOMMU is not set
-# CONFIG_INTEL_IOMMU is not set
-# CONFIG_IRQ_REMAP is not set
+CONFIG_IOMMU_IOVA=y
+CONFIG_AMD_IOMMU=y
+CONFIG_AMD_IOMMU_V2=y
+CONFIG_DMAR_TABLE=y
+CONFIG_INTEL_IOMMU=y
+# CONFIG_INTEL_IOMMU_SVM is not set
+# CONFIG_INTEL_IOMMU_DEFAULT_ON is not set
+CONFIG_INTEL_IOMMU_FLOPPY_WA=y
+CONFIG_IRQ_REMAP=y
 
 #
 # Remoteproc drivers
@@ -4017,6 +4035,7 @@ CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
 # CONFIG_INTERVAL_TREE_TEST is not set
 # CONFIG_PERCPU_TEST is not set
 # CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_ASYNC_RAID6_TEST is not set
 # CONFIG_TEST_HEXDUMP is not set
 # CONFIG_TEST_STRING_HELPERS is not set
 # CONFIG_TEST_KSTRTOX is not set
@@ -4095,6 +4114,7 @@ CONFIG_SECURITY_NETWORK=y
 CONFIG_PAGE_TABLE_ISOLATION=y
 # CONFIG_SECURITY_NETWORK_XFRM is not set
 # CONFIG_SECURITY_PATH is not set
+# CONFIG_INTEL_TXT is not set
 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
 # CONFIG_HARDENED_USERCOPY is not set
 # CONFIG_FORTIFY_SOURCE is not set
@@ -4112,6 +4132,12 @@ CONFIG_INTEGRITY_AUDIT=y
 # CONFIG_EVM is not set
 CONFIG_DEFAULT_SECURITY_DAC=y
 CONFIG_DEFAULT_SECURITY=""
+CONFIG_XOR_BLOCKS=y
+CONFIG_ASYNC_CORE=y
+CONFIG_ASYNC_MEMCPY=y
+CONFIG_ASYNC_XOR=y
+CONFIG_ASYNC_PQ=y
+CONFIG_ASYNC_RAID6_RECOV=y
 CONFIG_CRYPTO=y
 
 #
@@ -4301,6 +4327,7 @@ CONFIG_BINARY_PRINTF=y
 #
 # Library routines
 #
+CONFIG_RAID6_PQ=y
 CONFIG_BITREVERSE=y
 # CONFIG_HAVE_ARCH_BITREVERSE is not set
 CONFIG_RATIONAL=y

packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config

@@ -2435,6 +2435,7 @@ CONFIG_SENSORS_MAX6620=y
 # CONFIG_SENSORS_MAX6697 is not set
 # CONFIG_SENSORS_MAX31790 is not set
 # CONFIG_SENSORS_MCP3021 is not set
+CONFIG_SENSORS_MLXREG_FAN=y
 # CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_LM63 is not set
 # CONFIG_SENSORS_LM70 is not set

packages/base/any/kernels/4.9-lts/patches/series

@@ -13,3 +13,4 @@ driver-support-intel-igb-bcm5461-phy.patch
 0012-i2c-busses-Add-capabilities-to-i2c-mlxcpld.patch
 driver-i2c-i2c-core.patch
 driver-add-the-support-max6620.patch
+0013-Mellanox-backport-patchwork-from-kernels-4.17-4.19.patch

packages/base/any/kernels/modules/optoe.c

@@ -660,6 +660,7 @@ static ssize_t optoe_read_write(struct optoe_data *optoe,
 	ssize_t retval;
 	size_t pending_len = 0, chunk_len = 0;
 	loff_t chunk_offset = 0, chunk_start_offset = 0;
+	loff_t chunk_end_offset = 0;
 
 	dev_dbg(&client->dev,
 		"%s: off %lld  len:%ld, opcode:%s\n",
@@ -699,30 +700,30 @@ static ssize_t optoe_read_write(struct optoe_data *optoe,
 		/*
 		 * Compute the offset and number of bytes to be read/write
 		 *
-		 * 1. start at offset 0 (within the chunk), and read/write
-		 *    the entire chunk
-		 * 2. start at offset 0 (within the chunk) and read/write less
-		 *    than entire chunk
-		 * 3. start at an offset not equal to 0 and read/write the rest
+		 * 1. start at an offset not equal to 0 (within the chunk)
+		 *    and read/write less than the rest of the chunk
+		 * 2. start at an offset not equal to 0 and read/write the rest
 		 *    of the chunk
-		 * 4. start at an offset not equal to 0 and read/write less than
-		 *    (end of chunk - offset)
+		 * 3. start at offset 0 (within the chunk) and read/write less
+		 *    than entire chunk
+		 * 4. start at offset 0 (within the chunk), and read/write
+		 *    the entire chunk
 		 */
 		chunk_start_offset = chunk * OPTOE_PAGE_SIZE;
+		chunk_end_offset = chunk_start_offset + OPTOE_PAGE_SIZE;
 
 		if (chunk_start_offset < off) {
 			chunk_offset = off;
-			if ((off + pending_len) < (chunk_start_offset +
-					OPTOE_PAGE_SIZE))
+			if ((off + pending_len) < chunk_end_offset)
 				chunk_len = pending_len;
 			else
-				chunk_len = OPTOE_PAGE_SIZE - off;
+				chunk_len = chunk_end_offset - off;
 		} else {
 			chunk_offset = chunk_start_offset;
-			if (pending_len > OPTOE_PAGE_SIZE)
-				chunk_len = OPTOE_PAGE_SIZE;
-			else
+			if (pending_len < OPTOE_PAGE_SIZE)
 				chunk_len = pending_len;
+			else
+				chunk_len = OPTOE_PAGE_SIZE;
 		}
 
 		dev_dbg(&client->dev,

packages/base/any/onlp/src/onlp/module/src/onlp_locks.h

@@ -206,7 +206,7 @@ void onlp_api_unlock(void);
         ONLP_API_T1(_name);                                             \
         ONLP_LOCKED_API_NAME(_name) (_v1, _v2, _v3);                    \
         ONLP_API_UNLOCK();                                              \
-        ONLP_API_T2_(name);                                             \
+        ONLP_API_T2(name);                                              \
     }
 
 #define ONLP_LOCKED_VAPI4(_name, _t1, _v1, _t2, _v2, _t3, _v3, _t4, _v4) \

packages/base/any/onlp/src/onlp/module/src/sfp.c

@@ -110,6 +110,7 @@ ONLP_LOCKED_API1(onlp_sfp_is_present, int, port);
 static int
 onlp_sfp_presence_bitmap_get_locked__(onlp_sfp_bitmap_t* dst)
 {
+    onlp_sfp_bitmap_t_init(dst);
     int rv = onlp_sfpi_presence_bitmap_get(dst);
 
     if(rv == ONLP_STATUS_E_UNSUPPORTED) {

packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/platform-config/r0/builds/dtb/arm-accton-as4610-54-r0.dts

@@ -139,8 +139,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <0>;
-                sfp_eeprom@50 {
-                    compatible = "at,as4610_sfp1";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port49";
                 };
@@ -151,8 +151,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <1>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp2";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port50";
                 };
@@ -163,8 +163,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <2>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp3";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port51";
                 };
@@ -175,8 +175,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <3>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp4";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port52";
                 };
@@ -187,9 +187,10 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <4>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp5";
+                optoe@50 {
+                    compatible = "optoe1";
                     reg = <0x50>;
+                    label = "port53";
                 };
             };
 
@@ -198,9 +199,10 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <5>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp6";
+                optoe@50 {
+                    compatible = "optoe1";
                     reg = <0x50>;
+                    label = "port54";
                 };
             };
 

packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/platform-config/r0/builds/dtb/arm-accton-as4610-54-r0.dts

@@ -139,8 +139,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <0>;
-                sfp_eeprom@50 {
-                    compatible = "at,as4610_sfp1";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port49";
                 };
@@ -151,8 +151,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <1>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp2";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port50";
                 };
@@ -163,8 +163,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <2>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp3";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port51";
                 };
@@ -175,8 +175,8 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <3>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp4";
+                optoe@50 {
+                    compatible = "optoe2";
                     reg = <0x50>;
                     label = "port52";
                 };
@@ -187,9 +187,10 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <4>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp5";
+                optoe@50 {
+                    compatible = "optoe1";
                     reg = <0x50>;
+                    label = "port53";
                 };
             };
 
@@ -198,9 +199,10 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 reg = <5>;
-                sfp_eeprom@50 {
-                    compatible = "accton,as4610_sfp6";
+                optoe@50 {
+                    compatible = "optoe1";
                     reg = <0x50>;
+                    label = "port54";
                 };
             };
 

packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/sfpi.c

@@ -24,50 +24,31 @@
  *
  ***********************************************************/
 #include <onlp/platformi/sfpi.h>
+#include <onlplib/file.h>
 #include "platform_lib.h"
 
 #include <arm_accton_as4610/arm_accton_as4610_config.h>
 #include "arm_accton_as4610_log.h"
 
-#define MAX_SFP_PATH 64
-static char sfp_node_path[MAX_SFP_PATH] = {0};
-#define FRONT_PORT_MUX_INDEX(port) (port-46)
+#define PORT_EEPROM_FORMAT              "/sys/bus/i2c/devices/%d-0050/eeprom"
+#define MODULE_PRESENT_FORMAT		    "/sys/bus/i2c/devices/0-0030/module_present_%d"
+#define MODULE_RXLOS_FORMAT             "/sys/bus/i2c/devices/0-0030/module_rx_los_%d"
+#define MODULE_TXFAULT_FORMAT           "/sys/bus/i2c/devices/0-0030/module_tx_fault_%d"
+#define MODULE_PRESENT_ALL_ATTR_CPLD	"/sys/bus/i2c/devices/0-0030/module_present_all"
+#define MODULE_RXLOS_ALL_ATTR_CPLD	    "/sys/bus/i2c/devices/0-0030/module_rx_los_all"
 
-static int
-sfp_node_read_int(char *node_path, int *value, int data_len)
+static int front_port_bus_index(int port)
 {
-    int ret = 0;
-    char buf[8];
-    *value = 0;
-
-    ret = deviceNodeReadString(node_path, buf, sizeof(buf), data_len);
-
-    if (ret == 0) {
-        *value = atoi(buf);
-    }
-
-    return ret;
+    return (platform_id == PLATFORM_ID_POWERPC_ACCTON_AS4610_30_R0) ? 
+           (port - 22) : /* PLATFORM_ID_POWERPC_ACCTON_AS4610_30_R0 */
+           (port - 46) ; /* PLATFORM_ID_POWERPC_ACCTON_AS4610_54_R0 */
 }
 
-static char*
-sfp_get_port_path_addr(int port, int addr, char *node_name)
+static int front_port_to_cpld_port(int port)
 {
-    int front_port_mux_id;
-
-    if(platform_id == PLATFORM_ID_POWERPC_ACCTON_AS4610_30_R0)
-        front_port_mux_id = port - 22;
-    else /*PLATFORM_ID_POWERPC_ACCTON_AS4610_54_R0*/
-        front_port_mux_id = port - 46;
-
-    sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-00%d/%s",
-                           front_port_mux_id, addr, node_name);
-    return sfp_node_path;
-}
-
-static char*
-sfp_get_port_path(int port, char *node_name)
-{
-    return sfp_get_port_path_addr(port, 50, node_name);
+    return (platform_id == PLATFORM_ID_POWERPC_ACCTON_AS4610_30_R0) ? 
+           (port - 23) : /* PLATFORM_ID_POWERPC_ACCTON_AS4610_30_R0 */
+           (port - 47) ; /* PLATFORM_ID_POWERPC_ACCTON_AS4610_54_R0 */
 }
 
 /************************************************************
@@ -115,9 +96,9 @@ onlp_sfpi_is_present(int port)
      * Return < 0 if error.
      */
     int present;
-    char* path = sfp_get_port_path(port, "sfp_is_present");
-
-    if (sfp_node_read_int(path, &present, 0) != 0) {
+    int cpld_port = front_port_to_cpld_port(port);
+    
+	if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, cpld_port) < 0) {
         AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
         return ONLP_STATUS_E_INTERNAL;
     }
@@ -129,7 +110,6 @@ int
 onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
 {
     uint32_t byte;
-    char* path;
     FILE* fp;
     int   port;
 
@@ -140,18 +120,18 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
     else /*PLATFORM_ID_POWERPC_ACCTON_AS4610_54_R0*/
         port = 48;
 
-    path = sfp_get_port_path(port, "sfp_is_present_all");
-    fp = fopen(path, "r");
-
+    /* Read present status of each port */
+    fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD, "r");
     if(fp == NULL) {
-        AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
+        AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD.");
         return ONLP_STATUS_E_INTERNAL;
     }
+
     int count = fscanf(fp, "%x", &byte);
     fclose(fp);
     if(count != 1) {
         /* Likely a CPLD read timeout. */
-        AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
+        AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD.");
         return ONLP_STATUS_E_INTERNAL;
     }
 
@@ -173,7 +153,6 @@ int
 onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
 {
     uint32_t byte;
-    char* path;
     FILE* fp;
     int   port;
 
@@ -182,16 +161,18 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
     else /*PLATFORM_ID_POWERPC_ACCTON_AS4610_54_R0*/
         port = 48;
 
-    path = sfp_get_port_path(port, "sfp_rx_los_all");
-    fp = fopen(path, "r");
+    /* Read present status of each port */
+    fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD, "r");
     if(fp == NULL) {
-        AIM_LOG_ERROR("Unable to open the sfp_rx_los_all device file.");
+        AIM_LOG_ERROR("Unable to open the module_rx_los_all device file of CPLD.");
         return ONLP_STATUS_E_INTERNAL;
     }
+
     int count = fscanf(fp, "%x", &byte);
     fclose(fp);
     if(count != 1) {
-        AIM_LOG_ERROR("Unable to read all fields from the sfp_rx_los_all device file.");
+        /* Likely a CPLD read timeout. */
+        AIM_LOG_ERROR("Unable to read all fields the module_rx_los_all device file of CPLD.");
         return ONLP_STATUS_E_INTERNAL;
     }
 
@@ -212,32 +193,51 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
 int
 onlp_sfpi_eeprom_read(int port, uint8_t data[256])
 {
-    char* path = sfp_get_port_path(port, "sfp_eeprom");
-
     /*
      * Read the SFP eeprom into data[]
      *
      * Return MISSING if SFP is missing.
      * Return OK if eeprom is read
      */
+    int size = 0;
     memset(data, 0, 256);
 
-    if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
+	if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, front_port_bus_index(port)) != ONLP_STATUS_OK) {
         AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
         return ONLP_STATUS_E_INTERNAL;
     }
 
+    if (size != 256) {
+        AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
     return ONLP_STATUS_OK;
 }
 
 int
 onlp_sfpi_dom_read(int port, uint8_t data[256])
 {
-    char* path = sfp_get_port_path_addr(port, 51, "sfp_eeprom");
-    memset(data, 0, 256);
+    FILE* fp;
+    char file[64] = {0};
+    
+    sprintf(file, PORT_EEPROM_FORMAT, front_port_bus_index(port));
+    fp = fopen(file, "r");
+    if(fp == NULL) {
+        AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
 
-    if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
-        AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
+    if (fseek(fp, 256, SEEK_CUR) != 0) {
+        fclose(fp);
+        AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    int ret = fread(data, 1, 256, fp);
+    fclose(fp);
+    if (ret != 256) {
+        AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
         return ONLP_STATUS_E_INTERNAL;
     }
 
@@ -247,45 +247,24 @@ onlp_sfpi_dom_read(int port, uint8_t data[256])
 int
 onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
 {
-    int rv;
-
-    switch(control)
-        {
-        case ONLP_SFP_CONTROL_TX_DISABLE:
-            {
-                char* path = sfp_get_port_path(port, "sfp_tx_disable");
-
-                if (deviceNodeWriteInt(path, value, 0) != 0) {
-                    AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
-                    rv = ONLP_STATUS_E_INTERNAL;
-                }
-                else {
-                    rv = ONLP_STATUS_OK;
-                }
-                break;
-            }
-
-        default:
-            rv = ONLP_STATUS_E_UNSUPPORTED;
-            break;
-        }
-
-    return rv;
+    return ONLP_STATUS_E_UNSUPPORTED;
 }
 
 int
 onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 {
     int rv;
-    char* path = NULL;
+    int cpld_port = front_port_to_cpld_port(port);
+
+    if (cpld_port > 4) {
+        return ONLP_STATUS_E_UNSUPPORTED;
+    }
 
     switch(control)
         {
         case ONLP_SFP_CONTROL_RX_LOS:
             {
-                path = sfp_get_port_path(port, "sfp_rx_los");
-
-                if (sfp_node_read_int(path, value, 0) != 0) {
+            	if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, cpld_port) < 0) {
                     AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -297,9 +276,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 
         case ONLP_SFP_CONTROL_TX_FAULT:
             {
-                path = sfp_get_port_path(port, "sfp_tx_fault");
-
-                if (sfp_node_read_int(path, value, 0) != 0) {
+            	if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, cpld_port) < 0) {
                     AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -309,20 +286,6 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
                 break;
             }
 
-        case ONLP_SFP_CONTROL_TX_DISABLE:
-            {
-                path = sfp_get_port_path(port, "sfp_tx_disable");
-
-                if (sfp_node_read_int(path, value, 0) != 0) {
-                    AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
-                    rv = ONLP_STATUS_E_INTERNAL;
-                }
-                else {
-                    rv = ONLP_STATUS_OK;
-                }
-                break;
-            }
-
         default:
             rv = ONLP_STATUS_E_UNSUPPORTED;
         }
@@ -330,9 +293,9 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
     return rv;
 }
 
-
 int
 onlp_sfpi_denit(void)
 {
     return ONLP_STATUS_OK;
 }
+

packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/x86-64-accton-as5512-54x-fan.c

@@ -131,8 +131,8 @@ static ssize_t fan_set_duty_cycle(struct device *dev,
 static ssize_t fan_show_value(struct device *dev, 
                     struct device_attribute *da, char *buf);
 
-extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
-extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+extern int as5512_54x_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int as5512_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
 
                     
 /*******************/
@@ -269,12 +269,12 @@ static const struct attribute_group accton_as5512_54x_fan_group = {
 
 static int accton_as5512_54x_fan_read_value(u8 reg)
 {
-    return accton_i2c_cpld_read(0x60, reg);
+    return as5512_54x_cpld_read(0x60, reg);
 }
 
 static int accton_as5512_54x_fan_write_value(u8 reg, u8 value)
 {
-    return accton_i2c_cpld_write(0x60, reg, value);
+    return as5512_54x_cpld_write(0x60, reg, value);
 }
 
 static void accton_as5512_54x_fan_update_device(struct device *dev)
@@ -405,11 +405,6 @@ static int __init accton_as5512_54x_fan_init(void)
 {
     int ret;
 
-    extern int platform_accton_as5512_54x(void);
-    if(!platform_accton_as5512_54x()) {
-        return -ENODEV;
-    }
-
     ret = platform_driver_register(&accton_as5512_54x_fan_driver);
     if (ret < 0) {
         goto exit;

packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/x86-64-accton-as5512-54x-leds.c

@@ -29,8 +29,8 @@
 #include <linux/leds.h>
 #include <linux/slab.h>
 
-extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
-extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+extern int as5512_54x_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int as5512_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
 
 #define DRVNAME "as5512_54x_led"
 
@@ -168,12 +168,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
 
 static int accton_as5512_54x_led_read_value(u8 reg)
 {
-    return accton_i2c_cpld_read(0x60, reg);
+    return as5512_54x_cpld_read(0x60, reg);
 }
 
 static int accton_as5512_54x_led_write_value(u8 reg, u8 value)
 {
-    return accton_i2c_cpld_write(0x60, reg, value);
+    return as5512_54x_cpld_write(0x60, reg, value);
 }
 
 static void accton_as5512_54x_led_update(void)
@@ -411,11 +411,6 @@ static int __init accton_as5512_54x_led_init(void)
 {
     int ret;
 
-    extern int platform_accton_as5512_54x(void);
-    if(!platform_accton_as5512_54x()) {
-        return -ENODEV;
-    }
-
     ret = platform_driver_register(&accton_as5512_54x_led_driver);
     if (ret < 0) {
         goto exit;

packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/x86-64-accton-as5512-54x-psu.c

@@ -36,7 +36,7 @@ static ssize_t show_index(struct device *dev, struct device_attribute *da, char
 static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
 static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
 static int as5512_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
-extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int as5512_54x_cpld_read(unsigned short cpld_addr, u8 reg);
 
 /* Addresses scanned 
  */
@@ -253,7 +253,7 @@ static struct as5512_54x_psu_data *as5512_54x_psu_update_device(struct device *d
         }
 
         /* Read psu status */
-        status = accton_i2c_cpld_read(0x60, 0x2);
+        status = as5512_54x_cpld_read(0x60, 0x2);
         
         if (status < 0) {
             dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status);
@@ -271,25 +271,9 @@ static struct as5512_54x_psu_data *as5512_54x_psu_update_device(struct device *d
     return data;
 }
 
-static int __init as5512_54x_psu_init(void)
-{
-    extern int platform_accton_as5512_54x(void);
-    if(!platform_accton_as5512_54x()) {
-        return -ENODEV;
-    }
-
-    return i2c_add_driver(&as5512_54x_psu_driver);
-}
-
-static void __exit as5512_54x_psu_exit(void)
-{
-    i2c_del_driver(&as5512_54x_psu_driver);
-}
+module_i2c_driver(as5512_54x_psu_driver);
 
 MODULE_AUTHOR("Brandon Chuang <brandon_chuang@accton.com.tw>");
 MODULE_DESCRIPTION("accton as5512_54x_psu driver");
 MODULE_LICENSE("GPL");
 
-module_init(as5512_54x_psu_init);
-module_exit(as5512_54x_psu_exit);
-

packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/onlp/builds/src/module/src/sfpi.c

@@ -24,58 +24,53 @@
  *
  ***********************************************************/
 #include <onlp/platformi/sfpi.h>
-
-#include <fcntl.h> /* For O_RDWR && open */
-#include <stdio.h>
-#include <string.h>
-#include <unistd.h>
-#include <sys/ioctl.h>
-
-#include "platform_lib.h"
-
-#define MAX_SFP_PATH 64
-static char sfp_node_path[MAX_SFP_PATH] = {0};
+#include <onlplib/i2c.h>
+#include <onlplib/file.h>
+#include "x86_64_accton_as5512_54x_int.h"
+#include "x86_64_accton_as5512_54x_log.h"
 
 #define MUX_START_INDEX 2
-#define NUM_OF_SFP_PORT 54
-static const int sfp_mux_index[NUM_OF_SFP_PORT] = {
- 0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
-16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
-52, 50, 48, 53, 51, 49
-};
 
-#define FRONT_PORT_TO_MUX_INDEX(port) (sfp_mux_index[port]+MUX_START_INDEX)
+#define PORT_EEPROM_FORMAT              "/sys/bus/i2c/devices/%d-0050/eeprom"
+#define MODULE_PRESENT_FORMAT		    "/sys/bus/i2c/devices/0-00%d/module_present_%d"
+#define MODULE_RXLOS_FORMAT             "/sys/bus/i2c/devices/0-00%d/module_rx_los_%d"
+#define MODULE_TXFAULT_FORMAT           "/sys/bus/i2c/devices/0-00%d/module_tx_fault_%d"
+#define MODULE_TXDISABLE_FORMAT         "/sys/bus/i2c/devices/0-00%d/module_tx_disable_%d"
+#define MODULE_PRESENT_ALL_ATTR_CPLD2	"/sys/bus/i2c/devices/0-0061/module_present_all"
+#define MODULE_PRESENT_ALL_ATTR_CPLD3	"/sys/bus/i2c/devices/0-0062/module_present_all"
+#define MODULE_RXLOS_ALL_ATTR_CPLD2	    "/sys/bus/i2c/devices/0-0061/module_rx_los_all"
+#define MODULE_RXLOS_ALL_ATTR_CPLD3	    "/sys/bus/i2c/devices/0-0062/module_rx_los_all"
 
-static int
-sfp_node_read_int(char *node_path, int *value, int data_len)
+static int front_port_bus_index(int port)
 {
-    int ret = 0;
-    char buf[8] = {0};
-    *value = 0;
+    int rport = 0;
 
-    ret = deviceNodeReadString(node_path, buf, sizeof(buf), data_len);
-
-    if (ret == 0) {
-        *value = atoi(buf);
+    switch (port)
+    {
+        case 48:
+            rport = 52;
+            break;
+        case 49:
+            rport = 50;
+            break;
+        case 50:
+            rport = 48;
+            break;
+        case 51:
+            rport = 53;
+            break;
+        case 52:
+            rport = 51;
+            break;
+        case 53:
+            rport = 49;
+            break;
+        default:
+            rport = port;
+            break;
     }
 
-    return ret;
-}
-
-static char*
-sfp_get_port_path_addr(int port, int addr, char *node_name)
-{
-    sprintf(sfp_node_path, "/sys/bus/i2c/devices/%d-00%d/%s",
-                           FRONT_PORT_TO_MUX_INDEX(port), addr,
-                           node_name);
-    return sfp_node_path;
-}
-
-static char*
-sfp_get_port_path(int port, char *node_name)
-{
-    return sfp_get_port_path_addr(port, 50, node_name);
+    return (rport + MUX_START_INDEX);
 }
 
 /************************************************************
@@ -114,10 +109,10 @@ onlp_sfpi_is_present(int port)
      * Return < 0 if error.
      */
     int present;
-    char* path = sfp_get_port_path(port, "sfp_is_present");
-
-    if (sfp_node_read_int(path, &present, 0) != 0) {
-        AIM_LOG_INFO("Unable to read present status from port(%d)\r\n", port);
+    int addr = (port < 24) ? 61 : 62;
+    
+	if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, addr, (port+1)) < 0) {
+        AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
         return ONLP_STATUS_E_INTERNAL;
     }
 
@@ -128,29 +123,35 @@ int
 onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
 {
     uint32_t bytes[7];
-    char* path;
     FILE* fp;
 
-    path = sfp_get_port_path(0, "sfp_is_present_all");
-    fp = fopen(path, "r");
-
+    /* Read present status of port 0~23 */
+    fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD2, "r");
     if(fp == NULL) {
-        AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
+        AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD2.");
         return ONLP_STATUS_E_INTERNAL;
     }
-    int count = fscanf(fp, "%x %x %x %x %x %x %x",
-                       bytes+0,
-                       bytes+1,
-                       bytes+2,
-                       bytes+3,
-                       bytes+4,
-                       bytes+5,
-                       bytes+6
-                       );
+
+    int count = fscanf(fp, "%x %x %x", bytes+0, bytes+1, bytes+2);
     fclose(fp);
-    if(count != AIM_ARRAYSIZE(bytes)) {
+    if(count != 3) {
         /* Likely a CPLD read timeout. */
-        AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
+        AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD2.");
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    /* Read present status of port 24~53 */
+    fp = fopen(MODULE_PRESENT_ALL_ATTR_CPLD3, "r");
+    if(fp == NULL) {
+        AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD3.");
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    count = fscanf(fp, "%x %x %x %x", bytes+3, bytes+4, bytes+5, bytes+6);
+    fclose(fp);
+    if(count != 4) {
+        /* Likely a CPLD read timeout. */
+        AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD3.");
         return ONLP_STATUS_E_INTERNAL;
     }
 
@@ -177,33 +178,39 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
 int
 onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
 {
-    uint32_t bytes[7];
-    char* path;
+    uint32_t bytes[6];
+    uint32_t *ptr = bytes;
     FILE* fp;
 
-    path = sfp_get_port_path(0, "sfp_rx_los_all");
-    fp = fopen(path, "r");
+    /* Read present status of port 0~23 */
+    int addr, i = 0;
 
-    if(fp == NULL) {
-        AIM_LOG_ERROR("Unable to open the sfp_rx_los_all device file.");
-        return ONLP_STATUS_E_INTERNAL;
-    }
-    int count = fscanf(fp, "%x %x %x %x %x %x",
-                       bytes+0,
-                       bytes+1,
-                       bytes+2,
-                       bytes+3,
-                       bytes+4,
-                       bytes+5
-                       );
-    fclose(fp);
-    if(count != 6) {
-        AIM_LOG_ERROR("Unable to read all fields from the sfp_rx_los_all device file.");
-        return ONLP_STATUS_E_INTERNAL;
+    for (addr = 61; addr <= 62; addr++) {
+        if (addr == 61) {
+            fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD2, "r");
+        }
+        else {
+            fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD3, "r");
+        }
+
+        if(fp == NULL) {
+            AIM_LOG_ERROR("Unable to open the module_rx_los_all device file of CPLD(0x%d)", addr);
+            return ONLP_STATUS_E_INTERNAL;
+        }
+
+        int count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
+        fclose(fp);
+        if(count != 3) {
+            /* Likely a CPLD read timeout. */
+            AIM_LOG_ERROR("Unable to read all fields from the module_rx_los_all device file of CPLD(0x%d)", addr);
+            return ONLP_STATUS_E_INTERNAL;
+        }
+
+        ptr += count;
     }
 
     /* Convert to 64 bit integer in port order */
-    int i = 0;
+    i = 0;
     uint64_t rx_los_all = 0 ;
     for(i = 5; i >= 0; i--) {
         rx_los_all <<= 8;
@@ -222,18 +229,22 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
 int
 onlp_sfpi_eeprom_read(int port, uint8_t data[256])
 {
-    char* path = sfp_get_port_path(port, "sfp_eeprom");
-
     /*
      * Read the SFP eeprom into data[]
      *
      * Return MISSING if SFP is missing.
      * Return OK if eeprom is read
      */
+    int size = 0;
     memset(data, 0, 256);
 
-    if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
-        AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
+	if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, front_port_bus_index(port)) != ONLP_STATUS_OK) {
+        AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    if (size != 256) {
+        AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
         return ONLP_STATUS_E_INTERNAL;
     }
 
@@ -243,17 +254,60 @@ onlp_sfpi_eeprom_read(int port, uint8_t data[256])
 int
 onlp_sfpi_dom_read(int port, uint8_t data[256])
 {
-    char* path = sfp_get_port_path_addr(port, 51, "sfp_eeprom");
-    memset(data, 0, 256);
+    FILE* fp;
+    char file[64] = {0};
+    
+    sprintf(file, PORT_EEPROM_FORMAT, front_port_bus_index(port));
+    fp = fopen(file, "r");
+    if(fp == NULL) {
+        AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
 
-    if (deviceNodeReadBinary(path, (char*)data, 256, 256) != 0) {
-        AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
+    if (fseek(fp, 256, SEEK_CUR) != 0) {
+        fclose(fp);
+        AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    int ret = fread(data, 1, 256, fp);
+    fclose(fp);
+    if (ret != 256) {
+        AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
         return ONLP_STATUS_E_INTERNAL;
     }
 
     return ONLP_STATUS_OK;
 }
 
+int
+onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
+{
+    int bus = front_port_bus_index(port);
+    return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
+}
+
+int
+onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
+{
+    int bus = front_port_bus_index(port);
+    return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
+}
+
+int
+onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
+{
+    int bus = front_port_bus_index(port);
+    return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
+}
+
+int
+onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
+{
+    int bus = front_port_bus_index(port);
+    return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
+}
+
 int
 onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
 {
@@ -263,13 +317,13 @@ onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
         return ONLP_STATUS_E_UNSUPPORTED;
     }
 
+    int addr = (port < 24) ? 61 : 62;
+
     switch(control)
         {
         case ONLP_SFP_CONTROL_TX_DISABLE:
             {
-                char* path = sfp_get_port_path(port, "sfp_tx_disable");
-
-                if (deviceNodeWriteInt(path, value, 0) != 0) {
+                if (onlp_file_write_int(value, MODULE_TXDISABLE_FORMAT, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -291,19 +345,18 @@ int
 onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 {
     int rv;
-    char* path = NULL;
 
     if (port < 0 || port >= 48) {
         return ONLP_STATUS_E_UNSUPPORTED;
     }
 
+    int addr = (port < 24) ? 61 : 62;
+
     switch(control)
         {
         case ONLP_SFP_CONTROL_RX_LOS:
             {
-                path = sfp_get_port_path(port, "sfp_rx_los");
-
-                if (sfp_node_read_int(path, value, 0) != 0) {
+            	if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to read rx_loss status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -315,9 +368,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 
         case ONLP_SFP_CONTROL_TX_FAULT:
             {
-                path = sfp_get_port_path(port, "sfp_tx_fault");
-
-                if (sfp_node_read_int(path, value, 0) != 0) {
+            	if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -329,9 +380,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 
         case ONLP_SFP_CONTROL_TX_DISABLE:
             {
-                path = sfp_get_port_path(port, "sfp_tx_disable");
-
-                if (sfp_node_read_int(path, value, 0) != 0) {
+            	if (onlp_file_read_int(value, MODULE_TXDISABLE_FORMAT, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }

packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/src/python/x86_64_accton_as5512_54x_r0/__init__.py

@@ -8,10 +8,10 @@ class OnlPlatform_x86_64_accton_as5512_54x_r0(OnlPlatformAccton,
     SYS_OBJECT_ID=".5512.54.1"
 
     def baseconfig(self):
-
+        self.insmod('optoe')
         self.insmod('cpr_4011_4mxx')
-        self.insmod('accton_i2c_cpld')
-        self.insmod_platform()
+        for m in [ 'cpld', 'fan', 'psu', 'leds' ]:
+            self.insmod("x86-64-accton-as5512-54x-%s.ko" % m)
 
         ########### initialize I2C bus 0 ###########
 
@@ -30,23 +30,29 @@ class OnlPlatform_x86_64_accton_as5512_54x_r0(OnlPlatformAccton,
         # initialize CPLDs
         self.new_i2c_devices(
             [
-                ('accton_i2c_cpld', 0x60, 0),
-                ('accton_i2c_cpld', 0x61, 0),
-                ('accton_i2c_cpld', 0x62, 0),
+                ('as5512_54x_cpld1', 0x60, 0),
+                ('as5512_54x_cpld2', 0x61, 0),
+                ('as5512_54x_cpld3', 0x62, 0),
                 ]
             )
         # initialize SFP devices
         for port in range(1, 49):
-            self.new_i2c_device('sfp%d' % port, 0x50, port+1)
-            self.new_i2c_device('sfp%d' % port, 0x51, port+1)
+            self.new_i2c_device('optoe2', 0x50, port+1)
+            subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+1), shell=True)
 
         # Initialize QSFP devices
-        self.new_i2c_device('sfp51', 0x50, 50)
-        self.new_i2c_device('sfp54', 0x50, 51)
-        self.new_i2c_device('sfp50', 0x50, 52)
-        self.new_i2c_device('sfp53', 0x50, 53)
-        self.new_i2c_device('sfp49', 0x50, 54)
-        self.new_i2c_device('sfp52', 0x50, 55)
+        self.new_i2c_device('optoe1', 0x50, 50)
+        self.new_i2c_device('optoe1', 0x50, 51)
+        self.new_i2c_device('optoe1', 0x50, 52)
+        self.new_i2c_device('optoe1', 0x50, 53)
+        self.new_i2c_device('optoe1', 0x50, 54)
+        self.new_i2c_device('optoe1', 0x50, 55)
+        subprocess.call('echo port51 > /sys/bus/i2c/devices/50-0050/port_name', shell=True)
+        subprocess.call('echo port54 > /sys/bus/i2c/devices/51-0050/port_name', shell=True)
+        subprocess.call('echo port50 > /sys/bus/i2c/devices/52-0050/port_name', shell=True)
+        subprocess.call('echo port53 > /sys/bus/i2c/devices/53-0050/port_name', shell=True)
+        subprocess.call('echo port49 > /sys/bus/i2c/devices/54-0050/port_name', shell=True)
+        subprocess.call('echo port52 > /sys/bus/i2c/devices/55-0050/port_name', shell=True)
 
         ########### initialize I2C bus 1 ###########
         self.new_i2c_devices(

packages/platforms/accton/x86-64/x86-64-accton-as5916-54xk/modules/builds/x86-64-accton-as5916-54xk-leds.c

@@ -38,8 +38,8 @@
 	#define DEBUG_PRINT(fmt, args...)
 #endif
 
-extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
-extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+extern int as5916_54xk_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int as5916_54xk_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
 
 struct accton_as5916_54xk_led_data {
 	struct platform_device *pdev;
@@ -157,12 +157,12 @@ static u8 led_light_mode_to_reg_val(enum led_type type,
 
 static int accton_as5916_54xk_led_read_value(u8 reg)
 {
-	return accton_i2c_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
+	return as5916_54xk_cpld_read(LED_CNTRLER_I2C_ADDRESS, reg);
 }
 
 static int accton_as5916_54xk_led_write_value(u8 reg, u8 value)
 {
-	return accton_i2c_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
+	return as5916_54xk_cpld_write(LED_CNTRLER_I2C_ADDRESS, reg, value);
 }
 
 static void accton_as5916_54xk_led_update(void)

packages/platforms/accton/x86-64/x86-64-accton-as5916-54xk/modules/builds/x86-64-accton-as5916-54xk-psu.c

@@ -37,7 +37,7 @@
 static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf);
 static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf);
 static int as5916_54xk_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len);
-extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int as5916_54xk_cpld_read(unsigned short cpld_addr, u8 reg);
 
 /* Addresses scanned 
  */
@@ -234,7 +234,7 @@ static struct as5916_54xk_psu_data *as5916_54xk_psu_update_device(struct device
         dev_dbg(&client->dev, "Starting as5916_54xk update\n");
 
         /* Read psu status */
-        status = accton_i2c_cpld_read(0x60, 0x2);
+        status = as5916_54xk_cpld_read(0x60, 0x2);
         
         if (status < 0) {
             dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status);

packages/platforms/accton/x86-64/x86-64-accton-as5916-54xk/onlp/builds/src/module/src/sfpi.c

@@ -24,17 +24,21 @@
  *
  ***********************************************************/
 #include <onlp/platformi/sfpi.h>
+#include <onlplib/i2c.h>
 #include <onlplib/file.h>
-#include "platform_lib.h"
-
+#include "x86_64_accton_as5916_54xk_int.h"
 #include "x86_64_accton_as5916_54xk_log.h"
 
-#define NUM_OF_SFP_PORT 54
-#define MAX_PORT_PATH 	64
+#define PORT_BUS_INDEX(port) (port+33)
 
-#define SFP_PORT_FORMAT	 		"/sys/bus/i2c/devices/%d-0050/%s"
-#define SFP_PORT_DOM_FORMAT	 	"/sys/bus/i2c/devices/%d-0051/%s"
-#define SFP_BUS_INDEX(port) 	(port+33)
+#define PORT_EEPROM_FORMAT              "/sys/bus/i2c/devices/%d-0050/eeprom"
+#define MODULE_PRESENT_FORMAT		    "/sys/bus/i2c/devices/%d-00%d/module_present_%d"
+#define MODULE_RXLOS_FORMAT             "/sys/bus/i2c/devices/%d-00%d/module_rx_los_%d"
+#define MODULE_TXFAULT_FORMAT           "/sys/bus/i2c/devices/%d-00%d/module_tx_fault_%d"
+#define MODULE_TXDISABLE_FORMAT         "/sys/bus/i2c/devices/%d-00%d/module_tx_disable_%d"
+#define MODULE_PRESENT_ALL_ATTR	        "/sys/bus/i2c/devices/%d-00%d/module_present_all"
+#define MODULE_RXLOS_ALL_ATTR_CPLD1	    "/sys/bus/i2c/devices/11-0060/module_rx_los_all"
+#define MODULE_RXLOS_ALL_ATTR_CPLD2	    "/sys/bus/i2c/devices/12-0062/module_rx_los_all"
 
 /************************************************************
  *
@@ -56,7 +60,7 @@ onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
      */
     int p;
 
-    for(p = 0; p < NUM_OF_SFP_PORT; p++) {
+    for(p = 0; p < 54; p++) {
         AIM_BITMAP_SET(bmap, p);
     }
 
@@ -72,7 +76,12 @@ onlp_sfpi_is_present(int port)
      * Return < 0 if error.
      */
     int present;
-    if (onlp_file_read_int(&present, SFP_PORT_FORMAT, SFP_BUS_INDEX(port), "sfp_is_present") < 0) {
+    int bus, addr;
+
+    addr = (port < 24) ? 60 : 62;
+    bus  = (addr == 60) ? 11 : 12;
+    
+	if (onlp_file_read_int(&present, MODULE_PRESENT_FORMAT, bus, addr, (port+1)) < 0) {
         AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port);
         return ONLP_STATUS_E_INTERNAL;
     }
@@ -83,31 +92,45 @@ onlp_sfpi_is_present(int port)
 int
 onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
 {
-    uint32_t bytes[7];
-    char  path[MAX_PORT_PATH] = {0};
+    uint32_t bytes[7], *ptr = NULL;
     FILE* fp;
+    int addr;
 
-    sprintf(path, SFP_PORT_FORMAT, SFP_BUS_INDEX(0), "sfp_is_present_all");
-    fp = fopen(path, "r");
+    ptr = bytes;
 
-    if(fp == NULL) {
-        AIM_LOG_ERROR("Unable to open the sfp_is_present_all device file.");
-        return ONLP_STATUS_E_INTERNAL;
-    }
-    int count = fscanf(fp, "%x %x %x %x %x %x %x",
-                       bytes+0,
-                       bytes+1,
-                       bytes+2,
-                       bytes+3,
-                       bytes+4,
-                       bytes+5,
-                       bytes+6
-                       );
-    fclose(fp);
-    if(count != AIM_ARRAYSIZE(bytes)) {
-        /* Likely a CPLD read timeout. */
-        AIM_LOG_ERROR("Unable to read all fields from the sfp_is_present_all device file.");
-        return ONLP_STATUS_E_INTERNAL;
+    for (addr = 60; addr <= 62; addr+=2) {
+        /* Read present status of port 0~53 */
+        int count = 0;
+        char file[64] = {0};
+        int bus = (addr == 60) ? 11 : 12;
+        
+        sprintf(file, MODULE_PRESENT_ALL_ATTR, bus, addr);
+        fp = fopen(file, "r");
+        if(fp == NULL) {
+            AIM_LOG_ERROR("Unable to open the module_present_all device file of CPLD(0x%d).", addr);
+            return ONLP_STATUS_E_INTERNAL;
+        }
+
+        if (addr == 60) { /* CPLD1 */
+            count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
+            fclose(fp);
+            if(count != 3) {
+                /* Likely a CPLD read timeout. */
+                AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD(0x%d).", addr);
+                return ONLP_STATUS_E_INTERNAL;
+            }
+        }
+        else { /* CPLD2 */
+            count = fscanf(fp, "%x %x %x %x", ptr+0, ptr+1, ptr+2, ptr+3);
+            fclose(fp);
+            if(count != 4) {
+                /* Likely a CPLD read timeout. */
+                AIM_LOG_ERROR("Unable to read all fields the module_present_all device file of CPLD(0x%d).", addr);
+                return ONLP_STATUS_E_INTERNAL;
+            }
+        }
+
+        ptr += count;
     }
 
     /* Mask out non-existant QSFP ports */
@@ -130,64 +153,44 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
     return ONLP_STATUS_OK;
 }
 
-int
-onlp_sfpi_eeprom_read(int port, uint8_t data[256])
-{
-	int size = 0;
-    if(onlp_file_read(data, 256, &size, SFP_PORT_FORMAT, SFP_BUS_INDEX(port), "sfp_eeprom") == ONLP_STATUS_OK) {
-        if(size == 256) {
-            return ONLP_STATUS_OK;
-        }
-    }
-
-	return ONLP_STATUS_E_INTERNAL;
-}
-
-int
-onlp_sfpi_dom_read(int port, uint8_t data[256])
-{
-	int size = 0;
-    if(onlp_file_read(data, 256, &size, SFP_PORT_DOM_FORMAT, SFP_BUS_INDEX(port), "sfp_eeprom") == ONLP_STATUS_OK) {
-        if(size == 256) {
-            return ONLP_STATUS_OK;
-        }
-    }
-
-	return ONLP_STATUS_E_INTERNAL;
-}
-
 int
 onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
 {
     uint32_t bytes[6];
-    char  path[MAX_PORT_PATH] = {0};
+    uint32_t *ptr = bytes;
     FILE* fp;
 
-    sprintf(path, SFP_PORT_FORMAT, SFP_BUS_INDEX(0), "sfp_rx_los_all");
-    fp = fopen(path, "r");
+    /* Read present status of port 0~23 */
+    int addr, i = 0;
 
-    if(fp == NULL) {
-        AIM_LOG_ERROR("Unable to open the sfp_rx_los_all device file.");
-        return ONLP_STATUS_E_INTERNAL;
-    }
-    int count = fscanf(fp, "%x %x %x %x %x %x",
-                       bytes+0,
-                       bytes+1,
-                       bytes+2,
-                       bytes+3,
-                       bytes+4,
-                       bytes+5
-                       );
-    fclose(fp);
-    if(count != 6) {
-        AIM_LOG_ERROR("Unable to read all fields from the sfp_rx_los_all device file.");
-        return ONLP_STATUS_E_INTERNAL;
+    for (addr = 60; addr <= 62; addr+=2) {
+        if (addr == 60) {
+            fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD1, "r");
+        }
+        else {
+            fp = fopen(MODULE_RXLOS_ALL_ATTR_CPLD2, "r");
+        }
+
+        if(fp == NULL) {
+            AIM_LOG_ERROR("Unable to open the module_rx_los_all device file of CPLD(0x%d)", addr);
+            return ONLP_STATUS_E_INTERNAL;
+        }
+
+        int count = fscanf(fp, "%x %x %x", ptr+0, ptr+1, ptr+2);
+        fclose(fp);
+        if(count != 3) {
+            /* Likely a CPLD read timeout. */
+            AIM_LOG_ERROR("Unable to read all fields from the module_rx_los_all device file of CPLD(0x%d)", addr);
+            return ONLP_STATUS_E_INTERNAL;
+        }
+
+        ptr += count;
     }
 
     /* Convert to 64 bit integer in port order */
-    int i = 0;
+    i = 0;
     uint64_t rx_los_all = 0 ;
-    for(i = 5; i >= 0; i--) {
+    for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) {
         rx_los_all <<= 8;
         rx_los_all |= bytes[i];
     }
@@ -201,16 +204,77 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
     return ONLP_STATUS_OK;
 }
 
+int
+onlp_sfpi_eeprom_read(int port, uint8_t data[256])
+{
+    /*
+     * Read the SFP eeprom into data[]
+     *
+     * Return MISSING if SFP is missing.
+     * Return OK if eeprom is read
+     */
+    int size = 0;
+    memset(data, 0, 256);
+
+	if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port)) != ONLP_STATUS_OK) {
+        AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    if (size != 256) {
+        AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_dom_read(int port, uint8_t data[256])
+{
+    FILE* fp;
+    char file[64] = {0};
+    
+    sprintf(file, PORT_EEPROM_FORMAT, PORT_BUS_INDEX(port));
+    fp = fopen(file, "r");
+    if(fp == NULL) {
+        AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    if (fseek(fp, 256, SEEK_CUR) != 0) {
+        fclose(fp);
+        AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    int ret = fread(data, 1, 256, fp);
+    fclose(fp);
+    if (ret != 256) {
+        AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
+        return ONLP_STATUS_E_INTERNAL;
+    }
+
+    return ONLP_STATUS_OK;
+}
+
 int
 onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
 {
     int rv;
 
+    if (port < 0 || port >= 48) {
+        return ONLP_STATUS_E_UNSUPPORTED;
+    }
+
+    int addr = (port < 24) ? 60 : 62;
+    int bus  = (addr == 60) ? 11 : 12;
+
     switch(control)
         {
         case ONLP_SFP_CONTROL_TX_DISABLE:
             {
-                if (onlp_file_write_int(value, SFP_PORT_FORMAT, SFP_BUS_INDEX(port), "sfp_tx_disable") != 0) {
+                if (onlp_file_write_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -233,12 +297,19 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 {
     int rv;
 
+    if (port < 0 || port >= 48) {
+        return ONLP_STATUS_E_UNSUPPORTED;
+    }
+
+    int addr = (port < 24) ? 60 : 62;
+    int bus  = (addr == 60) ? 11 : 12;
+
     switch(control)
         {
         case ONLP_SFP_CONTROL_RX_LOS:
             {
-                if (onlp_file_read_int(value, SFP_PORT_FORMAT, SFP_BUS_INDEX(port), "sfp_rx_los") < 0) {
-                    AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port);
+            	if (onlp_file_read_int(value, MODULE_RXLOS_FORMAT, bus, addr, (port+1)) < 0) {
+                    AIM_LOG_ERROR("Unable to read rx_loss status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
                 else {
@@ -249,7 +320,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 
         case ONLP_SFP_CONTROL_TX_FAULT:
             {
-                if (onlp_file_read_int(value, SFP_PORT_FORMAT, SFP_BUS_INDEX(port), "sfp_tx_fault") < 0) {
+            	if (onlp_file_read_int(value, MODULE_TXFAULT_FORMAT, bus, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to read tx_fault status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -261,7 +332,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
 
         case ONLP_SFP_CONTROL_TX_DISABLE:
             {
-                if (onlp_file_read_int(value, SFP_PORT_FORMAT, SFP_BUS_INDEX(port), "sfp_tx_disable") < 0) {
+            	if (onlp_file_read_int(value, MODULE_TXDISABLE_FORMAT, bus, addr, (port+1)) < 0) {
                     AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port);
                     rv = ONLP_STATUS_E_INTERNAL;
                 }
@@ -278,7 +349,6 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
     return rv;
 }
 
-
 int
 onlp_sfpi_denit(void)
 {

packages/platforms/accton/x86-64/x86-64-accton-as5916-54xk/platform-config/r1/src/python/x86_64_accton_as5916_54xk_r1/__init__.py

@@ -8,9 +8,9 @@ class OnlPlatform_x86_64_accton_as5916_54xk_r1(OnlPlatformAccton,
     SYS_OBJECT_ID=".5916.54"
 
     def baseconfig(self):
-        self.insmod("accton_i2c_cpld")
+        self.insmod('optoe')
         self.insmod("ym2651y")
-        for m in [ "sfp", "psu", "fan", "leds" ]:
+        for m in [ "cpld", "psu", "fan", "leds" ]:
             self.insmod("x86-64-accton-as5916-54xk-%s" % m)
 
         ########### initialize I2C bus 0 ###########
@@ -30,8 +30,8 @@ class OnlPlatform_x86_64_accton_as5916_54xk_r1(OnlPlatformAccton,
                 ('lm75', 0x4b, 10),
 
                 # initialize CPLDs
-                ('accton_i2c_cpld', 0x60, 11),
-                ('accton_i2c_cpld', 0x62, 12),
+                ('as5916_54xk_cpld1', 0x60, 11),
+                ('as5916_54xk_cpld2', 0x62, 12),
 
                 # initialize multiplexer (PCA9548)
                 ('pca9548', 0x74, 2),
@@ -61,12 +61,14 @@ class OnlPlatform_x86_64_accton_as5916_54xk_r1(OnlPlatformAccton,
 
         # initialize SFP devices
         for port in range(1, 49):
-            self.new_i2c_device('as5916_54xk_sfp%d' % port, 0x50, port+32)
-            self.new_i2c_device('as5916_54xk_sfp%d' % port, 0x51, port+32)
+            self.new_i2c_device('optoe2', 0x50, port+32)
 
         # initialize QSFP devices
         for port in range(49, 55):
-            self.new_i2c_device('as5916_54xk_sfp%d' % port, 0x50, port+32)
+            self.new_i2c_device('optoe1', 0x50, port+32)
+
+        for port in range(1, 55):
+            subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+32), shell=True)
 
         return True
 

packages/platforms/accton/x86-64/x86-64-accton-as5916-54xks/onlp/builds/src/module/src/sysi.c

@@ -26,6 +26,7 @@
 #include <unistd.h>
 #include <fcntl.h>
 
+#include <onlplib/i2c.h>
 #include <onlplib/file.h>
 #include <onlp/platformi/sysi.h>
 #include <onlp/platformi/ledi.h>
@@ -55,17 +56,26 @@ onlp_sysi_platform_get(void)
 int
 onlp_sysi_onie_data_get(uint8_t** data, int* size)
 {
+    int ret = ONLP_STATUS_OK;
+    int i = 0;
     uint8_t* rdata = aim_zmalloc(256);
-    if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
-        if(*size == 256) {
-            *data = rdata;
-            return ONLP_STATUS_OK;
+
+    for (i = 0; i < 128; i++) {
+        ret = onlp_i2c_readw(0, 0x56, i*2, ONLP_I2C_F_FORCE);
+        if (ret < 0) {
+            aim_free(rdata);
+            *size = 0;
+            return ret;
         }
+
+        rdata[i*2]   = ret & 0xff;
+        rdata[i*2+1] = (ret >> 8) & 0xff;
     }
 
-    aim_free(rdata);
-    *size = 0;
-    return ONLP_STATUS_E_INTERNAL;
+    *size = 256;
+    *data = rdata;
+
+    return ONLP_STATUS_OK;
 }
 
 int

packages/platforms/accton/x86-64/x86-64-accton-as5916-54xks/platform-config/r0/src/python/x86_64_accton_as5916_54xks_r0/__init__.py

@@ -54,8 +54,6 @@ class OnlPlatform_x86_64_accton_as5916_54xks_r0(OnlPlatformAccton,
                 ('pca9548', 0x75, 30),
                 ('pca9548', 0x75, 31),
 
-                # initiate IDPROM
-                ('24c02', 0x56, 0),
                 ]
             )
 

packages/platforms/accton/x86-64/x86-64-accton-as7312-54x/platform-config/r0/src/lib/x86-64-accton-as7312-54x-r0.yml

@@ -23,6 +23,8 @@ x86-64-accton-as7312-54x-r0:
     args: >-
       nopat
       console=ttyS1,115200n8
+      i2c-ismt.bus_speed=100
+      i2c-ismt.delay=100
 
   ##network
   ##  interfaces:

packages/platforms/accton/x86-64/x86-64-accton-as7312-54xs/platform-config/r0/src/lib/x86-64-accton-as7312-54xs-r0.yml

@@ -23,6 +23,8 @@ x86-64-accton-as7312-54xs-r0:
     args: >-
       nopat
       console=ttyS1,115200n8
+      i2c-ismt.bus_speed=100
+      i2c-ismt.delay=100
 
   ##network
   ##  interfaces:

packages/platforms/accton/x86-64/x86-64-accton-csp9250/modules/PKG.yml

@@ -1 +1 @@
-!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-csp9250 ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64"
+!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-csp9250 ARCH=amd64 KERNELS="onl-kernel-4.14-lts-x86-64-all:amd64"

packages/platforms/accton/x86-64/x86-64-accton-csp9250/modules/builds/x86-64-accton-csp9250-leds.c

@@ -33,10 +33,6 @@
 extern int csp9250_i2c_cpld_read (unsigned short cpld_addr, u8 reg);
 extern int csp9250_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
 
-extern void led_classdev_unregister(struct led_classdev *led_cdev);
-extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev);
-extern void led_classdev_resume(struct led_classdev *led_cdev);
-extern void led_classdev_suspend(struct led_classdev *led_cdev);
 
 #define DRVNAME "accton_csp9250_led"
 

packages/platforms/accton/x86-64/x86-64-accton-csp9250/modules/builds/x86-64-accton-csp9250-sfp.c

@@ -1005,9 +1005,8 @@ static ssize_t sfp_port_read(struct sfp_port_data *data,
                              char *buf, loff_t off, size_t count)
 {
     ssize_t retval = 0;
-    printk("acc trace %s:%d\n", __FUNCTION__, __LINE__);
+    
     if (unlikely(!count)) {
-        printk("acc trace %s:%d\n", __FUNCTION__, __LINE__);
         DEBUG_PRINT("Count = 0, return");
         return count;
     }
@@ -1017,7 +1016,6 @@ static ssize_t sfp_port_read(struct sfp_port_data *data,
      * from this host, but not from other I2C masters.
      */
     mutex_lock(&data->update_lock);
-    printk("acc trace %s:%d, off=0x%x,data->client->addr=0x%x\n", __FUNCTION__, __LINE__, off,data->client->addr);
     while (count) {
         ssize_t status;
 
@@ -1026,7 +1024,6 @@ static ssize_t sfp_port_read(struct sfp_port_data *data,
             if (retval == 0) {
                 retval = status;
             }
-            printk("acc trace %s:%d\n", __FUNCTION__, __LINE__);
             break;
         }
 
@@ -1049,13 +1046,10 @@ static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj,
     struct sfp_port_data *data;
     DEBUG_PRINT("offset = (%d), count = (%d)", off, count);
     data = dev_get_drvdata(container_of(kobj, struct device, kobj));
-    printk("acc trace %s:%d, data->port=%d\n", __FUNCTION__, __LINE__, data->port);
-    printk("offset = (%d), count = (%d)", off, count);
     present = sfp_is_port_present(data->client, data->port);
     if (IS_ERR_VALUE(present)) {
         return present;
     }
-    printk("Acc trace %s:%d, present=%d\n", __FUNCTION__, __LINE__, present);
     if (present == 0) {
         /* port is not present */
         return -ENODEV;
@@ -1331,11 +1325,6 @@ static struct i2c_driver sfp_driver = {
 
 static int __init csp9250_sfp_init(void)
 {
-    //extern int platform_accton_csp9250(void);
-    //if(!platform_accton_csp9250()) {
-     //   return -ENODEV;
-    //}
-    printk("Acc trace %s\n", __FUNCTION__);
     return i2c_add_driver(&sfp_driver);
 }
 

packages/platforms/accton/x86-64/x86-64-accton-csp9250/platform-config/r0/src/lib/x86-64-accton-csp9250-r0.yml

@@ -12,7 +12,7 @@ x86-64-accton-csp9250-r0:
     serial: >-
       console=tty0  
     kernel:
-      <<: *kernel-3-16
+      <<: *kernel-4-14
 
     args: >-
       console=tty0,

packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py

@@ -4,4 +4,4 @@ from onl.platform.base import *
 
 class OnlPlatformNetberg(OnlPlatformBase):
     MANUFACTURER='Netberg'
-    PRIVATE_ENTERPRISE_NUMBER=47294
+    PRIVATE_ENTERPRISE_NUMBER=50424

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/.gitignore

@@ -0,0 +1,2 @@
+*x86*64*netberg*aurora*420*rangeley*.mk
+onlpdump.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/Makefile

@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/modules/Makefile

@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/modules/PKG.yml

@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-420-rangeley

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/Makefile

@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/PKG.yml

@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-netberg-aurora-420-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/Makefile

@@ -0,0 +1,2 @@
+FILTER=src
+include $(ONL)/make/subdirs.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/lib/Makefile

@@ -0,0 +1,45 @@
+############################################################
+# <bsn.cl fy=2014 v=onl>
+#
+#           Copyright 2014 BigSwitch Networks, Inc.
+#
+# Licensed under the Eclipse Public License, Version 1.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+#        http://www.eclipse.org/legal/epl-v10.html
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the
+# License.
+#
+# </bsn.cl>
+############################################################
+#
+#
+############################################################
+include $(ONL)/make/config.amd64.mk
+
+MODULE := libonlp-x86-64-netberg-aurora-420-rangeley
+include $(BUILDER)/standardinit.mk
+
+DEPENDMODULES := AIM IOF x86_64_netberg_aurora_420_rangeley onlplib
+DEPENDMODULE_HEADERS := sff
+
+include $(BUILDER)/dependmodules.mk
+
+SHAREDLIB := libonlp-x86-64-netberg-aurora-420-rangeley.so
+$(SHAREDLIB)_TARGETS := $(ALL_TARGETS)
+include $(BUILDER)/so.mk
+.DEFAULT_GOAL := $(SHAREDLIB)
+
+GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc
+GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
+GLOBAL_CFLAGS += -fPIC
+GLOBAL_LINK_LIBS += -lpthread
+
+include $(BUILDER)/targets.mk
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/onlpdump/Makefile

@@ -0,0 +1,45 @@
+############################################################
+# <bsn.cl fy=2014 v=onl>
+#
+#           Copyright 2014 BigSwitch Networks, Inc.
+#
+# Licensed under the Eclipse Public License, Version 1.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+#        http://www.eclipse.org/legal/epl-v10.html
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the
+# License.
+#
+# </bsn.cl>
+############################################################
+#
+#
+#
+############################################################
+include $(ONL)/make/config.amd64.mk
+
+.DEFAULT_GOAL := onlpdump
+
+MODULE := onlpdump
+include $(BUILDER)/standardinit.mk
+
+DEPENDMODULES := AIM IOF onlp x86_64_netberg_aurora_420_rangeley onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS
+
+include $(BUILDER)/dependmodules.mk
+
+BINARY := onlpdump
+$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS)
+include $(BUILDER)/bin.mk
+
+GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main
+GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1
+GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1
+GLOBAL_LINK_LIBS += -lpthread -lm
+
+include $(BUILDER)/targets.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/.gitignore

@@ -0,0 +1 @@
+*.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/.module

@@ -0,0 +1 @@
+name: x86_64_netberg_aurora_420_rangeley

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/Makefile

@@ -0,0 +1,9 @@
+###############################################################################
+#
+#
+#
+###############################################################################
+include $(ONL)/make/config.mk
+MODULE := x86_64_netberg_aurora_420_rangeley
+AUTOMODULE := x86_64_netberg_aurora_420_rangeley
+include $(BUILDER)/definemodule.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/auto/x86_64_netberg_aurora_420_rangeley.yml

@@ -0,0 +1,119 @@
+###############################################################################
+#
+# x86_64_netberg_aurora_420_rangeley Autogeneration Definitions.
+#
+###############################################################################
+
+cdefs: &cdefs
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING:
+    doc: "Include or exclude logging."
+    default: 1
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT:
+    doc: "Default enabled log options."
+    default: AIM_LOG_OPTIONS_DEFAULT
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT:
+    doc: "Default enabled log bits."
+    default: AIM_LOG_BITS_DEFAULT
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
+    doc: "Default enabled custom log bits."
+    default: 0
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB:
+    doc: "Default all porting macros to use the C standard libraries."
+    default: 1
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
+    doc: "Include standard library headers for stdlib porting macros."
+    default: X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI:
+    doc: "Include generic uCli support."
+    default: 0
+- X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD:
+    doc: "RPM Threshold at which the fan is considered to have failed."
+    default: 3000
+
+definitions:
+  cdefs:
+    X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_HEADER:
+      defs: *cdefs
+      basename: x86_64_netberg_aurora_420_rangeley_config
+
+  enum: &enums
+
+    fan_id:
+      members:
+        - FAN1 : 1
+        - FAN2 : 2
+        - FAN3 : 3
+        - FAN4 : 4
+        - FAN5 : 5
+        - FAN6 : 6
+        - FAN7 : 7
+        - FAN8 : 8
+        - FAN9 : 9
+        - FAN10 : 10
+
+    fan_oid:
+      members:
+        - FAN1 : ONLP_FAN_ID_CREATE(1)
+        - FAN2 : ONLP_FAN_ID_CREATE(2)
+        - FAN3 : ONLP_FAN_ID_CREATE(3)
+        - FAN4 : ONLP_FAN_ID_CREATE(4)
+        - FAN5 : ONLP_FAN_ID_CREATE(5)
+        - FAN6 : ONLP_FAN_ID_CREATE(6)
+        - FAN7 : ONLP_FAN_ID_CREATE(7)
+        - FAN8 : ONLP_FAN_ID_CREATE(8)
+        - FAN9 : ONLP_FAN_ID_CREATE(9)
+        - FAN10 : ONLP_FAN_ID_CREATE(10)
+
+    psu_id:
+      members:
+        - PSU1 : 1
+        - PSU2 : 2
+
+    psu_oid:
+      members:
+        - PSU1 : ONLP_PSU_ID_CREATE(1)
+        - PSU2 : ONLP_PSU_ID_CREATE(2)
+
+    thermal_id:
+      members:
+        - THERMAL1 : 1
+        - THERMAL2 : 2
+        - THERMAL3 : 3
+        - THERMAL4 : 4
+        - THERMAL5 : 5
+        - THERMAL6 : 6
+        - THERMAL7 : 7
+
+    thermal_oid:
+      members:
+        - THERMAL1 : ONLP_THERMAL_ID_CREATE(1)
+        - THERMAL2 : ONLP_THERMAL_ID_CREATE(2)
+        - THERMAL3 : ONLP_THERMAL_ID_CREATE(3)
+        - THERMAL4 : ONLP_THERMAL_ID_CREATE(4)
+        - THERMAL5 : ONLP_THERMAL_ID_CREATE(5)
+        - THERMAL6 : ONLP_THERMAL_ID_CREATE(6)
+        - THERMAL7 : ONLP_THERMAL_ID_CREATE(7)
+
+    led_id:
+      members:
+        - STAT     : 1
+        - FAN      : 2
+        - PSU1     : 3
+        - PSU2     : 4
+
+    led_oid:
+      members:
+        - STAT     : ONLP_LED_ID_CREATE(1)
+        - FAN      : ONLP_LED_ID_CREATE(2)
+        - PSU1     : ONLP_LED_ID_CREATE(3)
+        - PSU2     : ONLP_LED_ID_CREATE(4)
+
+  portingmacro:
+    X86_64_NETBERG_AURORA_420_RANGELEY:
+      macros:
+        - memset
+        - memcpy
+        - strncpy
+        - vsnprintf
+        - snprintf
+        - strlen

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/inc/x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley.x

@@ -0,0 +1,14 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+
+/* <--auto.start.xmacro(ALL).define> */
+/* <auto.end.xmacro(ALL).define> */
+
+/* <--auto.start.xenum(ALL).define> */
+/* <auto.end.xenum(ALL).define> */
+
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/inc/x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h

@@ -0,0 +1,137 @@
+/**************************************************************************//**
+ *
+ * @file
+ * @brief x86_64_netberg_aurora_420_rangeley Configuration Header
+ *
+ * @addtogroup x86_64_netberg_aurora_420_rangeley-config
+ * @{
+ *
+ *****************************************************************************/
+#ifndef __X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_H__
+#define __X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_H__
+
+#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
+#include <global_custom_config.h>
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_INCLUDE_CUSTOM_CONFIG
+#include <x86_64_netberg_aurora_420_rangeley_custom_config.h>
+#endif
+
+/* <auto.start.cdefs(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_HEADER).header> */
+#include <AIM/aim.h>
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING
+ *
+ * Include or exclude logging. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING 1
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
+ *
+ * Default enabled log options. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT
+ *
+ * Default enabled log bits. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+ *
+ * Default enabled custom log bits. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB
+ *
+ * Default all porting macros to use the C standard libraries. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB 1
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
+ *
+ * Include standard library headers for stdlib porting macros. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI
+ *
+ * Include generic uCli support. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI 0
+#endif
+
+/**
+ * X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
+ *
+ * RPM Threshold at which the fan is considered to have failed. */
+
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
+#define X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000
+#endif
+
+
+
+/**
+ * All compile time options can be queried or displayed
+ */
+
+/** Configuration settings structure. */
+typedef struct x86_64_netberg_aurora_420_rangeley_config_settings_s {
+    /** name */
+    const char* name;
+    /** value */
+    const char* value;
+} x86_64_netberg_aurora_420_rangeley_config_settings_t;
+
+/** Configuration settings table. */
+/** x86_64_netberg_aurora_420_rangeley_config_settings table. */
+extern x86_64_netberg_aurora_420_rangeley_config_settings_t x86_64_netberg_aurora_420_rangeley_config_settings[];
+
+/**
+ * @brief Lookup a configuration setting.
+ * @param setting The name of the configuration option to lookup.
+ */
+const char* x86_64_netberg_aurora_420_rangeley_config_lookup(const char* setting);
+
+/**
+ * @brief Show the compile-time configuration.
+ * @param pvs The output stream.
+ */
+int x86_64_netberg_aurora_420_rangeley_config_show(struct aim_pvs_s* pvs);
+
+/* <auto.end.cdefs(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_HEADER).header> */
+
+#include "x86_64_netberg_aurora_420_rangeley_porting.h"
+
+#endif /* __X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_H__ */
+/* @} */

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/inc/x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_dox.h

@@ -0,0 +1,26 @@
+/**************************************************************************//**
+ *
+ * x86_64_netberg_aurora_420_rangeley Doxygen Header
+ *
+ *****************************************************************************/
+#ifndef __X86_64_NETBERG_AURORA_420_RANGELEY_DOX_H__
+#define __X86_64_NETBERG_AURORA_420_RANGELEY_DOX_H__
+
+/**
+ * @defgroup x86_64_netberg_aurora_420_rangeley x86_64_netberg_aurora_420_rangeley - x86_64_netberg_aurora_420_rangeley Description
+ *
+
+The documentation overview for this module should go here.
+
+ *
+ * @{
+ *
+ * @defgroup x86_64_netberg_aurora_420_rangeley-x86_64_netberg_aurora_420_rangeley Public Interface
+ * @defgroup x86_64_netberg_aurora_420_rangeley-config Compile Time Configuration
+ * @defgroup x86_64_netberg_aurora_420_rangeley-porting Porting Macros
+ *
+ * @}
+ *
+ */
+
+#endif /* __X86_64_NETBERG_AURORA_420_RANGELEY_DOX_H__ */

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/inc/x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_porting.h

@@ -0,0 +1,87 @@
+/**************************************************************************//**
+ *
+ * @file
+ * @brief x86_64_netberg_aurora_420_rangeley Porting Macros.
+ *
+ * @addtogroup x86_64_netberg_aurora_420_rangeley-porting
+ * @{
+ *
+ *****************************************************************************/
+#ifndef __X86_64_NETBERG_AURORA_420_RANGELEY_PORTING_H__
+#define __X86_64_NETBERG_AURORA_420_RANGELEY_PORTING_H__
+
+
+/* <auto.start.portingmacro(ALL).define> */
+#if X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdarg.h>
+#include <memory.h>
+#endif
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_MEMSET
+    #if defined(GLOBAL_MEMSET)
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_MEMSET GLOBAL_MEMSET
+    #elif X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB == 1
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_MEMSET memset
+    #else
+        #error The macro X86_64_NETBERG_AURORA_420_RANGELEY_MEMSET is required but cannot be defined.
+    #endif
+#endif
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_MEMCPY
+    #if defined(GLOBAL_MEMCPY)
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_MEMCPY GLOBAL_MEMCPY
+    #elif X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB == 1
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_MEMCPY memcpy
+    #else
+        #error The macro X86_64_NETBERG_AURORA_420_RANGELEY_MEMCPY is required but cannot be defined.
+    #endif
+#endif
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_STRNCPY
+    #if defined(GLOBAL_STRNCPY)
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_STRNCPY GLOBAL_STRNCPY
+    #elif X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB == 1
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_STRNCPY strncpy
+    #else
+        #error The macro X86_64_NETBERG_AURORA_420_RANGELEY_STRNCPY is required but cannot be defined.
+    #endif
+#endif
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_VSNPRINTF
+    #if defined(GLOBAL_VSNPRINTF)
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF
+    #elif X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB == 1
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_VSNPRINTF vsnprintf
+    #else
+        #error The macro X86_64_NETBERG_AURORA_420_RANGELEY_VSNPRINTF is required but cannot be defined.
+    #endif
+#endif
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_SNPRINTF
+    #if defined(GLOBAL_SNPRINTF)
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_SNPRINTF GLOBAL_SNPRINTF
+    #elif X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB == 1
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_SNPRINTF snprintf
+    #else
+        #error The macro X86_64_NETBERG_AURORA_420_RANGELEY_SNPRINTF is required but cannot be defined.
+    #endif
+#endif
+
+#ifndef X86_64_NETBERG_AURORA_420_RANGELEY_STRLEN
+    #if defined(GLOBAL_STRLEN)
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_STRLEN GLOBAL_STRLEN
+    #elif X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB == 1
+        #define X86_64_NETBERG_AURORA_420_RANGELEY_STRLEN strlen
+    #else
+        #error The macro X86_64_NETBERG_AURORA_420_RANGELEY_STRLEN is required but cannot be defined.
+    #endif
+#endif
+
+/* <auto.end.portingmacro(ALL).define> */
+
+
+#endif /* __X86_64_NETBERG_AURORA_420_RANGELEY_PORTING_H__ */
+/* @} */

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/make.mk

@@ -0,0 +1,10 @@
+###############################################################################
+#
+# 
+#
+###############################################################################
+THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+x86_64_netberg_aurora_420_rangeley_INCLUDES := -I $(THIS_DIR)inc
+x86_64_netberg_aurora_420_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src
+x86_64_netberg_aurora_420_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_netberg_aurora_420_rangeley ucli:x86_64_netberg_aurora_420_rangeley
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/Makefile

@@ -0,0 +1,9 @@
+###############################################################################
+#
+# Local source generation targets.
+#
+###############################################################################
+
+ucli:
+	@../../../../tools/uclihandlers.py x86_64_netberg_aurora_420_rangeley_ucli.c
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/fani.c

@@ -0,0 +1,234 @@
+/************************************************************
+ * <bsn.cl fy=2014 v=onl>
+ *
+ *           Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ *        http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ * </bsn.cl>
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+#include <onlp/platformi/fani.h>
+
+#include "x86_64_netberg_aurora_420_rangeley_int.h"
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+
+#include <onlplib/file.h>
+
+
+#define VALIDATE(_id)                           \
+    do {                                        \
+        if(!ONLP_OID_IS_FAN(_id)) {             \
+            return ONLP_STATUS_E_INVALID;       \
+        }                                       \
+    } while(0)
+
+static int
+sys_fan_info_get__(onlp_fan_info_t* info, int id)
+{
+    int value = 0;
+    int rv;
+
+    rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_abs", ((id/2)+1));
+    if (rv != ONLP_STATUS_OK)
+        return rv;
+
+    if (value == 0)
+    {
+        info->status = ONLP_FAN_STATUS_FAILED;
+    }
+    else
+    {
+        info->status = ONLP_FAN_STATUS_PRESENT;
+
+        rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_dir", ((id/2)+1));
+        if (rv != ONLP_STATUS_OK)
+            return rv;
+
+        if (value == 1)
+        {
+            info->status |= ONLP_FAN_STATUS_B2F;
+            info->caps |= ONLP_FAN_CAPS_B2F;
+        }
+        else
+        {
+            info->status |= ONLP_FAN_STATUS_F2B;
+            info->caps |= ONLP_FAN_CAPS_F2B;
+        }
+
+        rv = onlp_file_read_int(&(info->rpm), SYS_HWMON1_PREFIX "/fan%d_rpm", (id+1));
+        if (rv == ONLP_STATUS_E_INTERNAL)
+            return rv;
+
+        if (rv == ONLP_STATUS_E_MISSING)
+        {
+            info->status &= ~1;
+            return 0;
+        }
+
+        if (info->rpm <= X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD)
+            info->status |= ONLP_FAN_STATUS_FAILED;
+
+
+        rv = onlp_file_read_int(&(info->percentage), SYS_HWMON1_PREFIX "/fan%d_duty", (id+1));
+        if (rv == ONLP_STATUS_E_INTERNAL)
+            return rv;
+
+        if (rv == ONLP_STATUS_E_MISSING)
+        {
+            info->status &= ~1;
+            return 0;
+        }
+    }
+    return 0;
+}
+
+static int
+psu_fan_info_get__(onlp_fan_info_t* info, int id)
+{
+    return onlp_file_read_int(&(info->rpm), SYS_HWMON2_PREFIX "/psu%d_fan_speed", id);
+}
+
+/* Onboard Fans */
+static onlp_fan_info_t fans__[] = {
+    { }, /* Not used */
+    { { FAN_OID_FAN1,  "Fan1_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN2,  "Fan1_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN3,  "Fan2_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN4,  "Fan2_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN5,  "Fan3_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN6,  "Fan3_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN7,  "Fan4_rotor1", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN8,  "Fan4_rotor2", 0}, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN9,  "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
+    { { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT },
+};
+
+/*
+ * This function will be called prior to all of onlp_fani_* functions.
+ */
+int
+onlp_fani_init(void)
+{
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
+{
+    int fid;
+
+    VALIDATE(id);
+
+    memset(info, 0, sizeof(onlp_fan_info_t));
+    fid = ONLP_OID_ID_GET(id);
+    *info = fans__[fid];
+
+    info->caps |= ONLP_FAN_CAPS_GET_RPM;
+
+    switch(fid)
+    {
+        case FAN_ID_FAN1:
+        case FAN_ID_FAN2:
+        case FAN_ID_FAN3:
+        case FAN_ID_FAN4:
+        case FAN_ID_FAN5:
+        case FAN_ID_FAN6:
+        case FAN_ID_FAN7:
+        case FAN_ID_FAN8:
+          return sys_fan_info_get__(info, (fid - 1));
+          break;
+
+        case FAN_ID_FAN9:
+        case FAN_ID_FAN10:
+          return psu_fan_info_get__(info, (fid - FAN_ID_FAN9 + 1));
+          break;
+
+        default:
+          return ONLP_STATUS_E_INVALID;
+          break;
+  }
+
+  return ONLP_STATUS_E_INVALID;
+}
+
+/*
+ * This function sets the speed of the given fan in RPM.
+ *
+ * This function will only be called if the fan supprots the RPM_SET
+ * capability.
+ *
+ * It is optional if you have no fans at all with this feature.
+ */
+int
+onlp_fani_rpm_set(onlp_oid_t id, int rpm)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+
+/*
+ * This function sets the fan speed of the given OID as a percentage.
+ *
+ * This will only be called if the OID has the PERCENTAGE_SET
+ * capability.
+ *
+ * It is optional if you have no fans at all with this feature.
+ */
+int
+onlp_fani_percentage_set(onlp_oid_t id, int p)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * This function sets the fan speed of the given OID as per
+ * the predefined ONLP fan speed modes: off, slow, normal, fast, max.
+ *
+ * Interpretation of these modes is up to the platform.
+ *
+ */
+int
+onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * This function sets the fan direction of the given OID.
+ *
+ * This function is only relevant if the fan OID supports both direction
+ * capabilities.
+ *
+ * This function is optional unless the functionality is available.
+ */
+int
+onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * Generic fan ioctl. Optional.
+ */
+int
+onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/ledi.c

@@ -0,0 +1,221 @@
+/************************************************************
+ * <bsn.cl fy=2014 v=onl>
+ *
+ *           Copyright 2014 Big Switch Networks, Inc.
+ *           Copyright 2013 Accton Technology Corporation.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ *        http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ * </bsn.cl>
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include <onlp/platformi/ledi.h>
+#include <onlplib/file.h>
+#include "x86_64_netberg_aurora_420_rangeley_int.h"
+
+#define VALIDATE(_id)                           \
+    do {                                        \
+        if(!ONLP_OID_IS_LED(_id)) {             \
+            return ONLP_STATUS_E_INVALID;       \
+        }                                       \
+    } while(0)
+
+/* LED related data
+ */
+enum led_light_mode { /*must be the same with the definition @ kernel driver */
+    LED_MODE_OFF = 0,
+    LED_MODE_AMBER,
+    LED_MODE_GREEN,
+};
+
+int led_light_map_mode[][2] =
+{
+    {LED_MODE_OFF,         ONLP_LED_MODE_OFF},
+    {LED_MODE_AMBER,       ONLP_LED_MODE_ORANGE},
+    {LED_MODE_GREEN,       ONLP_LED_MODE_GREEN},
+};
+
+/*
+ * Get the information for the given LED OID.
+ */
+static onlp_led_info_t linfo[] =
+{
+    { }, /* Not used */
+    {
+        { LED_OID_LED1, "Chassis LED 1 (STAT LED)", 0 },
+          ONLP_LED_STATUS_PRESENT,
+          ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
+          ONLP_LED_MODE_OFF,
+    },
+    {
+        { LED_OID_LED2, "Chassis LED 2 (FAN LED)", 0 },
+          ONLP_LED_STATUS_PRESENT,
+          ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
+          ONLP_LED_MODE_OFF,
+    },
+    {
+        { LED_OID_LED3, "Chassis LED 3 (PSU1 LED)", 0 },
+          ONLP_LED_STATUS_PRESENT,
+          ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
+          ONLP_LED_MODE_OFF,
+    },
+    {
+        { LED_OID_LED4, "Chassis LED 4 (PSU2 LED)", 0 },
+          ONLP_LED_STATUS_PRESENT,
+          ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN,
+          ONLP_LED_MODE_OFF,
+    },
+};
+
+static int conver_led_light_mode_to_driver(int led_ligth_mode)
+{
+    int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]);
+    for(i=0; i<nsize; i++)
+    {
+        if (led_ligth_mode == led_light_map_mode[i][1])
+        {
+            return led_light_map_mode[i][0];
+        }
+    }
+    return 0;
+}
+
+static int conver_driver_to_led_light_mode(int driver_mode)
+{
+    int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]);
+    for(i=0; i<nsize; i++)
+    {
+        if (driver_mode == led_light_map_mode[i][0])
+        {
+            return led_light_map_mode[i][1];
+        }
+    }
+    return 0;
+}
+
+/*
+ * This function will be called prior to any other onlp_ledi_* functions.
+ */
+int
+onlp_ledi_init(void)
+{
+    /*
+     * Turn on the STAT LEDs at startup
+     */
+    onlp_ledi_mode_set(LED_OID_LED1, ONLP_LED_MODE_GREEN);
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
+{
+    const char *file;
+    int  local_id;
+    int value = 0;
+    int rv;
+
+    VALIDATE(id);
+
+    local_id = ONLP_OID_ID_GET(id);
+    switch(local_id)
+    {
+        case LED_ID_LED1: /* STAT LED */
+            file = "system_led";
+            break;
+        case LED_ID_LED2: /* FAN LED */
+            file = "fan_led";
+            break;
+        case LED_ID_LED3: /* PSU1 LED */
+            file = "psu1_led";
+            break;
+        case LED_ID_LED4: /* PSU2 LED */
+            file = "psu2_led";
+            break;
+        default:
+            return ONLP_STATUS_E_INVALID;
+    }
+
+    rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/%s", file);
+    if (rv != ONLP_STATUS_OK)
+        return rv;
+
+    *info = linfo[local_id];
+    linfo[local_id].mode = conver_driver_to_led_light_mode(value);
+
+    return ONLP_STATUS_OK;
+}
+
+/*
+ * Turn an LED on or off.
+ *
+ * This function will only be called if the LED OID supports the ONOFF
+ * capability.
+ *
+ * What 'on' means in terms of colors or modes for multimode LEDs is
+ * up to the platform to decide. This is intended as baseline toggle mechanism.
+ */
+int
+onlp_ledi_set(onlp_oid_t id, int on_or_off)
+{
+    VALIDATE(id);
+
+    if (!on_or_off)
+        return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
+
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * This function puts the LED into the given mode. It is a more functional
+ * interface for multimode LEDs.
+ *
+ * Only modes reported in the LED's capabilities will be attempted.
+ */
+int
+onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
+{
+    int  local_id;
+
+    VALIDATE(id);
+
+    local_id = ONLP_OID_ID_GET(id);
+    switch(local_id)
+    {
+        case LED_ID_LED1:
+          linfo[local_id].status = ONLP_LED_STATUS_PRESENT;
+          if (mode != ONLP_LED_MODE_OFF)
+              linfo[local_id].status |= ONLP_LED_STATUS_ON;
+          linfo[local_id].mode = mode;
+          return onlp_file_write_int(conver_led_light_mode_to_driver(mode), SYS_HWMON2_PREFIX "/system_led");
+          break;
+
+        default:
+          return ONLP_STATUS_E_INVALID;
+          break;
+    }
+    return ONLP_STATUS_E_INVALID;
+}
+
+/*
+ * Generic LED ioctl interface.
+ */
+int
+onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/make.mk

@@ -0,0 +1,9 @@
+###############################################################################
+#
+# 
+#
+###############################################################################
+
+LIBRARY := x86_64_netberg_aurora_420_rangeley
+$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
+include $(BUILDER)/lib.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/psui.c

@@ -0,0 +1,201 @@
+/************************************************************
+ * <bsn.cl fy=2014 v=onl>
+ * </bsn.cl>
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+#include <onlp/platformi/psui.h>
+#include <onlplib/file.h>
+#include "x86_64_netberg_aurora_420_rangeley_int.h"
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+
+#define VALIDATE(_id)                           \
+    do {                                        \
+        if(!ONLP_OID_IS_PSU(_id)) {             \
+            return ONLP_STATUS_E_INVALID;       \
+        }                                       \
+    } while(0)
+
+static onlp_psu_info_t psus__[] = {
+    { }, /* Not used */
+    {
+        {
+            PSU_OID_PSU1,
+            "PSU-1",
+            0,
+            {
+                FAN_OID_FAN9,
+            },
+        }
+    },
+    {
+        {
+            PSU_OID_PSU2,
+            "PSU-2",
+            0,
+            {
+                FAN_OID_FAN10,
+            },
+        }
+    },
+};
+
+/*
+ * This function will be called prior to any other onlp_psui functions.
+ */
+int
+onlp_psui_init(void)
+{
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
+{
+    int rv;
+    int pid;
+    uint8_t data[256];
+    int value = -1;
+    int len;
+    double dvalue;
+    int i;
+
+    VALIDATE(id);
+
+    memset(info, 0, sizeof(onlp_psu_info_t));
+    pid = ONLP_OID_ID_GET(id);
+    *info = psus__[pid];
+
+    rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_abs", pid);
+    if (rv != ONLP_STATUS_OK)
+        return rv;
+    if (value == 0)
+    {
+        info->status = ONLP_PSU_STATUS_UNPLUGGED;
+        return ONLP_STATUS_OK;
+    }
+
+    /* PSU is present. */
+    info->status = ONLP_PSU_STATUS_PRESENT;
+
+    memset(data, 0, sizeof(data));
+    rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid);
+    if (rv == ONLP_STATUS_OK)
+    {
+        i = 11;
+
+        /* Manufacturer Name */
+        len = (data[i]&0x0f);
+        i++;
+        i += len;
+
+        /* Product Name */
+        len = (data[i]&0x0f);
+        i++;
+        memcpy(info->model, (char *) &(data[i]), len);
+        i += len;
+
+        /* Product part,model number */
+        len = (data[i]&0x0f);
+        i++;
+        i += len;
+
+        /* Product Version */
+        len = (data[i]&0x0f);
+        i++;
+        i += len;
+
+        /* Product Serial Number */
+        len = (data[i]&0x0f);
+        i++;
+        memcpy(info->serial, (char *) &(data[i]), len);
+    }
+    else
+    {
+        strcpy(info->model, "Missing");
+        strcpy(info->serial, "Missing");
+    }
+
+    info->caps |= ONLP_PSU_CAPS_AC;
+
+#if 0
+    /* PSU is powered. */
+    rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_pg", pid);
+    if (rv != ONLP_STATUS_OK)
+        return rv;
+    if (value == 0)
+    {
+        info->status |=  ONLP_PSU_STATUS_FAILED;
+        return ONLP_STATUS_OK;
+    }
+#endif
+
+    memset(data, 0, sizeof(data));
+    rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid);
+    if (rv == ONLP_STATUS_OK)
+    {
+        dvalue = atof((const char *)data);
+        if (dvalue > 0.0)
+        {
+            info->caps |= ONLP_PSU_CAPS_IOUT;
+            info->miout = (int)(dvalue * 1000);
+        }
+    }
+
+    memset(data, 0, sizeof(data));
+    rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid);
+    if (rv == ONLP_STATUS_OK)
+    {
+        dvalue = atof((const char *)data);
+        if (dvalue > 0.0)
+        {
+            info->caps |= ONLP_PSU_CAPS_VOUT;
+            info->mvout = (int)(dvalue * 1000);
+        }
+    }
+
+    memset(data, 0, sizeof(data));
+    rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid);
+    if (rv == ONLP_STATUS_OK)
+    {
+        dvalue = atof((const char *)data);
+        if (dvalue > 0.0)
+        {
+            info->caps |= ONLP_PSU_CAPS_PIN;
+            info->mpin = (int)(dvalue * 1000);
+        }
+    }
+
+    memset(data, 0, sizeof(data));
+    rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid);
+    if (rv == ONLP_STATUS_OK)
+    {
+        dvalue = atof((const char *)data);
+        if (dvalue > 0.0)
+        {
+            info->caps |= ONLP_PSU_CAPS_POUT;
+            info->mpout = (int)(dvalue * 1000);
+        }
+    }
+
+    return ONLP_STATUS_OK;
+}
+
+/*
+ * This is an optional generic ioctl() interface.
+ * Its purpose is to allow future expansion and
+ * custom functionality that is not otherwise exposed
+ * in the standard interface.
+ *
+ * The semantics of this function are platform specific.
+ * This function is completely optional.
+ */
+int
+onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/sfpi.c

@@ -0,0 +1,451 @@
+/************************************************************
+ * <bsn.cl fy=2014 v=onl>
+ *
+ *           Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ *        http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ * </bsn.cl>
+ ************************************************************
+ *
+ * SFPI Interface for the Aurora 420 Platform
+ *
+ ***********************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+#include <onlp/oids.h>
+#include <onlp/platformi/sfpi.h>
+#include <onlplib/file.h>
+#include <onlplib/sfp.h>
+#include "x86_64_netberg_aurora_420_rangeley_int.h"
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+
+#include <unistd.h>
+#include <fcntl.h>
+
+/* Model ID Definition */
+typedef enum
+{
+    HURACAN_WITH_BMC = 0x0,
+    HURACAN_WITHOUT_BMC,
+    CABRERAIII_WITH_BMC,
+    CABRERAIII_WITHOUT_BMC,
+    SESTO_WITH_BMC,
+    SESTO_WITHOUT_BMC,
+    NCIIX_WITH_BMC,
+    NCIIX_WITHOUT_BMC,
+    ASTERION_WITH_BMC,
+    ASTERION_WITHOUT_BMC,
+    HURACAN_A_WITH_BMC,
+    HURACAN_A_WITHOUT_BMC,
+
+    MODEL_ID_LAST
+} modelId_t;
+
+static int
+onlp_board_model_id_get(void)
+{
+    static int board_model_id = MODEL_ID_LAST;
+
+    if (board_model_id == MODEL_ID_LAST)
+    {
+        if (onlp_file_read_int(&board_model_id, SYS_HWMON1_PREFIX "/board_model_id") != ONLP_STATUS_OK)
+            return 0;
+    }
+
+    return board_model_id;
+}
+
+/*
+ * This function will be called prior to all other onlp_sfpi_* functions.
+ */
+int
+onlp_sfpi_init(void)
+{
+    return ONLP_STATUS_OK;
+}
+
+/*
+ * This function should populate the give bitmap with
+ * all valid, SFP-capable port numbers.
+ *
+ * Only port numbers in this bitmap will be queried by the the
+ * ONLP framework.
+ *
+ * No SFPI functions will be called with ports that are
+ * not in this bitmap. You can ignore all error checking
+ * on the incoming ports defined in this interface.
+ */
+int
+onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
+{
+    int p;
+    int total_port = 0;
+    int board_model_id = onlp_board_model_id_get();
+
+    switch (board_model_id)
+    {
+        case HURACAN_WITH_BMC:
+        case HURACAN_WITHOUT_BMC:
+        case HURACAN_A_WITH_BMC:
+        case HURACAN_A_WITHOUT_BMC:
+            total_port = 32;
+            break;
+
+        case SESTO_WITH_BMC:
+        case SESTO_WITHOUT_BMC:
+        case NCIIX_WITH_BMC:
+        case NCIIX_WITHOUT_BMC:
+            total_port = 54;
+            break;
+
+        case ASTERION_WITH_BMC:
+        case ASTERION_WITHOUT_BMC:
+            total_port = 64;
+            break;
+
+        default:
+            break;
+    }
+
+    AIM_BITMAP_CLR_ALL(bmap);
+    for(p = 0; p < total_port; p++)
+        AIM_BITMAP_SET(bmap, p);
+
+    return ONLP_STATUS_OK;
+}
+
+/*
+ * This function should return whether an SFP is inserted on the given
+ * port.
+ *
+ * Returns 1 if the SFP is present.
+ * Returns 0 if the SFP is not present.
+ * Returns ONLP_E_* if there was an error determining the status.
+ */
+int
+onlp_sfpi_is_present(int port)
+{
+    int value = 0;
+
+    onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/port_%d_abs", (port+1));
+    return value;
+}
+
+int
+onlp_sfpi_port_map(int port, int* rport)
+{
+    int board_model_id = onlp_board_model_id_get();
+
+    switch (board_model_id)
+    {
+        case HURACAN_WITH_BMC:
+        case HURACAN_WITHOUT_BMC:
+        case HURACAN_A_WITH_BMC:
+        case HURACAN_A_WITHOUT_BMC:
+            /* odd <=> even */
+            if (port & 0x1)
+                *rport = (port - 1);
+            else
+                *rport = (port + 1);
+            break;
+
+        default:
+            *rport = port; break;
+    }
+
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+int
+onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* bmap)
+{
+    int p;
+    int total_port = 0;
+    int board_model_id = onlp_board_model_id_get();
+
+    switch (board_model_id)
+    {
+        case HURACAN_WITH_BMC:
+        case HURACAN_WITHOUT_BMC:
+        case HURACAN_A_WITH_BMC:
+        case HURACAN_A_WITHOUT_BMC:
+            total_port = 32;
+            break;
+
+        case SESTO_WITH_BMC:
+        case SESTO_WITHOUT_BMC:
+        case NCIIX_WITH_BMC:
+        case NCIIX_WITHOUT_BMC:
+            total_port = 54;
+            break;
+
+        case ASTERION_WITH_BMC:
+        case ASTERION_WITHOUT_BMC:
+            total_port = 64;
+            break;
+
+        default:
+            break;
+    }
+
+    AIM_BITMAP_CLR_ALL(bmap);
+    for(p = 0; p < total_port; p++)
+        AIM_BITMAP_SET(bmap, p);
+
+    return ONLP_STATUS_OK;
+}
+
+/*
+ * This function reads the SFPs idrom and returns in
+ * in the data buffer provided.
+ */
+int
+onlp_sfpi_eeprom_read(int port, uint8_t data[256])
+{
+    int rv = ONLP_STATUS_OK;
+    char fname[128];
+
+    memset(data, 0, 256);
+    memset(fname, 0, sizeof(fname));
+    sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a0", (port+1));
+    rv = onlplib_sfp_eeprom_read_file(fname, data);
+    if (rv != ONLP_STATUS_OK)
+        AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
+
+    return rv;
+}
+
+int
+onlp_sfpi_dom_read(int port, uint8_t data[256])
+{
+    int rv = ONLP_STATUS_OK;
+    char fname[128];
+
+    memset(data, 0, 256);
+    memset(fname, 0, sizeof(fname));
+    sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a2", (port+1));
+    rv = onlplib_sfp_eeprom_read_file(fname, data);
+    if (rv != ONLP_STATUS_OK)
+        AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
+
+    return rv;
+}
+
+/*
+ * Manually enable or disable the given SFP.
+ *
+ */
+int
+onlp_sfpi_enable_set(int port, int enable)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * Returns whether the SFP is currently enabled or disabled.
+ */
+int
+onlp_sfpi_enable_get(int port, int* enable)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * If the platform requires any setup or equalizer modifications
+ * based on the actual SFP that was inserted then that custom
+ * setup should be performed here.
+ *
+ * After a new SFP is detected by the ONLP framework this
+ * function will be called to perform the (optional) setup.
+ */
+int
+onlp_sfpi_post_insert(int port, sff_info_t* sff_info)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * Return the current status of the SFP.
+ * See onlp_sfp_status_t;
+ */
+int
+onlp_sfpi_status_get(int port, uint32_t* status)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+int onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* supported)
+{
+    if (supported == NULL)
+        return ONLP_STATUS_E_PARAM;
+
+    *supported = 0;
+    switch (control)
+    {
+        case ONLP_SFP_CONTROL_TX_DISABLE:
+        case ONLP_SFP_CONTROL_RX_LOS:
+        case ONLP_SFP_CONTROL_TX_FAULT:
+        {
+            int board_model_id = onlp_board_model_id_get();
+
+            switch (board_model_id)
+            {
+                case HURACAN_WITH_BMC:
+                case HURACAN_WITHOUT_BMC:
+                case HURACAN_A_WITH_BMC:
+                case HURACAN_A_WITHOUT_BMC:
+                case SESTO_WITH_BMC:
+                case SESTO_WITHOUT_BMC:
+                case NCIIX_WITH_BMC:
+                case NCIIX_WITHOUT_BMC:
+                case ASTERION_WITH_BMC:
+                case ASTERION_WITHOUT_BMC:
+                    *supported = 1;
+                    break;
+
+                default:
+                    break;
+            }
+        }
+            break;
+
+        default:
+            break;
+    }
+
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
+{
+    int rv = ONLP_STATUS_OK;
+    int supported = 0;
+
+    if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0))
+        return ONLP_STATUS_E_UNSUPPORTED;
+
+    switch (control)
+    {
+        case ONLP_SFP_CONTROL_TX_DISABLE:
+            rv = onlp_file_write_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1));
+            break;
+
+        default:
+            rv = ONLP_STATUS_E_UNSUPPORTED;
+            break;
+    }
+    return rv;
+}
+
+int
+onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
+{
+    int rv = ONLP_STATUS_OK;
+    int supported = 0;
+
+    if (value == NULL)
+        return ONLP_STATUS_E_PARAM;
+
+    if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0))
+        return ONLP_STATUS_E_UNSUPPORTED;
+
+    *value = 0;
+    switch (control)
+    {
+        case ONLP_SFP_CONTROL_RX_LOS:
+            rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_rxlos", (port+1));
+            break;
+
+        case ONLP_SFP_CONTROL_TX_DISABLE:
+            rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1));
+            break;
+
+        case ONLP_SFP_CONTROL_TX_FAULT:
+            rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_fault", (port+1));
+            break;
+
+        default:
+            rv = ONLP_STATUS_E_UNSUPPORTED;
+            break;
+    }
+    return rv;
+}
+
+int
+onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
+{
+    int value = 0;
+    char fname[128];
+    char data[512];
+
+    memset(data, 0, 512);
+    memset(fname, 0, sizeof(fname));
+    sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_sfp_copper", (port+1));
+
+    int fd = open(fname, O_RDONLY);
+    if (fd < 0) {
+        AIM_LOG_INFO("Unable to read devaddr(0xAC) from port(%d)\r\n", port);
+        return value;
+    }
+
+    int nrd = read(fd, data, 512);
+    close(fd);
+
+    if (nrd != 512) {
+        AIM_LOG_INTERNAL("Failed to read EEPROM file '%s'", fname);
+        return value;
+    }
+
+    value = (((data[addr*2 + 1] & 0xff) << 8) | (data[addr*2] & 0xff)) & 0xffff;
+
+    return value;
+}
+
+int
+onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
+{
+    int rv = ONLP_STATUS_OK;
+    int data = 0;
+
+    data = ((addr << 16) | (value & 0xffff)) & 0x00ffffff;
+    rv = onlp_file_write_int(data, SYS_HWMON2_PREFIX "/port_%d_sfp_copper", (port+1));
+
+    return rv;
+}
+
+/*
+ * This is a generic ioctl interface.
+ */
+int
+onlp_sfpi_ioctl(int port, va_list vargs)
+{
+    return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * De-initialize the SFPI subsystem.
+ */
+int
+onlp_sfpi_denit(void)
+{
+    return ONLP_STATUS_OK;
+}
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/sysi.c

@@ -0,0 +1,98 @@
+/************************************************************
+ * <bsn.cl fy=2014 v=onl>
+ * </bsn.cl>
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include <onlp/platformi/sysi.h>
+#include <onlplib/file.h>
+#include "x86_64_netberg_aurora_420_rangeley_int.h"
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+
+/*
+ * This is the first function called by the ONLP framework.
+ *
+ * It should return the name of your platform driver.
+ *
+ * If the name of your platform driver is the same as the
+ * current platform then this driver will be used.
+ *
+ * If the name of the driver is different from the current
+ * platform, or the driver is capable of supporting multiple
+ * platform variants, see onlp_sysi_platform_set() below.
+ */
+const char*
+onlp_sysi_platform_get(void)
+{
+    return "x86-64-netberg-aurora-420-rangeley-r0";
+}
+
+/*
+ * This is the first function the ONLP framework will call
+ * after it has validated the the platform is supported using the mechanisms
+ * described above.
+ *
+ * If this function does not return ONL_STATUS_OK
+ * then platform initialization is aborted.
+ */
+int
+onlp_sysi_init(void)
+{
+    return ONLP_STATUS_OK;
+}
+
+int
+onlp_sysi_onie_info_get(onlp_onie_info_t* onie)
+{
+    int rv;
+    uint8_t data[256];
+    int len;
+
+    memset(data, 0, sizeof(data));
+    rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/eeprom");
+    if (rv == ONLP_STATUS_OK)
+    {
+        rv = onlp_onie_decode(onie, (uint8_t*)data, sizeof(data));
+        if(rv >= 0)
+        {
+            onie->platform_name = aim_strdup("x86-64-netberg-aurora-420-rangeley-r0");
+        }
+    }
+    return rv;
+}
+
+int
+onlp_sysi_oids_get(onlp_oid_t* table, int max)
+{
+    onlp_oid_t* e = table;
+    memset(table, 0, max*sizeof(onlp_oid_t));
+    int i;
+    int n_thermal=7, n_fan=10, n_led=4;
+
+     /* 2 PSUs */
+    *e++ = ONLP_PSU_ID_CREATE(1);
+    *e++ = ONLP_PSU_ID_CREATE(2);
+
+    /* LEDs Item */
+    for (i=1; i<=n_led; i++)
+    {
+        *e++ = ONLP_LED_ID_CREATE(i);
+    }
+
+     /* THERMALs Item */
+    for (i=1; i<=n_thermal; i++)
+    {
+        *e++ = ONLP_THERMAL_ID_CREATE(i);
+    }
+
+    /* Fans Item */
+    for (i=1; i<=n_fan; i++)
+    {
+        *e++ = ONLP_FAN_ID_CREATE(i);
+    }
+
+    return 0;
+}
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/thermali.c

@@ -0,0 +1,173 @@
+/************************************************************
+ * <bsn.cl fy=2014 v=onl>
+ *
+ *           Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ *        http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ * </bsn.cl>
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include <onlp/platformi/thermali.h>
+#include <onlplib/file.h>
+#include "x86_64_netberg_aurora_420_rangeley_int.h"
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+
+#define VALIDATE(_id)                           \
+    do {                                        \
+        if(!ONLP_OID_IS_THERMAL(_id)) {         \
+            return ONLP_STATUS_E_INVALID;       \
+        }                                       \
+    } while(0)
+
+static int
+sys_thermal_info_get__(onlp_thermal_info_t* info, int id)
+{
+    int rv;
+
+    if (id == THERMAL_ID_THERMAL3)
+    {
+        rv = onlp_file_read_int(&info->mcelsius, SYS_HWMON1_PREFIX "/mac_temp");
+        info->mcelsius *= 1000;
+    }
+    else
+    {
+        uint8_t buffer[64];
+        double dvalue;
+        int len;
+
+        memset(buffer, 0, sizeof(buffer));
+        rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON1_PREFIX "/remote_temp%d", id);
+        if (rv == ONLP_STATUS_OK)
+        {
+            dvalue = atof((const char *)buffer);
+            info->mcelsius = (int)(dvalue * 1000);
+        }
+    }
+
+    if(rv == ONLP_STATUS_E_INTERNAL)
+        return rv;
+
+    if(rv == ONLP_STATUS_E_MISSING)
+    {
+        info->status &= ~(ONLP_THERMAL_STATUS_PRESENT);
+        return ONLP_STATUS_OK;
+    }
+
+    return ONLP_STATUS_OK;
+}
+
+static int
+psu1_thermal_info_get__(onlp_thermal_info_t* info, int id)
+{
+    int rv;
+    uint8_t buffer[64];
+    double dvalue;
+    int len;
+
+    memset(buffer, 0, sizeof(buffer));
+    rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu1_temp_%d", id);
+    if (rv == ONLP_STATUS_OK)
+    {
+        dvalue = atof((const char *)buffer);
+        info->mcelsius = (int)(dvalue * 1000);
+    }
+    return rv;
+}
+
+static int
+psu2_thermal_info_get__(onlp_thermal_info_t* info, int id)
+{
+    int rv;
+    uint8_t buffer[64];
+    double dvalue;
+    int len;
+
+    memset(buffer, 0, sizeof(buffer));
+    rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu2_temp_%d", id);
+    if (rv == ONLP_STATUS_OK)
+    {
+        dvalue = atof((const char *)buffer);
+        info->mcelsius = (int)(dvalue * 1000);
+    }
+    return rv;
+}
+
+static onlp_thermal_info_t temps__[] =
+{
+    { }, /* Not used */
+    { { THERMAL_OID_THERMAL1,  "Chassis Thermal 1 (Front of MAC)",  0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+    { { THERMAL_OID_THERMAL2,  "Chassis Thermal 2 (Rear of MAC)",  0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+    { { THERMAL_OID_THERMAL3,  "Chassis Thermal 3 (MAC)",  0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+
+    { { THERMAL_OID_THERMAL4, "PSU-1 Thermal 1", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+    { { THERMAL_OID_THERMAL5, "PSU-1 Thermal 2", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+
+    { { THERMAL_OID_THERMAL6, "PSU-2 Thermal 1", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+    { { THERMAL_OID_THERMAL7, "PSU-2 Thermal 2", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0},
+};
+
+
+/*
+ * This will be called to intiialize the thermali subsystem.
+ */
+int
+onlp_thermali_init(void)
+{
+    return ONLP_STATUS_OK;
+}
+
+/*
+ * Retrieve the information structure for the given thermal OID.
+ *
+ * If the OID is invalid, return ONLP_E_STATUS_INVALID.
+ * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
+ * Otherwise, return ONLP_STATUS_OK with the OID's information.
+ *
+ * Note -- it is expected that you fill out the information
+ * structure even if the sensor described by the OID is not present.
+ */
+int
+onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
+{
+    int tid;
+
+    VALIDATE(id);
+
+    memset(info, 0, sizeof(onlp_thermal_info_t));
+    tid = ONLP_OID_ID_GET(id);
+    *info = temps__[tid];
+
+    switch(tid)
+    {
+        case THERMAL_ID_THERMAL1:
+        case THERMAL_ID_THERMAL2:
+        case THERMAL_ID_THERMAL3:
+            return sys_thermal_info_get__(info, tid);
+
+        case THERMAL_ID_THERMAL4:
+        case THERMAL_ID_THERMAL5:
+            return psu1_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL4 + 1));
+
+        case THERMAL_ID_THERMAL6:
+        case THERMAL_ID_THERMAL7:
+            return psu2_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL6 + 1));
+    }
+
+    return ONLP_STATUS_E_INVALID;
+}
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_config.c

@@ -0,0 +1,80 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+
+/* <auto.start.cdefs(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_HEADER).source> */
+#define __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(_x) #_x
+#define __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(_x)
+x86_64_netberg_aurora_420_rangeley_config_settings_t x86_64_netberg_aurora_420_rangeley_config_settings[] =
+{
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD
+    { __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) },
+#else
+{ X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+    { NULL, NULL }
+};
+#undef __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_VALUE
+#undef __x86_64_netberg_aurora_420_rangeley_config_STRINGIFY_NAME
+
+const char*
+x86_64_netberg_aurora_420_rangeley_config_lookup(const char* setting)
+{
+    int i;
+    for(i = 0; x86_64_netberg_aurora_420_rangeley_config_settings[i].name; i++) {
+        if(!strcmp(x86_64_netberg_aurora_420_rangeley_config_settings[i].name, setting)) {
+            return x86_64_netberg_aurora_420_rangeley_config_settings[i].value;
+        }
+    }
+    return NULL;
+}
+
+int
+x86_64_netberg_aurora_420_rangeley_config_show(struct aim_pvs_s* pvs)
+{
+    int i;
+    for(i = 0; x86_64_netberg_aurora_420_rangeley_config_settings[i].name; i++) {
+        aim_printf(pvs, "%s = %s\n", x86_64_netberg_aurora_420_rangeley_config_settings[i].name, x86_64_netberg_aurora_420_rangeley_config_settings[i].value);
+    }
+    return i;
+}
+
+/* <auto.end.cdefs(X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_HEADER).source> */

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_enums.c

@@ -0,0 +1,10 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+
+/* <--auto.start.enum(ALL).source> */
+/* <auto.end.enum(ALL).source> */
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_int.h

@@ -0,0 +1,271 @@
+/**************************************************************************//**
+ *
+ * x86_64_netberg_aurora_420_rangeley Internal Header
+ *
+ *****************************************************************************/
+#ifndef __X86_64_NETBERG_AURORA_420_RANGELEY_INT_H__
+#define __X86_64_NETBERG_AURORA_420_RANGELEY_INT_H__
+
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+#include <limits.h>
+
+/* <auto.start.enum(ALL).header> */
+/** fan_id */
+typedef enum fan_id_e {
+    FAN_ID_FAN1 = 1,
+    FAN_ID_FAN2 = 2,
+    FAN_ID_FAN3 = 3,
+    FAN_ID_FAN4 = 4,
+    FAN_ID_FAN5 = 5,
+    FAN_ID_FAN6 = 6,
+    FAN_ID_FAN7 = 7,
+    FAN_ID_FAN8 = 8,
+    FAN_ID_FAN9 = 9,
+    FAN_ID_FAN10 = 10,
+} fan_id_t;
+
+/** Enum names. */
+const char* fan_id_name(fan_id_t e);
+
+/** Enum values. */
+int fan_id_value(const char* str, fan_id_t* e, int substr);
+
+/** Enum descriptions. */
+const char* fan_id_desc(fan_id_t e);
+
+/** Enum validator. */
+int fan_id_valid(fan_id_t e);
+
+/** validator */
+#define FAN_ID_VALID(_e) \
+    (fan_id_valid((_e)))
+
+/** fan_id_map table. */
+extern aim_map_si_t fan_id_map[];
+/** fan_id_desc_map table. */
+extern aim_map_si_t fan_id_desc_map[];
+
+/** fan_oid */
+typedef enum fan_oid_e {
+    FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1),
+    FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2),
+    FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3),
+    FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4),
+    FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5),
+    FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6),
+    FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7),
+    FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8),
+    FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9),
+    FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10),
+} fan_oid_t;
+
+/** Enum names. */
+const char* fan_oid_name(fan_oid_t e);
+
+/** Enum values. */
+int fan_oid_value(const char* str, fan_oid_t* e, int substr);
+
+/** Enum descriptions. */
+const char* fan_oid_desc(fan_oid_t e);
+
+/** Enum validator. */
+int fan_oid_valid(fan_oid_t e);
+
+/** validator */
+#define FAN_OID_VALID(_e) \
+    (fan_oid_valid((_e)))
+
+/** fan_oid_map table. */
+extern aim_map_si_t fan_oid_map[];
+/** fan_oid_desc_map table. */
+extern aim_map_si_t fan_oid_desc_map[];
+
+/** led_id */
+typedef enum led_id_e {
+    LED_ID_LED1 = 1,
+    LED_ID_LED2 = 2,
+    LED_ID_LED3 = 3,
+    LED_ID_LED4 = 4,
+} led_id_t;
+
+/** Enum names. */
+const char* led_id_name(led_id_t e);
+
+/** Enum values. */
+int led_id_value(const char* str, led_id_t* e, int substr);
+
+/** Enum descriptions. */
+const char* led_id_desc(led_id_t e);
+
+/** Enum validator. */
+int led_id_valid(led_id_t e);
+
+/** validator */
+#define LED_ID_VALID(_e) \
+    (led_id_valid((_e)))
+
+/** led_id_map table. */
+extern aim_map_si_t led_id_map[];
+/** led_id_desc_map table. */
+extern aim_map_si_t led_id_desc_map[];
+
+/** led_oid */
+typedef enum led_oid_e {
+    LED_OID_LED1 = ONLP_LED_ID_CREATE(1),
+    LED_OID_LED2 = ONLP_LED_ID_CREATE(2),
+    LED_OID_LED3 = ONLP_LED_ID_CREATE(3),
+    LED_OID_LED4 = ONLP_LED_ID_CREATE(4),
+} led_oid_t;
+
+/** Enum names. */
+const char* led_oid_name(led_oid_t e);
+
+/** Enum values. */
+int led_oid_value(const char* str, led_oid_t* e, int substr);
+
+/** Enum descriptions. */
+const char* led_oid_desc(led_oid_t e);
+
+/** Enum validator. */
+int led_oid_valid(led_oid_t e);
+
+/** validator */
+#define LED_OID_VALID(_e) \
+    (led_oid_valid((_e)))
+
+/** led_oid_map table. */
+extern aim_map_si_t led_oid_map[];
+/** led_oid_desc_map table. */
+extern aim_map_si_t led_oid_desc_map[];
+
+/** psu_id */
+typedef enum psu_id_e {
+    PSU_ID_PSU1 = 1,
+    PSU_ID_PSU2 = 2,
+} psu_id_t;
+
+/** Enum names. */
+const char* psu_id_name(psu_id_t e);
+
+/** Enum values. */
+int psu_id_value(const char* str, psu_id_t* e, int substr);
+
+/** Enum descriptions. */
+const char* psu_id_desc(psu_id_t e);
+
+/** Enum validator. */
+int psu_id_valid(psu_id_t e);
+
+/** validator */
+#define PSU_ID_VALID(_e) \
+    (psu_id_valid((_e)))
+
+/** psu_id_map table. */
+extern aim_map_si_t psu_id_map[];
+/** psu_id_desc_map table. */
+extern aim_map_si_t psu_id_desc_map[];
+
+/** psu_oid */
+typedef enum psu_oid_e {
+    PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1),
+    PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2),
+} psu_oid_t;
+
+/** Enum names. */
+const char* psu_oid_name(psu_oid_t e);
+
+/** Enum values. */
+int psu_oid_value(const char* str, psu_oid_t* e, int substr);
+
+/** Enum descriptions. */
+const char* psu_oid_desc(psu_oid_t e);
+
+/** Enum validator. */
+int psu_oid_valid(psu_oid_t e);
+
+/** validator */
+#define PSU_OID_VALID(_e) \
+    (psu_oid_valid((_e)))
+
+/** psu_oid_map table. */
+extern aim_map_si_t psu_oid_map[];
+/** psu_oid_desc_map table. */
+extern aim_map_si_t psu_oid_desc_map[];
+
+/** thermal_id */
+typedef enum thermal_id_e {
+    THERMAL_ID_THERMAL1 = 1,
+    THERMAL_ID_THERMAL2 = 2,
+    THERMAL_ID_THERMAL3 = 3,
+    THERMAL_ID_THERMAL4 = 4,
+    THERMAL_ID_THERMAL5 = 5,
+    THERMAL_ID_THERMAL6 = 6,
+    THERMAL_ID_THERMAL7 = 7,
+} thermal_id_t;
+
+/** Enum names. */
+const char* thermal_id_name(thermal_id_t e);
+
+/** Enum values. */
+int thermal_id_value(const char* str, thermal_id_t* e, int substr);
+
+/** Enum descriptions. */
+const char* thermal_id_desc(thermal_id_t e);
+
+/** Enum validator. */
+int thermal_id_valid(thermal_id_t e);
+
+/** validator */
+#define THERMAL_ID_VALID(_e) \
+    (thermal_id_valid((_e)))
+
+/** thermal_id_map table. */
+extern aim_map_si_t thermal_id_map[];
+/** thermal_id_desc_map table. */
+extern aim_map_si_t thermal_id_desc_map[];
+
+/** thermal_oid */
+typedef enum thermal_oid_e {
+    THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1),
+    THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2),
+    THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3),
+    THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4),
+    THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5),
+    THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6),
+    THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7),
+} thermal_oid_t;
+
+/** Enum names. */
+const char* thermal_oid_name(thermal_oid_t e);
+
+/** Enum values. */
+int thermal_oid_value(const char* str, thermal_oid_t* e, int substr);
+
+/** Enum descriptions. */
+const char* thermal_oid_desc(thermal_oid_t e);
+
+/** Enum validator. */
+int thermal_oid_valid(thermal_oid_t e);
+
+/** validator */
+#define THERMAL_OID_VALID(_e) \
+    (thermal_oid_valid((_e)))
+
+/** thermal_oid_map table. */
+extern aim_map_si_t thermal_oid_map[];
+/** thermal_oid_desc_map table. */
+extern aim_map_si_t thermal_oid_desc_map[];
+/* <auto.end.enum(ALL).header> */
+
+/* psu info table */
+struct psu_info_s {
+	char path[PATH_MAX];
+	int present;
+	int busno;
+	int addr;
+};
+
+#define SYS_HWMON1_PREFIX "/sys/class/hwmon/hwmon1/device"
+#define SYS_HWMON2_PREFIX "/sys/class/hwmon/hwmon2/device"
+
+#endif /* __X86_64_NETBERG_AURORA_420_RANGELEY_INT_H__ */

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_log.c

@@ -0,0 +1,18 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+/*
+ * x86_64_netberg_aurora_420_rangeley log struct.
+ */
+AIM_LOG_STRUCT_DEFINE(
+                      X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT,
+                      X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_BITS_DEFAULT,
+                      NULL, /* Custom log map */
+                      X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+                     );
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_log.h

@@ -0,0 +1,12 @@
+/**************************************************************************//**
+ *
+ * 
+ *
+ *****************************************************************************/
+#ifndef __X86_64_NETBERG_AURORA_420_RANGELEY_LOG_H__
+#define __X86_64_NETBERG_AURORA_420_RANGELEY_LOG_H__
+
+#define AIM_LOG_MODULE_NAME x86_64_netberg_aurora_420_rangeley
+#include <AIM/aim_log.h>
+
+#endif /* __X86_64_NETBERG_AURORA_420_RANGELEY_LOG_H__ */

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_module.c

@@ -0,0 +1,24 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+
+#include "x86_64_netberg_aurora_420_rangeley_log.h"
+
+static int
+datatypes_init__(void)
+{
+#define X86_64_NETBERG_AURORA_420_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc)     AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc,                               AIM_LOG_INTERNAL);
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley.x>
+    return 0;
+}
+
+void __x86_64_netberg_aurora_420_rangeley_module_init__(void)
+{
+    AIM_LOG_STRUCT_REGISTER();
+    datatypes_init__();
+}
+
+int __onlp_platform_version__ = 1;

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/onlp/builds/src/x86_64_netberg_aurora_420_rangeley/module/src/x86_64_netberg_aurora_420_rangeley_ucli.c

@@ -0,0 +1,50 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include <x86_64_netberg_aurora_420_rangeley/x86_64_netberg_aurora_420_rangeley_config.h>
+
+#if X86_64_NETBERG_AURORA_420_RANGELEY_CONFIG_INCLUDE_UCLI == 1
+
+#include <uCli/ucli.h>
+#include <uCli/ucli_argparse.h>
+#include <uCli/ucli_handler_macros.h>
+
+static ucli_status_t
+x86_64_netberg_aurora_420_rangeley_ucli_ucli__config__(ucli_context_t* uc)
+{
+    UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_netberg_aurora_420_rangeley)
+}
+
+/* <auto.ucli.handlers.start> */
+/* <auto.ucli.handlers.end> */
+
+static ucli_module_t
+x86_64_netberg_aurora_420_rangeley_ucli_module__ =
+    {
+        "x86_64_netberg_aurora_420_rangeley_ucli",
+        NULL,
+        x86_64_netberg_aurora_420_rangeley_ucli_ucli_handlers__,
+        NULL,
+        NULL,
+    };
+
+ucli_node_t*
+x86_64_netberg_aurora_420_rangeley_ucli_node_create(void)
+{
+    ucli_node_t* n;
+    ucli_module_init(&x86_64_netberg_aurora_420_rangeley_ucli_module__);
+    n = ucli_node_create("x86_64_netberg_aurora_420_rangeley", NULL, &x86_64_netberg_aurora_420_rangeley_ucli_module__);
+    ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_netberg_aurora_420_rangeley"));
+    return n;
+}
+
+#else
+void*
+x86_64_netberg_aurora_420_rangeley_ucli_node_create(void)
+{
+    return NULL;
+}
+#endif
+

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/platform-config/Makefile

@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/platform-config/r0/Makefile

@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/platform-config/r0/PKG.yml

@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-420-rangeley REVISION=r0

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-420-rangeley-r0.yml

@@ -0,0 +1,30 @@
+---
+
+######################################################################
+#
+# platform-config for AURORA 420
+#
+######################################################################
+
+x86-64-netberg-aurora-420-rangeley-r0:
+
+  grub:
+
+    serial: >-
+      --port=0x2f8
+      --speed=115200
+      --word=8
+      --parity=no
+      --stop=1
+
+    kernel:
+      <<: *kernel-3-16
+
+    args: >-
+      console=ttyS1,115200n8
+
+  ##network:
+  ##  interfaces:
+  ##    ma1:
+  ##      name: ~
+  ##      syspath: pci0000:00/0000:00:14.0

packages/platforms/netberg/x86-64/x86-64-netberg-aurora-420-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_420_rangeley_r0/__init__.py

@@ -0,0 +1,12 @@
+from onl.platform.base import *
+from onl.platform.netberg import *
+
+class OnlPlatform_x86_64_netberg_aurora_420_rangeley_r0(OnlPlatformNetberg,
+                                                        OnlPlatformPortConfig_48x10_6x40):
+    PLATFORM='x86-64-netberg-aurora-420-rangeley-r0'
+    MODEL="AURORA420"
+    SYS_OBJECT_ID=".420.1"
+
+    def baseconfig(self):
+        self.insmod("hardware_monitor")
+        return True

packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/builds/quanta_platform_ly8.c

@@ -78,7 +78,6 @@ struct i2c_init_data {
 	int busno;
 	int gpio_base;
 	char name[I2C_NAME_SIZE];
-	int oom_port_name;
 };
 
 static struct i2c_init_data quanta_ly8_i2c_init_data[] = {
@@ -99,54 +98,54 @@ static struct i2c_init_data quanta_ly8_i2c_init_data[] = {
 	{ .parent_bus = (0x10 + 0), .type = i2c_type_pca9554, .addr = 0x25, .name = "PCA9554(PCA9698INT)\0" },
 	{ .parent_bus = (0x10 + 0), .type = i2c_type_pca9555, .addr = 0x24, .name = "PCA9555_3(FAN)\0" },
 	{ .parent_bus = (0x10 + 0), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555_4(QSFP_EN)\0" },
-	{ .parent_bus = (0x20 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_1_EEPROM\0", .oom_port_name = 1 },
-	{ .parent_bus = (0x20 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_2_EEPROM\0", .oom_port_name = 2 },
-	{ .parent_bus = (0x20 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_3_EEPROM\0", .oom_port_name = 3 },
-	{ .parent_bus = (0x20 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_4_EEPROM\0", .oom_port_name = 4 },
-	{ .parent_bus = (0x20 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_5_EEPROM\0", .oom_port_name = 5 },
-	{ .parent_bus = (0x20 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_6_EEPROM\0", .oom_port_name = 6 },
-	{ .parent_bus = (0x20 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_7_EEPROM\0", .oom_port_name = 7 },
-	{ .parent_bus = (0x20 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_8_EEPROM\0", .oom_port_name = 8 },
-	{ .parent_bus = (0x28 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_9_EEPROM\0", .oom_port_name = 9 },
-	{ .parent_bus = (0x28 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_10_EEPROM\0", .oom_port_name = 10 },
-	{ .parent_bus = (0x28 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_11_EEPROM\0", .oom_port_name = 11 },
-	{ .parent_bus = (0x28 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_12_EEPROM\0", .oom_port_name = 12 },
-	{ .parent_bus = (0x28 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_13_EEPROM\0", .oom_port_name = 13 },
-	{ .parent_bus = (0x28 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_14_EEPROM\0", .oom_port_name = 14 },
-	{ .parent_bus = (0x28 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_15_EEPROM\0", .oom_port_name = 15 },
-	{ .parent_bus = (0x28 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_16_EEPROM\0", .oom_port_name = 16 },
-	{ .parent_bus = (0x30 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_17_EEPROM\0", .oom_port_name = 17 },
-	{ .parent_bus = (0x30 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_18_EEPROM\0", .oom_port_name = 18 },
-	{ .parent_bus = (0x30 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_19_EEPROM\0", .oom_port_name = 19 },
-	{ .parent_bus = (0x30 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_20_EEPROM\0", .oom_port_name = 20 },
-	{ .parent_bus = (0x30 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_21_EEPROM\0", .oom_port_name = 21 },
-	{ .parent_bus = (0x30 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_22_EEPROM\0", .oom_port_name = 22 },
-	{ .parent_bus = (0x30 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_23_EEPROM\0", .oom_port_name = 23 },
-	{ .parent_bus = (0x30 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_24_EEPROM\0", .oom_port_name = 24 },
-	{ .parent_bus = (0x38 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_25_EEPROM\0", .oom_port_name = 25 },
-	{ .parent_bus = (0x38 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_26_EEPROM\0", .oom_port_name = 26 },
-	{ .parent_bus = (0x38 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_27_EEPROM\0", .oom_port_name = 27 },
-	{ .parent_bus = (0x38 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_28_EEPROM\0", .oom_port_name = 28 },
-	{ .parent_bus = (0x38 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_29_EEPROM\0", .oom_port_name = 29 },
-	{ .parent_bus = (0x38 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_30_EEPROM\0", .oom_port_name = 30 },
-	{ .parent_bus = (0x38 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_31_EEPROM\0", .oom_port_name = 31 },
-	{ .parent_bus = (0x38 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_32_EEPROM\0", .oom_port_name = 32 },
-	{ .parent_bus = (0x40 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_33_EEPROM\0", .oom_port_name = 33 },
-	{ .parent_bus = (0x40 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_34_EEPROM\0", .oom_port_name = 34 },
-	{ .parent_bus = (0x40 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_35_EEPROM\0", .oom_port_name = 35 },
-	{ .parent_bus = (0x40 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_36_EEPROM\0", .oom_port_name = 36 },
-	{ .parent_bus = (0x40 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_37_EEPROM\0", .oom_port_name = 37 },
-	{ .parent_bus = (0x40 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_38_EEPROM\0", .oom_port_name = 38 },
-	{ .parent_bus = (0x40 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_39_EEPROM\0", .oom_port_name = 39 },
-	{ .parent_bus = (0x40 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_40_EEPROM\0", .oom_port_name = 40 },
-	{ .parent_bus = (0x48 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_41_EEPROM\0", .oom_port_name = 41 },
-	{ .parent_bus = (0x48 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_42_EEPROM\0", .oom_port_name = 42 },
-	{ .parent_bus = (0x48 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_43_EEPROM\0", .oom_port_name = 43 },
-	{ .parent_bus = (0x48 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_44_EEPROM\0", .oom_port_name = 44 },
-	{ .parent_bus = (0x48 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_45_EEPROM\0", .oom_port_name = 45 },
-	{ .parent_bus = (0x48 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_46_EEPROM\0", .oom_port_name = 46 },
-	{ .parent_bus = (0x48 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_47_EEPROM\0", .oom_port_name = 47 },
-	{ .parent_bus = (0x48 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_48_EEPROM\0", .oom_port_name = 48 },
+	{ .parent_bus = (0x20 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_1_EEPROM\0" },
+	{ .parent_bus = (0x20 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_2_EEPROM\0" },
+	{ .parent_bus = (0x20 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_3_EEPROM\0" },
+	{ .parent_bus = (0x20 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_4_EEPROM\0" },
+	{ .parent_bus = (0x20 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_5_EEPROM\0" },
+	{ .parent_bus = (0x20 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_6_EEPROM\0" },
+	{ .parent_bus = (0x20 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_7_EEPROM\0" },
+	{ .parent_bus = (0x20 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_8_EEPROM\0" },
+	{ .parent_bus = (0x28 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_9_EEPROM\0" },
+	{ .parent_bus = (0x28 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_10_EEPROM\0" },
+	{ .parent_bus = (0x28 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_11_EEPROM\0" },
+	{ .parent_bus = (0x28 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_12_EEPROM\0" },
+	{ .parent_bus = (0x28 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_13_EEPROM\0" },
+	{ .parent_bus = (0x28 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_14_EEPROM\0" },
+	{ .parent_bus = (0x28 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_15_EEPROM\0" },
+	{ .parent_bus = (0x28 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_16_EEPROM\0" },
+	{ .parent_bus = (0x30 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_17_EEPROM\0" },
+	{ .parent_bus = (0x30 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_18_EEPROM\0" },
+	{ .parent_bus = (0x30 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_19_EEPROM\0" },
+	{ .parent_bus = (0x30 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_20_EEPROM\0" },
+	{ .parent_bus = (0x30 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_21_EEPROM\0" },
+	{ .parent_bus = (0x30 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_22_EEPROM\0" },
+	{ .parent_bus = (0x30 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_23_EEPROM\0" },
+	{ .parent_bus = (0x30 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_24_EEPROM\0" },
+	{ .parent_bus = (0x38 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_25_EEPROM\0" },
+	{ .parent_bus = (0x38 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_26_EEPROM\0" },
+	{ .parent_bus = (0x38 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_27_EEPROM\0" },
+	{ .parent_bus = (0x38 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_28_EEPROM\0" },
+	{ .parent_bus = (0x38 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_29_EEPROM\0" },
+	{ .parent_bus = (0x38 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_30_EEPROM\0" },
+	{ .parent_bus = (0x38 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_31_EEPROM\0" },
+	{ .parent_bus = (0x38 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_32_EEPROM\0" },
+	{ .parent_bus = (0x40 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_33_EEPROM\0" },
+	{ .parent_bus = (0x40 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_34_EEPROM\0" },
+	{ .parent_bus = (0x40 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_35_EEPROM\0" },
+	{ .parent_bus = (0x40 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_36_EEPROM\0" },
+	{ .parent_bus = (0x40 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_37_EEPROM\0" },
+	{ .parent_bus = (0x40 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_38_EEPROM\0" },
+	{ .parent_bus = (0x40 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_39_EEPROM\0" },
+	{ .parent_bus = (0x40 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_40_EEPROM\0" },
+	{ .parent_bus = (0x48 + 0), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_41_EEPROM\0" },
+	{ .parent_bus = (0x48 + 1), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_42_EEPROM\0" },
+	{ .parent_bus = (0x48 + 2), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_43_EEPROM\0" },
+	{ .parent_bus = (0x48 + 3), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_44_EEPROM\0" },
+	{ .parent_bus = (0x48 + 4), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_45_EEPROM\0" },
+	{ .parent_bus = (0x48 + 5), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_46_EEPROM\0" },
+	{ .parent_bus = (0x48 + 6), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_47_EEPROM\0" },
+	{ .parent_bus = (0x48 + 7), .type = i2c_type_optoe2_SFP,   .addr = 0x50, .name = "SFP_48_EEPROM\0" },
 
 	{ .parent_bus = (0x10 + 3), .type = i2c_type_pca9698, .addr = 0x23, .name = "PCA9698(SFP_1-8)\0" },
 	{ .parent_bus = (0x10 + 3), .type = i2c_type_pca9698, .addr = 0x21, .name = "PCA9698(SFP_9-16)\0" },
@@ -156,10 +155,10 @@ static struct i2c_init_data quanta_ly8_i2c_init_data[] = {
 	{ .parent_bus = (0x10 + 4), .type = i2c_type_pca9698, .addr = 0x25, .name = "PCA9698(SFP_41-48)\0" },
 
 	{ .parent_bus = (0x10 + 5), .type = i2c_type_pca9548, .addr = 0x76, .busno = 0x50, .name = "PCA9548_8\0" },
-	{ .parent_bus = (0x50 + 0), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_1_EEPROM\0", .oom_port_name = 49 },
-	{ .parent_bus = (0x50 + 1), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_2_EEPROM\0", .oom_port_name = 50 },
-	{ .parent_bus = (0x50 + 2), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_3_EEPROM\0", .oom_port_name = 51 },
-	{ .parent_bus = (0x50 + 3), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_4_EEPROM\0", .oom_port_name = 52 },
+	{ .parent_bus = (0x50 + 0), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_1_EEPROM\0" },
+	{ .parent_bus = (0x50 + 1), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_2_EEPROM\0" },
+	{ .parent_bus = (0x50 + 2), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_3_EEPROM\0" },
+	{ .parent_bus = (0x50 + 3), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QSFP_4_EEPROM\0" },
 
 	{ .parent_bus = (0x10 + 5), .type = i2c_type_pca9555, .addr = 0x24, .name = "PCA9555_1(LED)\0" },
 	{ .parent_bus = (0x10 + 6), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555_2(QSFP)\0" },
@@ -167,8 +166,8 @@ static struct i2c_init_data quanta_ly8_i2c_init_data[] = {
 	/* QSFP+ DB */
 	{ .parent_bus = (0x10 + 7), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555(QDB)\0" },
 	{ .parent_bus = (0x10 + 7), .type = i2c_type_pca9546, .addr = 0x76, .busno = 0x58, .name = "PCA9546(QDB)\0" },
-	{ .parent_bus = (0x58 + 0), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QDB_QSFP_1_EEPROM\0", .oom_port_name = 53 },
-	{ .parent_bus = (0x58 + 1), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QDB_QSFP_2_EEPROM\0", .oom_port_name = 54 },
+	{ .parent_bus = (0x58 + 0), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QDB_QSFP_1_EEPROM\0" },
+	{ .parent_bus = (0x58 + 1), .type = i2c_type_optoe1_QSFP,   .addr = 0x50, .name = "QDB_QSFP_2_EEPROM\0" },
 
 	{ .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x72, .busno = 0x18, .name = "PCA9546\0" },
 	{ .parent_bus = (0x18 + 0), .type = i2c_type_emerson700,   .addr = 0x6f, .name = "PSU_1\0" }, /* RPSU 1 */
@@ -249,31 +248,9 @@ static inline struct pca953x_platform_data *pca953x_platform_data_get(int type,
 	return &platform_data;
 }
 
-struct optoe_platform_data {
-	u32		byte_len;		/* size (sum of all addr) */
-	u16		page_size;		/* for writes */
-	u8		flags;
-
-	void		(*setup)(struct memory_accessor *, void *context);
-	void		*context;
-
-	int oom_port_name;
-};
-
-static inline struct optoe_platform_data *optoe_platform_data_get(int port_name) {
-	static struct optoe_platform_data platform_data;
-
-	platform_data = (struct optoe_platform_data) {
-		.oom_port_name = port_name,
-	};
-
-	return &platform_data;
-}
-
 static inline struct i2c_board_info *i2c_board_info_get(struct i2c_init_data data) {
 	struct pca954x_platform_data *mux_platform_data;
 	struct pca953x_platform_data *gpio_platform_data;
-	struct optoe_platform_data *oom_platform_data;
 	static struct i2c_board_info board_info;
 
 	switch(data.type) {
@@ -303,16 +280,6 @@ static inline struct i2c_board_info *i2c_board_info_get(struct i2c_init_data dat
 			break;
 		case i2c_type_optoe1_QSFP:
 		case i2c_type_optoe2_SFP:
-			oom_platform_data = optoe_platform_data_get(data.oom_port_name);
-			if(oom_platform_data == NULL) {
-				return (struct i2c_board_info *) NULL;
-			}
-
-			board_info = (struct i2c_board_info) {
-				.platform_data = oom_platform_data,
-			};
-			break;
-
 		case i2c_type_rtc:
 		case i2c_type_spd:
 		case i2c_type_24c02:

packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/python/x86_64_quanta_ly8_rangeley_r0/__init__.py

@@ -25,4 +25,14 @@ class OnlPlatform_x86_64_quanta_ly8_rangeley_r0(OnlPlatformQuanta,
         os.system("ln -snf /dev/rtc1 /dev/rtc")
         os.system("hwclock --hctosys")
 
+        #SFP for 1~48 port
+        #QSFP for 49~52 port
+        for port_number in range(1,53):
+            bus_number = port_number + 31
+            os.system("echo %d >/sys/bus/i2c/devices/%d-0050/port_name" % (port_number, bus_number))
+
+        #QDB QSFP 53~54port
+        os.system("echo 53 >/sys/bus/i2c/devices/88-0050/port_name")
+        os.system("echo 54 >/sys/bus/i2c/devices/89-0050/port_name")
+
         return True