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[delta ak7448] Add Support for OOM.

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Signed-off-by: johnson <JOHNSON.LU@deltaww.com>
This commit is contained in:
johnson
2018-09-04 17:18:11 +08:00
parent 5cc78a80ce
commit d7975e68ed
12 changed files with 1622 additions and 1098 deletions
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1439
packages/platforms/delta/x86-64/x86-64-delta-ak7448/modules/builds/delta_ak7448_platform.c Normal file
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File diff suppressed because it is too large Load Diff

3
packages/platforms/delta/x86-64/x86-64-delta-ak7448/modules/builds/dni_ak7448_psu.c
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@@ -131,10 +131,9 @@ static ssize_t set_fan_duty_cycle(struct device *dev, struct device_attribute \
return -EINVAL;
/* Select SWPLD PSU offset */
i2c_cpld_write(SWPLD_BUS, SWPLD_REG,
SWPLD_PSU_MUX_REG, SELECT_PSU2_EEPROM);
mutex_lock(&data->update_lock);
i2c_cpld_write(SWPLD_BUS, SWPLD_REG,SWPLD_PSU_MUX_REG, SELECT_PSU2_EEPROM);
data->fan_duty_cycle[nr] = speed;
dps_800ab_16_d_write_word(client, 0x3B + nr, data->fan_duty_cycle[nr]);
mutex_unlock(&data->update_lock);

698
packages/platforms/delta/x86-64/x86-64-delta-ak7448/modules/builds/dni_ak7448_sfp.c
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@@ -1,698 +0,0 @@
/*
* An hwmon driver for agema ak7448 qsfp
*
* Copyright (C) 2017 Delta Networks, Inc.
*
* DNI <DNIsales@delta.com.tw>
*
* Based on ad7414.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/sysfs.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#define I2C_BUS_5 5
#define SWPLD_U21 0x30
#define SWPLD_A 0x33
#define SWPLD_B 0x32
#define SFP_PRESENCE_1 0x02
#define SFP_PRESENCE_2 0x03
#define SFP_PRESENCE_3 0x04
#define SFP_PRESENCE_4 0x05
#define SFP_PRESENCE_5 0x06
#define SFP_PRESENCE_6 0x07
#define QSFP_PRESENCE_1 0x0d
#define QSFP_LP_MODE_1 0x0c
#define QSFP_RESET_1 0x0e
#define DEFAULT_DISABLE 0x00
#define QSFP_DEFAULT_DISABLE 0x01
#define QSFP_SEL_I2C_MUX 0x11
#define SFP_SEL_I2C_MUX 0x19
/* Check cpld read results */
#define VALIDATED_READ(_buf, _rv, _read, _invert) \
do { \
_rv = _read; \
if (_rv < 0) { \
return sprintf(_buf, "READ ERROR\n"); \
} \
if (_invert) { \
_rv = ~_rv; \
} \
_rv &= 0xFF; \
} while(0) \
long sfp_port_data = 0;
static const u8 cpld_to_port_table[] = {
0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06,
0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16,
0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e,
0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e,
0x2f, 0x04, 0x03, 0x02, 0x00};
/* Addresses scanned */
static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END };
/* Each client has this additional data */
struct ak7448_sfp_data
{
struct device *hwmon_dev;
struct mutex update_lock;
char valid;
unsigned long last_updated;
int port;
char eeprom[256];
};
static ssize_t for_eeprom(struct device *dev, struct device_attribute *dev_attr,char *buf);
static int ak7448_sfp_read_block(struct i2c_client *client, u8 command,u8 *data, int data_len);
static struct ak7448_sfp_data *ak7448_sfp_update_device(struct device *dev);
static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf);
static ssize_t set_w_port_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count);
static ssize_t for_r_port_data(struct device *dev, struct device_attribute *dev_attr, char *buf);
static ssize_t set_w_lp_mode_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count);
static ssize_t set_w_reset_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count);
extern int i2c_cpld_read(int bus, unsigned short cpld_addr, u8 reg);
extern int i2c_cpld_write(int bus, unsigned short cpld_addr, u8 reg, u8 value);
enum ak7448_sfp_sysfs_attributes
{
SFP_EEPROM,
SFP_SELECT_PORT,
SFP_IS_PRESENT,
SFP_IS_PRESENT_ALL,
SFP_LP_MODE,
SFP_RESET
};
static ssize_t set_w_port_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count)
{
long data;
int error;
long port_t = 0;
u8 reg_t = 0x00;
error = kstrtol(buf, 10, &data);
if(error)
return error;
port_t = data;
if(port_t > 0 && port_t < 9)
{ /* SFP Port 1-8 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 8 && port_t < 17)
{ /* SFP Port 9-16 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 16 && port_t < 25)
{ /* SFP Port 17-24 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 24 && port_t < 33)
{ /* SFP Port 25-32 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 32 && port_t < 37)
{ /* SFP Port 33-36 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 36 && port_t < 45)
{ /* SFP Port 37-44 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 44 && port_t < 49)
{ /* SFP Port 45-48 */
reg_t = SFP_SEL_I2C_MUX;
}
else if (port_t > 48 && port_t < 53)
{ /* QSFP Port 49-52 */
reg_t = QSFP_SEL_I2C_MUX;
}
else
{
/* Disable SFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, SFP_SEL_I2C_MUX,
DEFAULT_DISABLE) < 0) {
return -EIO;
}
/* Disable QSFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, QSFP_SEL_I2C_MUX,
QSFP_DEFAULT_DISABLE) < 0) {
return -EIO;
}
goto exit;
}
/* Disable SFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, SFP_SEL_I2C_MUX,
DEFAULT_DISABLE) < 0) {
return -EIO;
}
/* Disable QSFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, QSFP_SEL_I2C_MUX,
QSFP_DEFAULT_DISABLE) < 0) {
return -EIO;
}
/* Select SFP or QSFP port channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, reg_t,
cpld_to_port_table[port_t]) < 0) {
return -EIO;
}
exit:
sfp_port_data = data;
return count;
}
static ssize_t for_r_port_data(struct device *dev, struct device_attribute *dev_attr, char *buf)
{
if (sfp_port_data == DEFAULT_DISABLE)
{
/* Disable SFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B,
SFP_SEL_I2C_MUX, DEFAULT_DISABLE) < 0) {
return -EIO;
}
/* Disable QSFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B,
QSFP_SEL_I2C_MUX, QSFP_DEFAULT_DISABLE) < 0) {
return -EIO;
}
}
return sprintf(buf, "%d\n", sfp_port_data);
}
static ssize_t set_w_lp_mode_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count)
{
long data;
int error;
long port_t = 0;
int bit_t = 0x00;
int values = 0x00;
error = kstrtol(buf, 10, &data);
if (error)
return error;
port_t = sfp_port_data;
if (port_t > 48 && port_t < 53)
{ /* QSFP Port 48-53 */
values = i2c_cpld_read(I2C_BUS_5, SWPLD_B, QSFP_LP_MODE_1);
if (values < 0)
return -EIO;
/* Indicate the module is in LP mode or not
* 0 = Disable
* 1 = Enable
*/
if (data == 0)
{
bit_t = ~(1 << ((port_t - 1) % 8));
values = values & bit_t;
}
else if (data == 1)
{
bit_t = 1 << ((port_t - 1) % 8);
values = values | bit_t;
}
else
{
return -EINVAL;
}
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, QSFP_LP_MODE_1,
values) < 0)
{
return -EIO;
}
}
return count;
}
static ssize_t set_w_reset_data(struct device *dev, struct device_attribute *dev_attr, const char *buf, size_t count)
{
long data;
int error;
long port_t = 0;
int bit_t = 0x00;
int values = 0x00;
error = kstrtol(buf, 10, &data);
if (error)
return error;
port_t = sfp_port_data;
if (port_t > 48 && port_t < 53)
{ /* QSFP Port 48-53 */
values = i2c_cpld_read(I2C_BUS_5, SWPLD_B, QSFP_RESET_1);
if (values < 0)
return -EIO;
/* Indicate the module Reset or not
* 0 = Reset
* 1 = Normal
*/
if (data == 0)
{
bit_t = ~(1 << ((port_t - 1) % 8));
values = values & bit_t;
}
else if (data == 1)
{
bit_t = 1 << ((port_t - 1) % 8);
values = values | bit_t;
}
else
{
return -EINVAL;
}
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, QSFP_RESET_1,
values) < 0)
{
return -EIO;
}
}
return count;
}
static ssize_t for_status(struct device *dev, struct device_attribute *dev_attr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
long port_t = 0;
u8 reg_t = 0x00;
u8 cpld_addr_t = 0x00;
int values[7] = {'\0'};
int bit_t = 0x00;
switch (attr->index)
{
case SFP_IS_PRESENT:
port_t = sfp_port_data;
if (port_t > 0 && port_t < 9) { /* SFP Port 1-8 */
cpld_addr_t = SWPLD_A;
reg_t = SFP_PRESENCE_1;
} else if (port_t > 8 && port_t < 17) { /* SFP Port 9-16 */
cpld_addr_t = SWPLD_A;
reg_t = SFP_PRESENCE_2;
} else if (port_t > 16 && port_t < 25) { /* SFP Port 17-24 */
cpld_addr_t = SWPLD_A;
reg_t = SFP_PRESENCE_3;
} else if (port_t > 24 && port_t < 33) { /* SFP Port 25-32 */
cpld_addr_t = SWPLD_A;
reg_t = SFP_PRESENCE_4;
} else if (port_t > 32 && port_t < 41) { /* SFP Port 33-40 */
cpld_addr_t = SWPLD_A;
reg_t = SFP_PRESENCE_5;
} else if (port_t > 40 && port_t < 49) { /* SFP Port 41-48 */
cpld_addr_t = SWPLD_A;
reg_t = SFP_PRESENCE_6;
} else if (port_t > 48 && port_t < 53) { /* QSFP Port 49-54 */
cpld_addr_t = SWPLD_B;
reg_t = QSFP_PRESENCE_1;
} else {
values[0] = 1; /* return 1, module NOT present */
return sprintf(buf, "%d\n", values[0]);
}
VALIDATED_READ(buf, values[0], i2c_cpld_read(I2C_BUS_5,
cpld_addr_t, reg_t), 0);
/* SWPLD QSFP module respond */
bit_t = 1 << ((port_t - 1) % 8);
values[0] = values[0] & bit_t;
values[0] = values[0] / bit_t;
/* sfp_is_present value
* return 0 is module present
* return 1 is module NOT present*/
return sprintf(buf, "%d\n", values[0]);
case SFP_IS_PRESENT_ALL:
/*
* Report the SFP ALL PRESENCE status
* This data information form CPLD.
*/
/* SFP_PRESENT Ports 1-8 */
VALIDATED_READ(buf, values[0],
i2c_cpld_read(I2C_BUS_5, SWPLD_A, SFP_PRESENCE_1), 0);
/* SFP_PRESENT Ports 9-16 */
VALIDATED_READ(buf, values[1],
i2c_cpld_read(I2C_BUS_5, SWPLD_A, SFP_PRESENCE_2), 0);
/* SFP_PRESENT Ports 17-24 */
VALIDATED_READ(buf, values[2],
i2c_cpld_read(I2C_BUS_5, SWPLD_A, SFP_PRESENCE_3), 0);
/* SFP_PRESENT Ports 25-32 */
VALIDATED_READ(buf, values[3],
i2c_cpld_read(I2C_BUS_5, SWPLD_A, SFP_PRESENCE_4), 0);
/* SFP_PRESENT Ports 33-40 */
VALIDATED_READ(buf, values[4],
i2c_cpld_read(I2C_BUS_5, SWPLD_A, SFP_PRESENCE_5), 0);
/* SFP_PRESENT Ports 41-48 */
VALIDATED_READ(buf, values[5],
i2c_cpld_read(I2C_BUS_5, SWPLD_A, SFP_PRESENCE_6), 0);
/* QSFP_PRESENT Ports 49-52 */
VALIDATED_READ(buf, values[6],
i2c_cpld_read(I2C_BUS_5, SWPLD_B, QSFP_PRESENCE_1), 0);
/* sfp_is_present_all value
* return 0 is module present
* return 1 is module NOT present
*/
return sprintf(buf, "%02X %02X %02X %02X %02X %02X %02X \n",values[0], values[1], values[2],values[3], values[4], values[5],values[6]);
case SFP_LP_MODE:
port_t = sfp_port_data;
if (port_t > 48 && port_t < 53) {
/* QSFP Port 49-52 */
VALIDATED_READ(buf, values[0], i2c_cpld_read(I2C_BUS_5,
SWPLD_B, QSFP_LP_MODE_1), 0);
} else {
/* In AK7448 only QSFP support control LP MODE */
values[0] = 0;
return sprintf(buf, "%d\n", values[0]);
}
bit_t = 1 << ((port_t - 1) % 8);
values[0] = values[0] & bit_t;
values[0] = values[0] / bit_t;
/* sfp_lp_mode value
* return 0 is module NOT in LP mode
* return 1 is module in LP mode
*/
return sprintf(buf, "%d\n", values[0]);
case SFP_RESET:
port_t = sfp_port_data;
if (port_t > 48 && port_t < 53) {
/* QSFP Port 49-54 */
VALIDATED_READ(buf, values[0], i2c_cpld_read(I2C_BUS_5,
SWPLD_B, QSFP_RESET_1), 0);
} else {
/* In AK7448 only QSFP support control RESET MODE */
values[0] = 1;
return sprintf(buf, "%d\n", values[0]);
}
/* SWPLD QSFP module respond */
bit_t = 1 << ((port_t - 1) % 8);
values[0] = values[0] & bit_t;
values[0] = values[0] / bit_t;
/* sfp_reset value
* return 0 is module Reset
* return 1 is module Normal*/
return sprintf(buf, "%d\n", values[0]);
default:
return (attr->index);
}
}
static ssize_t for_eeprom(struct device *dev, struct device_attribute *dev_attr,char *buf)
{
struct ak7448_sfp_data *data = ak7448_sfp_update_device(dev);
if (!data->valid)
{
return 0;
}
memcpy(buf, data->eeprom, sizeof(data->eeprom));
return sizeof(data->eeprom);
}
static int ak7448_sfp_read_block(struct i2c_client *client, u8 command, u8 *data, int data_len)
{
int result = i2c_smbus_read_i2c_block_data(client, command, data_len,data);
if (unlikely(result < 0))
goto abort;
if (unlikely(result != data_len))
{
result = -EIO;
goto abort;
}
result = 0;
abort:
return result;
}
static struct ak7448_sfp_data *ak7448_sfp_update_device(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct ak7448_sfp_data *data = i2c_get_clientdata(client);
long port_t = 0;
u8 reg_t = 0x00;
port_t = sfp_port_data;
if (port_t > 0 && port_t < 9) { /* SFP Port 1-8 */
reg_t = SFP_SEL_I2C_MUX;
} else if (port_t > 8 && port_t < 17) { /* SFP Port 9-16 */
reg_t = SFP_SEL_I2C_MUX;
} else if (port_t > 16 && port_t < 25) { /* SFP Port 17-24 */
reg_t = SFP_SEL_I2C_MUX;
} else if (port_t > 24 && port_t < 33) { /* SFP Port 25-32 */
reg_t = SFP_SEL_I2C_MUX;
} else if (port_t > 32 && port_t < 41) { /* SFP Port 33-40 */
reg_t = SFP_SEL_I2C_MUX;
} else if (port_t > 40 && port_t < 49) { /* SFP Port 41-48 */
reg_t = SFP_SEL_I2C_MUX;
} else if (port_t > 48 && port_t < 53) { /* QSFP Port 49-52 */
reg_t = QSFP_SEL_I2C_MUX;
} else {
memset(data->eeprom, 0, sizeof(data->eeprom));
/* Disable SFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, SFP_SEL_I2C_MUX,
DEFAULT_DISABLE) < 0) {
goto exit;
}
/* Disable QSFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, QSFP_SEL_I2C_MUX,
QSFP_DEFAULT_DISABLE) < 0) {
goto exit;
}
goto exit;
}
/* Disable SFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, SFP_SEL_I2C_MUX,
DEFAULT_DISABLE) < 0) {
memset(data->eeprom, 0, sizeof(data->eeprom));
goto exit;
}
/* Disable QSFP channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, QSFP_SEL_I2C_MUX,
QSFP_DEFAULT_DISABLE) < 0) {
memset(data->eeprom, 0, sizeof(data->eeprom));
goto exit;
}
/* Select SFP or QSFP port channel */
if (i2c_cpld_write(I2C_BUS_5, SWPLD_B, reg_t,
cpld_to_port_table[port_t]) < 0) {
memset(data->eeprom, 0, sizeof(data->eeprom));
goto exit;
}
mutex_lock(&data->update_lock);
if (time_after(jiffies, data->last_updated) || !data->valid)
{
int status = -1;
int i = 0;
data->valid = 0;
memset(data->eeprom, 0, sizeof(data->eeprom));
for (i = 0; i < sizeof(data->eeprom)/I2C_SMBUS_BLOCK_MAX; i++)
{
status = ak7448_sfp_read_block(client,i * I2C_SMBUS_BLOCK_MAX,data->eeprom + (i * I2C_SMBUS_BLOCK_MAX),I2C_SMBUS_BLOCK_MAX);
if (status < 0)
{
printk(KERN_INFO "status = %d\n", status);
dev_dbg(&client->dev,"unable to read eeprom from port(%d)\n", data->port);
goto exit;
}
}
data->last_updated = jiffies;
data->valid = 1;
}
exit:
mutex_unlock(&data->update_lock);
return data;
}
/* sysfs attributes for hwmon */
static SENSOR_DEVICE_ATTR(sfp_eeprom,S_IRUGO, for_eeprom, NULL,SFP_EEPROM);
static SENSOR_DEVICE_ATTR(sfp_select_port, S_IWUSR | S_IRUGO, for_r_port_data, set_w_port_data, SFP_SELECT_PORT);
static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, for_status, NULL, SFP_IS_PRESENT);
static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, for_status, NULL, SFP_IS_PRESENT_ALL);
static SENSOR_DEVICE_ATTR(sfp_lp_mode,S_IWUSR | S_IRUGO, for_status, set_w_lp_mode_data, SFP_LP_MODE);
static SENSOR_DEVICE_ATTR(sfp_reset, S_IWUSR | S_IRUGO, for_status, set_w_reset_data, SFP_RESET);
static struct attribute *ak7448_sfp_attributes[] = {
&sensor_dev_attr_sfp_eeprom.dev_attr.attr,
&sensor_dev_attr_sfp_select_port.dev_attr.attr,
&sensor_dev_attr_sfp_is_present.dev_attr.attr,
&sensor_dev_attr_sfp_is_present_all.dev_attr.attr,
&sensor_dev_attr_sfp_lp_mode.dev_attr.attr,
&sensor_dev_attr_sfp_reset.dev_attr.attr,
NULL
};
static const struct attribute_group ak7448_sfp_group = {
.attrs = ak7448_sfp_attributes,
};
static int ak7448_sfp_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct ak7448_sfp_data *data;
int status;
if (!i2c_check_functionality(client->adapter,I2C_FUNC_SMBUS_I2C_BLOCK))
{
status = -EIO;
goto exit;
}
data = kzalloc(sizeof(struct ak7448_sfp_data), GFP_KERNEL);
if (!data) {
status = -ENOMEM;
goto exit;
}
mutex_init(&data->update_lock);
data->port = id->driver_data;
i2c_set_clientdata(client, data);
dev_info(&client->dev, "chip found\n");
status = sysfs_create_group(&client->dev.kobj, &ak7448_sfp_group);
if (status)
goto exit_sysfs_create_group;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev))
{
status = PTR_ERR(data->hwmon_dev);
goto exit_hwmon_device_register;
}
dev_info(&client->dev, "%s: sfp '%s'\n", dev_name(data->hwmon_dev),client->name);
return 0;
exit_hwmon_device_register:
sysfs_remove_group(&client->dev.kobj, &ak7448_sfp_group);
exit_sysfs_create_group:
kfree(data);
exit:
return status;
}
static int ak7448_sfp_remove(struct i2c_client *client)
{
struct ak7448_sfp_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &ak7448_sfp_group);
kfree(data);
return 0;
}
enum id_name
{
dni_ak7448_sfp
};
static const struct i2c_device_id ak7448_sfp_id[] = {
{ "dni_ak7448_sfp", dni_ak7448_sfp },
{}
};
MODULE_DEVICE_TABLE(i2c, ak7448_sfp_id);
static struct i2c_driver ak7448_sfp_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "dni_ak7448_sfp",
},
.probe = ak7448_sfp_probe,
.remove = ak7448_sfp_remove,
.id_table = ak7448_sfp_id,
.address_list = normal_i2c,
};
static int __init ak7448_sfp_init(void)
{
return i2c_add_driver(&ak7448_sfp_driver);
}
static void __exit ak7448_sfp_exit(void)
{
i2c_del_driver(&ak7448_sfp_driver);
}
MODULE_AUTHOR("Aries Lin <aries.lin@deltaww.com>");
MODULE_DESCRIPTION("ak7448 SFP Driver");
MODULE_LICENSE("GPL");
module_init(ak7448_sfp_init);
module_exit(ak7448_sfp_exit);

15
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/fani.c
View File

@@ -96,16 +96,13 @@ dni_fani_info_get_fan(int local_id, onlp_fan_info_t* info)
mux_info_t mux_info;
dev_info_t dev_info;
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = FAN_I2C_MUX_SEL_REG;
mux_info.channel = FAN_I2C_SEL_FAN_CTRL;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_7;
dev_info.addr = FAN_IO_CTL;
dev_info.offset = 0x00;
dev_info.flags = DEFAULT_FLAG;
dev_info.flags = ONLP_I2C_F_FORCE;
sprintf(fullpath, "%s%s", PREFIX_PATH, fan_path[local_id].speed);
rpm = dni_i2c_lock_read_attribute(&mux_info, fullpath);
@@ -160,11 +157,8 @@ dni_fani_info_get_fan_on_psu(int local_id, onlp_fan_info_t* info)
dev_info_t dev_info;
mux_info_t mux_info;
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = PSU_I2C_MUX_SEL_REG;
mux_info.channel = PSU_I2C_SEL_PSU_EEPROM;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_4;
dev_info.addr = PSU_EEPROM;
@@ -291,11 +285,8 @@ onlp_fani_rpm_set(onlp_oid_t id, int rpm)
}
sprintf(data, "%d", rpm);
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = FAN_I2C_MUX_SEL_REG;
mux_info.channel = FAN_I2C_SEL_FAN_CTRL;
mux_info.flags = DEFAULT_FLAG;
ret = dni_i2c_lock_write_attribute(&mux_info, data, fullpath);
if(ret == -1){
@@ -321,10 +312,6 @@ onlp_fani_percentage_set(onlp_oid_t id, int percentage)
char fullpath[70] = {0};
mux_info_t mux_info;
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.flags = DEFAULT_FLAG;
VALIDATE(id);
local_id = ONLP_OID_ID_GET(id);

35
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/ledi.c
View File

@@ -101,13 +101,10 @@ onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
dev_info.offset = 0x00;
dev_info.flags = DEFAULT_FLAG;
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = FAN_I2C_MUX_SEL_REG;
mux_info.flags = DEFAULT_FLAG;
/* Set front panel's mode of leds */
r_data = dni_lock_cpld_read_attribute(CPLD_B_PATH,LED_REG);
r_data = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,LED_REG);
if(r_data == -1){
AIM_LOG_ERROR("Unable to read front panel led status from reg\r\n");
return ONLP_STATUS_E_INTERNAL;
@@ -149,7 +146,7 @@ onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
case LED_REAR_FAN_TRAY_1:
dev_info.addr = FAN_TRAY;
mux_info.channel = 0x02;
r_data = dni_lock_cpld_read_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG);
r_data = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG);
if(r_data == -1){
AIM_LOG_ERROR("Unable to read fan tray 1 led status from reg\r\n");
return ONLP_STATUS_E_INTERNAL;
@@ -171,7 +168,7 @@ onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
case LED_REAR_FAN_TRAY_2:
dev_info.addr = FAN_TRAY;
mux_info.channel = 0x01;
r_data = dni_lock_cpld_read_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG);
r_data = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG);
if(r_data == -1){
AIM_LOG_ERROR("Unable to read fan tray 2 led status from reg\r\n");
return ONLP_STATUS_E_INTERNAL;
@@ -194,7 +191,7 @@ onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
case LED_REAR_FAN_TRAY_3:
dev_info.addr = FAN_TRAY;
mux_info.channel = 0x00;
r_data = dni_lock_cpld_read_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG);
r_data = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG);
if(r_data == -1){
AIM_LOG_ERROR("Unable to read fan tray 3 led status from reg\r\n");
return ONLP_STATUS_E_INTERNAL;
@@ -261,7 +258,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
switch(local_id)
{
case LED_FRONT_FAN:
front_panel_led_value = dni_lock_cpld_read_attribute(CPLD_B_PATH,LED_REG);
front_panel_led_value = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,LED_REG);
if(front_panel_led_value == -1 ){
AIM_LOG_ERROR("Unable to read led(%d) status from reg\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
@@ -278,7 +275,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
front_panel_led_value = front_panel_led_value;
}
if(dni_lock_cpld_write_attribute(CPLD_B_PATH,LED_REG,front_panel_led_value) != 0){
if(dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH,LED_REG,front_panel_led_value) != 0){
AIM_LOG_ERROR("Unable to set led(%d) status\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
}
@@ -286,7 +283,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
break;
case LED_FRONT_SYS:
front_panel_led_value = dni_lock_cpld_read_attribute(CPLD_B_PATH,LED_REG);
front_panel_led_value = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,LED_REG);
if(front_panel_led_value == -1 ){
AIM_LOG_ERROR("Unable to read led(%d) status from reg\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
@@ -306,7 +303,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
front_panel_led_value = front_panel_led_value;
}
if(dni_lock_cpld_write_attribute(CPLD_B_PATH,LED_REG,front_panel_led_value) != 0){
if(dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH,LED_REG,front_panel_led_value) != 0){
AIM_LOG_ERROR("Unable to set led(%d) status\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
}
@@ -314,7 +311,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
break;
case LED_FRONT_PWR:
front_panel_led_value = dni_lock_cpld_read_attribute(CPLD_B_PATH,LED_REG);
front_panel_led_value = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,LED_REG);
if(front_panel_led_value == -1 ){
AIM_LOG_ERROR("Unable to read led(%d) status from reg\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
@@ -334,7 +331,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
front_panel_led_value = front_panel_led_value;
}
if(dni_lock_cpld_write_attribute(CPLD_B_PATH,LED_REG,front_panel_led_value) != 0){
if(dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH,LED_REG,front_panel_led_value) != 0){
AIM_LOG_ERROR("Unable to set led(%d) status\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
}
@@ -342,7 +339,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
break;
case LED_REAR_FAN_TRAY_1:
fan_tray_led_reg_value = dni_lock_cpld_read_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG);
fan_tray_led_reg_value = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG);
if(fan_tray_led_reg_value == -1 ){
AIM_LOG_ERROR("Unable to read led(%d) status from reg\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
@@ -359,7 +356,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
fan_tray_led_reg_value = fan_tray_led_reg_value;
}
if(dni_lock_cpld_write_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG,fan_tray_led_reg_value) != 0){
if(dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG,fan_tray_led_reg_value) != 0){
AIM_LOG_ERROR("Unable to set led(%d) status\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
}
@@ -367,7 +364,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
break;
case LED_REAR_FAN_TRAY_2:
fan_tray_led_reg_value = dni_lock_cpld_read_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG);
fan_tray_led_reg_value = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG);
if(fan_tray_led_reg_value == -1 ){
AIM_LOG_ERROR("Unable to read led(%d) status from reg\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
@@ -384,7 +381,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
fan_tray_led_reg_value = fan_tray_led_reg_value;
}
if(dni_lock_cpld_write_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG,fan_tray_led_reg_value) != 0){
if(dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG,fan_tray_led_reg_value) != 0){
AIM_LOG_ERROR("Unable to set led(%d) status\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
}
@@ -392,7 +389,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
break;
case LED_REAR_FAN_TRAY_3:
fan_tray_led_reg_value = dni_lock_cpld_read_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG);
fan_tray_led_reg_value = dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG);
if(fan_tray_led_reg_value == -1 ){
AIM_LOG_ERROR("Unable to read led(%d) status from reg\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
@@ -409,7 +406,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
fan_tray_led_reg_value = fan_tray_led_reg_value;
}
if(dni_lock_cpld_write_attribute(CPLD_B_PATH,FAN_TRAY_LED_REG,fan_tray_led_reg_value) != 0){
if(dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH,FAN_TRAY_LED_REG,fan_tray_led_reg_value) != 0){
AIM_LOG_ERROR("Unable to set led(%d) status\r\n",local_id);
return ONLP_STATUS_E_INTERNAL;
}

90
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/platform_lib.c
View File

@@ -41,29 +41,24 @@ int dni_i2c_read_attribute_binary(char *filename, char *buffer, int buf_size, in
int fd;
int len;
if ((buffer == NULL) || (buf_size < 0))
{
if ((buffer == NULL) || (buf_size < 0)) {
return -1;
}
if ((fd = open(filename, O_RDONLY)) == -1)
{
if ((fd = open(filename, O_RDONLY)) == -1) {
return -1;
}
if ((len = read(fd, buffer, buf_size)) < 0)
{
if ((len = read(fd, buffer, buf_size)) < 0) {
close(fd);
return -1;
}
if ((close(fd) == -1))
{
if ((close(fd) == -1)) {
return -1;
}
if ((len > buf_size) || (data_len != 0 && len != data_len))
{
if ((len > buf_size) || (data_len != 0 && len != data_len)) {
return -1;
}
@@ -93,10 +88,9 @@ int dni_i2c_lock_read( mux_info_t * mux_info, dev_info_t * dev_info)
int r_data=0;
pthread_mutex_lock(&mutex);
if(mux_info != NULL)
{
if(mux_info != NULL){
char cpld_path[100] = {0};
sprintf(cpld_path, "%s/%d-%04x", PREFIX_PATH, mux_info->bus, mux_info->addr);
sprintf(cpld_path, "%s", CPLD_B_PLATFORM_PATH);
dni_lock_cpld_write_attribute(cpld_path, mux_info->offset, mux_info->channel);
}
if(dev_info->size == 1)
@@ -111,19 +105,23 @@ int dni_i2c_lock_read( mux_info_t * mux_info, dev_info_t * dev_info)
int dni_i2c_lock_write( mux_info_t * mux_info, dev_info_t * dev_info)
{
pthread_mutex_lock(&mutex);
if(mux_info != NULL)
{
int ret;
if(mux_info != NULL){
char cpld_path[100] = {0};
sprintf(cpld_path, "%s/%d-%04x", PREFIX_PATH, mux_info->bus, mux_info->addr);
sprintf(cpld_path, "%s", CPLD_B_PLATFORM_PATH);
dni_lock_cpld_write_attribute(cpld_path, mux_info->offset, mux_info->channel);
}
/* Write size */
if(dev_info->size == 1)
onlp_i2c_write(dev_info->bus, dev_info->addr, dev_info->offset, 1, &dev_info->data_8, dev_info->flags);
ret = onlp_i2c_write(dev_info->bus, dev_info->addr, dev_info->offset, 1, &dev_info->data_8, dev_info->flags);
else
onlp_i2c_writew(dev_info->bus, dev_info->addr, dev_info->offset, dev_info->data_16, dev_info->flags);
ret = onlp_i2c_writew(dev_info->bus, dev_info->addr, dev_info->offset, dev_info->data_16, dev_info->flags);
pthread_mutex_unlock(&mutex);
if (ret != 0)
{
return -1;
}
return 0;
}
@@ -133,18 +131,15 @@ int dni_i2c_lock_read_attribute(mux_info_t * mux_info, char * fullpath)
char r_data[10] = {0};
pthread_mutex_lock(&mutex);
if(mux_info != NULL)
{
if(mux_info != NULL){
char cpld_path[100] = {0};
sprintf(cpld_path, "%s/%d-%04x", PREFIX_PATH, mux_info->bus, mux_info->addr);
sprintf(cpld_path, "%s", CPLD_B_PLATFORM_PATH);
dni_lock_cpld_write_attribute(cpld_path, mux_info->offset, mux_info->channel);
}
if ((fd = open(fullpath, O_RDONLY)) == -1)
{
if ((fd = open(fullpath, O_RDONLY)) == -1){
goto ERROR;
}
if ((len = read(fd, r_data, nbytes)) <= 0)
{
if ((len = read(fd, r_data, nbytes)) <= 0){
goto ERROR;
}
close(fd);
@@ -160,21 +155,18 @@ int dni_i2c_lock_write_attribute(mux_info_t * mux_info, char * data,char * fullp
{
int fd, len, nbytes = 10;
pthread_mutex_lock(&mutex);
if(mux_info!=NULL)
{
if(mux_info!=NULL){
char cpld_path[100] = {0};
sprintf(cpld_path, "%s/%d-%04x", PREFIX_PATH, mux_info->bus, mux_info->addr);
sprintf(cpld_path, "%s", CPLD_B_PLATFORM_PATH);
dni_lock_cpld_write_attribute(cpld_path, mux_info->offset, mux_info->channel);
}
/* Create output file descriptor */
fd = open(fullpath, O_WRONLY, 0644);
if (fd == -1)
{
if (fd == -1){
goto ERROR;
}
len = write (fd, data, (ssize_t) nbytes);
if (len != nbytes)
{
if (len != nbytes){
goto ERROR;
}
close(fd);
@@ -201,26 +193,22 @@ int dni_lock_cpld_read_attribute(char *cpld_path, int addr)
pthread_mutex_lock(&mutex1);
/* Create output file descriptor */
fd = open(cpld_addr_path, O_WRONLY, 0644);
if (fd == -1)
{
fd = open(cpld_addr_path, O_WRONLY, 0644);
if (fd == -1){
goto ERR_HANDLE;
}
len = write (fd, address, 2);
if (len <= 0)
{
if (len <= 0){
goto ERR_HANDLE;
}
close(fd);
if ((fd = open(cpld_data_path, O_RDONLY)) == -1)
{
if ((fd = open(cpld_data_path, O_RDONLY, 0644)) == -1){
goto ERR_HANDLE;
}
if ((len = read(fd, r_data, nbytes)) <= 0)
{
if ((len = read(fd, r_data, nbytes)) <= 0){
goto ERR_HANDLE;
}
close(fd);
@@ -229,7 +217,7 @@ int dni_lock_cpld_read_attribute(char *cpld_path, int addr)
sscanf(r_data, "%x", &data);
return data;
ERR_HANDLE:
ERR_HANDLE:
close(fd);
pthread_mutex_unlock(&mutex1);
return -1;
@@ -250,26 +238,22 @@ int dni_lock_cpld_write_attribute(char *cpld_path, int addr, int data)
pthread_mutex_lock(&mutex1);
/* Create output file descriptor */
fd = open(cpld_addr_path, O_WRONLY, 0644);
if (fd == -1)
{
if (fd == -1){
goto ERR_HANDLE;
}
len = write(fd, address, 2);
if(len <= 0)
{
if(len <= 0){
goto ERR_HANDLE;
}
close(fd);
fd = open(cpld_data_path, O_WRONLY, 0644);
if (fd == -1)
{
if (fd == -1){
goto ERR_HANDLE;
}
sprintf(address, "%02x", data);
len = write (fd, address, 2);
if(len <= 0)
{
if(len <= 0){
goto ERR_HANDLE;
}
close(fd);
@@ -277,7 +261,7 @@ int dni_lock_cpld_write_attribute(char *cpld_path, int addr, int data)
return 0;
ERR_HANDLE:
ERR_HANDLE:
close(fd);
pthread_mutex_unlock(&mutex1);
return -1;
@@ -288,11 +272,9 @@ int dni_fan_speed_good()
{
int rpm = 0, rpm1 = 0, speed_good = 0;
mux_info_t mux_info;
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = FAN_I2C_MUX_SEL_REG;
mux_info.channel = FAN_I2C_SEL_FAN_CTRL;
mux_info.flags = DEFAULT_FLAG;
rpm = dni_i2c_lock_read_attribute(&mux_info, FAN1_FRONT);
rpm1 = dni_i2c_lock_read_attribute(&mux_info, FAN1_REAR);

20
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/platform_lib.h
View File

@@ -45,9 +45,6 @@
#define NUM_OF_PORT NUM_OF_SFP + NUM_OF_QSFP
#define PREFIX_PATH "/sys/bus/i2c/devices"
#define SYS_CPLD_PATH PREFIX_PATH "/2-0031"
#define CPLD_A_PATH PREFIX_PATH "/5-0033"
#define CPLD_B_PATH PREFIX_PATH "/5-0032"
#define PSU_AC_PMBUS_PREFIX PREFIX_PATH "/4-0058/"
#define PSU_AC_PMBUS_NODE(node) PSU_AC_PMBUS_PREFIX#node
@@ -60,16 +57,14 @@
#define FAN3_REAR PREFIX_PATH "/7-002d/fan1_input"
#define IDPROM_PATH "/sys/devices/pci0000:00/0000:00:13.0/i2c-1/i2c-2/2-0053/eeprom"
#define SFP_SELECT_PORT_PATH PREFIX_PATH "/8-0050/sfp_select_port"
#define SFP_IS_PRESENT_PATH PREFIX_PATH "/8-0050/sfp_is_present"
#define SFP_IS_PRESENT_ALL_PATH PREFIX_PATH "/8-0050/sfp_is_present_all"
#define SFP_EEPROM_PATH PREFIX_PATH "/8-0050/sfp_eeprom"
#define CPLD_B_PLATFORM_PATH "/sys/devices/platform/delta-ak7448-cpld.0"
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
#define SFP_SELECT_PORT_PATH "/sys/devices/platform/delta-ak7448-cpld.0/sfp_select_port"
#define SFP_IS_PRESENT_PATH "/sys/devices/platform/delta-ak7448-cpld.0/sfp_is_present"
#define SFP_IS_PRESENT_ALL_PATH "/sys/devices/platform/delta-ak7448-cpld.0/sfp_is_present_all"
#define QSFP_SELECT_PORT_PATH PREFIX_PATH "/3-0050/sfp_select_port"
#define QSFP_IS_PRESENT_PATH PREFIX_PATH "/3-0050/sfp_is_present"
#define QSFP_EEPROM_PATH PREFIX_PATH "/3-0050/sfp_eeprom"
#define QSFP_RESET_PATH PREFIX_PATH "/3-0050/sfp_reset"
#define QSFP_LP_MODE_PATH PREFIX_PATH "/3-0050/sfp_lp_mode"
#define QSFP_RESET_PATH "/sys/devices/platform/delta-ak7448-cpld.0/sfp_reset"
#define QSFP_LP_MODE_PATH "/sys/devices/platform/delta-ak7448-cpld.0/sfp_lp_mode"
/* BUS define */
#define I2C_BUS_0 (0)
@@ -96,7 +91,6 @@
#define QSFP_RESPOND_REG (0x0b)
#define SYS_CPLD (0x31)
#define CPLD_A (0x33)
#define CPLD_B (0x32)
#define SYS_VERSION_REG (0x01)
#define CPLD_A_VERSION_REG (0x00)
#define CPLD_B_VERSION_REG (0x01)

3
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/psui.c
View File

@@ -151,11 +151,8 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
memset(info, 0, sizeof(onlp_psu_info_t));
*info = pinfo[index];
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = PSU_I2C_MUX_SEL_REG;
mux_info.channel = PSU_I2C_SEL_PSU_EEPROM;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_4;
dev_info.offset = 0x00; /* In EEPROM address 0x00 */

334
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/sfpi.c
View File

@@ -30,10 +30,18 @@
#include <unistd.h>
#include <sys/ioctl.h>
#include <math.h>
#include <onlplib/file.h>
#include <onlplib/i2c.h>
#include "platform_lib.h"
/******************* Utility Function *****************************************/
int sfp_map_bus[] ={30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
70, 71, 72, 73, 74, 75, 76, 77, 20, 21,
22, 23};
int
ak7448_get_respond_val(int port){
int respond_default = 0xff;
@@ -65,6 +73,14 @@ onlp_sfpi_init(void){
return ONLP_STATUS_OK;
}
int
onlp_sfpi_map_bus_index(int port)
{
if(port < 0 || port > 52)
return ONLP_STATUS_E_INTERNAL;
return sfp_map_bus[port-1];
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap){
/*Ports {1, 52}*/
@@ -82,35 +98,20 @@ onlp_sfpi_is_present(int port){
char port_data[2];
int present, present_bit;
if(port > 0 && port < 49)
{
/* Select QSFP port */
if(port > 0 && port < 53)
{
/* Select QSFP/SFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH) < 0){
AIM_LOG_ERROR("Unable to select port(%d)\r\n", port);
}
/* Read SFP MODULE is present or not */
/* Read QSFP/SFP MODULE is present or not */
present_bit = dni_i2c_lock_read_attribute(NULL, SFP_IS_PRESENT_PATH);
if(present_bit < 0){
AIM_LOG_ERROR("Unable to read present or not from port(%d)\r\n", port);
}
}
else if(port > 48 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_ERROR("Unable to select port(%d)\r\n", port);
}
/* Read SFP MODULE is present or not */
present_bit = dni_i2c_lock_read_attribute(NULL, QSFP_IS_PRESENT_PATH);
if(present_bit < 0){
AIM_LOG_ERROR("Unable to read present or not from port(%d)\r\n", port);
}
}
/* From sfp_is_present value,
* return 0 = The module is preset
@@ -180,9 +181,9 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
char port_data[2];
int sfp_respond_reg;
int sfp_respond_val;
int size = 0;
/* Get respond register if port have it */
@@ -190,49 +191,22 @@ onlp_sfpi_eeprom_read(int port, uint8_t data[256])
/* Set respond val */
sfp_respond_val = ak7448_get_respond_val(port);
dni_lock_cpld_write_attribute(CPLD_B_PATH, sfp_respond_reg, sfp_respond_val);
dni_lock_cpld_write_attribute(CPLD_B_PLATFORM_PATH, sfp_respond_reg, sfp_respond_val);
if(port > 0 && port < 49)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
memset(data, 0, 256);
if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, onlp_sfpi_map_bus_index(port)) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
else if(port > 48 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0 ){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
memset(data, 0 ,256);
/* Read eeprom information into data[] */
if(port > 0 && port < 49)
{
if(dni_i2c_read_attribute_binary(SFP_EEPROM_PATH, (char *)data, 256, 256) != 0)
{
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
else if(port > 48 && port < 53)
{
if(dni_i2c_read_attribute_binary(QSFP_EEPROM_PATH, (char *)data, 256, 256) != 0)
{
AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
if (size != 256) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size is different!\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int onlp_sfpi_port_map(int port, int* rport)
@@ -248,7 +222,7 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
int value_t;
char port_data[2];
if(port > 0 && port < 49)
if(port > 0 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
@@ -256,17 +230,6 @@ onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
else if(port > 48 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
switch (control) {
@@ -315,7 +278,7 @@ onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
int value_t;
char port_data[2];
if(port > 0 && port < 49)
if(port > 0 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
@@ -323,19 +286,7 @@ onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
else if(port > 48 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
switch (control) {
case ONLP_SFP_CONTROL_RESET_STATE:
@@ -370,186 +321,51 @@ onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
int
onlp_sfpi_dev_readb(int port, uint8_t devaddr, uint8_t addr)
{
char port_data[2];
int sfp_respond_reg, sfp_respond_val;
dev_info_t dev_info;
/* Get respond register if port have it */
sfp_respond_reg = ak7448_get_respond_reg(port);
/* Set respond val */
sfp_respond_val = ak7448_get_respond_val(port);
dni_lock_cpld_write_attribute(CPLD_B_PATH, sfp_respond_reg, sfp_respond_val);
if(port > 0 && port < 49)
{
dev_info.bus = I2C_BUS_8;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
int bus;
bus = onlp_sfpi_map_bus_index(port);
if(devaddr == 0x51){
addr += 256;
}
else if(port > 48 && port < 53)
{
dev_info.bus = I2C_BUS_3;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
dev_info.addr = PORT_ADDR;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 1; /* Read 1 byte */
return dni_i2c_lock_read(NULL, &dev_info);
return onlp_i2c_readb(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writeb(int port, uint8_t devaddr, uint8_t addr, uint8_t value)
{
char port_data[2];
int sfp_respond_reg, sfp_respond_val;
dev_info_t dev_info;
int bus;
/* Get respond register if port have it */
sfp_respond_reg = ak7448_get_respond_reg(port);
/* Set respond val */
sfp_respond_val = ak7448_get_respond_val(port);
dni_lock_cpld_write_attribute(CPLD_B_PATH, sfp_respond_reg, sfp_respond_val);
if(port > 0 && port < 49)
{
dev_info.bus = I2C_BUS_8;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
bus = onlp_sfpi_map_bus_index(port);
if(devaddr == 0x51){
addr += 256;
}
else if(port > 48 && port < 53)
{
dev_info.bus = I2C_BUS_3;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
dev_info.addr = PORT_ADDR;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 1; /* Write 1 byte */
dev_info.data_8 = value;
return dni_i2c_lock_write(NULL, &dev_info);
return onlp_i2c_writeb(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
{
char port_data[2];
int sfp_respond_reg, sfp_respond_val;
dev_info_t dev_info;
/* Get respond register if port have it */
sfp_respond_reg = ak7448_get_respond_reg(port);
/* Set respond val */
sfp_respond_val = ak7448_get_respond_val(port);
dni_lock_cpld_write_attribute(CPLD_B_PATH, sfp_respond_reg, sfp_respond_val);
if(port > 0 && port < 49)
{
dev_info.bus = I2C_BUS_8;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
int bus;
bus = onlp_sfpi_map_bus_index(port);
if(devaddr == 0x51){
addr += 256;
}
else if(port > 48 && port < 53)
{
dev_info.bus = I2C_BUS_3;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
dev_info.addr = PORT_ADDR;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 2; /* Read 1 byte */
return dni_i2c_lock_read(NULL, &dev_info);
return onlp_i2c_readw(bus, devaddr, addr, ONLP_I2C_F_FORCE);
}
int
onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
{
char port_data[2];
int sfp_respond_reg, sfp_respond_val;
dev_info_t dev_info;
/* Get respond register if port have it */
sfp_respond_reg = ak7448_get_respond_reg(port);
/* Set respond val */
sfp_respond_val = ak7448_get_respond_val(port);
dni_lock_cpld_write_attribute(CPLD_B_PATH, sfp_respond_reg, sfp_respond_val);
if(port > 0 && port < 49)
{
dev_info.bus = I2C_BUS_8;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, SFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
int bus;
bus = onlp_sfpi_map_bus_index(port);
if(devaddr == 0x51){
addr += 256;
}
else if(port > 48 && port < 53)
{
dev_info.bus = I2C_BUS_3;
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
dev_info.addr = PORT_ADDR;
dev_info.offset = addr;
dev_info.flags = ONLP_I2C_F_FORCE;
dev_info.size = 2; /* Write 2 byte */
dev_info.data_16 = value;
return dni_i2c_lock_write(NULL, &dev_info);
return onlp_i2c_writew(bus, devaddr, addr, value, ONLP_I2C_F_FORCE);
}
int
@@ -557,7 +373,7 @@ onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* rv)
{
char port_data[2] ;
if(port > 0 && port < 49)
if(port > 0 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
@@ -566,15 +382,6 @@ onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* rv)
return ONLP_STATUS_E_INTERNAL;
}
}
else if(port > 48 && port < 53)
{
/* Select QSFP port */
sprintf(port_data, "%d", port );
if(dni_i2c_lock_write_attribute(NULL, port_data, QSFP_SELECT_PORT_PATH) < 0){
AIM_LOG_INFO("Unable to select port(%d)\r\n", port);
return ONLP_STATUS_E_INTERNAL;
}
}
switch (control) {
case ONLP_SFP_CONTROL_RESET_STATE:
@@ -605,8 +412,6 @@ onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* rv)
return ONLP_STATUS_OK;
}
int
onlp_sfpi_denit(void)
{
@@ -622,7 +427,30 @@ onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
return ONLP_STATUS_E_UNSUPPORTED;
FILE* fp;
char file[64] = {0};
sprintf(file, PORT_EEPROM_FORMAT, onlp_sfpi_map_bus_index(port));
fp = fopen(file, "r");
if(fp == NULL) {
AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
if (fseek(fp, 256, SEEK_CUR) != 0) {
fclose(fp);
AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
int ret = fread(data, 1, 256, fp);
fclose(fp);
if (ret != 256) {
AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d)", port);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int

43
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/sysi.c
View File

@@ -55,33 +55,27 @@ decide_percentage(int *percentage, int temper)
{
int level;
if(temper <= 50)
{
if(temper <= 50){
*percentage = 50;
level = 1;
}
else if(temper > 50 && temper <= 55)
{
else if(temper > 50 && temper <= 55){
*percentage = 58;
level = 2;
}
else if(temper > 55 && temper <= 60)
{
else if(temper > 55 && temper <= 60){
*percentage = 65;
level = 3;
}
else if(temper > 60 && temper <= 65)
{
else if(temper > 60 && temper <= 65){
*percentage = 80;
level = 4;
}
else if(temper > 65)
{
else if(temper > 65){
*percentage = 100;
level = 5;
}
else
{
else{
*percentage = 100;
level = 6;
}
@@ -117,11 +111,24 @@ onlp_sysi_onie_data_free(uint8_t* data)
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
dev_info_t dev_info;
int sys_cpld_version = 0, cpld_a_version = 0, cpld_b_version = 0;
sys_cpld_version = dni_lock_cpld_read_attribute(SYS_CPLD_PATH,SYS_VERSION_REG);
cpld_a_version = dni_lock_cpld_read_attribute(CPLD_A_PATH,CPLD_A_VERSION_REG);
cpld_b_version = (dni_lock_cpld_read_attribute(CPLD_B_PATH,CPLD_B_VERSION_REG) & 0x7);
dev_info.bus = I2C_BUS_5;
dev_info.addr = CPLD_A;
dev_info.offset = CPLD_A_VERSION_REG;
dev_info.size = 1;
dev_info.flags = ONLP_I2C_F_FORCE;
cpld_a_version = dni_i2c_lock_read(NULL, &dev_info);
dev_info.bus = I2C_BUS_2;
dev_info.addr = SYS_CPLD;
dev_info.offset = SYS_VERSION_REG;
dev_info.size = 1;
dev_info.flags = DEFAULT_FLAG;
sys_cpld_version = dni_i2c_lock_read(NULL, &dev_info);
cpld_b_version = (dni_lock_cpld_read_attribute(CPLD_B_PLATFORM_PATH,CPLD_B_VERSION_REG) & 0x7);
pi->cpld_versions = aim_fstrdup("SYSTEM-CPLD = %d, CPLD-A = %d, CPLD-B = %d", sys_cpld_version, cpld_a_version, cpld_b_version);
@@ -245,10 +252,7 @@ onlp_sysi_platform_manage_leds(void)
mux_info_t mux_info;
dev_info_t dev_info;
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = FAN_I2C_MUX_SEL_REG;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_7;
dev_info.offset = 0x00;
@@ -343,11 +347,8 @@ onlp_sysi_platform_manage_leds(void)
}
/* Set front light of PWR */
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = PSU_I2C_MUX_SEL_REG;
mux_info.channel = PSU_I2C_SEL_PSU_EEPROM;
mux_info.flags = DEFAULT_FLAG;
dev_info.bus = I2C_BUS_4;
dev_info.offset = 0x00;

3
packages/platforms/delta/x86-64/x86-64-delta-ak7448/onlp/builds/src/module/src/thermali.c
View File

@@ -154,11 +154,8 @@ onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
return ONLP_STATUS_E_INVALID;
}
mux_info.bus = I2C_BUS_5;
mux_info.addr = CPLD_B;
mux_info.offset = offset;
mux_info.channel = channel;
mux_info.flags = DEFAULT_FLAG;
sprintf(fullpath, "%s%s", PREFIX_PATH, last_path[local_id]);

37
packages/platforms/delta/x86-64/x86-64-delta-ak7448/platform-config/r0/src/python/x86_64_delta_ak7448_r0/__init__.py
View File

@@ -11,25 +11,22 @@ class OnlPlatform_x86_64_delta_ak7448_r0(OnlPlatformDelta,
#PCA9548 modulize
self.new_i2c_device('pca9547', 0x71, 1)
#Insert cpld module
self.insmod('i2c_cpld')
self.new_i2c_device('cpld', 0x31, 2)
self.new_i2c_device('cpld', 0x33, 5)
self.new_i2c_device('cpld', 0x32, 5)
self.insmod('optoe')
self.insmod('delta_ak7448_platform')
#IDEEPROM modulize
self.new_i2c_device('24c02', 0x53, 2)
#Insert psu module
self.insmod('dni_ak7448_psu')
os.system("echo 0x04 > /sys/bus/i2c/devices/5-0032/addr")
os.system("echo 0x02 > /sys/bus/i2c/devices/5-0032/data")
os.system("echo 0x04 > /sys/devices/platform/delta-ak7448-cpld.0/addr")
os.system("echo 0x02 > /sys/devices/platform/delta-ak7448-cpld.0/data")
self.new_i2c_device('dni_ak7448_psu', 0x58, 4)
#Insert fan module
self.insmod('dni_emc2305')
os.system("echo 0x0a > /sys/bus/i2c/devices/5-0032/addr")
os.system("echo 0x05 > /sys/bus/i2c/devices/5-0032/data")
os.system("echo 0x0a > /sys/devices/platform/delta-ak7448-cpld.0/addr")
os.system("echo 0x05 > /sys/devices/platform/delta-ak7448-cpld.0/data")
self.new_i2c_device('emc2305', 0x2c, 7)
self.new_i2c_device('emc2305', 0x2d, 7)
@@ -38,23 +35,27 @@ class OnlPlatform_x86_64_delta_ak7448_r0(OnlPlatformDelta,
self.new_i2c_device('tmp75', 0x4c, 6)
self.new_i2c_device('tmp75', 0x4d, 6)
self.new_i2c_device('tmp75', 0x4e, 6)
os.system("echo 0x0a > /sys/bus/i2c/devices/5-0032/addr")
os.system("echo 0x06 > /sys/bus/i2c/devices/5-0032/data")
os.system("echo 0x0a > /sys/devices/platform/delta-ak7448-cpld.0/addr")
os.system("echo 0x06 > /sys/devices/platform/delta-ak7448-cpld.0/data")
self.new_i2c_device('tmp75', 0x4f, 7)
#Insert sfp module
self.insmod('dni_ak7448_sfp')
self.new_i2c_device('dni_ak7448_sfp', 0x50, 3)
self.new_i2c_device('dni_ak7448_sfp', 0x50, 8)
#Set front panel sys light
os.system("echo 0x09 > /sys/bus/i2c/devices/5-0032/addr")
os.system("echo 0x03 > /sys/bus/i2c/devices/5-0032/data")
os.system("echo 0x09 > /sys/devices/platform/delta-ak7448-cpld.0/addr")
os.system("echo 0x03 > /sys/devices/platform/delta-ak7448-cpld.0/data")
#Set thermal Thigh & Tlow
os.system("echo 80000 > /sys/class/hwmon/hwmon6/temp1_max")
os.system("echo 75000 > /sys/class/hwmon/hwmon6/temp1_max_hyst")
#Set SFP port name
for port in range(1, 49):
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port+29), shell=True)
#Set QSFP port name
for port in range(49, 53):
subprocess.call('echo port%d > /sys/bus/i2c/devices/%d-0050/port_name' % (port, port-29), shell=True)
return True