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Merge pull request #562 from phani-karanam/add_ONLPv2_for_wedge100bf_32x

Browse Source 
Added tested ONLPv2 support for wedge100BF_32x & onlps will run fast
This commit is contained in:
Jeffrey Townsend
2019-07-05 11:15:52 -07:00
committed by GitHub
parent d896122156 51e6ec8082
commit f63c9adad9
14 changed files with 948 additions and 475 deletions
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36
packages/base/any/kernels/4.14-lts/configs/x86_64-all/x86_64-all.config Executable file → Normal file
View File

@@ -1936,9 +1936,43 @@ CONFIG_USB_NET_DRIVERS=y
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_RTL8152 is not set
# CONFIG_USB_LAN78XX is not set
# CONFIG_USB_USBNET is not set
CONFIG_USB_USBNET=y
# CONFIG_USB_IPHETH is not set
# CONFIG_WLAN is not set
# CONFIG_USB_NET_AX8817X is not set
# CONFIG_USB_NET_AX88179_178A is not set
CONFIG_USB_NET_CDCETHER=y
# CONFIG_USB_NET_CDC_EEM is not set
CONFIG_USB_NET_CDC_NCM=y
# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
# CONFIG_USB_NET_CDC_MBIM is not set
# CONFIG_USB_NET_DM9601 is not set
# CONFIG_USB_NET_SR9700 is not set
# CONFIG_USB_NET_SR9800 is not set
# CONFIG_USB_NET_SMSC75XX is not set
# CONFIG_USB_NET_SMSC95XX is not set
# CONFIG_USB_NET_GL620A is not set
CONFIG_USB_NET_NET1080=y
# CONFIG_USB_NET_PLUSB is not set
# CONFIG_USB_NET_MCS7830 is not set
# CONFIG_USB_NET_RNDIS_HOST is not set
CONFIG_USB_NET_CDC_SUBSET_ENABLE=y
CONFIG_USB_NET_CDC_SUBSET=y
# CONFIG_USB_ALI_M5632 is not set
# CONFIG_USB_AN2720 is not set
CONFIG_USB_BELKIN=y
# CONFIG_USB_ARMLINUX is not set
# CONFIG_USB_EPSON2888 is not set
# CONFIG_USB_KC2190 is not set
CONFIG_USB_NET_ZAURUS=y
# CONFIG_USB_NET_CX82310_ETH is not set
# CONFIG_USB_NET_KALMIA is not set
# CONFIG_USB_NET_QMI_WWAN is not set
# CONFIG_USB_NET_INT51X1 is not set
# CONFIG_USB_IPHETH is not set
# CONFIG_USB_SIERRA_NET is not set
# CONFIG_USB_VL600 is not set
# CONFIG_USB_NET_CH9200 is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers

2
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/Makefile
View File

@@ -3,7 +3,7 @@
#
#
###############################################################################
include ../../init.mk
include $(ONL)/make/config.mk
MODULE := x86_64_accton_wedge100bf_32x
AUTOMODULE := x86_64_accton_wedge100bf_32x
include $(BUILDER)/definemodule.mk

74
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/attributei.c
View File

@@ -1,26 +1,68 @@
#include <onlp/platformi/attributei.h>
#include <onlp/stdattrs.h>
#include <onlplib/file.h>
#include "platform_lib.h"
int
onlp_attributei_onie_info_get(onlp_oid_t oid, onlp_onie_info_t* rp)
{
if(oid != ONLP_OID_CHASSIS) {
return ONLP_STATUS_E_UNSUPPORTED;
}
#define ONIE_FIELD_CPY(dst, src, field) \
if (src.field != NULL) { \
dst->field = malloc(strlen(src.field) + 1); \
strcpy(dst->field, src.field); \
} \
//return onlp_onie_decode_file(rp, IDPROM_PATH);
return ONLP_STATUS_E_UNSUPPORTED;
/**
* @brief Initialize the attribute subsystem.
*/
int onlp_attributei_sw_init(void) {
return ONLP_STATUS_OK;
}
int
onlp_attributei_asset_info_get(onlp_oid_t oid, onlp_asset_info_t* rp)
{
if(oid != ONLP_OID_CHASSIS) {
return ONLP_STATUS_E_UNSUPPORTED;
}
/**
* @brief Initialize the attribute subsystem.
*/
int onlp_attributei_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
rp->oid = oid;
rp->firmware_revision = "fixme";
/**
* Access to standard attributes.
*/
/**
* @brief Get an OID's ONIE attribute.
* @param oid The target OID
* @param rv [out] Receives the ONIE information if supported.
* @note if rv is NULL you should only return whether the attribute is supported.
*/
int onlp_attributei_onie_info_get(onlp_oid_t oid, onlp_onie_info_t* rp)
{
if(rp == NULL) {
return ONLP_STATUS_OK;
}
return onlp_onie_decode_file(rp, IDPROM_PATH);
}
/**
* @brief Get an OID's Asset attribute.
* @param oid The target OID.
* @param rv [out] Receives the Asset information if supported.
* @note if rv is NULL you should only return whether the attribute is supported.
*/
int onlp_attributei_asset_info_get(onlp_oid_t oid, onlp_asset_info_t* rp)
{
if(rp == NULL) {
return ONLP_STATUS_OK;
}
onlp_onie_info_t onie_info;
onlp_attributei_onie_info_get(oid, &onie_info);
rp->oid = oid;
ONIE_FIELD_CPY(rp, onie_info, manufacturer)
ONIE_FIELD_CPY(rp, onie_info, part_number)
ONIE_FIELD_CPY(rp, onie_info, serial_number)
ONIE_FIELD_CPY(rp, onie_info, manufacture_date)
return ONLP_STATUS_OK;
}

89
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/chassisi.c
View File

@@ -1,11 +1,84 @@
#include <onlp/platformi/chassisi.h>
#include "platform_lib.h"
int
onlp_chassisi_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* hdr)
{
int i;
onlp_oid_t* e = hdr->coids;
ONLP_OID_STATUS_FLAG_SET(hdr, PRESENT);
ONLP_OID_STATUS_FLAG_SET(hdr, OPERATIONAL);
/**
* @brief Software initializaiton of the Chassis module.
*/
int onlp_chassisi_sw_init(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Hardware initializaiton of the Chassis module.
* @param flags The hardware initialization flags.
*/
int onlp_chassisi_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
/**
* @brief Deinitialize the chassis software module.
* @note The primary purpose of this API is to properly
* deallocate any resources used by the module in order
* faciliate detection of real resouce leaks.
*/
int onlp_chassisi_sw_denit(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Get the chassis hdr structure.
* @param id The Chassis OID.
* @param[out] hdr Receives the header.
*/
int onlp_chassisi_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* hdr)
{
int i;
onlp_oid_t* e = hdr->coids;
ONLP_OID_STATUS_FLAG_SET(hdr, PRESENT);
ONLP_OID_STATUS_FLAG_SET(hdr, OPERATIONAL);
/* 8 Thermal sensors on the chassis */
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++)
{
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* 2 LEDs on the chassis */
for (i = 1; i <= CHASSIS_LED_COUNT; i++)
{
*e++ = ONLP_LED_ID_CREATE(i);
}
/* 2 PSUs on the chassis */
for (i = 1; i <= CHASSIS_PSU_COUNT; i++)
{
*e++ = ONLP_PSU_ID_CREATE(i);
}
/* 5 Fans on the chassis */
for (i = 1; i <= CHASSIS_FAN_COUNT; i++)
{
*e++ = ONLP_FAN_ID_CREATE(i);
}
/* 32 QSFPs */
for(i = 1; i <= 32; i++) {
*e++ = ONLP_SFP_ID_CREATE(i);
}
bmc_tty_init();
return ONLP_STATUS_OK;
}
/**
* @brief Get the chassis info structure.
* @param id The Chassis OID.
* @param[out] info Receives the chassis information.
*/
int onlp_chassisi_info_get(onlp_oid_id_t id, onlp_chassis_info_t* info) {
onlp_chassisi_hdr_get(id, &info->hdr);
return ONLP_STATUS_OK;
}

125
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/fani.c
View File

@@ -24,37 +24,32 @@
*
***********************************************************/
#include <onlplib/file.h>
#include <onlp/platformi/base.h>
#include <onlp/platformi/fani.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_FAN(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define MAX_FAN_SPEED 15400
#define BIT(i) (1 << (i))
#define BIT(i) (1 << (i))
enum fan_id {
FAN_1_ON_FAN_BOARD = 1,
FAN_2_ON_FAN_BOARD,
FAN_3_ON_FAN_BOARD,
FAN_4_ON_FAN_BOARD,
FAN_5_ON_FAN_BOARD,
FAN_1_ON_FAN_BOARD = 1,
FAN_2_ON_FAN_BOARD,
FAN_3_ON_FAN_BOARD,
FAN_4_ON_FAN_BOARD,
FAN_5_ON_FAN_BOARD,
};
#define FAN_BOARD_PATH "/sys/bus/i2c/devices/8-0033/"
#define FAN_BOARD_PATH "/sys/bus/i2c/devices/8-0033/"
#define CHASSIS_FAN_INFO(fid) \
{ \
{ ONLP_FAN_ID_CREATE(FAN_##fid##_ON_FAN_BOARD), "Chassis Fan - "#fid, 0 },\
0x0,\
ONLP_FAN_DIR_F2B,\
ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,\
0,\
0,\
ONLP_FAN_MODE_INVALID,\
"",\
"",\
}
/* Static fan information */
@@ -67,26 +62,61 @@ onlp_fan_info_t finfo[] = {
CHASSIS_FAN_INFO(5)
};
/*
* This function will be called prior to all of onlp_fani_* functions.
/**
* @brief Software initialization of the Fan module.
*/
int
onlp_fani_init(void)
{
int onlp_fani_sw_init(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Hardware initialization of the Fan module.
* @param flags The hardware initialization flags.
*/
int onlp_fani_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
int
onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
{
/**
* @brief Deinitialize the fan software module.
* @note The primary purpose of this API is to properly
* deallocate any resources used by the module in order
* faciliate detection of real resouce leaks.
*/
int onlp_fani_sw_denit(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Retrieve the fan's OID hdr.
* @param id The fan id.
* @param[out] hdr Receives the OID header.
*/
int onlp_fani_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* hdr) {
onlp_fan_info_t info;
onlp_fani_info_get(id, &info);
*hdr = info.hdr;
return ONLP_STATUS_OK;
}
/**
* @brief Get the information structure for the given fan OID.
* @param id The fan id
* @param[out] rv Receives the fan information.
*/
int onlp_fani_info_get(onlp_oid_id_t id, onlp_fan_info_t* info) {
int value = 0, fid;
char path[64] = {0};
VALIDATE(id);
fid = ONLP_OID_ID_GET(id);
*info = finfo[fid];
/* get fan present status
*
* 0x0 Present
* 0x1 Not present
*/
sprintf(path, "%s""fantray_present", FAN_BOARD_PATH);
@@ -96,10 +126,12 @@ onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
}
if (value & BIT(fid-1)) {
// Not present bit set for fan N.
// Return latest info for the fan.
return ONLP_STATUS_OK;
}
info->status |= ONLP_FAN_STATUS_PRESENT;
info->hdr.status |= ONLP_OID_STATUS_FLAG_PRESENT;
/* get front fan rpm
*/
@@ -108,7 +140,7 @@ onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
if (bmc_file_read_int(&value, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
}
info->rpm = value;
/* get rear fan rpm
@@ -126,26 +158,35 @@ onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
info->rpm = value;
}
/* set fan status based on rpm
*/
if (!info->rpm) {
info->status |= ONLP_FAN_STATUS_FAILED;
info->hdr.status |= ONLP_OID_STATUS_FLAG_FAILED;
return ONLP_STATUS_OK;
}
/* get speed percentage from rpm
/* get speed percentage from rpm
*/
info->percentage = (info->rpm * 100)/MAX_FAN_SPEED;
/* set fan direction
*/
info->status |= ONLP_FAN_STATUS_F2B;
info->dir = ONLP_FAN_DIR_F2B;
return ONLP_STATUS_OK;
}
/**
* @brief Get the fan capabilities.
* @param id The fan id.
* @param[out] rv The fan capabilities
*/
int onlp_fani_caps_get(onlp_oid_id_t id, uint32_t* rv) {
int fid = ONLP_OID_ID_GET(id);
*rv = finfo[fid].caps;
return ONLP_STATUS_OK;
}
/*
* This function sets the speed of the given fan in RPM.
*
@@ -183,18 +224,6 @@ onlp_fani_percentage_set(onlp_oid_t id, int p)
return ONLP_STATUS_OK;
}
/*
* This function sets the fan speed of the given OID as per
* the predefined ONLP fan speed modes: off, slow, normal, fast, max.
*
* Interpretation of these modes is up to the platform.
*
*/
int
onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* This function sets the fan direction of the given OID.
@@ -210,13 +239,5 @@ onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
return ONLP_STATUS_E_UNSUPPORTED;
}
/*
* Generic fan ioctl. Optional.
*/
int
onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

127
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/ledi.c
View File

@@ -28,13 +28,6 @@
#include <onlp/platformi/ledi.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_LED(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
/* LED related data
*/
enum onlp_led_id
@@ -83,33 +76,58 @@ static onlp_led_info_t linfo[] =
{ }, /* Not used */
{
{ ONLP_LED_ID_CREATE(LED_SYS1), "Chassis LED 1 (SYS LED 1)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF |
ONLP_LED_CAPS_OFF |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING |
ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING |
ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING,
},
{
{ ONLP_LED_ID_CREATE(LED_SYS2), "Chassis LED 1 (SYS LED 2)", 0 },
ONLP_LED_STATUS_PRESENT,
ONLP_LED_CAPS_ON_OFF |
ONLP_LED_CAPS_OFF |
ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING |
ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING |
ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING,
},
};
/*
* This function will be called prior to any other onlp_ledi_* functions.
/**
* @brief Software initialization of the LED module.
*/
int
onlp_ledi_init(void)
{
int onlp_ledi_sw_init(void) {
return ONLP_STATUS_OK;
}
static int
reg_value_to_onlp_led_mode(enum onlp_led_id id, int value)
/**
* @brief Hardware initialization of the LED module.
* @param flags The hardware initialization flags.
*/
int onlp_ledi_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
/**
* @brief Deinitialize the LED software module.
* @note The primary purpose of this API is to properly
* deallocate any resources used by the module in order
* faciliate detection of real resource leaks.
*/
int onlp_ledi_sw_denit(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Get the LED's oid header.
* @param id The LED OID.
* @param[out] rv Receives the header.
*/
int onlp_ledi_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* rv) {
onlp_led_info_t info;
onlp_ledi_info_get(id, &info);
*rv = info.hdr;
return ONLP_STATUS_OK;
}
static int reg_value_to_onlp_led_mode(enum onlp_led_id id, int value)
{
int i;
@@ -124,8 +142,7 @@ reg_value_to_onlp_led_mode(enum onlp_led_id id, int value)
return ONLP_LED_MODE_AUTO;
}
static int
onlp_led_mode_to_reg_value(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
static int onlp_led_mode_to_reg_value(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
{
int i;
@@ -140,51 +157,32 @@ onlp_led_mode_to_reg_value(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
return 0;
}
int
onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
int onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
{
int lid, value;
VALIDATE(id);
lid = ONLP_OID_ID_GET(id);
int value;
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[ONLP_OID_ID_GET(id)];
*info = linfo[id];
value = onlp_i2c_readb(led_addr[lid].bus, led_addr[lid].devaddr, led_addr[lid].offset, ONLP_I2C_F_FORCE);
value = onlp_i2c_readb(led_addr[id].bus, led_addr[id].devaddr, led_addr[id].offset, ONLP_I2C_F_FORCE);
if (value < 0) {
return ONLP_STATUS_E_INTERNAL;
}
info->mode = reg_value_to_onlp_led_mode(lid, value);
/* Set the on/off status */
if (info->mode != ONLP_LED_MODE_OFF) {
info->status |= ONLP_LED_STATUS_ON;
}
info->mode = reg_value_to_onlp_led_mode(id, value);
return ONLP_STATUS_OK;
}
/*
* Turn an LED on or off.
*
* This function will only be called if the LED OID supports the ONOFF
* capability.
*
* What 'on' means in terms of colors or modes for multimode LEDs is
* up to the platform to decide. This is intended as baseline toggle mechanism.
/**
* @brief Get the fan capabilities.
* @param id The fan id.
* @param[out] rv The fan capabilities
*/
int
onlp_ledi_set(onlp_oid_t id, int on_or_off)
{
VALIDATE(id);
if (!on_or_off) {
return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
}
return ONLP_STATUS_E_UNSUPPORTED;
int onlp_ledi_caps_get(onlp_oid_id_t id, uint32_t* rv) {
*rv = linfo[id].caps;
return ONLP_STATUS_OK;
}
/*
@@ -193,16 +191,12 @@ onlp_ledi_set(onlp_oid_t id, int on_or_off)
*
* Only modes reported in the LED's capabilities will be attempted.
*/
int
onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
int onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
{
int lid, value;
VALIDATE(id);
lid = ONLP_OID_ID_GET(id);
value = onlp_led_mode_to_reg_value(lid, mode);
if (onlp_i2c_writeb(led_addr[lid].bus, led_addr[lid].devaddr, led_addr[lid].offset, value, ONLP_I2C_F_FORCE) < 0) {
int value;
value = onlp_led_mode_to_reg_value(id, mode);
if (onlp_i2c_writeb(led_addr[id].bus, led_addr[id].devaddr, led_addr[id].offset, value, ONLP_I2C_F_FORCE) < 0) {
return ONLP_STATUS_E_INTERNAL;
}
@@ -210,11 +204,14 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode)
}
/*
* Generic LED ioctl interface.
* This function sets the LED character of the given OID.
*
* This function is only relevant if the LED OID supports character
* set capabilities.
*
* This function is optional unless the functionality is available.
*/
int
onlp_ledi_ioctl(onlp_oid_t id, va_list vargs)
int onlp_ledi_char_set(onlp_oid_t id, char c)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

182
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/platform_lib.c
View File

@@ -31,12 +31,13 @@
#define TTY_DEVICE "/dev/ttyACM0"
#define TTY_PROMPT "@bmc:"
#define TTY_I2C_TIMEOUT 800000
#define TTY_I2C_TIMEOUT 55000
#define TTY_BMC_LOGIN_TIMEOUT 1000000
#define TTY_RETRY 10
#define TTY_RETRY 10
#define MAXIMUM_TTY_BUFFER_LENGTH 1024
#define MAXIMUM_TTY_STRING_LENGTH (MAXIMUM_TTY_BUFFER_LENGTH - 1)
static int tty_fd = -1;
static char tty_buf[MAXIMUM_TTY_BUFFER_LENGTH] = {0};
@@ -86,6 +87,7 @@ static int tty_exec_buf(unsigned long udelay, const char *str)
write(tty_fd, tty_buf, strlen(tty_buf)+1);
usleep(udelay);
memset(tty_buf, 0, MAXIMUM_TTY_BUFFER_LENGTH);
read(tty_fd, tty_buf, MAXIMUM_TTY_BUFFER_LENGTH);
return (strstr(tty_buf, str) != NULL) ? 0 : -1;
}
@@ -96,7 +98,7 @@ static int tty_login(void)
for (i = 1; i <= TTY_RETRY; i++) {
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "\r\r");
if (!tty_exec_buf(0, TTY_PROMPT)) {
if (!tty_exec_buf(TTY_BMC_LOGIN_TIMEOUT, TTY_PROMPT)) {
return 0;
}
@@ -118,26 +120,51 @@ static int tty_login(void)
return -1;
}
int bmc_tty_init(void)
{
int i;
if (tty_fd >= 0){
return 0;
}
for (i = 1; i <= TTY_RETRY; i++) {
if (tty_open() != 0) {
AIM_LOG_ERROR("ERROR: Cannot open TTY device\n");
continue;
}
if (tty_login() != 0) {
AIM_LOG_ERROR("ERROR: Cannot login TTY device\n");
tty_close();
continue;
}
return 0;
}
AIM_LOG_ERROR("Unable to init bmc tty\r\n");
return -1;
}
int bmc_tty_deinit(void)
{
if( tty_fd != -1 ){
tty_close();
}
else{
AIM_LOG_ERROR("ERROR: TTY not open\n");
}
return 0;
}
int bmc_send_command(char *cmd)
{
int i, ret = 0;
for (i = 1; i <= TTY_RETRY; i++) {
if (tty_open() != 0) {
printf("ERROR: Cannot open TTY device\n");
continue;
}
if (tty_login() != 0) {
//printf("ERROR: Cannot login TTY device\n");
tty_close();
continue;
}
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "%s", cmd);
ret = tty_exec_buf(TTY_I2C_TIMEOUT * i, TTY_PROMPT);
tty_close();
snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "%s", cmd);
ret = tty_exec_buf(TTY_I2C_TIMEOUT, TTY_PROMPT);
if (ret != 0) {
printf("ERROR: bmc_send_command timed out\n");
AIM_LOG_ERROR("ERROR: bmc_send_command(%s) timed out\n", cmd);
continue;
}
@@ -148,6 +175,103 @@ int bmc_send_command(char *cmd)
return -1;
}
int bmc_file_read_str(char *file, char *result, int slen)
{
char *curr = NULL;
char cmd[88] = {0};
char *delimit="^@\r\n";
int flag = 0, ret = 0;
ret = snprintf(cmd, sizeof(cmd), "cat %s\r\n", file);
if( ret >= sizeof(cmd) ){
AIM_LOG_ERROR("cmd size overwrite (%d,%d)\r\n", ret, sizeof(cmd));
return ONLP_STATUS_E_INTERNAL;
}
bmc_send_command(cmd);
strtok(tty_buf, delimit);
flag = 0;
while( (curr = strtok(NULL, delimit)) != NULL ){
switch (*curr) {
case '\n':
case '\r':
case '@':
case '^':
break;
default:
flag = 1;
break;
}
if( flag ){
break;
}
}
ret = snprintf(result, slen-1, "%s", curr);
if( ret >= (slen-1) ){
AIM_LOG_ERROR("result size overwrite (%d,%d)\r\n", ret, slen-1);
return ONLP_STATUS_E_INTERNAL;
}
return 0;
}
int chk_numeric_char(char *data, int base)
{
int len, i, orig = 0;
if( *data == '\0' ){
return 0;
}
len = (int) strlen(data);
if( base == 10 ){
for( i=0; i<len; i++ ){
if( i && ( *(data+i) == 0xd ) ){
break;
}
if( i && ( *(data+i) == 0xa ) ){
break;
}
if( *(data+i) < '0' ){
return 0;
}
if( *(data+i) > '9' ){
return 0;
}
}
return 1;
}
else if( base == 16 ){
if( !memcmp(data, "0x", 2) ){
if( len <= 2 ){
return 0;
}
orig = 2;
}
else if( !memcmp(data, "0X", 2) ){
if( len <= 2 ){
return 0;
}
orig = 2;
}
for( i=orig; i<len; i++ ){
if( (i > orig) && ( *(data+i) == 0xd ) ){
break;
}
if( (i > orig) && ( *(data+i) == 0xa ) ){
break;
}
if( !( ( (*(data+i) >= '0') && (*(data+i) <= '9') ) ||
( (*(data+i) >= 'A') && (*(data+i) <= 'F') ) ||
( (*(data+i) >= 'a') && (*(data+i) <= 'f') )
)
){
return 0;
}
}
return 1;
}
return 0;
}
int
bmc_command_read_int(int* value, char *cmd, int base)
{
@@ -166,6 +290,9 @@ bmc_command_read_int(int* value, char *cmd, int base)
for (i = 1; i <= TTY_RETRY; i++) {
current_str = strstr(prev_str + len, cmd);
if(current_str == NULL) {
if( !chk_numeric_char(prev_str + len, base) ){
return -1;
}
*value = strtoul(prev_str + len, NULL, base);
break;
}else {
@@ -181,8 +308,19 @@ int
bmc_file_read_int(int* value, char *file, int base)
{
char cmd[64] = {0};
int i;
snprintf(cmd, sizeof(cmd), "cat %s\r\n", file);
return bmc_command_read_int(value, cmd, base);
for (i = 1; i <= TTY_RETRY; i++) {
if(bmc_command_read_int(value, cmd, base) < 0) {
if(i == TTY_RETRY) {
return -1;
}
}
else {
break;
}
}
return 0;
}
int
@@ -204,6 +342,14 @@ bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value)
return bmc_send_command(cmd);
}
int
bmc_i2c_write_quick_mode(uint8_t bus, uint8_t devaddr, uint8_t value)
{
char cmd[64] = {0};
snprintf(cmd, sizeof(cmd), "i2cset -f -y %d 0x%x 0x%x\r\n", bus, devaddr, value);
return bmc_send_command(cmd);
}
int
bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr)
{

19
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/platform_lib.h
View File

@@ -48,22 +48,27 @@ enum onlp_thermal_id
{
THERMAL_RESERVED = 0,
THERMAL_CPU_CORE,
THERMAL_1_ON_MAIN_BROAD,
THERMAL_2_ON_MAIN_BROAD,
THERMAL_3_ON_MAIN_BROAD,
THERMAL_4_ON_MAIN_BROAD,
THERMAL_5_ON_MAIN_BROAD,
THERMAL_6_ON_MAIN_BROAD,
THERMAL_7_ON_MAIN_BROAD,
THERMAL_1_ON_MAIN_BOARD,
THERMAL_2_ON_MAIN_BOARD,
THERMAL_3_ON_MAIN_BOARD,
THERMAL_4_ON_MAIN_BOARD,
THERMAL_5_ON_MAIN_BOARD,
THERMAL_6_ON_MAIN_BOARD,
THERMAL_7_ON_MAIN_BOARD,
};
int bmc_send_command(char *cmd);
int bmc_file_read_str(char *file, char *result, int slen);
int bmc_file_read_int(int* value, char *file, int base);
int bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr);
int bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value);
int bmc_i2c_write_quick_mode(uint8_t bus, uint8_t devaddr, uint8_t value);
int bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr);
int bmc_i2c_readraw(uint8_t bus, uint8_t devaddr, uint8_t addr, char* data, int data_size);
int bmc_tty_init(void);
int bmc_tty_deinit(void);
#endif /* __PLATFORM_LIB_H__ */

167
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/psui.c
View File

@@ -23,21 +23,25 @@
*
*
***********************************************************/
#include <unistd.h>
#include <onlplib/i2c.h>
#include <onlplib/file.h>
#include <onlp/platformi/psui.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_PSU(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define PSU1_ID 1
#define PSU2_ID 2
#define SYS_CPLD_PATH_FMT "/sys/bus/i2c/drivers/syscpld/12-0031/%s"
#define PSU_PRESENT_FMT "psu%d_present"
#define PSU_PWROK_FMT "psu%d_output_pwr_sts"
#define PSU_PFE1100_PATH_FMT "/sys/bus/i2c/devices/7-%s/%s\r\n"
#define PSU_PFE1100_MODEL "mfr_model_label"
#define PSU_PFE1100_SERIAL "mfr_serial_label"
static const char *psu_pfedrv_i2c_devaddr[] = {"0059", "005a"};
/*
* Get all information about the given PSU oid.
*/
@@ -52,11 +56,6 @@ static onlp_psu_info_t pinfo[] =
}
};
int
onlp_psui_init(void)
{
return ONLP_STATUS_OK;
}
static int
twos_complement_to_int(uint16_t data, uint8_t valid_bit, int mask)
@@ -79,96 +78,172 @@ pmbus_parse_literal_format(uint16_t value)
(mantissa * multiplier) / (1 << -exponent);
}
int
onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
{
int pid, value, addr;
/**
* @brief Software initialization of the PSU module.
*/
int onlp_psui_sw_init(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Hardware initialization of the PSU module.
* @param flags The hardware initialization flags.
*/
int onlp_psui_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
/**
* @brief Deinitialize the psu software module.
* @note The primary purpose of this API is to properly
* deallocate any resources used by the module in order
* faciliate detection of real resouce leaks.
*/
int onlp_psui_sw_denit(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Get the PSU's oid header.
* @param id The PSU OID.
* @param[out] rv Receives the header.
*/
int onlp_psui_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* rv) {
onlp_psu_info_t info;
onlp_psui_info_get(id, &info);
*rv = info.hdr;
return ONLP_STATUS_OK;
}
/**
* @brief Get the information structure for the given PSU
* @param id The PSU OID
* @param[out] rv Receives the PSU information.
*/
int onlp_psui_info_get(onlp_oid_id_t id, onlp_psu_info_t* info) {
int value, addr, ret = 0;
char file[32] = {0};
char path[80] = {0};
uint8_t mask = 0;
VALIDATE(id);
pid = ONLP_OID_ID_GET(id);
*info = pinfo[pid]; /* Set the onlp_oid_hdr_t */
*info = pinfo[id]; /* Set the onlp_oid_hdr_t */
/* Get the present status
*/
mask = 1 << ((pid-1) * 4);
value = onlp_i2c_readb(1, 0x32, 0x10, ONLP_I2C_F_FORCE);
if (value < 0) {
ret = snprintf(file, sizeof(file), PSU_PRESENT_FMT, id);
if( ret >= sizeof(file) ){
AIM_LOG_ERROR("file size overwrite (%d,%d)\r\n", ret, sizeof(file));
return ONLP_STATUS_E_INTERNAL;
}
ret = snprintf(path, sizeof(path), SYS_CPLD_PATH_FMT, file);
if( ret >= sizeof(path) ){
AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path));
return ONLP_STATUS_E_INTERNAL;
}
if (bmc_file_read_int(&value, path, 16) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
if (value & mask) {
info->status &= ~ONLP_PSU_STATUS_PRESENT;
if (value) {
info->hdr.status &= ~ONLP_OID_STATUS_FLAG_PRESENT;
return ONLP_STATUS_OK;
}
info->status |= ONLP_PSU_STATUS_PRESENT;
info->caps = ONLP_PSU_CAPS_AC;
info->hdr.status |= ONLP_OID_STATUS_FLAG_PRESENT;
info->type = ONLP_PSU_TYPE_AC;
/* Get power good status
*/
mask = 1 << ((pid-1) * 4 + 1);
if (!(value & mask)) {
info->status |= ONLP_PSU_STATUS_FAILED;
ret = snprintf(file, sizeof(file), PSU_PWROK_FMT, id);
if( ret >= sizeof(file) ){
AIM_LOG_ERROR("file size overwrite (%d,%d)\r\n", ret, sizeof(file));
return ONLP_STATUS_E_INTERNAL;
}
ret = snprintf(path, sizeof(path), SYS_CPLD_PATH_FMT, file);
if( ret >= sizeof(path) ){
AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path));
return ONLP_STATUS_E_INTERNAL;
}
if (bmc_file_read_int(&value, path, 16) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
if (!value) {
info->hdr.status |= ONLP_OID_STATUS_FLAG_FAILED;
return ONLP_STATUS_OK;
}
/* Get input output power status
*/
value = (pid == PSU1_ID) ? 0x2 : 0x1; /* mux channel for psu */
if (bmc_i2c_writeb(7, 0x70, 0, value) < 0) {
value = (id == PSU1_ID) ? 0x2 : 0x1; /* mux channel for psu */
if (bmc_i2c_write_quick_mode(7, 0x70, value) < 0) {
AIM_LOG_ERROR("Unable to set i2c device (7/0x70)\r\n");
return ONLP_STATUS_E_INTERNAL;
}
usleep(1200);
/* Read vin */
addr = (pid == PSU1_ID) ? 0x59 : 0x5a;
addr = (id == PSU1_ID) ? 0x59 : 0x5a;
value = bmc_i2c_readw(7, addr, 0x88);
if (value >= 0) {
info->mvin = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_VIN;
info->caps |= ONLP_PSU_CAPS_GET_VIN;
}
/* Read iin */
value = bmc_i2c_readw(7, addr, 0x89);
if (value >= 0) {
info->miin = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_IIN;
info->caps |= ONLP_PSU_CAPS_GET_IIN;
}
/* Get pin */
if ((info->caps & ONLP_PSU_CAPS_VIN) && (info->caps & ONLP_PSU_CAPS_IIN)) {
if ((info->caps & ONLP_PSU_CAPS_GET_VIN) && (info->caps & ONLP_PSU_CAPS_GET_IIN)) {
info->mpin = info->mvin * info->miin / 1000;
info->caps |= ONLP_PSU_CAPS_PIN;
info->caps |= ONLP_PSU_CAPS_GET_PIN;
}
/* Read iout */
value = bmc_i2c_readw(7, addr, 0x8c);
if (value >= 0) {
info->miout = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_IOUT;
info->caps |= ONLP_PSU_CAPS_GET_IOUT;
}
/* Read pout */
value = bmc_i2c_readw(7, addr, 0x96);
if (value >= 0) {
info->mpout = pmbus_parse_literal_format(value);
info->caps |= ONLP_PSU_CAPS_POUT;
info->caps |= ONLP_PSU_CAPS_GET_POUT;
}
/* Get vout */
if ((info->caps & ONLP_PSU_CAPS_IOUT) && (info->caps & ONLP_PSU_CAPS_POUT) && info->miout != 0) {
info->mvout = info->mpout / info->miout * 1000;
info->caps |= ONLP_PSU_CAPS_VOUT;
if ((info->caps & ONLP_PSU_CAPS_GET_IOUT) && (info->caps & ONLP_PSU_CAPS_GET_POUT) && info->miout != 0) {
info->mvout = info->mpout / info->miout * 1000;
info->caps |= ONLP_PSU_CAPS_GET_VOUT;
}
/* Get model name */
return bmc_i2c_readraw(7, addr, 0x9a, info->model, sizeof(info->model));
ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, psu_pfedrv_i2c_devaddr[id-1], PSU_PFE1100_MODEL);
if( ret >= sizeof(path) ){
AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path));
return ONLP_STATUS_E_INTERNAL;
}
bmc_file_read_str(path, info->model, sizeof(info->model));
/* Get serial number */
ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, psu_pfedrv_i2c_devaddr[id-1], PSU_PFE1100_SERIAL);
if( ret >= sizeof(path) ){
AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path));
return ONLP_STATUS_E_INTERNAL;
}
bmc_file_read_str(path, info->serial, sizeof(info->serial));
return ONLP_STATUS_OK;
}
int
onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
onlp_psui_ioctl(onlp_oid_t id, va_list vargs)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

293
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/sfpi.c
View File

@@ -30,45 +30,18 @@
#include "x86_64_accton_wedge100bf_32x_log.h"
#define BIT(i) (1 << (i))
#define NUM_OF_SFP_PORT 32
#define BIT(i) (1 << (i))
#define NUM_OF_SFP_PORT 32
#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
static const int sfp_bus_index[] = {
3, 2, 5, 4, 7, 6, 9, 8,
11, 10, 13, 12, 15, 14, 17, 16,
19, 18, 21, 20, 23, 22, 25, 24,
27, 26, 29, 28, 31, 30, 33, 32
3, 2, 5, 4, 7, 6, 9, 8,
11, 10, 13, 12, 15, 14, 17, 16,
19, 18, 21, 20, 23, 22, 25, 24,
27, 26, 29, 28, 31, 30, 33, 32
};
/************************************************************
*
* SFPI Entry Points
*
***********************************************************/
int
onlp_sfpi_init(void)
{
/* Called at initialization time */
return ONLP_STATUS_OK;
}
int
onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
{
/*
* Ports {0, 32}
*/
int p;
AIM_BITMAP_CLR_ALL(bmap);
for(p = 0; p < NUM_OF_SFP_PORT; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
static uint8_t
onlp_sfpi_reg_val_to_port_sequence(uint8_t value, int revert)
static uint8_t onlp_sfpi_reg_val_to_port_sequence(uint8_t value, int revert)
{
int i;
uint8_t ret = 0;
@@ -85,14 +58,68 @@ onlp_sfpi_reg_val_to_port_sequence(uint8_t value, int revert)
return revert ? ~ret : ret;
}
int
onlp_sfpi_is_present(int port)
{
/**
* @brief Software initialization of the SFP module.
*/
int onlp_sfpi_sw_init(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Hardware initialization of the SFP module.
* @param flags The hardware initialization flags.
*/
int onlp_sfpi_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
/**
* @brief Deinitialize the chassis software module.
* @note The primary purpose of this API is to properly
* deallocate any resources used by the module in order
* faciliate detection of real resouce leaks.
*/
int onlp_sfpi_sw_denit(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Get the bitmap of SFP-capable port numbers.
* @param[out] bmap Receives the bitmap.
*/
int onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) {
/*
* Return 1 if present.
* Return 0 if not present.
* Return < 0 if error.
* Ports {0, 32}
*/
int p;
AIM_BITMAP_CLR_ALL(bmap);
for(p = 0; p < NUM_OF_SFP_PORT; p++) {
AIM_BITMAP_SET(bmap, p);
}
return ONLP_STATUS_OK;
}
/**
* @brief Determine the SFP connector type.
* @param id The SFP Port ID.
* @param[out] rtype Receives the connector type.
*/
int onlp_sfpi_type_get(onlp_oid_id_t id, onlp_sfp_type_t* rtype) {
*rtype = ONLP_SFP_TYPE_QSFP28;
return ONLP_STATUS_OK;
}
/**
* @brief Determine if an SFP is present.
* @param id The SFP Port ID.
* @returns 1 if present
* @returns 0 if absent
* @returns An error condition.
*/
int onlp_sfpi_is_present(onlp_oid_id_t port) {
int present;
int bus = (port < 16) ? 36 : 37;
int addr = (port < 16) ? 0x22 : 0x23; /* pca9535 slave address */
@@ -114,9 +141,11 @@ onlp_sfpi_is_present(int port)
return !(present & BIT(port % 8));
}
int
onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
{
/**
* @brief Return the presence bitmap for all SFP ports.
* @param[out] dst Receives the presence bitmap.
*/
int onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) {
int i;
uint8_t bytes[4] = {0};
@@ -150,67 +179,155 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
return ONLP_STATUS_OK;
}
int
onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst)
{
/**
* @brief Return the RX_LOS bitmap for all SFP ports.
* @param[out] dst Receives the RX_LOS bitmap.
*/
int onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst) {
return ONLP_STATUS_OK;
}
static int
sfpi_eeprom_read(int port, uint8_t devaddr, uint8_t data[256])
{
int i;
/*
* Read the SFP eeprom into data[]
*
* Return MISSING if SFP is missing.
* Return OK if eeprom is read
*/
memset(data, 0, 256);
for (i = 0; i < 128; i++) {
int bus = sfp_bus_index[port];
int val = onlp_i2c_readw(bus, devaddr, i*2, ONLP_I2C_F_FORCE);
if (val < 0) {
return ONLP_STATUS_E_INTERNAL;
}
data[i*2] = val & 0xff;
data[(i*2)+1] = (val >> 8) & 0xff;
/**
* @brief Read bytes from the target device on the given SFP port.
* @param id The SFP Port ID.
* @param devaddr The device address.
* @param addr Read offset.
* @param[out] dst Receives the data.
* @param len Read length.
* @returns The number of bytes read or ONLP_STATUS_E_* no error.
*/
int onlp_sfpi_dev_read(onlp_oid_id_t id, int devaddr, int addr,
uint8_t* dst, int len) {
int size = 0;
int bus = sfp_bus_index[id];
if(onlp_file_read(dst, len, &size, PORT_EEPROM_FORMAT, bus) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", id);
return ONLP_STATUS_E_INTERNAL;
}
if (size != len) {
AIM_LOG_ERROR("Unable to read eeprom from port(%d), size(%d) is different!\r\n", id, size);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_eeprom_read(int port, uint8_t data[256])
{
return sfpi_eeprom_read(port, 0x50, data);
/**
* @brief Write bytes to the target device on the given SFP port.
* @param id The SFP Port ID.
* @param devaddr The device address.
* @param addr Write offset.
* @param src The bytes to write.
* @param len Write length.
*/
int onlp_sfpi_dev_write(onlp_oid_id_t id, int devaddr, int addr,
uint8_t* src, int len) {
int bus = sfp_bus_index[id];
if(onlp_file_write(src, len, PORT_EEPROM_FORMAT, bus) != ONLP_STATUS_OK) {
AIM_LOG_ERROR("Unable to write into eeprom of that port(%d)\r\n", id);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
}
int
onlp_sfpi_dom_read(int port, uint8_t data[256])
{
return sfpi_eeprom_read(port, 0x51, data);
/**
* @brief Read a byte from the target device on the given SFP port.
* @param id The SFP Port ID.
* @param devaddr The device address.
* @param addr The read address.
* @returns The byte on success or ONLP_STATUS_E* on error.
*/
int onlp_sfpi_dev_readb(onlp_oid_id_t id, int devaddr, int addr) {
int bus = sfp_bus_index[id];
return onlp_i2c_readb(bus, devaddr, addr, 0);
}
int
onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value)
/**
* @brief Write a byte to the target device on the given SFP port.
* @param id The SFP Port ID.
* @param devaddr The device address.
* @param addr The write address.
* @param value The write value.
*/
int onlp_sfpi_dev_writeb(onlp_oid_id_t id, int devaddr, int addr,
uint8_t value) {
int bus = sfp_bus_index[id];
onlp_i2c_writeb(bus, devaddr, addr, value, 0);
return ONLP_STATUS_OK;
}
/**
* @brief Read a word from the target device on the given SFP port.
* @param id The SFP Port ID.
* @param devaddr The device address.
* @param addr The read address.
* @returns The word if successful, ONLP_STATUS_E* on error.
*/
int onlp_sfpi_dev_readw(onlp_oid_id_t id, int devaddr, int addr) {
int bus = sfp_bus_index[id];
return onlp_i2c_readw(bus, devaddr, addr, 0);
}
/**
* @brief Write a word to the target device on the given SFP port.
* @param id The SFP Port ID.
* @param devaddr The device address.
* @param addr The write address.
* @param value The write value.
*/
int onlp_sfpi_dev_writew(onlp_oid_id_t id, int devaddr, int addr,
uint16_t value) {
int bus = sfp_bus_index[id];
onlp_i2c_writew(bus, devaddr, addr, value, 0);
return ONLP_STATUS_OK;
}
/**
* @brief Perform any actions required after an SFP is inserted.
* @param id The SFP Port ID.
* @param info The SFF Module information structure.
* @note This function is optional. If your platform must
* adjust equalizer or preemphasis settings internally then
* this function should be implemented as the trigger.
*/
int onlp_sfpi_post_insert(onlp_oid_id_t id, sff_info_t* info) {
return ONLP_STATUS_OK;
}
/**
* @brief Get the SFP's OID header.
* @param id The SFP oid.
* @param [out] hdr Receives the header.
*/
int onlp_sfpi_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* hdr) {
int is_present = onlp_sfp_is_present(id);
hdr->id = ONLP_SFP_ID_CREATE(id);
hdr->poid = 0;
hdr->status = is_present ? ONLP_OID_STATUS_FLAG_PRESENT : 0;
return ONLP_STATUS_OK;
}
/**
* @brief Set an SFP control.
* @param port The SFP Port ID.
* @param control The control.
* @param value The value.
*/
int onlp_sfpi_control_set(onlp_oid_id_t id, onlp_sfp_control_t control, int value)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value)
/**
* @brief Get an SFP control.
* @param port The SFP Port ID.
* @param control The control
* @param[out] value Receives the current value.
*/
int onlp_sfpi_control_get(onlp_oid_id_t id, onlp_sfp_control_t control, int* value)
{
return ONLP_STATUS_E_UNSUPPORTED;
}
int
onlp_sfpi_denit(void)
{
return ONLP_STATUS_OK;
}

114
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/sysi.c
View File

@@ -1,114 +0,0 @@
/************************************************************
* <bsn.cl fy=2014 v=onl>
*
* Copyright 2014 Big Switch Networks, Inc.
* Copyright 2014 Accton Technology Corporation.
*
* Licensed under the Eclipse Public License, Version 1.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.eclipse.org/legal/epl-v10.html
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
* either express or implied. See the License for the specific
* language governing permissions and limitations under the
* License.
*
* </bsn.cl>
************************************************************
*
*
*
***********************************************************/
#include <unistd.h>
#include <fcntl.h>
#include <onlplib/file.h>
#include <onlp/platformi/sysi.h>
#include <onlp/platformi/ledi.h>
#include <onlp/platformi/thermali.h>
#include <onlp/platformi/fani.h>
#include <onlp/platformi/psui.h>
#include "platform_lib.h"
#include "x86_64_accton_wedge100bf_32x_int.h"
#include "x86_64_accton_wedge100bf_32x_log.h"
const char*
onlp_sysi_platform_get(void)
{
return "x86-64-accton-wedge100bf-32x-r0";
}
int
onlp_sysi_onie_data_get(uint8_t** data, int* size)
{
uint8_t* rdata = aim_zmalloc(256);
if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
if(*size == 256) {
*data = rdata;
return ONLP_STATUS_OK;
}
}
aim_free(rdata);
*size = 0;
return ONLP_STATUS_E_INTERNAL;
}
int
onlp_sysi_oids_get(onlp_oid_t* table, int max)
{
int i;
onlp_oid_t* e = table;
memset(table, 0, max*sizeof(onlp_oid_t));
/* 8 Thermal sensors on the chassis */
for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
*e++ = ONLP_THERMAL_ID_CREATE(i);
}
/* 2 LEDs on the chassis */
for (i = 1; i <= CHASSIS_LED_COUNT; i++) {
*e++ = ONLP_LED_ID_CREATE(i);
}
/* 2 PSUs on the chassis */
for (i = 1; i <= CHASSIS_PSU_COUNT; i++) {
*e++ = ONLP_PSU_ID_CREATE(i);
}
/* 5 Fans on the chassis */
for (i = 1; i <= CHASSIS_FAN_COUNT; i++) {
*e++ = ONLP_FAN_ID_CREATE(i);
}
return 0;
}
int
onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
{
return ONLP_STATUS_OK;
}
void
onlp_sysi_platform_info_free(onlp_platform_info_t* pi)
{
}
int
onlp_sysi_platform_manage_fans(void)
{
return ONLP_STATUS_OK;
}
int
onlp_sysi_platform_manage_leds(void)
{
return ONLP_STATUS_E_UNSUPPORTED;
}

122
packages/platforms/accton/x86-64/wedge100bf-32x/onlp/builds/x86_64_accton_wedge100bf_32x/module/src/thermali.c
View File

@@ -27,13 +27,6 @@
#include <onlp/platformi/thermali.h>
#include "platform_lib.h"
#define VALIDATE(_id) \
do { \
if(!ONLP_OID_IS_THERMAL(_id)) { \
return ONLP_STATUS_E_INVALID; \
} \
} while(0)
#define THERMAL_PATH_FORMAT "/sys/bus/i2c/drivers/lm75/%s/temp1_input"
#define THERMAL_CPU_CORE_PATH_FORMAT "/sys/bus/i2c/drivers/com_e_driver/%s/temp2_input"
@@ -53,82 +46,95 @@ static char* directory[] = /* must map with onlp_thermal_id */
/* Static values */
static onlp_thermal_info_t linfo[] = {
{ }, /* Not used */
{ { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BROAD), "TMP75-1", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BROAD), "TMP75-2", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BOARD), "TMP75-1", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BROAD), "TMP75-3", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BOARD), "TMP75-2", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BROAD), "TMP75-4", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BOARD), "TMP75-3", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_MAIN_BROAD), "TMP75-5", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BOARD), "TMP75-4", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_6_ON_MAIN_BROAD), "TMP75-6", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_MAIN_BOARD), "TMP75-5", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_7_ON_MAIN_BROAD), "TMP75-7", 0},
ONLP_THERMAL_STATUS_PRESENT,
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
{ { ONLP_THERMAL_ID_CREATE(THERMAL_6_ON_MAIN_BOARD), "TMP75-6", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
{ { ONLP_THERMAL_ID_CREATE(THERMAL_7_ON_MAIN_BOARD), "TMP75-7", 0},
ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
},
};
/*
* This will be called to intiialize the thermali subsystem.
/**
* @brief Software initialization of the Thermal module.
*/
int
onlp_thermali_init(void)
{
int onlp_thermali_sw_init(void) {
return ONLP_STATUS_OK;
}
/*
* Retrieve the information structure for the given thermal OID.
*
* If the OID is invalid, return ONLP_E_STATUS_INVALID.
* If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
* Otherwise, return ONLP_STATUS_OK with the OID's information.
*
* Note -- it is expected that you fill out the information
* structure even if the sensor described by the OID is not present.
/**
* @brief Hardware initialization of the Thermal module.
* @param flags The hardware initialization flags.
*/
int
onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
{
int onlp_thermali_hw_init(uint32_t flags) {
return ONLP_STATUS_OK;
}
/**
* @brief Deinitialize the thermal software module.
* @note The primary purpose of this API is to properly
* deallocate any resources used by the module in order
* faciliate detection of real resouce leaks.
*/
int onlp_thermali_sw_denit(void) {
return ONLP_STATUS_OK;
}
/**
* @brief Retrieve the thermal's oid header.
* @param id The thermal oid.
* @param[out] rv Receives the header.
*/
int onlp_thermali_hdr_get(onlp_oid_id_t id, onlp_oid_hdr_t* rv) {
onlp_thermal_info_t info;
onlp_thermali_info_get(id, &info);
*rv = info.hdr;
return ONLP_STATUS_OK;
}
/**
* @brief Get the information for the given thermal OID.
* @param id The Thermal OID
* @param[out] rv Receives the thermal information.
*/
int onlp_thermali_info_get(onlp_oid_id_t id, onlp_thermal_info_t* info) {
int tid;
char path[64] = {0};
VALIDATE(id);
tid = ONLP_OID_ID_GET(id);
/* Set the onlp_oid_hdr_t and capabilities */
/* Set the onlp_oid_hdr_t and capabilities */
*info = linfo[tid];
/* get path */
if (THERMAL_CPU_CORE == tid) {
sprintf(path, THERMAL_CPU_CORE_PATH_FORMAT, directory[tid]);
}else {
sprintf(path, THERMAL_PATH_FORMAT, directory[tid]);
}
if (bmc_file_read_int(&info->mcelsius, path, 10) < 0) {
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path);
return ONLP_STATUS_E_INTERNAL;
}
return ONLP_STATUS_OK;
info->mcelsius = info->mcelsius;
info->hdr.status |= ONLP_OID_STATUS_FLAG_PRESENT;
return ONLP_STATUS_OK;
}

72
packages/platforms/accton/x86-64/wedge100bf-32x/platform-config/r0/src/python/x86_64_accton_wedge100bf_32x_r0/__init__.py
View File

@@ -8,6 +8,8 @@ class OnlPlatform_x86_64_accton_wedge100bf_32x_r0(OnlPlatformAccton,
SYS_OBJECT_ID=".100.32.2"
def baseconfig(self):
self.insmod('optoe')
########### initialize I2C bus 1 ###########
self.new_i2c_devices([
# initialize multiplexer (PCA9548)
@@ -19,5 +21,73 @@ class OnlPlatform_x86_64_accton_wedge100bf_32x_r0(OnlPlatformAccton,
('24c64', 0x50, 40),
])
# Initialize QSFP devices
self.new_i2c_device('optoe1', 0x50, 2)
self.new_i2c_device('optoe1', 0x50, 3)
self.new_i2c_device('optoe1', 0x50, 4)
self.new_i2c_device('optoe1', 0x50, 5)
self.new_i2c_device('optoe1', 0x50, 6)
self.new_i2c_device('optoe1', 0x50, 7)
self.new_i2c_device('optoe1', 0x50, 8)
self.new_i2c_device('optoe1', 0x50, 9)
self.new_i2c_device('optoe1', 0x50, 10)
self.new_i2c_device('optoe1', 0x50, 11)
self.new_i2c_device('optoe1', 0x50, 12)
self.new_i2c_device('optoe1', 0x50, 13)
self.new_i2c_device('optoe1', 0x50, 14)
self.new_i2c_device('optoe1', 0x50, 15)
self.new_i2c_device('optoe1', 0x50, 16)
self.new_i2c_device('optoe1', 0x50, 17)
self.new_i2c_device('optoe1', 0x50, 18)
self.new_i2c_device('optoe1', 0x50, 19)
self.new_i2c_device('optoe1', 0x50, 20)
self.new_i2c_device('optoe1', 0x50, 21)
self.new_i2c_device('optoe1', 0x50, 22)
self.new_i2c_device('optoe1', 0x50, 23)
self.new_i2c_device('optoe1', 0x50, 24)
self.new_i2c_device('optoe1', 0x50, 25)
self.new_i2c_device('optoe1', 0x50, 26)
self.new_i2c_device('optoe1', 0x50, 27)
self.new_i2c_device('optoe1', 0x50, 28)
self.new_i2c_device('optoe1', 0x50, 29)
self.new_i2c_device('optoe1', 0x50, 30)
self.new_i2c_device('optoe1', 0x50, 31)
self.new_i2c_device('optoe1', 0x50, 32)
self.new_i2c_device('optoe1', 0x50, 33)
subprocess.call('echo port1 > /sys/bus/i2c/devices/3-0050/port_name', shell=True)
subprocess.call('echo port2 > /sys/bus/i2c/devices/2-0050/port_name', shell=True)
subprocess.call('echo port3 > /sys/bus/i2c/devices/5-0050/port_name', shell=True)
subprocess.call('echo port4 > /sys/bus/i2c/devices/4-0050/port_name', shell=True)
subprocess.call('echo port5 > /sys/bus/i2c/devices/7-0050/port_name', shell=True)
subprocess.call('echo port6 > /sys/bus/i2c/devices/6-0050/port_name', shell=True)
subprocess.call('echo port7 > /sys/bus/i2c/devices/9-0050/port_name', shell=True)
subprocess.call('echo port8 > /sys/bus/i2c/devices/8-0050/port_name', shell=True)
subprocess.call('echo port9 > /sys/bus/i2c/devices/11-0050/port_name', shell=True)
subprocess.call('echo port10 > /sys/bus/i2c/devices/10-0050/port_name', shell=True)
subprocess.call('echo port11 > /sys/bus/i2c/devices/13-0050/port_name', shell=True)
subprocess.call('echo port12 > /sys/bus/i2c/devices/12-0050/port_name', shell=True)
subprocess.call('echo port13 > /sys/bus/i2c/devices/15-0050/port_name', shell=True)
subprocess.call('echo port14 > /sys/bus/i2c/devices/14-0050/port_name', shell=True)
subprocess.call('echo port15 > /sys/bus/i2c/devices/17-0050/port_name', shell=True)
subprocess.call('echo port16 > /sys/bus/i2c/devices/16-0050/port_name', shell=True)
subprocess.call('echo port17 > /sys/bus/i2c/devices/19-0050/port_name', shell=True)
subprocess.call('echo port18 > /sys/bus/i2c/devices/18-0050/port_name', shell=True)
subprocess.call('echo port19 > /sys/bus/i2c/devices/21-0050/port_name', shell=True)
subprocess.call('echo port20 > /sys/bus/i2c/devices/20-0050/port_name', shell=True)
subprocess.call('echo port21 > /sys/bus/i2c/devices/23-0050/port_name', shell=True)
subprocess.call('echo port22 > /sys/bus/i2c/devices/22-0050/port_name', shell=True)
subprocess.call('echo port23 > /sys/bus/i2c/devices/25-0050/port_name', shell=True)
subprocess.call('echo port24 > /sys/bus/i2c/devices/24-0050/port_name', shell=True)
subprocess.call('echo port25 > /sys/bus/i2c/devices/27-0050/port_name', shell=True)
subprocess.call('echo port26 > /sys/bus/i2c/devices/26-0050/port_name', shell=True)
subprocess.call('echo port27 > /sys/bus/i2c/devices/29-0050/port_name', shell=True)
subprocess.call('echo port28 > /sys/bus/i2c/devices/28-0050/port_name', shell=True)
subprocess.call('echo port29 > /sys/bus/i2c/devices/31-0050/port_name', shell=True)
subprocess.call('echo port30 > /sys/bus/i2c/devices/30-0050/port_name', shell=True)
subprocess.call('echo port31 > /sys/bus/i2c/devices/33-0050/port_name', shell=True)
subprocess.call('echo port32 > /sys/bus/i2c/devices/32-0050/port_name', shell=True)
subprocess.call('ifconfig usb0 up', shell=True)
subprocess.call('ifconfig usb0 192.168.0.2/24', shell=True)
return True

1
setup.env
View File

@@ -56,4 +56,5 @@ export ONLPM_OPTION_PLATFORM_WHITELIST="\
x86-64-accton-as7712-32x-r0
x86-64-accton-as5812-54x-r0
x86-64-inventec-d5254-r0
x86-64-accton-wedge100bf-32x-r0
"