ipq50xx: add EMPLUS WAP385C support

Signed-off-by: Jesse Wu <Jesse.Wu@emplustech.com>
This commit is contained in:
Jesse Wu
2025-06-13 14:16:51 +08:00
committed by John Crispin
parent dc02d2722a
commit 1f7d8a7bb7
11 changed files with 808 additions and 0 deletions

View File

@@ -41,6 +41,7 @@ ALLWIFIBOARDS:= \
edgecore-oap102 \
edgecore-oap103 \
edgecore-eap104 \
emplus-wap385c \
emplus-wap386v2 \
liteon-wpx8324 \
indio-um-310ax-v1 \
@@ -405,6 +406,7 @@ $(eval $(call generate-ath11k-wifi-package,edgecore-eap102,Edgecore EAP102))
$(eval $(call generate-ath11k-wifi-package,edgecore-oap102,Edgecore OAP102))
$(eval $(call generate-ath11k-wifi-package,edgecore-oap103,Edgecore OAP103))
$(eval $(call generate-ath11k-wifi-package,edgecore-eap104,Edgecore EAP104))
$(eval $(call generate-ath11k-wifi-package,emplus-wap385c,Emplus WAP385C))
$(eval $(call generate-ath11k-wifi-package,emplus-wap386v2,Emplus WAP386 V2))
$(eval $(call generate-ath11k-wifi-package,liteon-wpx8324,Liteon WPX8324))
$(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))

View File

@@ -40,6 +40,11 @@ edgecore,oap101e-6e)
ucidef_set_led_netdev "wan" "wan" "red:ethernet" "eth1"
ucidef_set_led_default "power" "POWER" "blue:management" "on"
;;
emplus,wap385c)
ucidef_set_led_default "ledr" "LEDR" "sys:red" "on"
ucidef_set_led_default "ledg" "LEDG" "sys:green" "on"
ucidef_set_led_default "ledb" "LEDB" "sys:blue" "on"
;;
hfcl,ion4x_w|\
hfcl,ion4xi_w)
ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wifi5" "phy0tpt"

View File

@@ -48,6 +48,7 @@ qcom_setup_interfaces()
ucidef_add_switch "switch1" \
"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
emplus,wap385c|\
hfcl,ion4x_w|\
hfcl,ion4xi_w)
ucidef_set_interface_wan "eth0"

View File

@@ -129,6 +129,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
edgecore,oap101-6e|\
edgecore,oap101e|\
edgecore,oap101e-6e|\
emplus,wap385c|\
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
optimcloud,d60|\
@@ -157,6 +158,7 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
edgecore,oap101-6e|\
edgecore,oap101e|\
edgecore,oap101e-6e|\
emplus,wap385c|\
udaya,a6-id2|\
udaya,a6-od2|\
hfcl,ion4xi_w|\

View File

@@ -76,6 +76,7 @@ platform_check_image() {
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,eap104|\
emplus,wap385c|\
wallys,dr5018|\
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
@@ -129,6 +130,7 @@ platform_do_upgrade() {
;;
cig,wf186w|\
cig,wf186h|\
emplus,wap385c|\
udaya,a6-id2|\
udaya,a6-od2|\
wallys,dr5018|\

View File

@@ -0,0 +1,760 @@
/dts-v1/;
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Emplus WAP385C";
compatible = "emplus,wap385c", "qcom,ipq5018-mp03.3", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet1 = "/soc/dp1";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E000000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E100000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E200000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4EF00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F000000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4100000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
no-map;
reg = <0x0 0x4E100000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
no-map;
reg = <0x0 0x4EF00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
no-map;
reg = <0x0 0x4F000000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D300000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D500000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E400000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E900000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4F800000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4D00000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
no-map;
reg = <0x0 0x4D500000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 23 0>;
ethernet-phy@0 {
reg = <24>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x18>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
wifi0: wifi@c000000 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x18>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
qcom,test@0 {
status = "ok";
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
poe_dc_pins: poe_dc_pins {
T2P_DET {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
12V_DET {
pins = "gpio32";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pinmux {
linux,phandle = <0x4d>;
phandle = <0x4d>;
led_G {
pins = "gpio24";
function = "gpio";
bias-pull-down;
drive-strength = <0x08>;
};
led_B {
pins = "gpio28";
function = "gpio";
bias-pull-down;
drive-strength = <0x08>;
};
led_R {
pins = "gpio38";
function = "gpio";
bias-pull-down;
drive-strength = <0x08>;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@24 {
label = "sys:green";
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@28 {
label = "sys:blue";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_power: led@38 {
label = "sys:red";
gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wap385c:sys:red";
default-state = "on";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "ok";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};

View File

@@ -154,6 +154,15 @@ define Device/edgecore_oap101e_6e
endef
TARGET_DEVICES += edgecore_oap101e_6e
define Device/emplus_wap385c
DEVICE_TITLE := Emplus WAP385C
DEVICE_DTS := qcom-ipq5018-emplus-wap385c
SUPPORTED_DEVICES := emplus,wap385c
DEVICE_PACKAGES := ath11k-wifi-emplus-wap385c ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += emplus_wap385c
define Device/hfcl_ion4x_w
DEVICE_TITLE := HFCL ION4x_w
DEVICE_DTS := qcom-ipq5018-hfcl-ion4x_w

View File

@@ -88,6 +88,7 @@ cig,wf189h|\
cig,wf186h|\
cig,wf196|\
cig,wf188n|\
emplus,wap385c|\
emplus,wap386v2|\
yuncore,ax840|\
yuncore,fap655)

View File

@@ -0,0 +1,26 @@
---
profile: emplus_wap385c
target: ipq50xx
subtarget: generic
description: Build image for Emplus WAP385C
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-emplus_wap385c-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq50xx
- iperf3
- lscpu
- tree
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_TFTP=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_GET=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_PUT=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_BLOCKSIZE=y
CONFIG_BUSYBOX_CONFIG_FEATURE_TFTP_PROGRESS_BAR=y
CONFIG_BUSYBOX_CONFIG_MPSTAT=y
CONFIG_BUSYBOX_CONFIG_PSTREE=y