mirror of
https://github.com/Telecominfraproject/wlan-ap.git
synced 2025-10-28 17:12:22 +00:00
ipq807x: add support for indio um345ax
**SPECIFICATION:**
- Chipset: IPQ8072A+QCN5054+QCN5024+QCA80812
- Flash: NOR-8MB AND NAND-128MB
- Memory: 1Gb DDR
- IEEE 802.11: 802.11ax/ac/b/g/n
- 44 2.4G Wi-Fi standard 802.11b/g/n/ax
- 4*4 5.8G Wi-Fi Standard 802.11 a/n/ac/ax
- 2x 1 Gbps Ethernet (QCA8081) with 802.3at PoE input support
- 1x DC Port 12V 3A
- 4x Antenna IPEX Connector, 3dBi omni antennas
- Data Rate: 3657Mbps ( 2.4G: 1182Mbps (11ax 4x4); 5.8G: 2475Mbps (11ax 4x4))
- RF Power: 2.4g ≤ 20dBm; 5.8g ≤ 19dBm
- Max Power Consumption: ≤ 22W
**BACKUP YOUR STOCK FIRMWARE:**
- Put openwrt-*-initramfs-kernel.bin to your TFTP server and rename it to initramfs.bin
- Enable serial console and enter to u-boot cli and exec these commands:
```
tftpboot <your_tftp_server_ip>:initramfs.bin
bootm
```
- Once boot completed and you get the openwrt shell execute below commands:
```
device=<divice_name>
mkdir -p /tmp/fw_backup; cd /tmp/fw_backup
rootfs=$(cat /proc/mtd | grep \"rootfs\" | cut -d: -f1)
rootfs_1=$(cat /proc/mtd | grep \"rootfs_1\" | cut -d: -f1)
dd if=/dev/${rootfs} of=rootfs_${rootfs} bs=1M
dd if=/dev/${rootfs_1} of=rootfs_1_${rootfs_1} bs=1M
cp /sys/firmware/fdt fdt.dtb
md5sum * > md5sum
tar -cvzf /tmp/${device}.tar.gz .
sum=$(md5sum /tmp/${device}.tar.gz | cut -d' ' -f1)
mv /tmp/${device}.tar.gz /tmp/${device}_${sum}.tar.gz
echo "stock fw backup saved to: /tmp/${device}_${sum}.tar.gz"
```
- Upload/save your backup to a safe place.
**STOCK FIRMWARE RECOVERY:**
- Boot initramfs image
- Upload your backed-up stock fw tarball to the device
using scp or download it from the device using wget.
- Enter device ssh cli or tty and exec:
```
cd /tmp && wget <your_web_server_ip>/${stock_fw_backup}.tar.gz`
tar -xpzf ${stock_fw_backup}.tar.gz
rootfs=$(cat /proc/mtd | grep \"rootfs\" | cut -d: -f1)
rootfs_1=$(cat /proc/mtd | grep \"rootfs_1\" | cut -d: -f1)
ubiformat /dev/${rootfs} -y -f /tmp/rootfs_${rootfs}
ubiformat /dev/${rootfs_1} -y -f /tmp/rootfs_1_${rootfs_1}
reboot
```
**INSTALLATION:**
1. initramfs method
- Put openwrt-*-initramfs-kernel.bin to your TFTP server and rename it to initramfs.bin
- Enable serial console and enter to u-boot cli and exec these commands:
```
tftpboot <your_tftp_server_ip>:initramfs.bin
bootm
```
- Once boot completed and you get the openwrt shell execute below commands:
```
cd /tmp && wget <your_web_server_ip>/factory.ubi`
export rootfs=$(cat /proc/mtd | grep rootfs | cut -d: -f1)
export rootfs_1=$(cat /proc/mtd | grep rootfs_1 | cut -d: -f1)
ubiformat /dev/${rootfs} -y -f factory.ubi
ubiformat /dev/${rootfs_1} -y -f factory.ubi
reboot
```
2. u-boot nand-factory.bin image method
- Put openwrt-*-squashfs-nand-factory.bin to your TFTP server and enter u-boot cli and exec these commands:
```
tftpboot <your_tftp_server_ip>:factory.bin
#After downloading is finished:
imxtract 0x44000000 ubi
flash rootfs
flash rootfs_1
reset
```
Signed-off-by: Shubham Vishwakarma <shubhamvis98@fossfrog.in>
This commit is contained in:
Shubham Vishwakarma
committed by
John Crispin
John Crispin
parent
4713ba9acb
commit
7beac05946
@@ -49,6 +49,7 @@ ALLWIFIBOARDS:= \
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indio-um-510axm-v1 \
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indio-um-325ax-v2 \
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indio-um-335ax \
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indio-um-345ax \
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indio-um-525axp \
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indio-um-525axm \
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muxi-ap3220l \
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@@ -447,6 +448,7 @@ $(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1
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$(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
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$(eval $(call generate-ath11k-wifi-package,indio-um-325ax-v2,Indio UM-325AX V2))
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$(eval $(call generate-ath11k-wifi-package,indio-um-335ax,Indio UM-335AX))
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$(eval $(call generate-ath11k-wifi-package,indio-um-345ax,Indio UM-345AX))
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$(eval $(call generate-ath11k-wifi-package,indio-um-525axp,Indio UM-525AXP))
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$(eval $(call generate-ath11k-wifi-package,indio-um-525axm,Indio UM-525AXM))
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$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
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BIN
feeds/ipq807x_v5.4/ath11k-wifi/board-indio-um-345ax.bin.IPQ8074
Normal file
BIN
feeds/ipq807x_v5.4/ath11k-wifi/board-indio-um-345ax.bin.IPQ8074
Normal file
Binary file not shown.
@@ -14,7 +14,8 @@ cig,wf194c4)
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;;
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edgecore,eap102|\
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edgecore,oap102|\
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edgecore,oap103)
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edgecore,oap103|\
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indio,um-345ax)
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ucidef_set_led_netdev "poe" "poe" "green:wan" "eth0"
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ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy0tpt"
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ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt"
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@@ -18,7 +18,8 @@ qcom_setup_interfaces()
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ucidef_set_interface_wan "eth0"
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ucidef_set_interface_lan ""
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;;
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cig,wf194c4)
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cig,wf194c4|\
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indio,um-345ax)
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ucidef_set_interface_lan "eth0"
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ucidef_set_interface_wan "eth1"
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;;
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@@ -73,6 +73,7 @@ case "$FIRMWARE" in
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edgecore,oap103 |\
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edgecore,eap106 |\
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emplus,wap380c|\
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indio,um-345ax|\
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qcom,ipq807x-hk01|\
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qcom,ipq807x-hk14|\
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tplink,ex227|\
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@@ -107,7 +108,8 @@ ath11k-macs)
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edgecore,eap102|\
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edgecore,oap102|\
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edgecore,oap103|\
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edgecore,eap106)
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edgecore,eap106|\
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indio,um-345ax)
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ath11k_generate_macs
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;;
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cig,wf196)
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@@ -30,6 +30,7 @@ platform_check_image() {
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edgecore,oap103|\
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edgecore,eap106|\
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emplus,wap380c|\
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indio,um-345ax|\
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sonicfi,rap650c|\
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tplink,ex227|\
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tplink,ex447)
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@@ -61,7 +62,8 @@ platform_do_upgrade() {
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tplink,ex447)
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nand_upgrade_tar "$1"
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;;
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edgecore,eap106)
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edgecore,eap106|\
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indio,um-345ax)
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CI_UBIPART="rootfs1"
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[ "$(find_mtd_chardev rootfs)" ] && CI_UBIPART="rootfs"
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nand_upgrade_tar "$1"
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@@ -0,0 +1,713 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>
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*/
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/dts-v1/;
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#include "ipq8074.dtsi"
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#include "ipq8074-ac-cpu.dtsi"
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/ {
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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model = "Indio UM-345AX";
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compatible = "indio,um-345ax", "qcom,ipq807x-hk09", "qcom,ipq807x";
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qcom,msm-id = <0x178 0x0>;
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interrupt-parent = <&intc>;
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aliases {
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serial0 = &blsp1_uart5;
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/* Aliases as required by u-boot to patch MAC addresses */
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ethernet1 = "/soc/dp5";
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ethernet0 = "/soc/dp6";
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led-boot = &led_red;
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led-failsafe = &led_red;
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led-running = &led_green;
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led-upgrade = &led_green;
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led-gateway = &led_blue;
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led-factory = &led_blue;
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};
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chosen {
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stdout-path = "serial0";
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};
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soc {
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pinctrl@1000000 {
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pinctrl-0 = <&mcu_rst &mcu_rsv &usb_rear_pwr &usb_side_pwr &usb_hub_rst>;
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pinctrl-names = "default";
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mcu_rst: mcu_rst_pins {
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pins = "gpio54";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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output-low;
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};
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mcu_rsv: mcu_rsv_pins {
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pins = "gpio56";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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};
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usb_rear_pwr: usb_rear_pwr_pins {
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pins = "gpio29";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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output-high;
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};
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usb_side_pwr: usb_side_pwr_pins {
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pins = "gpio30";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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output-high;
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};
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usb_hub_rst: usb_hub_rst_pins {
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pins = "gpio55";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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output-high;
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};
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button_pins: button_pins {
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reset_button {
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pins = "gpio57";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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mdio_pins: mdio_pinmux {
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mux_0 {
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pins = "gpio68";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mux_1 {
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pins = "gpio69";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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mux_2 {
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pins = "gpio25";
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function = "gpio";
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bias-pull-up;
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};
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mux_3 {
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pins = "gpio44";
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function = "gpio";
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bias-pull-up;
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};
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};
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led_pins: led_pins {
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led_red {
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pins = "gpio0";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_2g {
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pins = "gpio2";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_5g {
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pins = "gpio9";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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};
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serial@78b3000 {
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status = "ok";
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};
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spi@78b5000 {
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status = "ok";
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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cs-select = <0>;
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m25p80@0 {
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compatible = "n25q128a11";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <50000000>;
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};
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};
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dma@7984000 {
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status = "ok";
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};
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nand@79b0000 {
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status = "ok";
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nand@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <8>;
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};
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};
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qusb@79000 {
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status = "ok";
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};
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ssphy@78000 {
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status = "ok";
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};
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usb3@8A00000 {
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status = "ok";
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};
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usb3@8C00000 {
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status = "ok";
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};
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qusb@59000 {
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status = "ok";
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};
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ssphy@58000 {
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status = "ok";
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};
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usb3@8C00000 {
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status = "ok";
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};
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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status = "ok";
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button@1 {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
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linux,input-type = <1>;
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debounce-interval = <60>;
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};
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};
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mdio: mdio@90000 {
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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phy-reset-gpio = <&tlmm 37 0 &tlmm 25 1 &tlmm 44 1>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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reg = <3>;
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};
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phy4: ethernet-phy@4 {
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reg = <24>;
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};
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phy5: ethernet-phy@5 {
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reg = <28>;
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};
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};
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ess-switch@3a000000 {
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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switch_lan_bmp = <0x3e>; /* lan port bitmap */
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switch_wan_bmp = <0x40>; /* wan port bitmap */
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switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
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switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
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switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
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bm_tick_mode = <0>; /* bm tick mode */
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tm_tick_mode = <0>; /* tm tick mode */
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qcom,port_phyinfo {
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port@0 {
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port_id = <1>;
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phy_address = <0>;
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};
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port@1 {
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port_id = <2>;
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phy_address = <1>;
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};
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port@2 {
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port_id = <3>;
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phy_address = <2>;
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};
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port@3 {
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port_id = <4>;
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phy_address = <3>;
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};
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port@4 {
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port_id = <5>;
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phy_address = <24>;
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port_mac_sel = "QGMAC_PORT";
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};
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port@5 {
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port_id = <6>;
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phy_address = <28>;
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port_mac_sel = "QGMAC_PORT";
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};
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};
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port_scheduler_resource {
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port@0 {
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port_id = <0>;
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ucast_queue = <0 143>;
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mcast_queue = <256 271>;
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l0sp = <0 35>;
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l0cdrr = <0 47>;
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l0edrr = <0 47>;
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l1cdrr = <0 7>;
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l1edrr = <0 7>;
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};
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port@1 {
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port_id = <1>;
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ucast_queue = <144 159>;
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mcast_queue = <272 275>;
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l0sp = <36 39>;
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l0cdrr = <48 63>;
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l0edrr = <48 63>;
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l1cdrr = <8 11>;
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l1edrr = <8 11>;
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};
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port@2 {
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port_id = <2>;
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ucast_queue = <160 175>;
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mcast_queue = <276 279>;
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l0sp = <40 43>;
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l0cdrr = <64 79>;
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l0edrr = <64 79>;
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l1cdrr = <12 15>;
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l1edrr = <12 15>;
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};
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port@3 {
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port_id = <3>;
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ucast_queue = <176 191>;
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mcast_queue = <280 283>;
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l0sp = <44 47>;
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l0cdrr = <80 95>;
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l0edrr = <80 95>;
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l1cdrr = <16 19>;
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l1edrr = <16 19>;
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};
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port@4 {
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port_id = <4>;
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ucast_queue = <192 207>;
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mcast_queue = <284 287>;
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l0sp = <48 51>;
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l0cdrr = <96 111>;
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l0edrr = <96 111>;
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l1cdrr = <20 23>;
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l1edrr = <20 23>;
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};
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port@5 {
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port_id = <5>;
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ucast_queue = <208 223>;
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mcast_queue = <288 291>;
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l0sp = <52 55>;
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l0cdrr = <112 127>;
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l0edrr = <112 127>;
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l1cdrr = <24 27>;
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l1edrr = <24 27>;
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};
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port@6 {
|
||||
port_id = <6>;
|
||||
ucast_queue = <224 239>;
|
||||
mcast_queue = <292 295>;
|
||||
l0sp = <56 59>;
|
||||
l0cdrr = <128 143>;
|
||||
l0edrr = <128 143>;
|
||||
l1cdrr = <28 31>;
|
||||
l1edrr = <28 31>;
|
||||
};
|
||||
port@7 {
|
||||
port_id = <7>;
|
||||
ucast_queue = <240 255>;
|
||||
mcast_queue = <296 299>;
|
||||
l0sp = <60 63>;
|
||||
l0cdrr = <144 159>;
|
||||
l0edrr = <144 159>;
|
||||
l1cdrr = <32 35>;
|
||||
l1edrr = <32 35>;
|
||||
};
|
||||
};
|
||||
port_scheduler_config {
|
||||
port@0 {
|
||||
port_id = <0>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <0 1>; /*L0 SPs*/
|
||||
/*cpri cdrr epri edrr*/
|
||||
cfg = <0 0 0 0>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
/*unicast queues*/
|
||||
ucast_queue = <0 4 8>;
|
||||
/*multicast queues*/
|
||||
mcast_queue = <256 260>;
|
||||
/*sp cpri cdrr epri edrr*/
|
||||
cfg = <0 0 0 0 0>;
|
||||
};
|
||||
group@1 {
|
||||
ucast_queue = <1 5 9>;
|
||||
mcast_queue = <257 261>;
|
||||
cfg = <0 1 1 1 1>;
|
||||
};
|
||||
group@2 {
|
||||
ucast_queue = <2 6 10>;
|
||||
mcast_queue = <258 262>;
|
||||
cfg = <0 2 2 2 2>;
|
||||
};
|
||||
group@3 {
|
||||
ucast_queue = <3 7 11>;
|
||||
mcast_queue = <259 263>;
|
||||
cfg = <0 3 3 3 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
port_id = <1>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <36>;
|
||||
cfg = <0 8 0 8>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <37>;
|
||||
cfg = <1 9 1 9>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <144>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <272>;
|
||||
mcast_loop_pri = <4>;
|
||||
cfg = <36 0 48 0 48>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
port_id = <2>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <40>;
|
||||
cfg = <0 12 0 12>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <41>;
|
||||
cfg = <1 13 1 13>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <160>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <276>;
|
||||
mcast_loop_pri = <4>;
|
||||
cfg = <40 0 64 0 64>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@3 {
|
||||
port_id = <3>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <44>;
|
||||
cfg = <0 16 0 16>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <45>;
|
||||
cfg = <1 17 1 17>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <176>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <280>;
|
||||
mcast_loop_pri = <4>;
|
||||
cfg = <44 0 80 0 80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@4 {
|
||||
port_id = <4>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <48>;
|
||||
cfg = <0 20 0 20>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <49>;
|
||||
cfg = <1 21 1 21>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <192>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <284>;
|
||||
mcast_loop_pri = <4>;
|
||||
cfg = <48 0 96 0 96>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@5 {
|
||||
port_id = <5>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <52>;
|
||||
cfg = <0 24 0 24>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <53>;
|
||||
cfg = <1 25 1 25>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <208>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <288>;
|
||||
mcast_loop_pri = <4>;
|
||||
cfg = <52 0 112 0 112>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@6 {
|
||||
port_id = <6>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <56>;
|
||||
cfg = <0 28 0 28>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <57>;
|
||||
cfg = <1 29 1 29>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <224>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <292>;
|
||||
mcast_loop_pri = <4>;
|
||||
cfg = <56 0 128 0 128>;
|
||||
};
|
||||
};
|
||||
};
|
||||
port@7 {
|
||||
port_id = <7>;
|
||||
l1scheduler {
|
||||
group@0 {
|
||||
sp = <60>;
|
||||
cfg = <0 32 0 32>;
|
||||
};
|
||||
group@1 {
|
||||
sp = <61>;
|
||||
cfg = <1 33 1 33>;
|
||||
};
|
||||
};
|
||||
l0scheduler {
|
||||
group@0 {
|
||||
ucast_queue = <240>;
|
||||
ucast_loop_pri = <16>;
|
||||
mcast_queue = <296>;
|
||||
cfg = <60 0 144 0 144>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dp6 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,nss-dp";
|
||||
qcom,id = <6>;
|
||||
reg = <0x3a001800 0x200>;
|
||||
qcom,mactype = <0>;
|
||||
local-mac-address = [000000000000];
|
||||
qcom,link-poll = <1>;
|
||||
qcom,phy-mdio-addr = <28>;
|
||||
phy-mode = "sgmii";
|
||||
};
|
||||
|
||||
dp5 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,nss-dp";
|
||||
qcom,id = <5>;
|
||||
reg = <0x3a001a00 0x200>;
|
||||
qcom,mactype = <0>;
|
||||
local-mac-address = [000000000000];
|
||||
qcom,link-poll = <1>;
|
||||
qcom,phy-mdio-addr = <24>;
|
||||
phy-mode = "sgmii";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&led_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
led_red: led_sys {
|
||||
label = "led_sys";
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "led_pwr";
|
||||
};
|
||||
|
||||
led_green: led_2g {
|
||||
label = "led_2g";
|
||||
gpio = <&tlmm 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led_blue: led_5g {
|
||||
label = "led_5g";
|
||||
gpio = <&tlmm 9 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
nss-macsec0 {
|
||||
compatible = "qcom,nss-macsec";
|
||||
phy_addr = <0x18>;
|
||||
mdiobus = <&mdio>;
|
||||
};
|
||||
nss-macsec1 {
|
||||
compatible = "qcom,nss-macsec";
|
||||
phy_addr = <0x1c>;
|
||||
mdiobus = <&mdio>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&apc_cpr {
|
||||
/* Same CPR configuration as OAK */
|
||||
compatible = "qcom,cpr4-ipq817x-apss-regulator";
|
||||
|
||||
thread@0 {
|
||||
apc_vreg: regulator {
|
||||
regulator-min-microvolt = <1>;
|
||||
regulator-max-microvolt = <2>;
|
||||
qcom,cpr-fuse-corners = <2>;
|
||||
qcom,cpr-corners = <3>;
|
||||
qcom,cpr-speed-bin-corners = <3>;
|
||||
qcom,cpr-corner-fmax-map = <1 3>;
|
||||
|
||||
qcom,cpr-voltage-ceiling =
|
||||
<840000 904000 944000>;
|
||||
qcom,cpr-voltage-floor =
|
||||
<592000 648000 712000>;
|
||||
qcom,corner-frequencies =
|
||||
<1017600000 1382400000 1382400000>;
|
||||
|
||||
qcom,cpr-open-loop-voltage-fuse-adjustment-0 =
|
||||
/* Speed bin 0; CPR rev 0..7 */
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>;
|
||||
|
||||
qcom,cpr-open-loop-voltage-fuse-adjustment-1 =
|
||||
/* Speed bin 0; CPR rev 0..7 */
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 20000 26000>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>;
|
||||
|
||||
qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0 =
|
||||
/* Speed bin 0; CPR rev 0..7 */
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>;
|
||||
|
||||
qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1 =
|
||||
/* Speed bin 0; CPR rev 0..7 */
|
||||
< 0 0>,
|
||||
< 0 7000>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>,
|
||||
< 0 0>;
|
||||
|
||||
qcom,cpr-floor-to-ceiling-max-range =
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>,
|
||||
< 40000 40000 40000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&npu_cpr {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&nss0 {
|
||||
qcom,low-frequency = <187200000>;
|
||||
qcom,mid-frequency = <748800000>;
|
||||
qcom,max-frequency = <1497600000>;
|
||||
};
|
||||
|
||||
&nss0 {
|
||||
npu-supply = <&dummy_reg>;
|
||||
mx-supply = <&dummy_reg>;
|
||||
};
|
||||
|
||||
&wifi0 {
|
||||
qcom,board_id = <0x92>;
|
||||
};
|
||||
|
||||
&wifi1 {
|
||||
qcom,board_id = <0x292>;
|
||||
};
|
||||
@@ -66,6 +66,15 @@ define Device/emplus_wap380c
|
||||
endef
|
||||
TARGET_DEVICES += emplus_wap380c
|
||||
|
||||
define Device/indio_um-345ax
|
||||
DEVICE_TITLE := Indio UM-345AX
|
||||
DEVICE_DTS := qcom-ipq807x-indio-um-345ax
|
||||
DEVICE_DTS_CONFIG=config@hk09
|
||||
SUPPORTED_DEVICES := indio,um-345ax
|
||||
DEVICE_PACKAGES := ath11k-wifi-indio-um-345ax uboot-envtools
|
||||
endef
|
||||
TARGET_DEVICES += indio_um-345ax
|
||||
|
||||
define Device/sonicfi_rap650c
|
||||
DEVICE_TITLE := SonicFi RAP650C
|
||||
DEVICE_DTS := qcom-ipq807x-rap650c
|
||||
|
||||
15
profiles/indio_um-345ax.yml
Normal file
15
profiles/indio_um-345ax.yml
Normal file
@@ -0,0 +1,15 @@
|
||||
---
|
||||
profile: indio_um-345ax
|
||||
target: ipq807x
|
||||
subtarget: generic
|
||||
description: Build image for the Indio UM-345AX
|
||||
image: bin/targets/ipq807x/generic/openwrt-ipq807x-indio_um-345ax-squashfs-sysupgrade.tar
|
||||
feeds:
|
||||
- name: ipq807x
|
||||
path: ../../feeds/ipq807x_v5.4
|
||||
include:
|
||||
- ucentral-ap
|
||||
packages:
|
||||
- ipq807x
|
||||
diffconfig: |
|
||||
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
|
||||
Reference in New Issue
Block a user