mirror of
https://github.com/Telecominfraproject/wlan-ap.git
synced 2025-10-29 17:42:41 +00:00
ipq807x: add support for wallytech dr6018(-v4)
Fixes: WIFI-7570 Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
John Crispin
@@ -15,4 +15,4 @@
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*/
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#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-wallys-dr6018-v4.dts"
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#include "qcom-ipq6018.dtsi"
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#include "ipq6018.dtsi"
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@@ -15,4 +15,4 @@
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*/
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#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-wallys-dr6018.dts"
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#include "qcom-ipq6018.dtsi"
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#include "ipq6018.dtsi"
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@@ -1,49 +1,28 @@
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/dts-v1/;
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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* IPQ6018 CP01 board device tree source
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
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*/
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#include "qcom-ipq6018.dtsi"
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#include "qcom-ipq6018-rpm-regulator.dtsi"
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#include "qcom-ipq6018-cpr-regulator.dtsi"
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#include "qcom-ipq6018-cp-cpu.dtsi"
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/dts-v1/;
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#include "ipq6018.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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model = "Wallys DR6018 V4";
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compatible = "wallys,dr6018-v4", "qcom,ipq6018-cp01", "qcom,ipq6018";
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interrupt-parent = <&intc>;
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model = "Wallys DR6018";
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compatible = "wallys,dr6018", "qcom,ipq6018-cp01", "qcom,ipq6018";
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aliases {
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serial0 = &blsp1_uart3;
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serial1 = &blsp1_uart2;
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/*
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* Aliases as required by u-boot
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* to patch MAC addresses
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*/
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ethernet0 = "/soc/dp1";
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ethernet1 = "/soc/dp2";
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ethernet2 = "/soc/dp3";
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ethernet3 = "/soc/dp4";
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ethernet4 = "/soc/dp5";
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sdhc2 = "/soc/sdhci_sd@7804000";
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led-boot = &led_power;
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led-failsafe = &led_power;
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@@ -52,148 +31,97 @@
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};
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chosen {
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bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
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bootargs-append = " console=ttyMSM0,115200,n8 swiotlb=1 coherent_pool=2M";
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stdout-path = "serial0:115200n8";
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bootargs-append = " swiotlb=1";
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};
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};
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/*
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* +=========+==============+========================+
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* | | | |
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* | Region | Start Offset | Size |
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* | | | |
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* +--------+--------------+-------------------------+
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* | | | |
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* | | | |
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* | | | |
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* | | | |
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* | Linux | 0x41000000 | 139MB |
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* | | | |
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* | | | |
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* | | | |
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* +--------+--------------+-------------------------+
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* | TZ App | 0x49B00000 | 6MB |
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* +--------+--------------+-------------------------+
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*
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* From the available 145 MB for Linux in the first 256 MB,
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* we are reserving 6 MB for TZAPP.
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*
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* Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi
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* for memory layout.
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*/
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&blsp1_uart3 {
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pinctrl-0 = <&serial_3_pins>;
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pinctrl-names = "default";
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status = "ok";
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};
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/* TZAPP is enabled only in default memory profile */
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#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__)
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reserved-memory {
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tzapp:tzapp@49B00000 { /* TZAPPS */
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no-map;
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reg = <0x0 0x49B00000 0x0 0x00600000>;
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};
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&spi_0 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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cs-select = <0>;
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status = "ok";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "n25q128a11";
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linux,modalias = "m25p80", "n25q128a11";
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spi-max-frequency = <50000000>;
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use-default-sizes;
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};
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};
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&blsp1_uart2 {
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pinctrl-0 = <&hsuart_pins &btcoex_pins>;
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pinctrl-names = "default";
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dmas = <&blsp_dma 2>,
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<&blsp_dma 3>;
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dma-names = "tx", "rx";
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status = "ok";
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};
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&spi_1 { /* BLSP1 QUP1 */
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pinctrl-0 = <&spi_1_pins>;
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pinctrl-names = "default";
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cs-select = <0>;
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quartz-reset-gpio = <&tlmm 79 1>;
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status = "disabled";
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spidev1: spi@1 {
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compatible = "qca,spidev";
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reg = <0>;
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spi-max-frequency = <24000000>;
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};
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#endif
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};
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&tlmm {
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uart_pins: uart_pins {
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mux {
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pins = "gpio44", "gpio45";
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function = "blsp2_uart";
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drive-strength = <8>;
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bias-pull-down;
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};
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spi_0_pins: spi-0-pins {
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pins = "gpio38", "gpio39", "gpio40", "gpio41";
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function = "blsp0_spi";
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drive-strength = <8>;
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bias-pull-down;
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};
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sd_pins: sd_pins {
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spi_1_pins: spi_1_pins {
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mux {
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pins = "gpio62";
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function = "sd_card";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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spi_0_pins: spi_0_pins {
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mux {
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pins = "gpio38", "gpio39", "gpio40", "gpio41";
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function = "blsp0_spi";
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pins = "gpio69", "gpio71", "gpio72";
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function = "blsp1_spi";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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qpic_pins: qpic_pins {
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data_0 {
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pins = "gpio15";
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function = "qpic_pad0";
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spi_cs {
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pins = "gpio70";
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function = "blsp1_spi";
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drive-strength = <8>;
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bias-pull-down;
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bias-disable;
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};
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data_1 {
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pins = "gpio12";
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function = "qpic_pad1";
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drive-strength = <8>;
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bias-pull-down;
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};
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data_2 {
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pins = "gpio13";
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function = "qpic_pad2";
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drive-strength = <8>;
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bias-pull-down;
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};
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data_3 {
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pins = "gpio14";
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function = "qpic_pad3";
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drive-strength = <8>;
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bias-pull-down;
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};
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data_4 {
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pins = "gpio5";
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function = "qpic_pad4";
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drive-strength = <8>;
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bias-pull-down;
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};
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data_5 {
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pins = "gpio6";
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function = "qpic_pad5";
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drive-strength = <8>;
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bias-pull-down;
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};
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data_6 {
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pins = "gpio7";
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function = "qpic_pad6";
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drive-strength = <8>;
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bias-pull-down;
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};
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data_7 {
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pins = "gpio8";
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function = "qpic_pad7";
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drive-strength = <8>;
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bias-pull-down;
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};
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qpic_pad {
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pins = "gpio1", "gpio3", "gpio4",
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"gpio10", "gpio11", "gpio17";
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function = "qpic_pad";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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extcon_usb_pins: extcon_usb_pins {
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mux {
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pins = "gpio26";
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quartz_interrupt {
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pins = "gpio78";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-down;
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input;
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bias-disable;
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};
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quartz_reset {
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pins = "gpio79";
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function = "gpio";
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output-low;
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bias-disable;
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};
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};
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button_pins: button_pins {
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wps_button {
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pins = "gpio19";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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sd_pins: sd-pinmux {
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pins = "gpio62";
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function = "sd_card";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio_pins: mdio_pinmux {
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@@ -214,70 +142,101 @@
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function = "gpio";
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bias-pull-up;
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};
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mux_3 {
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pins = "gpio77";
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function = "gpio";
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bias-pull-up;
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};
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};
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pwm_pins: pwm_pinmux {
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pins = "gpio18";
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function = "pwm00";
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drive-strength = <8>;
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};
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hsuart_pins: hsuart_pins {
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mux {
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pins = "gpio71", "gpio72", "gpio69", "gpio70";
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function = "blsp1_uart";
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drive-strength = <8>;
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bias-disable;
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};
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};
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button_pins: button_pins {
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wps_button {
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pins = "gpio19";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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leds_pins: leds_pins {
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led_pwr {
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pins = "gpio74";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_5g {
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pins = "gpio35";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_2g {
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pins = "gpio37";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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pins = "gpio74";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_5g {
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pins = "gpio35";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_2g {
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pins = "gpio37";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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uart2_pins: uart2_pins {
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mux {
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pins = "gpio57", "gpio58";
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function = "blsp4_uart";
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drive-strength = <8>;
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btcoex_pins: btcoex_pins {
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mux_0 {
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pins = "gpio51";
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function = "pta1_1";
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drive-strength = <6>;
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bias-pull-down;
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};
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mux_1 {
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pins = "gpio53";
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function = "pta1_0";
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drive-strength = <6>;
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bias-pull-down;
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};
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mux_2 {
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pins = "gpio52";
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function = "pta1_2";
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drive-strength = <6>;
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bias-pull-down;
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};
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};
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};
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&soc {
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extcon_usb: extcon_usb {
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pinctrl-0 = <&extcon_usb_pins>;
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pinctrl-names = "default";
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id-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>;
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status = "ok";
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};
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mdio: mdio@90000 {
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>;
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status = "ok";
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ethernet-phy@3 {
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reg = <0x03>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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ethernet-phy@4 {
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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reg = <3>;
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};
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phy4: ethernet-phy@4 {
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reg = <0x18>;
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};
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ethernet-phy@1 {
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reg = <0x01>;
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};
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ethernet-phy@2 {
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reg = <0x02>;
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};
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ethernet-phy@0 {
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reg = <0x00>;
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};
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};
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dp1 {
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@@ -304,79 +263,51 @@
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phy-mode = "sgmii";
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};
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|
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dp3 {
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device_type = "network";
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compatible = "qcom,nss-dp";
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qcom,id = <3>;
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reg = <0x3a001400 0x200>;
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qcom,mactype = <0>;
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local-mac-address = [000000000000];
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qcom,link-poll = <1>;
|
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qcom,phy-mdio-addr = <2>;
|
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phy-mode = "sgmii";
|
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};
|
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|
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dp4 {
|
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device_type = "network";
|
||||
compatible = "qcom,nss-dp";
|
||||
qcom,id = <4>;
|
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reg = <0x3a001600 0x200>;
|
||||
qcom,mactype = <0>;
|
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local-mac-address = [000000000000];
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qcom,link-poll = <1>;
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||||
qcom,phy-mdio-addr = <3>;
|
||||
phy-mode = "sgmii";
|
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};
|
||||
|
||||
dp5 {
|
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device_type = "network";
|
||||
compatible = "qcom,nss-dp";
|
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qcom,id = <5>;
|
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reg = <0x3a001800 0x200>;
|
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qcom,mactype = <0>;
|
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local-mac-address = [000000000000];
|
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qcom,link-poll = <1>;
|
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qcom,phy-mdio-addr = <0x18>;
|
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phy-mode = "sgmii";
|
||||
};
|
||||
|
||||
ess-switch@3a000000 {
|
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
|
||||
switch_lan_bmp = <0x3c>; /* lan port bitmap */
|
||||
switch_lan_bmp = <0x4>; /* lan port bitmap */
|
||||
switch_wan_bmp = <0x2>; /* wan port bitmap */
|
||||
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
|
||||
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
|
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switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
|
||||
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
|
||||
qcom,port_phyinfo {
|
||||
port@1 {
|
||||
phy_address = <0x01>;
|
||||
port_id = <0x02>;
|
||||
};
|
||||
|
||||
port@0 {
|
||||
phy_address = <0x00>;
|
||||
port_id = <0x01>;
|
||||
port_id = <1>;
|
||||
phy_address = <0>;
|
||||
};
|
||||
port@1 {
|
||||
port_id = <2>;
|
||||
phy_address = <1>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
phy_address = <0x02>;
|
||||
port_id = <0x03>;
|
||||
port_id = <3>;
|
||||
phy_address = <2>;
|
||||
};
|
||||
|
||||
port@3 {
|
||||
phy_address = <0x03>;
|
||||
port_id = <0x04>;
|
||||
port_id = <4>;
|
||||
phy_address = <3>;
|
||||
};
|
||||
|
||||
port@4 {
|
||||
port_id = <5>;
|
||||
phy_address = <0x18>;
|
||||
port_id = <0x05>;
|
||||
port_mac_sel = "QGMAC_PORT";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nss-macsec0 {
|
||||
compatible = "qcom,nss-macsec";
|
||||
phy_addr = <0x18>;
|
||||
phy_access_mode = <0>;
|
||||
mdiobus = <&mdio>;
|
||||
};
|
||||
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&button_pins>;
|
||||
@@ -408,61 +339,38 @@
|
||||
linux,default-trigger = "green:2g";
|
||||
default-state = "off";
|
||||
};
|
||||
led_power: led@16 {
|
||||
label = "green:led_pwr";
|
||||
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "green:power";
|
||||
led_power: led@16 {
|
||||
label = "green:led_pwr";
|
||||
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "green:power";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_uart3 {
|
||||
pinctrl-0 = <&uart_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&spi_0 {
|
||||
pinctrl-0 = <&spi_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
cs-select = <0>;
|
||||
status = "ok";
|
||||
|
||||
m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
compatible = "n25q128a11";
|
||||
linux,modalias = "m25p80", "n25q128a11";
|
||||
spi-max-frequency = <50000000>;
|
||||
use-default-sizes;
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_uart2 {
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
pinctrl-names = "default";
|
||||
dmas = <&blsp_dma 2>,
|
||||
<&blsp_dma 3>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "ok";
|
||||
};
|
||||
&qpic_bam {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&nand {
|
||||
pinctrl-0 = <&qpic_pins>;
|
||||
pinctrl-names = "default";
|
||||
&qpic_nand {
|
||||
status = "ok";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-bus-width = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&ssphy_0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&qusb_phy_0 {
|
||||
&pcie0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
@@ -474,6 +382,21 @@
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
pinctrl-0 = <&sd_pins>;
|
||||
pinctrl-names = "default";
|
||||
cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&qusb_phy_0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&ssphy_0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "ok";
|
||||
};
|
||||
@@ -482,11 +405,77 @@
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
pinctrl-0 = <&sd_pins>;
|
||||
&CPU0 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&CPU1 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&CPU2 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&CPU3 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <20 1>;
|
||||
|
||||
i2c_1_pins: i2c_1_pins {
|
||||
mux {
|
||||
pins = "gpio42", "gpio43";
|
||||
function = "blsp2_i2c";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_1 {
|
||||
pinctrl-0 = <&i2c_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
cd-gpios = <&tlmm 62 1>;
|
||||
sd-ldo-gpios = <&tlmm 66 0>;
|
||||
//vqmmc-supply = <&ipq6018_l2_corner>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&rpm_glink {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -1,38 +1,22 @@
|
||||
/dts-v1/;
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
||||
* IPQ6018 CP01 board device tree source
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#include "qcom-ipq6018.dtsi"
|
||||
#include "qcom-ipq6018-rpm-regulator.dtsi"
|
||||
#include "qcom-ipq6018-cpr-regulator.dtsi"
|
||||
#include "qcom-ipq6018-cp-cpu.dtsi"
|
||||
/dts-v1/;
|
||||
|
||||
#include "ipq6018.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <0x2>;
|
||||
#size-cells = <0x2>;
|
||||
model = "Wallys DR6018";
|
||||
compatible = "wallys,dr6018", "qcom,ipq6018-cp01", "qcom,ipq6018";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &blsp1_uart3;
|
||||
serial1 = &blsp1_uart2;
|
||||
|
||||
/*
|
||||
* Aliases as required by u-boot
|
||||
* to patch MAC addresses
|
||||
@@ -47,139 +31,97 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
|
||||
bootargs-append = " console=ttyMSM0,115200,n8 swiotlb=1 coherent_pool=2M";
|
||||
stdout-path = "serial0:115200n8";
|
||||
bootargs-append = " swiotlb=1";
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* +=========+==============+========================+
|
||||
* | | | |
|
||||
* | Region | Start Offset | Size |
|
||||
* | | | |
|
||||
* +--------+--------------+-------------------------+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | Linux | 0x41000000 | 139MB |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +--------+--------------+-------------------------+
|
||||
* | TZ App | 0x49B00000 | 6MB |
|
||||
* +--------+--------------+-------------------------+
|
||||
*
|
||||
* From the available 145 MB for Linux in the first 256 MB,
|
||||
* we are reserving 6 MB for TZAPP.
|
||||
*
|
||||
* Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi
|
||||
* for memory layout.
|
||||
*/
|
||||
&blsp1_uart3 {
|
||||
pinctrl-0 = <&serial_3_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
/* TZAPP is enabled only in default memory profile */
|
||||
#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__)
|
||||
reserved-memory {
|
||||
tzapp:tzapp@49B00000 { /* TZAPPS */
|
||||
no-map;
|
||||
reg = <0x0 0x49B00000 0x0 0x00600000>;
|
||||
};
|
||||
&spi_0 {
|
||||
pinctrl-0 = <&spi_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
cs-select = <0>;
|
||||
status = "ok";
|
||||
|
||||
m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
compatible = "n25q128a11";
|
||||
linux,modalias = "m25p80", "n25q128a11";
|
||||
spi-max-frequency = <50000000>;
|
||||
use-default-sizes;
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_uart2 {
|
||||
pinctrl-0 = <&hsuart_pins &btcoex_pins>;
|
||||
pinctrl-names = "default";
|
||||
dmas = <&blsp_dma 2>,
|
||||
<&blsp_dma 3>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&spi_1 { /* BLSP1 QUP1 */
|
||||
pinctrl-0 = <&spi_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
cs-select = <0>;
|
||||
quartz-reset-gpio = <&tlmm 79 1>;
|
||||
status = "disabled";
|
||||
spidev1: spi@1 {
|
||||
compatible = "qca,spidev";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <24000000>;
|
||||
};
|
||||
#endif
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
uart_pins: uart_pins {
|
||||
mux {
|
||||
pins = "gpio44", "gpio45";
|
||||
function = "blsp2_uart";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
spi_0_pins: spi-0-pins {
|
||||
pins = "gpio38", "gpio39", "gpio40", "gpio41";
|
||||
function = "blsp0_spi";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
spi_0_pins: spi_0_pins {
|
||||
spi_1_pins: spi_1_pins {
|
||||
mux {
|
||||
pins = "gpio38", "gpio39", "gpio40", "gpio41";
|
||||
function = "blsp0_spi";
|
||||
pins = "gpio69", "gpio71", "gpio72";
|
||||
function = "blsp1_spi";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
qpic_pins: qpic_pins {
|
||||
data_0 {
|
||||
pins = "gpio15";
|
||||
function = "qpic_pad0";
|
||||
spi_cs {
|
||||
pins = "gpio70";
|
||||
function = "blsp1_spi";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
bias-disable;
|
||||
};
|
||||
data_1 {
|
||||
pins = "gpio12";
|
||||
function = "qpic_pad1";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
data_2 {
|
||||
pins = "gpio13";
|
||||
function = "qpic_pad2";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
data_3 {
|
||||
pins = "gpio14";
|
||||
function = "qpic_pad3";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
data_4 {
|
||||
pins = "gpio5";
|
||||
function = "qpic_pad4";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
data_5 {
|
||||
pins = "gpio6";
|
||||
function = "qpic_pad5";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
data_6 {
|
||||
pins = "gpio7";
|
||||
function = "qpic_pad6";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
data_7 {
|
||||
pins = "gpio8";
|
||||
function = "qpic_pad7";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
qpic_pad {
|
||||
pins = "gpio1", "gpio3", "gpio4",
|
||||
"gpio10", "gpio11", "gpio17";
|
||||
function = "qpic_pad";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
extcon_usb_pins: extcon_usb_pins {
|
||||
mux {
|
||||
pins = "gpio26";
|
||||
quartz_interrupt {
|
||||
pins = "gpio78";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
input;
|
||||
bias-disable;
|
||||
};
|
||||
quartz_reset {
|
||||
pins = "gpio79";
|
||||
function = "gpio";
|
||||
output-low;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
button_pins: button_pins {
|
||||
wps_button {
|
||||
pins = "gpio19";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
sd_pins: sd-pinmux {
|
||||
pins = "gpio62";
|
||||
function = "sd_card";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
mdio_pins: mdio_pinmux {
|
||||
@@ -200,70 +142,101 @@
|
||||
function = "gpio";
|
||||
bias-pull-up;
|
||||
};
|
||||
mux_3 {
|
||||
pins = "gpio77";
|
||||
function = "gpio";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_pins: pwm_pinmux {
|
||||
pins = "gpio18";
|
||||
function = "pwm00";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
hsuart_pins: hsuart_pins {
|
||||
mux {
|
||||
pins = "gpio71", "gpio72", "gpio69", "gpio70";
|
||||
function = "blsp1_uart";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
button_pins: button_pins {
|
||||
wps_button {
|
||||
pins = "gpio19";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
leds_pins: leds_pins {
|
||||
led_pwr {
|
||||
pins = "gpio74";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
led_5g {
|
||||
pins = "gpio35";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
led_2g {
|
||||
pins = "gpio37";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
pins = "gpio74";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
led_5g {
|
||||
pins = "gpio35";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
led_2g {
|
||||
pins = "gpio37";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
uart2_pins: uart2_pins {
|
||||
mux {
|
||||
pins = "gpio57", "gpio58";
|
||||
function = "blsp4_uart";
|
||||
drive-strength = <8>;
|
||||
|
||||
btcoex_pins: btcoex_pins {
|
||||
mux_0 {
|
||||
pins = "gpio51";
|
||||
function = "pta1_1";
|
||||
drive-strength = <6>;
|
||||
bias-pull-down;
|
||||
};
|
||||
mux_1 {
|
||||
pins = "gpio53";
|
||||
function = "pta1_0";
|
||||
drive-strength = <6>;
|
||||
bias-pull-down;
|
||||
};
|
||||
mux_2 {
|
||||
pins = "gpio52";
|
||||
function = "pta1_2";
|
||||
drive-strength = <6>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
extcon_usb: extcon_usb {
|
||||
pinctrl-0 = <&extcon_usb_pins>;
|
||||
pinctrl-names = "default";
|
||||
id-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
mdio: mdio@90000 {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>;
|
||||
status = "ok";
|
||||
ethernet-phy@3 {
|
||||
reg = <0x03>;
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethernet-phy@4 {
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
phy4: ethernet-phy@4 {
|
||||
reg = <0x18>;
|
||||
};
|
||||
|
||||
ethernet-phy@1 {
|
||||
reg = <0x01>;
|
||||
};
|
||||
|
||||
ethernet-phy@2 {
|
||||
reg = <0x02>;
|
||||
};
|
||||
|
||||
ethernet-phy@0 {
|
||||
reg = <0x00>;
|
||||
};
|
||||
};
|
||||
|
||||
dp1 {
|
||||
@@ -299,34 +272,42 @@
|
||||
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
|
||||
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
|
||||
qcom,port_phyinfo {
|
||||
port@1 {
|
||||
phy_address = <0x01>;
|
||||
port_id = <0x02>;
|
||||
};
|
||||
|
||||
port@0 {
|
||||
phy_address = <0x00>;
|
||||
port_id = <0x01>;
|
||||
port_id = <1>;
|
||||
phy_address = <0>;
|
||||
};
|
||||
port@1 {
|
||||
port_id = <2>;
|
||||
phy_address = <1>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
phy_address = <0x02>;
|
||||
port_id = <0x03>;
|
||||
port_id = <3>;
|
||||
phy_address = <2>;
|
||||
};
|
||||
|
||||
port@3 {
|
||||
phy_address = <0x03>;
|
||||
port_id = <0x04>;
|
||||
port_id = <4>;
|
||||
phy_address = <3>;
|
||||
};
|
||||
|
||||
port@4 {
|
||||
port_id = <5>;
|
||||
phy_address = <0x18>;
|
||||
port_id = <0x05>;
|
||||
port_mac_sel = "QGMAC_PORT";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nss-macsec0 {
|
||||
compatible = "qcom,nss-macsec";
|
||||
phy_addr = <0x18>;
|
||||
phy_access_mode = <0>;
|
||||
mdiobus = <&mdio>;
|
||||
};
|
||||
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&button_pins>;
|
||||
@@ -339,14 +320,6 @@
|
||||
linux,input-type = <1>;
|
||||
debounce-interval = <60>;
|
||||
};
|
||||
|
||||
/* wps {
|
||||
label = "wps";
|
||||
linux,code = <>;
|
||||
gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
|
||||
linux,input-type = <1>;
|
||||
debounce-interval = <60>;
|
||||
};*/
|
||||
};
|
||||
|
||||
leds {
|
||||
@@ -366,61 +339,38 @@
|
||||
linux,default-trigger = "green:2g";
|
||||
default-state = "off";
|
||||
};
|
||||
led_power: led@16 {
|
||||
label = "green:led_pwr";
|
||||
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "green:power";
|
||||
led_power: led@16 {
|
||||
label = "green:led_pwr";
|
||||
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "green:power";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_uart3 {
|
||||
pinctrl-0 = <&uart_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&spi_0 {
|
||||
pinctrl-0 = <&spi_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
cs-select = <0>;
|
||||
status = "ok";
|
||||
|
||||
m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
compatible = "n25q128a11";
|
||||
linux,modalias = "m25p80", "n25q128a11";
|
||||
spi-max-frequency = <50000000>;
|
||||
use-default-sizes;
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_uart2 {
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
pinctrl-names = "default";
|
||||
dmas = <&blsp_dma 2>,
|
||||
<&blsp_dma 3>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "ok";
|
||||
};
|
||||
&qpic_bam {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&nand {
|
||||
pinctrl-0 = <&qpic_pins>;
|
||||
pinctrl-names = "default";
|
||||
&qpic_nand {
|
||||
status = "ok";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-bus-width = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&ssphy_0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&qusb_phy_0 {
|
||||
&pcie0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
@@ -432,6 +382,21 @@
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
pinctrl-0 = <&sd_pins>;
|
||||
pinctrl-names = "default";
|
||||
cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&qusb_phy_0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&ssphy_0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "ok";
|
||||
};
|
||||
@@ -439,3 +404,78 @@
|
||||
&nss_crypto {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&CPU0 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&CPU1 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&CPU2 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&CPU3 {
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
864000 1100000
|
||||
1056000 1100000
|
||||
1320000 1100000
|
||||
1440000 1100000
|
||||
1608000 1100000
|
||||
1800000 1100000
|
||||
>;
|
||||
clock-latency = <200000>;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <20 1>;
|
||||
|
||||
i2c_1_pins: i2c_1_pins {
|
||||
mux {
|
||||
pins = "gpio42", "gpio43";
|
||||
function = "blsp2_i2c";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_1 {
|
||||
pinctrl-0 = <&i2c_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&rpm_glink {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -43,7 +43,7 @@ define Device/wallys_dr6018
|
||||
SUPPORTED_DEVICES := wallys,dr6018
|
||||
DEVICE_PACKAGES := ath11k-wifi-wallys-dr6018 uboot-envtools
|
||||
endef
|
||||
#TARGET_DEVICES += wallys_dr6018
|
||||
TARGET_DEVICES += wallys_dr6018
|
||||
|
||||
define Device/wallys_dr6018_v4
|
||||
DEVICE_TITLE := Wallys DR6018 V4
|
||||
@@ -52,7 +52,7 @@ define Device/wallys_dr6018_v4
|
||||
SUPPORTED_DEVICES := wallys,dr6018-v4
|
||||
DEVICE_PACKAGES := ath11k-wifi-wallys-dr6018-v4 uboot-envtools
|
||||
endef
|
||||
#TARGET_DEVICES += wallys_dr6018_v4
|
||||
TARGET_DEVICES += wallys_dr6018_v4
|
||||
|
||||
define Device/glinet_ax1800
|
||||
DEVICE_TITLE := GL-iNet AX1800
|
||||
|
||||
Reference in New Issue
Block a user