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8 Commits

Author SHA1 Message Date
jaspreetsachdev
ce441c5b1b Merge pull request #541 from Telecominfraproject/v2.9.1-merge
v2.9.1 merge
2023-04-11 13:12:47 -04:00
Jaspreet Sachdev
f8f9c6d469 Merge remote-tracking branch 'origin/main' into v2.9.0 2023-04-11 13:04:36 -04:00
jaspreetsachdev
85ff703e2f Merge pull request #540 from Telecominfraproject/staging-fix-nns-feed
ipq807x: fix qca-nss-clients feed
2023-04-01 08:07:52 -04:00
jaspreetsachdev
b3493bcf55 Merge pull request #538 from Telecominfraproject/v2.9.0-rc4
V2.9.0 rc4
2023-03-27 09:44:32 -04:00
Jaspreet Sachdev
2b767fb84f Merge remote-tracking branch 'origin/main' into v2.9.0 2023-03-23 12:59:06 -04:00
jaspreetsachdev
71fc375a72 Merge pull request #534 from Telecominfraproject/v2.9.0-rc3
V2.9.0 rc3
2023-03-20 12:54:55 -04:00
Jaspreet Sachdev
95bfa265ee Merge remote-tracking branch 'origin/main' into v2.9.0 2023-03-20 12:54:09 -04:00
jaspreetsachdev
fce075bd2c Merge pull request #532 from Telecominfraproject/v2.9.0-rc2
V2.9.0 rc2
2023-03-15 13:00:26 -04:00
2966 changed files with 66611 additions and 634555 deletions

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@@ -21,7 +21,7 @@ jobs:
strategy:
fail-fast: false
matrix:
target: [ 'cig_wf186w', 'cig_wf188n-ca', 'cig_wf188n-ca-ath12', 'cig_wf188n-us', 'cig_wf196-us', 'cig_wf196-ca', 'cig_wf196-ca-ath12', 'cig_wf610d', 'cig_wf660a', 'cig_wf808', 'cybertan_eww622-a1', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'edgecore_eap101', 'edgecore_eap101-ath12', 'edgecore_eap102', 'edgecore_eap102-ath12', 'edgecore_eap104', 'edgecore_eap104-ath12', 'liteon_wpx8324', 'edgecore_ecs4100-12ph', 'edgecore_ecw5211', 'edgecore_ecw5410', 'edgecore_oap100', 'edgecore_oap101-6e', 'edgecore_oap101e', 'hfcl_ion4','hfcl_ion4xi_wp', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4xi_w', 'hfcl_ion4xi_HMR', 'hfcl_ion4x_w', 'indio_um-305ac', 'indio_um-305ax', 'indio_um-325ac', 'indio_um-510ac-v3', 'indio_um-550ac', 'indio_um-310ax-v1', 'indio_um-510axp-v1', 'indio_um-510axm-v1', 'udaya_a5-id2', 'wallys_dr40x9', 'wallys_dr6018', 'wallys_dr6018_v4', 'x64_vm', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655' ]
target: ['actiontec_web7200', 'cig_wf188n', 'cig_wf194c4', 'cig_wf196-us', 'cig_wf196-ca', 'cig_wf610d', 'cig_wf660a', 'cig_wf808', 'cybertan_eww622-a1', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'liteon_wpx8324', 'edgecore_ecs4100-12ph', 'edgecore_ecw5211', 'edgecore_ecw5410', 'edgecore_oap100', 'edgecore_ssw2ac2600', 'edgecore_spw2ac1200', 'edgecore_spw2ac1200-lan-poe', 'hfcl_ion4', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'indio_um-305ac', 'indio_um-305ax', 'indio_um-325ac', 'indio_um-510ac-v3', 'indio_um-550ac', 'indio_um-310ax-v1', 'indio_um-510axp-v1', 'indio_um-510axm-v1', 'linksys_ea6350-v4', 'linksys_e8450-ubi', 'linksys_ea8300', 'meshpp_s618_cp03', 'meshpp_s618_cp01', 'udaya_a5-id2', 'wallys_dr40x9', 'wallys_dr6018', 'wallys_dr6018_v4', 'x64_vm', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650' ]
steps:
- uses: actions/checkout@v3

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@@ -29,7 +29,7 @@ jobs:
run: |
git config --global user.email "you@example.com"
git config --global user.name "Your Name"
make -j TARGET=${{ matrix.target }} make -j TARGET=${{ matrix.target }}
make -j TARGET=${{ matrix.target }}
- name: Package and upload image for ${{ matrix.target }}
id: package_and_upload_image

View File

@@ -12,5 +12,6 @@ patch_folders:
- patches/ipq40xx
- patches/ipq806x
- patches/ipq807x
- patches/rtkmipsel
- patches/rest
- patches/x86

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@@ -1,29 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ble_scan
PKG_VERSION:=1.0
PKG_BUILD_DIR:= $(BUILD_DIR)/$(PKG_NAME)
include $(INCLUDE_DIR)/package.mk
define Package/ble_scan
SECTION:=base
CATEGORY:=Utilities
TITLE:=ble_scan
endef
define Build/Prepare
mkdir -p $(PKG_BUILD_DIR)
$(CP) ./src/* $(PKG_BUILD_DIR)/
endef
define Package/ble_scan/install
$(INSTALL_DIR) $(1)/bin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/ble_scan $(1)/bin/
endef
define Package/ble_scan/extra_provides
echo "libc.so.6";
endef
$(eval $(call BuildPackage,ble_scan))

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@@ -1,47 +0,0 @@
#all: ble_scan
#ble_scan: ble_scan.o
# $(CC) $(LDFLAGS) ble_scan.o -o ble_scan
#blescan.o: ble_scan.c
# $(CC) $(CFLAGS) -c ble_scan.c
#clean:
# rm *.o ble_scan
#
#
# Author: Teunis van Beelen
#
# email: teuniz@protonmail.com
#
#
#CROSS-COMPILE:=../../../../../qsdk/staging_dir/toolchain-arm/bin/arm-openwrt-linux-
#CC:=$(CROSS-COMPILE)gcc
CC = gcc
CFLAGS = -Wall -Wextra -Wshadow -Wformat-nonliteral -Wformat-security -Wtype-limits -O2
objects = rs232.o
all: ble_scan
ble_scan : $(objects) ble_scan.o
$(CC) $(CFLAGS) $(objects) ble_scan.o -o ble_scan
ble_scan.o : ble_scan.c rs232.h
$(CC) $(CFLAGS) -c ble_scan.c -o ble_scan.o
rs232.o : rs232.h rs232.c
$(CC) $(CFLAGS) -c rs232.c -o rs232.o
clean :
$(RM) ble_scan $(objects) ble_scan.o
#
#
#
#

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@@ -1,387 +0,0 @@
/**************************************************
file: ble_scan.c
purpose: Send HCI command to do BLE scan
compile with the command: gcc ble_scan.c rs232.c -Wall -Wextra -o2 -o ble_scan
**************************************************/
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#ifdef _WIN32
#include <Windows.h>
#else
#include <unistd.h>
#endif
#include "rs232.h"
#define TX 0
#define RX 1
#define BUF_SIZE 4095
#define FULL_BUF_SIZE BUF_SIZE*4
//#define DEBUG
#ifdef DEBUG
#else
#endif
int print_hex(int mode, unsigned char *buf, int size);
int rx_pkt_parser(unsigned char *buf, int size);
struct rx_packet_h{
unsigned char rxType;
unsigned char rxEventCode;
unsigned char rxDataLen;
unsigned char Event[2];
unsigned char Status;
};
struct event_cmd_st_h{
unsigned char OpCode[2];
unsigned char DataLength;
};
struct event_scn_evnt_rep_h{
unsigned char EventId[4];
unsigned char AdvRptEventType;
unsigned char AddressType;
unsigned char Address[6];
unsigned char PrimaryPHY;
unsigned char SecondaryPHY;
unsigned char AdvSid;
unsigned char TxPower;
unsigned char RSSI;
unsigned char DirectAddrType;
unsigned char DirectAddr[6];
unsigned char PeriodicAdvInt[2];
unsigned char DataLength[2];
//unsigned char *DataPtr;
};
int main()
{
int cport_nr,bdrate,n;
//cport_nr=0, /* /dev/ttyS0 (COM1 on windows) */
//bdrate=9600; /* 9600 baud */
cport_nr=39, /* (ttyMSM1 : 39) */
bdrate=115200; /* 115200 baud */
#ifdef DEBUG
clock_t t;
#endif
char mode[]={'8','N','1',0};
unsigned char buf[BUF_SIZE];
unsigned char full_buf[FULL_BUF_SIZE];
int full_buf_ptr = 0;
unsigned char HCIExt_ResetSystemCmd[] = {0x01, 0x1D, 0xFC, 0x01, 0x00 };
int HCIExt_ResetSystemCmd_length = 5;
unsigned char GAP_DeviceInitCmd[] = {0x01, 0x00, 0xFE, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
int GAP_DeviceInitCmd_length = 12;
unsigned char GapScan_enableCmd[] = {0x01, 0x51, 0xFE, 0x06, 0x00, 0x00, 0xF4, 0x01, 0x28, 0x00 };
int GapScan_enableCmd_length = 10;
if(RS232_OpenComport(cport_nr, bdrate, mode, 0))
{
printf("Can not open comport\n");
return(0);
}
RS232_flushRXTX(cport_nr);
// send reset command
#ifdef DEBUG
t=clock();
print_hex(TX, HCIExt_ResetSystemCmd, HCIExt_ResetSystemCmd_length);
t=clock()-t;
printf("t=%ld\n",t); //60
#else
/* sleep for 60ms */
usleep(60000);
#endif
RS232_SendBuf(cport_nr, HCIExt_ResetSystemCmd, HCIExt_ResetSystemCmd_length);
/* sleep for 1 Second */
#ifdef DEBUG
t=clock();
#endif
usleep(1000000);
#ifdef DEBUG
t=clock()-t;
printf("CLOCKS_PER_SEC=%ld\n",t);
#endif
n = RS232_PollComport(cport_nr, buf, BUF_SIZE);
#ifdef DEBUG
t=clock();
print_hex(RX, buf, n);
t=clock()-t;
printf("t=%ld\n",t);
#else
/* sleep for 300ms */
usleep(300000);
#endif
// send device initial command
#ifdef DEBUG
t=clock();
print_hex(TX, GAP_DeviceInitCmd, GAP_DeviceInitCmd_length);
t=clock()-t;
printf("t=%ld\n",t);
#else
/* sleep for 250 ms */
usleep(250000);
#endif
RS232_SendBuf(cport_nr, GAP_DeviceInitCmd, GAP_DeviceInitCmd_length);
/* sleep for 0.5 Second */
usleep(500000);
n = RS232_PollComport(cport_nr, buf, BUF_SIZE);
#ifdef DEBUG
t=clock();
print_hex(RX, buf, n);
t=clock()-t;
printf("t=%ld\n",t);
#else
/* sleep for 500 ms */
usleep(500000);
#endif
// send scan command
#ifdef DEBUG
t=clock();
print_hex(TX, GapScan_enableCmd, GapScan_enableCmd_length);
t=clock()-t;
printf("t=%ld\n",t);
#else
/* sleep for 30ms */
usleep(30000);
#endif
RS232_SendBuf(cport_nr, GapScan_enableCmd, GapScan_enableCmd_length);
//read scan respone
while (n > 0)
{
/* sleep for 400 mS */
usleep(400000);
n = RS232_PollComport(cport_nr, buf, BUF_SIZE);
#ifdef DEBUG
t=clock();
print_hex(RX, buf, n);
t=clock()-t;
printf("t=%ld\n",t);
#endif
if (full_buf_ptr+n>FULL_BUF_SIZE)
{
#ifdef DEBUG
printf("buffer full. break.\n");
#endif
break;
}
memcpy(full_buf+full_buf_ptr, buf, n);
full_buf_ptr+=n;
#ifdef DEBUG
printf("n:%d, full_buf_ptr:%d\n",n, full_buf_ptr);
#endif
}
#ifdef DEBUG
print_hex(RX, full_buf, full_buf_ptr);
#endif
rx_pkt_parser( full_buf, full_buf_ptr);
#ifdef DEBUG
printf("n:%d, full_buf_ptr:%d\n",n, full_buf_ptr);
#endif
RS232_flushRXTX(cport_nr);
RS232_CloseComport(cport_nr);
return(0);
}
/**************************************************
Print buffer in HEX
**************************************************/
int print_hex(int mode, unsigned char *buf, int size)
{
int ii,jj;
if (mode == TX)
printf("TX: ");
else
printf("RX: ");
for(ii=0,jj=0; ii < size; ii++,jj++)
{
printf("%02X ",buf[ii]);
if (jj==15)
{
printf("\n");
jj = 0;
}
}
printf("\n");
return(0);
}
int rx_pkt_parser(unsigned char *buf, int size)
{
int pkt_index=0;
int pkt_size=0;
int temp_event=0;
int temp_EventId=0;
int total_device_count=0;
char szAddress[18];
struct rx_packet_h *rx_packet;
struct event_scn_evnt_rep_h *event_scn_evnt_rep;
#ifdef DEBUG
int dump_i=0;
unsigned char *pkt_ptr;
#endif
if(size<=0){printf("size error\n");return -1;}
printf("BLE scan start:\n");
rx_packet = (struct rx_packet_h *)(buf);
while(pkt_index<size)
{
#ifdef DEBUG
printf("--------------------------------------------------------------------\n");
printf("-Type : 0x%02X (%s)\n",rx_packet->rxType,rx_packet->rxType==0x4?"Event":"Unknown");
if(rx_packet->rxType!=0x4)
{
printf(" Type unknown, rxType:0x%02X, pkt_index:%d\n",rx_packet->rxType,pkt_index);
}
printf("-EventCode : 0x%02X (%s)\n",rx_packet->rxEventCode,rx_packet->rxEventCode==0xff?"HCI_LE_ExtEvent":"Unknown");
if(rx_packet->rxEventCode!=0xff)
{
printf(" EventCode unknown, rxEventCode:0x%02X, pkt_index:%d\n",rx_packet->rxEventCode,pkt_index);
}
printf("-Data Length : 0x%02X (%d) bytes(s)\n",rx_packet->rxDataLen,rx_packet->rxDataLen);
#endif
temp_event = (rx_packet->Event[1]<<8)+rx_packet->Event[0] ;
#ifdef DEBUG
printf(" Event : 0x%02X%02X (%d) ",rx_packet->Event[1],rx_packet->Event[0],temp_event);
if(temp_event==0x067F)
{
printf("(GAP_HCI_ExtentionCommandStatus)\n");
}
else if(temp_event==0x0600)
{
printf("(GAP_DeviceInitDone)\n");
}
else if(temp_event==0x0613)
{
printf("(GAP_AdvertiserScannerEvent)\n");
}
else
{
printf(" Event unknown, Event:0x%04X, pkt_index:%d\n",temp_event,pkt_index);
}
printf(" Status : 0x%02X (%d) (%s)\n",rx_packet->Status,rx_packet->Status,rx_packet->Status==0?"SUCCESS":"FAIL");
#endif
if(temp_event==0x0613)
{
event_scn_evnt_rep = (struct event_scn_evnt_rep_h *)(&(rx_packet->Status) + 1);
temp_EventId = (event_scn_evnt_rep->EventId[3]<<24) + (event_scn_evnt_rep->EventId[2]<<16) +
(event_scn_evnt_rep->EventId[1]<<8) + (event_scn_evnt_rep->EventId[0]) ;
#ifdef DEBUG
printf(" EventId : 0x%02X%02X%02X%02X (%d) ", event_scn_evnt_rep->EventId[3],
event_scn_evnt_rep->EventId[2],
event_scn_evnt_rep->EventId[1],
event_scn_evnt_rep->EventId[0],temp_EventId);
if(temp_EventId==0x00010000)
{
printf("(GAP_EVT_SCAN_ENABLED)\n");
}
else if(temp_EventId==0x00020000)
{
printf("(GAP_EVT_SCAN_DISABLED)\n");
}
else if(temp_EventId==0x00400000)
{
printf("(GAP_EVT_ADV_REPORT)\n");
}
else
{
printf(" EventId unknown, EventId:0x%08X, pkt_index:%d\n",temp_EventId,pkt_index);
}
#endif
if(temp_EventId==0x00400000)
{
sprintf(szAddress,"%02X:%02X:%02X:%02X:%02X:%02X", event_scn_evnt_rep->Address[5],
event_scn_evnt_rep->Address[4],
event_scn_evnt_rep->Address[3],
event_scn_evnt_rep->Address[2],
event_scn_evnt_rep->Address[1],
event_scn_evnt_rep->Address[0]);
#ifdef DEBUG
printf("%04d", total_device_count);
printf(" Address : %s", szAddress);
printf(" RSSI : 0x%02X (%d)(%d)",event_scn_evnt_rep->RSSI,event_scn_evnt_rep->RSSI,event_scn_evnt_rep->RSSI-256);
#else
printf(" Address: %s RSSI: %d", szAddress, event_scn_evnt_rep->RSSI-256);
#endif
printf("\n");
total_device_count++;
}
}
pkt_size = 3+rx_packet->rxDataLen;
#ifdef DEBUG
pkt_ptr = (unsigned char *)rx_packet;
printf(" <Info > Dump(Rx):");
for(dump_i=0; dump_i < pkt_size; dump_i++)
{
if (dump_i%16==0)
{
printf("\n");
printf("%04x:",dump_i);
}
printf("%02X ",pkt_ptr[dump_i]);
}
printf("\n");
#endif
pkt_index+=pkt_size;
#ifdef DEBUG
printf(" pkt_size:%d, pkt_index:%d\n",pkt_size,pkt_index);
#endif
rx_packet = (struct rx_packet_h *)(&(rx_packet->rxDataLen) + rx_packet->rxDataLen + 1);
}
printf("Total: %d Device found.\n",total_device_count);
return 0;
}

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@@ -1,879 +0,0 @@
/*
***************************************************************************
*
* Author: Teunis van Beelen
*
* Copyright (C) 2005 - 2021 Teunis van Beelen
*
* Email: teuniz@protonmail.com
*
***************************************************************************
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
***************************************************************************
*/
/* Last revision: February 9, 2021 */
/* For more info and how to use this library, visit: http://www.teuniz.net/RS-232/ */
#include "rs232.h"
#if defined(__linux__) || defined(__FreeBSD__) /* Linux & FreeBSD */
#define RS232_PORTNR 40
int Cport[RS232_PORTNR],
error;
struct termios new_port_settings,
old_port_settings[RS232_PORTNR];
const char *comports[RS232_PORTNR]={"/dev/ttyS0","/dev/ttyS1","/dev/ttyS2","/dev/ttyS3","/dev/ttyS4","/dev/ttyS5",
"/dev/ttyS6","/dev/ttyS7","/dev/ttyS8","/dev/ttyS9","/dev/ttyS10","/dev/ttyS11",
"/dev/ttyS12","/dev/ttyS13","/dev/ttyS14","/dev/ttyS15","/dev/ttyUSB0",
"/dev/ttyUSB1","/dev/ttyUSB2","/dev/ttyUSB3","/dev/ttyUSB4","/dev/ttyUSB5",
"/dev/ttyAMA0","/dev/ttyAMA1","/dev/ttyACM0","/dev/ttyACM1",
"/dev/rfcomm0","/dev/rfcomm1","/dev/ircomm0","/dev/ircomm1",
"/dev/cuau0","/dev/cuau1","/dev/cuau2","/dev/cuau3",
"/dev/cuaU0","/dev/cuaU1","/dev/cuaU2","/dev/cuaU3",
"/dev/ttyMSM0","/dev/ttyMSM1"};
int RS232_OpenComport(int comport_number, int baudrate, const char *mode, int flowctrl)
{
int baudr,
status;
if((comport_number>=RS232_PORTNR)||(comport_number<0))
{
printf("illegal comport number\n");
return(1);
}
switch(baudrate)
{
case 50 : baudr = B50;
break;
case 75 : baudr = B75;
break;
case 110 : baudr = B110;
break;
case 134 : baudr = B134;
break;
case 150 : baudr = B150;
break;
case 200 : baudr = B200;
break;
case 300 : baudr = B300;
break;
case 600 : baudr = B600;
break;
case 1200 : baudr = B1200;
break;
case 1800 : baudr = B1800;
break;
case 2400 : baudr = B2400;
break;
case 4800 : baudr = B4800;
break;
case 9600 : baudr = B9600;
break;
case 19200 : baudr = B19200;
break;
case 38400 : baudr = B38400;
break;
case 57600 : baudr = B57600;
break;
case 115200 : baudr = B115200;
break;
case 230400 : baudr = B230400;
break;
case 460800 : baudr = B460800;
break;
#if defined(__linux__)
case 500000 : baudr = B500000;
break;
case 576000 : baudr = B576000;
break;
case 921600 : baudr = B921600;
break;
case 1000000 : baudr = B1000000;
break;
case 1152000 : baudr = B1152000;
break;
case 1500000 : baudr = B1500000;
break;
case 2000000 : baudr = B2000000;
break;
case 2500000 : baudr = B2500000;
break;
case 3000000 : baudr = B3000000;
break;
case 3500000 : baudr = B3500000;
break;
case 4000000 : baudr = B4000000;
break;
#endif
default : printf("invalid baudrate\n");
return(1);
break;
}
int cbits=CS8,
cpar=0,
ipar=IGNPAR,
bstop=0;
if(strlen(mode) != 3)
{
printf("invalid mode \"%s\"\n", mode);
return(1);
}
switch(mode[0])
{
case '8': cbits = CS8;
break;
case '7': cbits = CS7;
break;
case '6': cbits = CS6;
break;
case '5': cbits = CS5;
break;
default : printf("invalid number of data-bits '%c'\n", mode[0]);
return(1);
break;
}
switch(mode[1])
{
case 'N':
case 'n': cpar = 0;
ipar = IGNPAR;
break;
case 'E':
case 'e': cpar = PARENB;
ipar = INPCK;
break;
case 'O':
case 'o': cpar = (PARENB | PARODD);
ipar = INPCK;
break;
default : printf("invalid parity '%c'\n", mode[1]);
return(1);
break;
}
switch(mode[2])
{
case '1': bstop = 0;
break;
case '2': bstop = CSTOPB;
break;
default : printf("invalid number of stop bits '%c'\n", mode[2]);
return(1);
break;
}
/*
http://pubs.opengroup.org/onlinepubs/7908799/xsh/termios.h.html
http://man7.org/linux/man-pages/man3/termios.3.html
*/
Cport[comport_number] = open(comports[comport_number], O_RDWR | O_NOCTTY | O_NDELAY);
if(Cport[comport_number]==-1)
{
perror("unable to open comport ");
return(1);
}
/* lock access so that another process can't also use the port */
if(flock(Cport[comport_number], LOCK_EX | LOCK_NB) != 0)
{
close(Cport[comport_number]);
perror("Another process has locked the comport.");
return(1);
}
error = tcgetattr(Cport[comport_number], old_port_settings + comport_number);
if(error==-1)
{
close(Cport[comport_number]);
flock(Cport[comport_number], LOCK_UN); /* free the port so that others can use it. */
perror("unable to read portsettings ");
return(1);
}
memset(&new_port_settings, 0, sizeof(new_port_settings)); /* clear the new struct */
new_port_settings.c_cflag = cbits | cpar | bstop | CLOCAL | CREAD;
if(flowctrl)
{
new_port_settings.c_cflag |= CRTSCTS;
}
new_port_settings.c_iflag = ipar;
new_port_settings.c_oflag = 0;
new_port_settings.c_lflag = 0;
new_port_settings.c_cc[VMIN] = 0; /* block untill n bytes are received */
new_port_settings.c_cc[VTIME] = 0; /* block untill a timer expires (n * 100 mSec.) */
cfsetispeed(&new_port_settings, baudr);
cfsetospeed(&new_port_settings, baudr);
error = tcsetattr(Cport[comport_number], TCSANOW, &new_port_settings);
if(error==-1)
{
tcsetattr(Cport[comport_number], TCSANOW, old_port_settings + comport_number);
close(Cport[comport_number]);
flock(Cport[comport_number], LOCK_UN); /* free the port so that others can use it. */
perror("unable to adjust portsettings ");
return(1);
}
/* http://man7.org/linux/man-pages/man4/tty_ioctl.4.html */
if(ioctl(Cport[comport_number], TIOCMGET, &status) == -1)
{
tcsetattr(Cport[comport_number], TCSANOW, old_port_settings + comport_number);
flock(Cport[comport_number], LOCK_UN); /* free the port so that others can use it. */
perror("unable to get portstatus");
return(1);
}
status |= TIOCM_DTR; /* turn on DTR */
status |= TIOCM_RTS; /* turn on RTS */
if(ioctl(Cport[comport_number], TIOCMSET, &status) == -1)
{
tcsetattr(Cport[comport_number], TCSANOW, old_port_settings + comport_number);
flock(Cport[comport_number], LOCK_UN); /* free the port so that others can use it. */
perror("unable to set portstatus");
return(1);
}
return(0);
}
int RS232_PollComport(int comport_number, unsigned char *buf, int size)
{
int n;
n = read(Cport[comport_number], buf, size);
if(n < 0)
{
if(errno == EAGAIN) return 0;
}
return(n);
}
int RS232_SendByte(int comport_number, unsigned char byte)
{
int n = write(Cport[comport_number], &byte, 1);
if(n < 0)
{
if(errno == EAGAIN)
{
return 0;
}
else
{
return 1;
}
}
return(0);
}
int RS232_SendBuf(int comport_number, unsigned char *buf, int size)
{
int n = write(Cport[comport_number], buf, size);
if(n < 0)
{
if(errno == EAGAIN)
{
return 0;
}
else
{
return -1;
}
}
return(n);
}
void RS232_CloseComport(int comport_number)
{
int status;
if(ioctl(Cport[comport_number], TIOCMGET, &status) == -1)
{
perror("unable to get portstatus");
}
status &= ~TIOCM_DTR; /* turn off DTR */
status &= ~TIOCM_RTS; /* turn off RTS */
if(ioctl(Cport[comport_number], TIOCMSET, &status) == -1)
{
perror("unable to set portstatus");
}
tcsetattr(Cport[comport_number], TCSANOW, old_port_settings + comport_number);
close(Cport[comport_number]);
flock(Cport[comport_number], LOCK_UN); /* free the port so that others can use it. */
}
/*
Constant Description
TIOCM_LE DSR (data set ready/line enable)
TIOCM_DTR DTR (data terminal ready)
TIOCM_RTS RTS (request to send)
TIOCM_ST Secondary TXD (transmit)
TIOCM_SR Secondary RXD (receive)
TIOCM_CTS CTS (clear to send)
TIOCM_CAR DCD (data carrier detect)
TIOCM_CD see TIOCM_CAR
TIOCM_RNG RNG (ring)
TIOCM_RI see TIOCM_RNG
TIOCM_DSR DSR (data set ready)
http://man7.org/linux/man-pages/man4/tty_ioctl.4.html
*/
int RS232_IsDCDEnabled(int comport_number)
{
int status;
ioctl(Cport[comport_number], TIOCMGET, &status);
if(status&TIOCM_CAR) return(1);
else return(0);
}
int RS232_IsRINGEnabled(int comport_number)
{
int status;
ioctl(Cport[comport_number], TIOCMGET, &status);
if(status&TIOCM_RNG) return(1);
else return(0);
}
int RS232_IsCTSEnabled(int comport_number)
{
int status;
ioctl(Cport[comport_number], TIOCMGET, &status);
if(status&TIOCM_CTS) return(1);
else return(0);
}
int RS232_IsDSREnabled(int comport_number)
{
int status;
ioctl(Cport[comport_number], TIOCMGET, &status);
if(status&TIOCM_DSR) return(1);
else return(0);
}
void RS232_enableDTR(int comport_number)
{
int status;
if(ioctl(Cport[comport_number], TIOCMGET, &status) == -1)
{
perror("unable to get portstatus");
}
status |= TIOCM_DTR; /* turn on DTR */
if(ioctl(Cport[comport_number], TIOCMSET, &status) == -1)
{
perror("unable to set portstatus");
}
}
void RS232_disableDTR(int comport_number)
{
int status;
if(ioctl(Cport[comport_number], TIOCMGET, &status) == -1)
{
perror("unable to get portstatus");
}
status &= ~TIOCM_DTR; /* turn off DTR */
if(ioctl(Cport[comport_number], TIOCMSET, &status) == -1)
{
perror("unable to set portstatus");
}
}
void RS232_enableRTS(int comport_number)
{
int status;
if(ioctl(Cport[comport_number], TIOCMGET, &status) == -1)
{
perror("unable to get portstatus");
}
status |= TIOCM_RTS; /* turn on RTS */
if(ioctl(Cport[comport_number], TIOCMSET, &status) == -1)
{
perror("unable to set portstatus");
}
}
void RS232_disableRTS(int comport_number)
{
int status;
if(ioctl(Cport[comport_number], TIOCMGET, &status) == -1)
{
perror("unable to get portstatus");
}
status &= ~TIOCM_RTS; /* turn off RTS */
if(ioctl(Cport[comport_number], TIOCMSET, &status) == -1)
{
perror("unable to set portstatus");
}
}
void RS232_flushRX(int comport_number)
{
tcflush(Cport[comport_number], TCIFLUSH);
}
void RS232_flushTX(int comport_number)
{
tcflush(Cport[comport_number], TCOFLUSH);
}
void RS232_flushRXTX(int comport_number)
{
tcflush(Cport[comport_number], TCIOFLUSH);
}
#else /* windows */
#define RS232_PORTNR 32
HANDLE Cport[RS232_PORTNR];
const char *comports[RS232_PORTNR]={"\\\\.\\COM1", "\\\\.\\COM2", "\\\\.\\COM3", "\\\\.\\COM4",
"\\\\.\\COM5", "\\\\.\\COM6", "\\\\.\\COM7", "\\\\.\\COM8",
"\\\\.\\COM9", "\\\\.\\COM10", "\\\\.\\COM11", "\\\\.\\COM12",
"\\\\.\\COM13", "\\\\.\\COM14", "\\\\.\\COM15", "\\\\.\\COM16",
"\\\\.\\COM17", "\\\\.\\COM18", "\\\\.\\COM19", "\\\\.\\COM20",
"\\\\.\\COM21", "\\\\.\\COM22", "\\\\.\\COM23", "\\\\.\\COM24",
"\\\\.\\COM25", "\\\\.\\COM26", "\\\\.\\COM27", "\\\\.\\COM28",
"\\\\.\\COM29", "\\\\.\\COM30", "\\\\.\\COM31", "\\\\.\\COM32"};
char mode_str[128];
int RS232_OpenComport(int comport_number, int baudrate, const char *mode, int flowctrl)
{
if((comport_number>=RS232_PORTNR)||(comport_number<0))
{
printf("illegal comport number\n");
return(1);
}
switch(baudrate)
{
case 110 : strcpy(mode_str, "baud=110");
break;
case 300 : strcpy(mode_str, "baud=300");
break;
case 600 : strcpy(mode_str, "baud=600");
break;
case 1200 : strcpy(mode_str, "baud=1200");
break;
case 2400 : strcpy(mode_str, "baud=2400");
break;
case 4800 : strcpy(mode_str, "baud=4800");
break;
case 9600 : strcpy(mode_str, "baud=9600");
break;
case 19200 : strcpy(mode_str, "baud=19200");
break;
case 38400 : strcpy(mode_str, "baud=38400");
break;
case 57600 : strcpy(mode_str, "baud=57600");
break;
case 115200 : strcpy(mode_str, "baud=115200");
break;
case 128000 : strcpy(mode_str, "baud=128000");
break;
case 256000 : strcpy(mode_str, "baud=256000");
break;
case 500000 : strcpy(mode_str, "baud=500000");
break;
case 921600 : strcpy(mode_str, "baud=921600");
break;
case 1000000 : strcpy(mode_str, "baud=1000000");
break;
case 1500000 : strcpy(mode_str, "baud=1500000");
break;
case 2000000 : strcpy(mode_str, "baud=2000000");
break;
case 3000000 : strcpy(mode_str, "baud=3000000");
break;
default : printf("invalid baudrate\n");
return(1);
break;
}
if(strlen(mode) != 3)
{
printf("invalid mode \"%s\"\n", mode);
return(1);
}
switch(mode[0])
{
case '8': strcat(mode_str, " data=8");
break;
case '7': strcat(mode_str, " data=7");
break;
case '6': strcat(mode_str, " data=6");
break;
case '5': strcat(mode_str, " data=5");
break;
default : printf("invalid number of data-bits '%c'\n", mode[0]);
return(1);
break;
}
switch(mode[1])
{
case 'N':
case 'n': strcat(mode_str, " parity=n");
break;
case 'E':
case 'e': strcat(mode_str, " parity=e");
break;
case 'O':
case 'o': strcat(mode_str, " parity=o");
break;
default : printf("invalid parity '%c'\n", mode[1]);
return(1);
break;
}
switch(mode[2])
{
case '1': strcat(mode_str, " stop=1");
break;
case '2': strcat(mode_str, " stop=2");
break;
default : printf("invalid number of stop bits '%c'\n", mode[2]);
return(1);
break;
}
if(flowctrl)
{
strcat(mode_str, " xon=off to=off odsr=off dtr=on rts=off");
}
else
{
strcat(mode_str, " xon=off to=off odsr=off dtr=on rts=on");
}
/*
http://msdn.microsoft.com/en-us/library/windows/desktop/aa363145%28v=vs.85%29.aspx
http://technet.microsoft.com/en-us/library/cc732236.aspx
https://docs.microsoft.com/en-us/windows/desktop/api/winbase/ns-winbase-_dcb
*/
Cport[comport_number] = CreateFileA(comports[comport_number],
GENERIC_READ|GENERIC_WRITE,
0, /* no share */
NULL, /* no security */
OPEN_EXISTING,
0, /* no threads */
NULL); /* no templates */
if(Cport[comport_number]==INVALID_HANDLE_VALUE)
{
printf("unable to open comport\n");
return(1);
}
DCB port_settings;
memset(&port_settings, 0, sizeof(port_settings)); /* clear the new struct */
port_settings.DCBlength = sizeof(port_settings);
if(!BuildCommDCBA(mode_str, &port_settings))
{
printf("unable to set comport dcb settings\n");
CloseHandle(Cport[comport_number]);
return(1);
}
if(flowctrl)
{
port_settings.fOutxCtsFlow = TRUE;
port_settings.fRtsControl = RTS_CONTROL_HANDSHAKE;
}
if(!SetCommState(Cport[comport_number], &port_settings))
{
printf("unable to set comport cfg settings\n");
CloseHandle(Cport[comport_number]);
return(1);
}
COMMTIMEOUTS Cptimeouts;
Cptimeouts.ReadIntervalTimeout = MAXDWORD;
Cptimeouts.ReadTotalTimeoutMultiplier = 0;
Cptimeouts.ReadTotalTimeoutConstant = 0;
Cptimeouts.WriteTotalTimeoutMultiplier = 0;
Cptimeouts.WriteTotalTimeoutConstant = 0;
if(!SetCommTimeouts(Cport[comport_number], &Cptimeouts))
{
printf("unable to set comport time-out settings\n");
CloseHandle(Cport[comport_number]);
return(1);
}
return(0);
}
int RS232_PollComport(int comport_number, unsigned char *buf, int size)
{
int n;
/* added the void pointer cast, otherwise gcc will complain about */
/* "warning: dereferencing type-punned pointer will break strict aliasing rules" */
if(!ReadFile(Cport[comport_number], buf, size, (LPDWORD)((void *)&n), NULL))
{
return -1;
}
return(n);
}
int RS232_SendByte(int comport_number, unsigned char byte)
{
int n;
if(!WriteFile(Cport[comport_number], &byte, 1, (LPDWORD)((void *)&n), NULL))
{
return(1);
}
if(n<0) return(1);
return(0);
}
int RS232_SendBuf(int comport_number, unsigned char *buf, int size)
{
int n;
if(WriteFile(Cport[comport_number], buf, size, (LPDWORD)((void *)&n), NULL))
{
return(n);
}
return(-1);
}
void RS232_CloseComport(int comport_number)
{
CloseHandle(Cport[comport_number]);
}
/*
http://msdn.microsoft.com/en-us/library/windows/desktop/aa363258%28v=vs.85%29.aspx
*/
int RS232_IsDCDEnabled(int comport_number)
{
int status;
GetCommModemStatus(Cport[comport_number], (LPDWORD)((void *)&status));
if(status&MS_RLSD_ON) return(1);
else return(0);
}
int RS232_IsRINGEnabled(int comport_number)
{
int status;
GetCommModemStatus(Cport[comport_number], (LPDWORD)((void *)&status));
if(status&MS_RING_ON) return(1);
else return(0);
}
int RS232_IsCTSEnabled(int comport_number)
{
int status;
GetCommModemStatus(Cport[comport_number], (LPDWORD)((void *)&status));
if(status&MS_CTS_ON) return(1);
else return(0);
}
int RS232_IsDSREnabled(int comport_number)
{
int status;
GetCommModemStatus(Cport[comport_number], (LPDWORD)((void *)&status));
if(status&MS_DSR_ON) return(1);
else return(0);
}
void RS232_enableDTR(int comport_number)
{
EscapeCommFunction(Cport[comport_number], SETDTR);
}
void RS232_disableDTR(int comport_number)
{
EscapeCommFunction(Cport[comport_number], CLRDTR);
}
void RS232_enableRTS(int comport_number)
{
EscapeCommFunction(Cport[comport_number], SETRTS);
}
void RS232_disableRTS(int comport_number)
{
EscapeCommFunction(Cport[comport_number], CLRRTS);
}
/*
https://msdn.microsoft.com/en-us/library/windows/desktop/aa363428%28v=vs.85%29.aspx
*/
void RS232_flushRX(int comport_number)
{
PurgeComm(Cport[comport_number], PURGE_RXCLEAR | PURGE_RXABORT);
}
void RS232_flushTX(int comport_number)
{
PurgeComm(Cport[comport_number], PURGE_TXCLEAR | PURGE_TXABORT);
}
void RS232_flushRXTX(int comport_number)
{
PurgeComm(Cport[comport_number], PURGE_RXCLEAR | PURGE_RXABORT);
PurgeComm(Cport[comport_number], PURGE_TXCLEAR | PURGE_TXABORT);
}
#endif
void RS232_cputs(int comport_number, const char *text) /* sends a string to serial port */
{
while(*text != 0) RS232_SendByte(comport_number, *(text++));
}
/* return index in comports matching to device name or -1 if not found */
int RS232_GetPortnr(const char *devname)
{
int i;
char str[32];
#if defined(__linux__) || defined(__FreeBSD__) /* Linux & FreeBSD */
strcpy(str, "/dev/");
#else /* windows */
strcpy(str, "\\\\.\\");
#endif
strncat(str, devname, 16);
str[31] = 0;
for(i=0; i<RS232_PORTNR; i++)
{
if(!strcmp(comports[i], str))
{
return i;
}
}
return -1; /* device not found */
}

View File

@@ -1,85 +0,0 @@
/*
***************************************************************************
*
* Author: Teunis van Beelen
*
* Copyright (C) 2005 - 2021 Teunis van Beelen
*
* Email: teuniz@protonmail.com
*
***************************************************************************
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
***************************************************************************
*/
/* For more info and how to use this library, visit: http://www.teuniz.net/RS-232/ */
#ifndef rs232_INCLUDED
#define rs232_INCLUDED
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <string.h>
#if defined(__linux__) || defined(__FreeBSD__)
#include <termios.h>
#include <sys/ioctl.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <limits.h>
#include <sys/file.h>
#include <errno.h>
#else
#include <windows.h>
#endif
int RS232_OpenComport(int, int, const char *, int);
int RS232_PollComport(int, unsigned char *, int);
int RS232_SendByte(int, unsigned char);
int RS232_SendBuf(int, unsigned char *, int);
void RS232_CloseComport(int);
void RS232_cputs(int, const char *);
int RS232_IsDCDEnabled(int);
int RS232_IsRINGEnabled(int);
int RS232_IsCTSEnabled(int);
int RS232_IsDSREnabled(int);
void RS232_enableDTR(int);
void RS232_disableDTR(int);
void RS232_enableRTS(int);
void RS232_disableRTS(int);
void RS232_flushRX(int);
void RS232_flushTX(int);
void RS232_flushRXTX(int);
int RS232_GetPortnr(const char *);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif

View File

@@ -25,12 +25,21 @@ define Build/Prepare
endef
define Package/cc2652/install
$(INSTALL_DIR) $(1)/lib/firmware/cc2562
$(INSTALL_BIN) ./files/firmware/* $(1)/lib/firmware/cc2562
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/tisbl.init $(1)/etc/init.d/tisbl
$(INSTALL_DIR) $(1)/etc/tifirmware
$(INSTALL_BIN) ./files/firmware/* $(1)/etc/tifirmware/
$(INSTALL_DIR) $(1)/usr/bin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/tisbl $(1)/usr/bin/
$(INSTALL_BIN) ./files/*.sh $(1)/usr/bin/
$(INSTALL_DIR) $(1)/etc/config
$(INSTALL_BIN) ./files/tisbl.config $(1)/etc/config/tisbl
$(INSTALL_DIR) $(1)/etc/uci-defaults
$(INSTALL_BIN) ./files/tisbl.defaults $(1)/etc/uci-defaults
endef
$(eval $(call BuildPackage,cc2652))

View File

@@ -0,0 +1,124 @@
#!/usr/bin/lua
--[[
ByteCnt: 1 1 1 2 1 4
---- --------- ---------- ----- ------ -------
FieldName:Type EventCode DataLength Event Status EventId
--]]
--Type
Command = 0x01
Event = 0x04
--OpCode
GapScan_enable = 0xFE51
--EventCode
HCI_LE_ExtEvent = 0xff
--Status
SUCCESS = 0x00
--Event
GAP_HCI_ExtentionCommandStatus = 0x067F
GAP_AdvertiserScannerEvent = 0x0613
--EventId
GAP_EVT_ADV_REPORT = 0x00400000
GAP_EVT_SCAN_ENABLED = 0x00010000
local write = io.write
function print(...)
local n = select("#",...)
for i = 1,n do
local v = tostring(select(i,...))
write(v)
if i~=n then write'\t' end
end
-- write'\n'
end
function printf(str, ...)
return print(str:format(...))
end
function lshift(x, by)
return x * 2 ^ by
end
function GetUint8(Payload, position)
return string.byte(Payload, position)
end
function GetUint32(Payload, position)
return (lshift(string.byte(Payload, position+3),24) + lshift(string.byte(Payload, position+2),16) + lshift(string.byte(Payload, position+1),8) + string.byte(Payload, position))
end
function GetUint16(Payload, position)
return (lshift(string.byte(Payload, position+1),8) + string.byte(Payload, position))
end
function hexdump(Payload,separator)
for i=1,Payload:len(), 1 do
io.write(string.format("%02X", Payload:byte(i)))
if (i< Payload:len()) then
io.write(separator)
end
end
end
ibeacon_hdr=string.char(0x1A,0xFF,0x4C,0x00,0x02,0x15)
function DumpAdvertiserData(Payload)
--[[
Len(1byte)+Type(1byte)+Data(Len bytes)
--]]
while( Payload:len() > 0 ) do
local Len = GetUint8(Payload,1)
if (GetUint8(Payload,2) == 0xff) then -- manufacturer data
print(" MFR=")
hexdump(Payload:sub(1,Len+1),'')
if (Payload:sub(1,6) == ibeacon_hdr) then
print(" [ibeacon]")
end
end
Payload = string.sub(Payload,Len+2,-1)
end
end
function DumpAdvertiserScannerEvent(Payload)
local Status = GetUint8(Payload,3)
local EventId = GetUint32(Payload,4)
if((EventId==GAP_EVT_ADV_REPORT) and (Status==SUCCESS))
then
local MAC = string.sub(Payload,10,15)
local TxPower = GetUint8(Payload,19)
local RSSI = GetUint8(Payload,20)
printf("MAC=%02X%02X%02X%02X%02X%02X RSI=%d PWR=%d",string.byte(MAC,6),string.byte(MAC,5),string.byte(MAC,4),
string.byte(MAC,3),string.byte(MAC,2),string.byte(MAC,1),RSSI,TxPower)
local DataLength = GetUint16(Payload,30)
DumpAdvertiserData(string.sub(Payload,32,-1))
print("\n")
end
end
function hci_event_paser()
while true do
local Header = io.read(3)
if not Header then break end
local EventType = GetUint8(Header,1)
local EventCode = GetUint8(Header,2)
local DataLength = GetUint8(Header,3)
local Data = io.read(DataLength)
local Event = GetUint16(Data,1)
-- print(EventType,EventCode,DataLength,Event)
if not Data then break end
if(Event==GAP_AdvertiserScannerEvent)
then
DumpAdvertiserScannerEvent(Data)
-- hexdump(ibeacon_hdr)
end
end
end
hci_event_paser()

View File

@@ -0,0 +1,8 @@
#!/bin/sh
com-wr.sh /dev/ttyMSM1 3 "\x01\x1D\xFC\x01\x00" > /dev/null # this command dealy time must >= 3, if small then 3, the following commands will be something wrong
com-wr.sh /dev/ttyMSM1 1 "\x01\x00\xFE\x08\x08\x00\x00\x00\x00\x00\x00\x00" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x01\x61\xFE\x02\x01\x02" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x01\x61\xFE\x02\x01\x03" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x01\x61\xFE\x02\x01\x04" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x01\x61\xFE\x02\x01\x05" > /dev/null
com-wr.sh /dev/ttyMSM1 3 "\x01\x51\xFE\x06\x00\x00\xF4\x01\x28\x00" | tee /tmp/blescan.data | ble-scan-rx-parser.sh

View File

@@ -1,13 +0,0 @@
#!/bin/sh
if [ -f /sys/class/gpio/ble_enable/value ]; then
echo 1 > /sys/class/gpio/ble_enable/value
fi
echo 0 > /sys/class/gpio/ble_backdoor/value
echo 1 > /sys/class/gpio/ble_reset/value
echo 0 > /sys/class/gpio/ble_reset/value
sleep 1
echo 1 > /sys/class/gpio/ble_reset/value
sleep 1
echo 1 > /sys/class/gpio/ble_backdoor/value
tisbl /dev/ttyMSM1 115200 2652 /lib/firmware/cc2562/simple_broadcaster_bd9.bin

View File

@@ -1,13 +0,0 @@
#!/bin/sh
if [ -f /sys/class/gpio/ble_enable/value ]; then
echo 1 > /sys/class/gpio/ble_enable/value
fi
echo 0 > /sys/class/gpio/ble_backdoor/value
echo 1 > /sys/class/gpio/ble_reset/value
echo 0 > /sys/class/gpio/ble_reset/value
sleep 1
echo 1 > /sys/class/gpio/ble_reset/value
sleep 1
echo 1 > /sys/class/gpio/ble_backdoor/value
tisbl /dev/ttyMSM1 115200 2652 /lib/firmware/cc2562/ble5_host_test_bd9.bin

View File

@@ -1,10 +0,0 @@
#!/bin/sh
if [ -f /sys/class/gpio/ble_enable/value ]; then
echo 1 > /sys/class/gpio/ble_enable/value
fi
echo 1 > /sys/class/gpio/ble_backdoor/value
echo 1 > /sys/class/gpio/ble_reset/value
sleep 1
echo 1 > /sys/class/gpio/ble_reset/value
sleep 1

View File

@@ -0,0 +1,11 @@
#!/usr/bin/lua
local block = 16
while true do
local bytes = io.read(block)
if not bytes then break end
for b in string.gfind(bytes, ".") do
io.write(string.format("%02X ", string.byte(b)))
end
io.write(string.rep(" ", block - string.len(bytes) + 1))
io.write(string.gsub(bytes, "%c", "."), "\n")
end

View File

@@ -1,28 +1,20 @@
#!/bin/sh
function iBeconScan() {
if [ "$#" -eq 4 ]; then
UUID=$1
MAJOR=$2
MINOR=$3
POWER=$4
else
UUID="\xE2\x0A\x39\xF4\x73\xF5\x4B\xC4\xA1\x2F\x17\xD1\xAD\x07\xA9\x61"
MAJOR="\x01\x23"
MINOR="\x45\x67"
POWER="\xC8"
fi
# script---------------- UUID---------------------------------------------------------------------- MAJOR----- MINOR----- POWER-
#example: ibeacon-broadcaster.sh "\xE2\x0A\x39\xF4\x73\xF5\x4B\xC4\xA1\x2F\x17\xD1\xAD\x07\xA9\x61" "\x01\x23" "\x45\x67" "\xC8"
if [ "$#" -eq 4 ]; then
UUID=$1
MAJOR=$2
MINOR=$3
POWER=$4
else
UUID="\xE2\x0A\x39\xF4\x73\xF5\x4B\xC4\xA1\x2F\x17\xD1\xAD\x07\xA9\x61"
MAJOR="\x01\x23"
MINOR="\x45\x67"
POWER="\xC8"
fi
cc2562-wr.sh /dev/ttyMSM1 3 "\x01\x1D\xFC\x01\x00" > /dev/null # this command dealy time must >= 3, if small then 3, the following commands will be something wrong
cc2562-wr.sh /dev/ttyMSM1 1 "\x01\x00\xFE\x08\x01\x00\x00\x00\x00\x00\x00\x00" > /dev/null
cc2562-wr.sh /dev/ttyMSM1 1 "\x01\x3E\xFE\x15\x12\x00\xA0\x00\x00\xA0\x00\x00\x07\x00\x00\x00\x00\x00\x00\x00\x00\x7F\x01\x01\x00" > /dev/null
cc2562-wr.sh /dev/ttyMSM1 1 "\x09\x44\xFE\x23\x00\x00\x00\x1E\x00\x02\x01\x1A\x1A\xFF\x4C\x00\x02\x15${UUID}${MAJOR}${MINOR}${POWER}\x00" > /dev/null
cc2562-wr.sh /dev/ttyMSM1 1 "\x01\x3F\xFE\x04\x00\x00\x00\x00"
}
cc2562-reset.sh
while true
do
iBeconScan
sleep 1
done
com-wr.sh /dev/ttyMSM1 3 "\x01\x1D\xFC\x01\x00" > /dev/null # this command dealy time must >= 3, if small then 3, the following commands will be something wrong
com-wr.sh /dev/ttyMSM1 1 "\x01\x00\xFE\x08\x01\x00\x00\x00\x00\x00\x00\x00" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x01\x3E\xFE\x15\x12\x00\xA0\x00\x00\xA0\x00\x00\x07\x00\x00\x00\x00\x00\x00\x00\x00\x7F\x01\x01\x00" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x09\x44\xFE\x23\x00\x00\x00\x1E\x00\x02\x01\x1A\x1A\xFF\x4C\x00\x02\x15${UUID}${MAJOR}${MINOR}${POWER}\x00" > /dev/null
com-wr.sh /dev/ttyMSM1 1 "\x01\x3F\xFE\x04\x00\x00\x00\x00" | hexdump.sh

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@@ -0,0 +1,5 @@
#!/bin/sh
killall -9 ser2net
tisbl.sh /dev/ttyMSM1 115200 2652 /etc/tifirmware/ble5_host_test_bd9.bin 79 34
echo "7000:telnet:0:/dev/ttyMSM1:115200 8DATABITS NONE 1STOPBIT remctl" > /tmp/ser2net.conf
ser2net -c /tmp/ser2net.conf

View File

@@ -0,0 +1,7 @@
config tisbl 'tisbl'
option firmware '/etc/tifirmware/ble5_host_test_bd9.bin'
option tty '/dev/ttyMSM1'
option tichip '2652'
option baudrate '115200'
option resetpin '79'
option backdoorpin '34'

View File

@@ -0,0 +1,13 @@
#!/bin/sh
. /lib/functions.sh
. /lib/functions/system.sh
board=$(board_name)
case $board in
edgecore,eap104)
uci set tisbl.tisbl.backdoorpin=31
uci set tisbl.tisbl.resetpin=35
;;
esac

View File

@@ -0,0 +1,21 @@
#!/bin/sh /etc/rc.common
# Copyright (C) 2007 OpenWrt.org
#start after dbus (60)
START=62
USE_PROCD=1
start_service() {
firmware="$(uci -q get tisbl.tisbl.firmware)"
tty="$(uci -q get tisbl.tisbl.tty)"
tichip="$(uci -q get tisbl.tisbl.tichip)"
baudrate="$(uci -q get tisbl.tisbl.baudrate)"
resetpin="$(uci -q get tisbl.tisbl.resetpin)"
backdoorpin="$(uci -q get tisbl.tisbl.backdoorpin)"
tisbl.sh $tty $baudrate $tichip $firmware $resetpin $backdoorpin
}
service_triggers()
{
procd_add_reload_trigger "tisbl"
}

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@@ -0,0 +1,43 @@
#!/bin/sh
# tisbl.sh $tty $baudrate $tichip $firmware $resetpin $backdoorpin
# tisbl.sh /dev/ttyMSM1 115200 2652 /etc/tifirmware/blinky_bd13.bin 79 67
#assumption: resetpin and backdoorpin are low active
tty=$1
baudrate=$2
tichip=$3
firmware=$4
resetpin=$5
backdoorpin=$6
ti_reset() #assumption:resetpin is low active
{
if [ ! -e /sys/class/gpio/gpio${resetpin} ]; then
echo ${resetpin} > /sys/class/gpio/export
fi
echo out > /sys/class/gpio/gpio${resetpin}/direction
echo 1 > /sys/class/gpio/gpio${resetpin}/value
echo 0 > /sys/class/gpio/gpio${resetpin}/value
sleep 1
echo 1 > /sys/class/gpio/gpio${resetpin}/value
}
ti_goto_bootloader() #assumption:backdoorpin is low active
{
if [ ! -e /sys/class/gpio/gpio${backdoorpin} ]; then
echo ${backdoorpin} > /sys/class/gpio/export
fi
echo out > /sys/class/gpio/gpio${backdoorpin}/direction
echo 0 > /sys/class/gpio/gpio${backdoorpin}/value
ti_reset
sleep 1
echo 1 > /sys/class/gpio/gpio${backdoorpin}/value
}
if [ -e $firmware ]; then
ti_goto_bootloader
tisbl $tty $baudrate $tichip $firmware #try to upgrade firmware
fi

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@@ -1,29 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=eltt2
PKG_VERSION:=1.0
PKG_BUILD_DIR:= $(BUILD_DIR)/$(PKG_NAME)
include $(INCLUDE_DIR)/package.mk
define Package/eltt2
SECTION:=base
CATEGORY:=Utilities
TITLE:=eltt2
endef
define Build/Prepare
mkdir -p $(PKG_BUILD_DIR)
$(CP) ./src/* $(PKG_BUILD_DIR)/
endef
define Package/eltt2/install
$(INSTALL_DIR) $(1)/bin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/eltt2 $(1)/bin/
endef
define Package/eltt2/extra_provides
echo "libc.so.6";
endef
$(eval $(call BuildPackage,eltt2))

View File

@@ -1,27 +0,0 @@
Copyright (c) 2014, Infineon Technologies AG
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

View File

@@ -1,15 +0,0 @@
# Makefile for Embedded Linux TPM Toolbox 2 (ELTT2)
# Copyright (c) Infineon Technologies AG
#CROSS-COMPILE:=../../../../../qsdk/staging_dir/toolchain-arm/bin/arm-openwrt-linux-
#CC:=$(CROSS-COMPILE)gcc
CC = gcc
CFLAGS=-Wall -Wextra -std=c99 -g
all: eltt2
eltt2: eltt2.c eltt2.h
$(CC) $(CFLAGS) eltt2.c -o eltt2
clean:
rm -rf eltt2

View File

@@ -1,230 +0,0 @@
# ELTT2 - Infineon Embedded Linux TPM Toolbox 2 for TPM 2.0
All information in this document is Copyright (c) 2014-2022, Infineon Technologies AG <br>
All rights reserved.
# 1. Welcome
Welcome to Embedded Linux TPM Toolbox 2 (ELTT2). ELTT2 is a single-file executable program intended for testing, performing diagnosis and basic state changes of the Infineon Technologies TPM 2.0.
## 1.1 Prerequisites
To build and run ELTT2 you need GCC and a Linux system capable of hosting a TPM.
ELTT2 may run on many other little-endian hardware and software configurations capable of running Linux and hosting a TPM, but this has not been tested.
ELTT2 does not support machines with a big-endian CPU.
## 1.2 Getting Started
A TPM 2.0 evaluation board can be ordered in the [Hitex Webshop](https://www.ehitex.de/evaluation-boards/infineon/2564/iridium-9670-tpm2.0-spi).
<p align="center">
<img src="https://cloud.githubusercontent.com/assets/19730245/25651091/77a84744-2fe1-11e7-91bd-a2e39678202d.JPG" width="350"/>
</p>
In order to execute ELTT2, you need to compile it first:
1. Switch to the directory with the ELTT2 source code
2. Compile the source code by typing the following command:
make
Due to hardware (and thus TPM) access restrictions for normal users, ELTT2 requires root (aka superuser or administrator) privileges. They can be obtained e.g. by using the 'sudo' command on Debian Linux derivates.
The Infineon [TPM 2.0 Application Note](https://www.infineon.com/dgdl/Infineon-App-Note-SLx9670-TPM2.0_Embedded_RPi_DI_SLx-AN-v01_20-EN.pdf?fileId=5546d46267c74c9a01684b96e69f5d7b) shows how the TPM device driver can be set up (e.g. for Linux Kernel 4.14).
# 2. Usage of ELTT2
## 2.1 Generic Usage
ELTT2 is operated as follows:
Call: `./eltt2 <option(s)>`
For example: `./eltt2 -g` or `./eltt2 -gc`
For getting an overview of the possible commands, run `./eltt2 -h`
Some options require the TPM to be in a specific state. This state is shown in brackets ("[]") behind each command line option in the list below:
\[-\]: none <br>
\[\*\]: the TPM platform hierarchy authorization value is not set (i.e., empty buffer) <br>
\[l\]: the required PCR bank is allocated <br>
\[u\]: started <br>
To get the TPM into the required state, call ELTT2 with the corresponding commands ("x" for a state means that whether this state is required or not depends on the actual command or the command parameters sent eventually to the TPM).
Command line option | Explanation | Precondition
--- | --- | ---
`-a [hash algorithm] <data bytes>` | Hash Sequence SHA-1/256/384 \[default: SHA-1\] | \[u\]
`-A <data bytes>` | Hash Sequence SHA-256 | \[u\]
`-b <command bytes>` | Enter your own TPM command | \[u\]
`-c` | Read Clock | \[u\]
`-d <shutdown type>` | Shutdown | \[u\]
`-e [hash algorithm] <PCR index> <PCR digest>` | PCR Extend SHA-1/256/384 \[default: SHA-1\] | \[u\], \[l\]
`-E <PCR index> <PCR digest>` | PCR Extend SHA-256 | \[u\], \[l\]
`-g` | Get fixed capability values | \[u\]
`-v` | Get variable capability values | \[u\]
`-G <data length>` | Get Random | \[u\]
`-h` | Help | \[-\]
`-l <hash algorithm>` | PCR Allocate SHA-1/256/384 | \[u\], \[\*\]
`-r [hash algorithm] <PCR index>` | PCR Read SHA-1/256/384 \[default: SHA-1\] | \[u\], \[l\]
`-R <PCR index>` | PCR Read SHA-256 | \[u\], \[l\]
`-s [hash algorithm] <data bytes>` | Hash SHA-1/256/384 \[default: SHA-1\] | \[u\]
`-S <data bytes>` | Hash SHA-256 | \[u\]
`-t <test type>` | Self Test | \[u\]
`-T` | Get Test Result | \[u\]
`-u <startup type>` | Startup | \[-\]
`-z <PCR index>` | PCR Reset | \[u\]
Additional information:
`-a`: <br>
With the "-a" command you can hash given data with the SHA-1/256/384 hash algorithm. This hash sequence sends 3 commands \[start, update, complete\] to the TPM and allows to hash an arbitrary amount of data. For example, use the following command to hash the byte sequence {0x41, 0x62, 0x43, 0x64}: <br>
`./eltt2 -a 41624364` Hash given data with SHA-1 hash algorithm. <br>
or <br>
`./eltt2 -a sha1 41624364` Hash given data with SHA-1 hash algorithm. <br>
`./eltt2 -a sha256 41624364` Hash given data with SHA-256 hash algorithm. <br>
`./eltt2 -a sha384 41624364` Hash given data with SHA-384 hash algorithm. <br>
`-A`: <br>
With the "-A" command you can hash given data with the SHA-256 hash algorithm. This hash sequence sends 3 commands \[start, update, complete\] to the TPM and allows to hash an arbitrary amount of data. For example, use the following command to hash the byte sequence {0x41, 0x62, 0x43, 0x64}: <br>
`./eltt2 -A 41624364`
`-b`: <br>
With the "-b" command you can enter your own TPM command bytes and read the TPM response. For example, use the following command to send a TPM2_Startup with startup type CLEAR to the TPM: <br>
`./eltt2 -b 80010000000C000001440000`
`-c`: <br>
With the "-c" command you can read the clock values of the TPM.
`-d`: <br>
With the "-d" command you can issue a TPM shutdown. It has 2 options: <br>
`./eltt2 -d` <br>
or <br>
`./eltt2 -d clear` send a TPM2_Shutdown command with shutdown type CLEAR to the TPM. <br>
`./eltt2 -d state` send a TPM2_Shutdown command with shutdown type STATE to the TPM. <br>
`-e`: <br>
With the "-e" command you can extend bytes in the selected PCR with SHA-1/256/384. To do so, you have to enter the index of PCR in hexadecimal that you like to extend and the digest you want to extend the selected PCR with. Note that you can only extend PCRs with index 0 to 16 and PCR 23 and that the digest must have a length of 20/32/48 bytes (will be padded with 0 if necessary). The TPM then builds an SHA-1/256/384 hash over the PCR data in the selected PCR and the digest you provided and writes the result back to the selected PCR. For example, use the following command to extend PCR 23 (0x17) with the byte sequence {0x41, 0x62, 0x43, 0x64, 0x00, ... (will be filled with 0x00)}: <br>
`./eltt2 -e 17 41624364` Extend bytes in PCR 23 with SHA-1. <br>
or <br>
`./eltt2 -e sha1 17 41624364` Extend bytes in PCR 23 with SHA-1. <br>
`./eltt2 -e sha256 17 41624364` Extend bytes in PCR 23 with SHA-256. <br>
`./eltt2 -e sha384 17 41624364` Extend bytes in PCR 23 with SHA-384. <br>
`-E`: <br>
With the "-E" command you can extend bytes in the selected PCR with SHA-256. To do so, you have to enter the index of PCR in hexadecimal that you like to extend and the digest you want to extend the selected PCR with. Note that you can only extend PCRs with index 0 to 16 and PCR 23 and that the digest must have a length of 32 bytes (will be padded with 0 if necessary). The TPM then builds an SHA-256 hash over the PCR data in the selected PCR and the digest you provided and writes the result back to the selected PCR. For example, use the following command to extend PCR 23 (0x17) with the byte sequence {0x41, 0x62, 0x43, 0x64, 0x00, ... (will be filled with 0x00)}: <br>
`./eltt2 -E 17 41624364`
`-g`: <br>
With the "-g" command you can read the TPM's fixed properties.
`-v`: <br>
With the "-v" command you can read the TPM's variable properties.
`-G`: <br>
With the "-G" command you can get a given amount of random bytes. Note that you can only request a maximum amount of 32 random bytes at once. For example, use the following command to get 20 (0x14) random bytes: <br>
`./eltt2 -G 14`
`-l`: <br>
With the "-l" command you can allocate the SHA-1/256/384 PCR bank. Take note of two things. Firstly, the command requires a platform authorization value and it is set to an empty buffer; hence the command cannot be used if the TPM platform authorization value is set (e.g., by UEFI). Secondly, when the command is executed successfully a TPM reset has to follow for it to take effect. For example, use the following command to allocate a PCR bank: <br>
`./eltt2 -l sha1` Allocate SHA-1 PCR bank. <br>
`./eltt2 -l sha256` Allocate SHA-256 PCR bank. <br>
`./eltt2 -l sha384` Allocate SHA-384 PCR bank. <br>
`-r`: <br>
With the "-r" command you can read data from a selected SHA-1/256/384 PCR. For example, use the following command to read data from PCR 23 (0x17): <br>
`./eltt2 -r 17` Read data from SHA-1 PCR 23. <br>
or <br>
`./eltt2 -r sha1 17` Read data from SHA-1 PCR 23. <br>
`./eltt2 -r sha256 17` Read data from SHA-256 PCR 23. <br>
`./eltt2 -r sha384 17` Read data from SHA-384 PCR 23. <br>
`-R`: <br>
With the "-R" command you can read data from a selected SHA-256 PCR. For example, use the following command to read data from PCR 23 (0x17): <br>
`./eltt2 -R 17`
`-s`: <br>
With the "-s" command you can hash given data with the SHA-1/256/384 hash algorithm. This command only allows a limited amount of data to be hashed (depending on the TPM's maximum input buffer size). For example, use the following command to hash the byte sequence {0x41, 0x62, 0x43, 0x64}: <br>
`./eltt2 -s 41624364` Hash given data with SHA-1 hash algorithm. <br>
or <br>
`./eltt2 -s sha1 41624364` Hash given data with SHA-1 hash algorithm. <br>
`./eltt2 -s sha256 41624364` Hash given data with SHA-256 hash algorithm. <br>
`./eltt2 -s sha384 41624364` Hash given data with SHA-384 hash algorithm. <br>
`-S`: <br>
With the "-S" command you can hash given data with the SHA-256 hash algorithm. This command only allows a limited amount of data to be hashed (depending on the TPM input buffer size). For example, use the following command to hash the byte sequence {0x41, 0x62, 0x43, 0x64}: <br>
`./eltt2 -S 41624364`
`-t`: <br>
With the "-t" command you can issue a TPM selftest. It has 3 options: <br>
`./eltt2 -t` <br>
or<br>
`./eltt2 -t not_full` Perform a partial TPM2_Selftest to test previously untested TPM capabilities. <br>
`./eltt2 -t full` Perform a full TPM2_Selftest to test all TPM capabilities. <br>
`./eltt2 -t incremental` Perform a test of selected algorithms.
`-T`: <br>
With the "-T" command you can read the results of a previously run selftest.
`-u`: <br>
With the "-u" command you can issue a TPM startup command. It has 2 options: <br>
`./eltt2 -u` <br>
or <br>
`./eltt2 -u clear` send a TPM2_Startup with startup type CLEAR to the TPM. <br>
`./eltt2 -u state` send a TPM2_Startup with startup type STATE to the TPM.
`-z`: <br>
With the "-z" command you can reset a selected PCR. Note that you can only reset PCRs 16 and 23. For example, use the following command to reset PCR 23 (0x17): <br>
`./eltt2 -z 17`
## 2.2 Examples:
In order to work with the TPM, perform the following steps:
- Send the TPM2_Startup command: `./eltt2 -u`
# 3. If you have questions
If you have any questions or problems, please read the section "FAQ and
Troubleshooting" in this document.
In case you still have questions, contact your local Infineon
Representative.
Further information is available at <https://www.infineon.com/tpm>.
# 4. FAQ and Troubleshooting
If you encounter any error, please make sure that
- the TPM is properly connected.
- the TPM driver is loaded, i.e. check that "/dev/tpm0" exists. In case of driver loading problems (e.g. shown by "Error opening device"), reboot your system and try to load the driver again.
- ELTT2 has been started with root permissions. Please note that ELTT2 needs root permissions for all commands.
- the TPM is started. (See section 2.2 in this document on how to do this.)
The following list shows the most common errors and their solution:
The ELTT2 response is "Error opening the device.":
- You need to load a TPM driver before you can work with ELTT2.
- You need to start ELTT2 with root permissions.
The ELTT2 responds with error code 0x100.
- You need to send the TPM2_Startup command, or you did send it twice. In
case you have not sent it yet, do so with `./eltt2 -u`.
The TPM does not change any of the permanent flags shown by sending the "-g"
command , e.g. after a force clear.
- The TPM requires a reset in order to change any of the permanent flags.
Press the reset button or disconnect the TPM to do so.
The value of a PCR does not change after sending PCR extend or reset.
- With the application permissions you cannot modify every PCR. For more
details, please refer to the description for the different PCR commands
in this file.

View File

@@ -1,362 +0,0 @@
--------------------------------------------------------------------------------
Infineon Embedded Linux TPM Toolbox 2 (ELTT2) for TPM 2.0 v1.1
Infineon Technologies AG
All information in this document is Copyright (c) 2014, Infineon Technologies AG
All rights reserved.
--------------------------------------------------------------------------------
Contents:
1. Welcome
1.1 Prerequisites
1.2 Contents of the package
1.3 Getting Started
2. Usage of Embedded Linux TPM Toolbox 2 (ELTT2)
2.1 Generic Usage
2.2 Examples
3. If you have questions
4. Release Info
5. FAQ
================================================================================
1. Welcome
Welcome to Embedded Linux TPM Toolbox 2 (ELTT2).
ELTT2 is a single-file executable program intended for testing, performing
diagnosis and basic state changes of the Infineon Technologies TPM 2.0.
1.1 Prerequisites
To build and run ELTT2 you need GCC and a Linux system capable of hosting a
TPM 2.0.
Tested PC Platforms (x86):
- Ubuntu (R) Linux 12.04 LTS - 64 bit (modified Kernel 3.15.4)
with Infineon TPM 2.0 SLB9665 Firmware 5.22
Tested Embedded Platforms (ARM):
- Android 6.0 "Marshmallow" - 64 bit (modified Kernel 3.18.0+) on HiKey
with Prototype Infineon I2C TPM 2.0 for Embedded Platforms
ELTT2 may run on many other little-endian hardware and software
configurations capable of running Linux and hosting a TPM 2.0, but this has
not been tested.
ELTT2 does not support machines with a big-endian CPU.
1.2 Contents of Package
ELTT2 consists of the following files:
- eltt2.c
Contains all method implementations of ELTT2.
- eltt2.h
Contains all constant definitions, method and command byte declarations
for the operation of ELTT2.
- License.txt
Contains the license agreement for ELTT2.
- Makefile
Contains the command to compile ELTT2.
- README.txt
This file.
1.3 Getting Started
In order to execute ELTT2, you need to compile it first:
1. Switch to the directory with the ELTT2 source code
2. Compile the source code by typing the following command:
make
Due to hardware (and thus TPM) access restrictions for normal users, ELTT2
requires root (aka superuser or administrator) privileges. They can be
obtained e.g. by using the 'sudo' command on Debian Linux derivates.
2. Usage of ELTT2
2.1 Generic Usage
ELTT2 is operated as follows:
Call: ./eltt2 <option(s)>
For example: ./eltt2 -g or ./eltt2 -gc
For getting an overview of the possible commands, run ./eltt2 -h
Some options require the TPM to be in a specific state. This state is shown
in brackets ("[]") behind each command line option in the list below:
[-]: none
[*]: the TPM platform hierarchy authorization value is not set (i.e., empty buffer)
[l]: the required PCR bank is allocated
[u]: started
To get the TPM into the required state, call ELTT2 with the corresponding
commands ("x" for a state means that whether this state is required or not
depends on the actual command or the command parameters sent eventually to
the TPM).
Command line options: Preconditions:
-a [hash algorithm] <data bytes>: Hash Sequence SHA-1/256/384 [default: SHA-1] [u]
-A <data bytes>: Hash Sequence SHA-256 [u]
-b <command bytes>: Enter your own TPM command [u]
-c: Read Clock [u]
-d <shutdown type>: Shutdown [u]
-e [hash algorithm] <PCR index> <PCR digest>: PCR Extend SHA-1/256/384 [default: SHA-1] [u], [l]
-E <PCR index> <PCR digest>: PCR Extend SHA-256 [u], [l]
-g: Get fixed capability values [u]
-v: Get variable capability values [u]
-G <data length>: Get Random [u]
-h: Help [-]
-l <hash algorithm>: PCR Allocate SHA-1/256/384 [u], [*]
-r [hash algorithm] <PCR index>: PCR Read SHA-1/256/384 [default: SHA-1] [u], [l]
-R <PCR index>: PCR Read SHA-256 [u], [l]
-s [hash algorithm] <data bytes>: Hash SHA-1/SHA256 [default: SHA-1] [u]
-S <data bytes>: Hash SHA-256 [u]
-t <test type>: Self Test [u]
-T: Get Test Result [u]
-u <startup type>: Startup [-]
-z <PCR index>: PCR Reset [u]
Additional information:
-a:
With the "-a" command you can hash given data with the SHA-1/256/384 hash
algorithm. This hash sequence sends 3 commands [start, update, complete]
to the TPM and allows to hash an arbitrary amount of data.
For example, use the following command to hash the byte sequence {0x41,
0x62, 0x43, 0x64}:
./eltt2 -a 41624364 Hash given data with SHA-1 hash algorithm.
or
./eltt2 -a sha1 41624364 Hash given data with SHA-1 hash algorithm.
./eltt2 -a sha256 41624364 Hash given data with SHA-256 hash algorithm.
-A:
With the "-A" command you can hash given data with the SHA-256 hash
algorithm. This hash sequence sends 3 commands [start, update, complete] to
the TPM and allows to hash an arbitrary amount of data.
For example, use the following command to hash the byte sequence {0x41,
0x62, 0x43, 0x64}:
./eltt2 -A 41624364
-b:
With the "-b" command you can enter your own TPM command bytes and read the
TPM response.
For example, use the following command to send a TPM2_Startup with startup
type CLEAR to the TPM:
./eltt2 -b 80010000000C000001440000
-c:
With the "-c" command you can read the clock values of the TPM.
-d:
With the "-d" command you can issue a TPM shutdown. It has 2 options:
./eltt2 -d
or
./eltt2 -d clear send a TPM2_Shutdown command with shutdown type CLEAR to
the TPM.
./eltt2 -d state send a TPM2_Shutdown command with shutdown type STATE to
the TPM.
-e:
With the "-e" command you can extend bytes in the selected PCR with SHA-1/256/384.
To do so, you have to enter the index of PCR in hexadecimal that you like to
extend and the digest you want to extend the selected PCR with. Note that
you can only extend PCRs with index 0 to 16 and PCR 23 and that the digest
must have a length of 20/32/48 bytes (will be padded with 0 if necessary).
The TPM then builds an SHA-1/256/384 hash over the PCR data in the selected PCR
and the digest you provided and writes the result back to the selected PCR.
For example, use the following command to extend PCR 23 (0x17) with the byte
sequence {0x41, 0x62, 0x43, 0x64, 0x00, ... (will be filled with 0x00)}:
./eltt2 -e 17 41624364 Extend bytes in PCR 23 with SHA-1.
or
./eltt2 -e sha1 17 41624364 Extend bytes in PCR 23 with SHA-1.
./eltt2 -e sha256 17 41624364 Extend bytes in PCR 23 with SHA-256.
-E:
With the "-E" command you can extend bytes in the selected PCR with SHA-256.
To do so, you have to enter the index of PCR in hexadecimal that you like to
extend and the digest you want to extend the selected PCR with. Note that
you can only extend PCRs with index 0 to 16 and PCR 23 and that the digest
must have a length of 32 bytes (will be padded with 0 if necessary).
The TPM then builds an SHA-256 hash over the PCR data in the selected PCR
and the digest you provided and writes the result back to the selected PCR.
For example, use the following command to extend PCR 23 (0x17) with the byte
sequence {0x41, 0x62, 0x43, 0x64, 0x00, ... (will be filled with 0x00)}:
./eltt2 -E 17 41624364
-g:
With the "-g" command you can read the TPM's fixed properties.
-v:
With the "-v" command you can read the TPM's variable properties.
-G:
With the "-G" command you can get a given amount of random bytes. Note that
you can only request a maximum amount of 32 random bytes at once.
For example, use the following command to get 20 (0x14) random bytes:
./eltt2 -G 14
-l:
With the "-l" command you can allocate the SHA-1/256/384 PCR bank.
Take note of two things. Firstly, the command requires a platform
authorization value and it is set to an empty buffer; hence the command
cannot be used if the TPM platform authorization value is set (e.g., by UEFI).
Secondly, when the command is executed successfully a TPM reset has to
follow for it to take effect. For example, use the following command to
allocate a PCR bank:
./eltt2 -l sha1 Allocate SHA-1 PCR bank.
./eltt2 -l sha256 Allocate SHA-256 PCR bank.
./eltt2 -l sha384 Allocate SHA-384 PCR bank.
-r:
With the "-r" command you can read data from a selected SHA-1/256/384 PCR.
For example, use the following command to read data from PCR 23 (0x17):
./eltt2 -r 17 Read data from SHA-1 PCR 23.
or
./eltt2 -r sha1 17 Read data from SHA-1 PCR 23.
./eltt2 -r sha256 17 Read data from SHA-256 PCR 23.
-R:
With the "-R" command you can read data from a selected SHA-256 PCR.
For example, use the following command to read data from PCR 23 (0x17):
./eltt2 -R 17
-s:
With the "-s" command you can hash given data with the SHA-1/256/384 hash
algorithm. This command only allows a limited amount of data to be hashed
(depending on the TPM's maximum input buffer size).
For example, use the following command to hash the byte sequence {0x41,
0x62, 0x43, 0x64}:
./eltt2 -s 41624364 Hash given data with SHA-1 hash algorithm.
or
./eltt2 -s sha1 41624364 Hash given data with SHA-1 hash algorithm.
./eltt2 -s sha256 41624364 Hash given data with SHA-256 hash algorithm.
-S:
With the "-S" command you can hash given data with the SHA-256 hash
algorithm. This command only allows a limited amount of data to be hashed
(depending on the TPM input buffer size).
For example, use the following command to hash the byte sequence {0x41,
0x62, 0x43, 0x64}:
./eltt2 -S 41624364
-t:
With the "-t" command you can issue a TPM selftest. It has 3 options:
./eltt2 -t
or
./eltt2 -t not_full Perform a partial TPM2_Selftest to test previously
untested TPM capabilities.
./eltt2 -t full Perform a full TPM2_Selftest to test all TPM
capabilities.
./eltt2 -t incremental Perform a test of selected algorithms.
-T:
With the "-T" command you can read the results of a previously run selftest.
-u:
With the "-u" command you can issue a TPM startup command. It has 2 options:
./eltt2 -u
or
./eltt2 -u clear send a TPM2_Startup with startup type CLEAR to the TPM.
./eltt2 -u state send a TPM2_Startup with startup type STATE to the TPM.
-z:
With the "-z" command you can reset a selected PCR. Note that you can only
reset PCRs 16 and 23 and that the PCR is going to be reset in both banks
(SHA-1 and SHA-256).
For example, use the following command to reset PCR 23 (0x17):
./eltt2 -z 17
2.2 Examples:
In order to work with the TPM, perform the following steps:
- Send the TPM2_Startup command: ./eltt2 -u
3. If you have questions
If you have any questions or problems, please read the section "FAQ and
Troubleshooting" in this document.
In case you still have questions, contact your local Infineon
Representative.
Further information is available at http://www.infineon.com/tpm.
4. Release Info
This is version 1.1. This version is a general release.
5. FAQ and Troubleshooting
If you encounter any error, please make sure that
- the TPM is properly connected.
- the TPM driver is loaded, i.e. check that "/dev/tpm0" exists. In case of
driver loading problems (e.g. shown by "Error opening device"), reboot
your system and try to load the driver again.
- ELTT2 has been started with root permissions. Please note that ELTT2 needs
root permissions for all commands.
- the TPM is started. (See section 2.2 in this document on how to do this.)
- Trousers do not run anymore. In some cases the Kernel starts Trousers by
booting.
Shut down Trousers by entering the following command:
sudo pkill tcsd
The following list shows the most common errors and their solution:
The ELTT2 response is "Error opening the device.":
- You need to load a TPM driver before you can work with ELTT2.
- You need to start ELTT2 with root permissions.
The ELTT2 responds with error code 0x100.
- You need to send the TPM2_Startup command, or you did send it twice. In
case you have not sent it yet, do so with "./eltt2 -u".
The TPM does not change any of the permanent flags shown by sending the "-g"
command , e.g. after a force clear.
- The TPM requires a reset in order to change any of the permanent flags.
Press the reset button or disconnect the TPM to do so.
The value of a PCR does not change after sending PCR extend or reset.
- With the application permissions you cannot modify every PCR. For more
details, please refer to the description for the different PCR commands
in this file.

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@@ -1,634 +0,0 @@
#ifndef _ELTT2_H_
#define _ELTT2_H_
/**
* @brief Infineon Embedded Linux TPM Toolbox 2 (ELTT2) for TPM 2.0
* @details eltt2.h implements all TPM byte commands and the prototype declarations for eltt2.c.
* @file eltt2.h
* @date 2014/06/26
* @copyright Copyright (c) 2014 - 2017 Infineon Technologies AG ( www.infineon.com ).\n
* All rights reserved.\n
* \n
* Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following
* conditions are met:\n
* \n
* 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
* disclaimer.\n
* 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided with the distribution.\n
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.\n
* \n
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
// this is the main page for doxygen documentation.
/** @mainpage Infineon Embedded Linux TPM Toolbox 2 (ELTT2) for TPM 2.0 Documentation
*
* @section Welcome
* Welcome to Infineon TPM 2.0 Software-Tool "Embedded Linux TPM Toolbox 2 (ELTT2)".\n
* \n
* @section Introduction
* ELTT2 is a single file-executable program
* intended for test, diagnosis and basic state changes of the Infineon
* Technologies TPM 2.0.\n
* \n
* @section Copyright
* Copyright (c) 2014 - 2017 Infineon Technologies AG ( www.infineon.com ).\n
* All rights reserved.\n
* \n
* Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following
* conditions are met:\n
* \n
* 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
* disclaimer.\n
* 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided with the distribution.\n
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.\n
* \n
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <fcntl.h>
#include <errno.h>
#include <unistd.h>
#include <getopt.h>
#include <ctype.h>
#include <string.h>
#include <strings.h>
#include <inttypes.h>
//-------------"Defines"-------------
#define TPM_RESP_MAX_SIZE 4096 ///< This is the maximum possible TPM response size in bytes.
#define TPM_REQ_MAX_SIZE 1024 ///< This is the maximum possible TPM request size in bytes. TBD: Find out correct value.
#define ERR_COMMUNICATION -1 ///< Return error check for read and write to the TPM.
#define ERR_BAD_CMD -2 ///< Error code for a bad command line argument or option.
#define TPM_SHA1_DIGEST_SIZE 20 ///< For all SHA-1 operations the digest's size is always 20 bytes.
#define TPM_SHA256_DIGEST_SIZE 32 ///< For all SHA-256 operations the digest's size is always 32 bytes.
#define TPM_SHA384_DIGEST_SIZE 48 ///< For all SHA-384 operations the digest's size is always 48 bytes.
#define TPM_CMD_HEADER_SIZE 10 ///< The size of a standard TPM command header is 10 bytes.
#define TPM_CMD_SIZE_OFFSET 2 ///< The offset of a TPM command's size value is 2 bytes.
#define HEX_BYTE_STRING_LENGTH 2 ///< A byte can be represented by two hexadecimal characters.
#ifndef INT_MAX
#define INT_MAX 0x7FFFFFF ///< The maximum value of a signed 32-bit integer.
#endif
// TPM Return codes
#define TPM_RC_SUCCESS 0x00000000 ///< The response error code for TPM_SUCCESS.
#define TPM_RC_BAD_TAG 0x0000001E ///< The response error code for TPM_RC_BAD_TAG.
#define TPM_RC_SIZE 0x00000095 ///< The response error code for TPM_RC_SIZE.
#define TPM_RC_INITIALIZE 0x00000100 ///< The response error code for TPM_RC_INITIALIZE.
#define TPM_RC_FAILURE 0x00000101 ///< The response error code for TPM_RC_FAILURE.
#define TPM_RC_LOCALITY 0x00000907 ///< The response error code for TPM_RC_LOCALITY.
#define FU_FIRMWARE_VALID_FLAG 4 ///< If this flag is set, the firmware is valid.
#define FU_OWNER_FLAG 1 ///< If this flag is set, the owner is set.
// print_response_buf options
#define PRINT_RESPONSE_CLEAR 1 ///< Prints response unformatted.
#define PRINT_RESPONSE_HEADERBLOCKS 2 ///< Prints response in commented blocks.
#define PRINT_RESPONSE_HEX_BLOCK 3 ///< Prints response in rows of 16 bytes and shows the line number.
#define PRINT_RESPONSE_HASH 4 ///< Prints response of Hash
#define PRINT_RESPONSE_WITHOUT_HEADER 12 ///< Prints the response buffer from byte 12.
#define PRINT_RESPONSE_HASH_WITHOUT_HEADER 16 ///< Prints the response buffer from byte 16.
#define PRINT_RESPONSE_WITH_HEADER 0 ///< Prints the response buffer from byte 0.
#define PRINT_RESPONSE_PCR_WITHOUT_HEADER 30 ///< Prints the pcr buffer from pcr_read.
// time conversion
#define YEAR_SECONDS 31536000 ///< Number of seconds in one year
#define DAY_SECONDS 86400 ///< Number of seconds in one day
#define HOUR_SECONDS 3600 ///< Number of seconds in one hour
#define MINUTE_SECONDS 60 ///< Number of seconds in one minute
#define MILISECOND_TO_SECOND 1000 ///< Convertion from miliseconds to seconds
// hash
#define STD_CC_HASH_SIZE 18 ///< Hash command size
// TPM_PT constants
#define PT_FIXED_SELECTOR 1 ///< Fixed GetCapability Flags
#define PT_VAR_SELECTOR 2 ///< Variable GetCapability Flags
//-------------"Macros"-------------
// Null pointer check
#define NULL_POINTER_CHECK(x) if (NULL == x) { ret_val = EINVAL; fprintf(stderr, "Error: Invalid argument.\n"); break; } ///< Argument NULL check.
#define MALLOC_ERROR_CHECK(x) if (NULL == x) { ret_val = errno; fprintf(stderr, "Error (re)allocating memory.\n"); break; } ///< Malloc error check.
#define MEMSET_FREE(x, y) if (NULL != x) { memset(x, 0, y); free(x); x = NULL; } ///< Sets memory to 0, frees memory and sets pointer to NULL.
// Return value check
#define RET_VAL_CHECK(x) if (EXIT_SUCCESS != x) { break; } ///< Return value check
// Command line option parser for hash algorithm
#define HASH_ALG_PARSER(o, c) \
do { \
if (o == option) \
{ \
if (c == argc) \
{ \
hash_algo = ALG_SHA1; \
} \
else \
{ \
if (0 == strcasecmp(optarg, "sha1")) \
{ \
hash_algo = ALG_SHA1; \
} \
else if (0 == strcasecmp(optarg, "sha256")) \
{ \
hash_algo = ALG_SHA256; \
} \
else if (0 == strcasecmp(optarg, "sha384")) \
{ \
hash_algo = ALG_SHA384; \
} \
else \
{ \
ret_val = ERR_BAD_CMD; \
fprintf(stderr, "Unknown option. Use '-h' for more information.\n"); \
break; \
} \
if (argc > optind) \
{ \
optarg = argv[optind++]; \
} \
} \
} \
else \
{ \
hash_algo = ALG_SHA256; \
} \
} while (0)
//--------------"Enums"--------------
// Hash algorithms
typedef enum hash_algo_enum
{
ALG_NULL,
ALG_SHA1,
ALG_SHA256,
ALG_SHA384,
} hash_algo_enum;
//-------------"Methods"-------------
/**
* @brief Convert (max.) 8 byte buffer to an unsigned 64-bit integer.
* @param [in] *input_buffer Input buffer. Make sure that its size is at least as high as offset + length.
* @param [in] offset Start byte for conversion.
* @param [in] length Amount of bytes to be converted.
* @param [out] *output_value Return the converted unsigned 64-bit integer.
* @param [in] input_buffer_size Size of input_buffer in bytes.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer or length is greater than 8.
* @retval EXIT_SUCCESS In case of success.
* @date 2014/06/26
*/
static int buf_to_uint64(uint8_t *input_buffer, uint32_t offset, uint32_t length, uint64_t *output_value, uint32_t input_buffer_size);
/**
* @brief Convert a hexadecimal string representation of bytes like "0A1F" and
returns an array containing the actual byte values as an array (e.g. { 0x0A, 0x1F }).
* @param [in] *byte_string Incoming bytes as string.
* @param [out] *byte_values Byte array representation of given input string.
* Must be allocated by caller with the length given in byte_values_size.
* @param [in] byte_values_size Size of byte_values array.
* @return One of the listed return codes.
* @retval EXIT_SUCCESS In case of success.
* @retval EINVAL In case of a NULL pointer.
* @retval value of errno In case parsing error.
* @date 2014/06/26
*/
static int hexstr_to_bytearray(char *byte_string, uint8_t *byte_values, size_t byte_values_size);
/**
* @brief Convert a number to a byte buffer.
* @param [in] input User input.
* @param [in] input_size Size of input data type in bytes.
* @param [out] *output_byte Return buffer for the converted integer.
Must be allocated by the caller with at least a size of 'input_size'.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @date 2014/06/26
*/
static int int_to_bytearray(uint64_t input, uint32_t input_size, uint8_t *output_byte);
/**
* @brief Create the PCR_Extend command.
* @param [in] *pcr_index_str User input string for PCR index.
* @param [in] *pcr_digest_str User input string of value to extend the selected PCR with.
* @param [out] *pcr_cmd_buf Return buffer for the complete command. Must be allocated by caller.
* @param [in] *pcr_cmd_buf_size Size of memory allocated at pcr_cmd_buf in bytes.
* @param [in] hash_algo Set to ALG_SHA1 for extending with SHA-1,
ALG_SHA256 for SHA-256, and ALG_SHA384 for SHA-384.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer or an invalid option.
* @retval EXIT_SUCCESS In case of success.
* @retval ERR_BAD_CMD In case of bad user input.
* @retval hexstr_to_bytearray All error codes from hexstr_to_bytearray.
* @date 2014/06/26
*/
static int pcr_extend(char *pcr_index_str, char *pcr_digest_str, uint8_t *pcr_cmd_buf, size_t pcr_cmd_buf_size, hash_algo_enum hash_algo);
/**
* @brief Create the PCR_Allocate command.
* @param [out] *pcr_cmd_buf Return buffer for the complete command.
* @param [in] hash_algo Set to ALG_SHA1 to allocate SHA-1,
ALG_SHA256 for SHA-256, and ALG_SHA384 for SHA-384.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer or an invalid option.
* @retval EXIT_SUCCESS In case of success.
* @date 2022/05/09
*/
static int pcr_allocate(uint8_t *pcr_cmd_buf, hash_algo_enum hash_algo);
/**
* @brief Create the PCR_Read command.
* @param [in] *pcr_index_str User input string for PCR index.
* @param [out] *pcr_cmd_buf Return buffer for the complete command.
* @param [in] hash_algo Set to ALG_SHA1 for reading with SHA-1,
ALG_SHA256 for SHA-256, and ALG_SHA384 for SHA-384.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer or an invalid option.
* @retval EXIT_SUCCESS In case of success.
* @retval ERR_BAD_CMD In case of bad user input.
* @retval hexstr_to_bytearray All error codes from hexstr_to_bytearray.
* @date 2014/06/26
*/
static int pcr_read(char *pcr_index_str, uint8_t *pcr_cmd_buf, hash_algo_enum hash_algo);
/**
* @brief Create the PCR_Reset command.
* @param [in] *pcr_index_str User input string for PCR index.
* @param [out] *pcr_cmd_buf Return buffer for the complete command.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval ERR_BAD_CMD In case of bad user input.
* @retval hexstr_to_bytearray All error codes from hexstr_to_bytearray.
* @date 2014/06/26
*/
static int pcr_reset(char *pcr_index_str, uint8_t *pcr_cmd_buf);
/**
* @brief Print the command line usage and switches.
* @date 2014/06/26
*/
static void print_help();
/**
* @brief Print the response buffer in different formats.
* @param [in] *response_buf TPM response.
* @param [in] resp_size TPM response size.
* @param [in] offset Starting point for printing buffer.
* @param [in] format Select the output format.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer or an unknown output format has been transfered.
* @retval EXIT_SUCCESS In case of success.
* @retval buf_to_uint64 All error codes from buf_to_uint64.
* @date 2014/06/26
*/
static int print_response_buf(uint8_t *response_buf, size_t resp_size, uint32_t offset, int format);
/**
* @brief Print a TPM response.
* @param [in] *response_buf TPM response.
* @param [in] resp_size TPM response size.
* @param [in] option Defines appearance of output. Can have the following values:\n
- PRINT_RESPONSE_CLEAR
- PRINT_RESPONSE_HEADERBLOCKS
- PRINT_RESPONSE_HEX_BLOCK
- PRINT_RESPONSE_WITHOUT_HEADER
- PRINT_RESPONSE_WITH_HEADER
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval print_response_buf All error codes from print_response_buf.
* @retval print_clock_info All error codes from print_clock_info.
* @retval print_capability_flags All error codes from print_capability_flags.
* @date 2014/06/26
*/
static int response_print(uint8_t *response_buf, size_t resp_size, int option);
/**
* @brief Check a TPM response for errors.
* @param [in] *response_buf TPM response. Must have at least a size of TPM_CMD_HEADER_SIZE bytes.
* @return Returns the TPM return code extracted from the given TPM response or one of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval buf_to_uint64 All error codes from buf_to_uint64.
* @retval EXIT_SUCCESS In case of success.
* @date 2014/06/26
*/
static int return_error_handling(uint8_t *response_buf);
/**
* @brief Transmit TPM command to /dev/tpm0 and get the response.
* @param [in] *buf TPM request.
* @param [in] length TPM request length.
* @param [out] *response TPM response.
* @param [out] *resp_length TPM response length.
* @return One of the listed return codes or the error code stored in the global errno system variable.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @date 2014/06/26
*/
static int tpmtool_transmit(const uint8_t *buf, ssize_t length, uint8_t *response, ssize_t *resp_length);
/**
* @brief Print the capability flags.
* @param [in] *response_buf TPM response.
* @param [in] cap_selector Type of capabilities to print.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval buf_to_uint64 All error codes from buf_to_uint64.
* @date 2014/06/26
*/
static int print_capability_flags(uint8_t *response_buf, uint8_t cap_selector);
/**
* @brief Print the clock info.
* @param [in] *response_buf TPM response.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval buf_to_uint64 All error codes from buf_to_uint64.
* @date 2014/06/26
*/
static int print_clock_info(uint8_t *response_buf);
/**
* @brief Create the get_random command.
* @param [in] *data_length_string User input string for random data length.
* @param [out] *response_buf Return buffer for the complete command.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval ERR_BAD_CMD In case of bad user input.
* @retval hexstr_to_bytearray All error codes from hexstr_to_bytearray.
* @date 2014/06/26
*/
static int get_random(char *data_length_string, uint8_t *response_buf);
/**
* @brief Create the simple hash command.
* @param [in] *data_string User input string of data to be hashed.
* @param [in] hash_algo Set to ALG_SHA1 for hashing with SHA-1,
ALG_SHA256 for SHA-256, and ALG_SHA384 for SHA-384.
* @param [out] *hash_cmd_buf Return buffer for the complete command.
* @param [in] hash_cmd_buf_size Return buffer size.
* @return One of the listed return codes.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval hexstr_to_bytearray All error codes from hexstr_to_bytearray.
* @retval int_to_bytearray All error codes from int_to_bytearray.
* @date 2014/06/26
*/
static int create_hash(char *data_string, hash_algo_enum hash_algo, uint8_t *hash_cmd_buf, uint32_t hash_cmd_buf_size);
/**
* @brief Create and transmit a sequence of TPM commands for hashing larger amounts of data.
* @param [in] *data_string User input string of data to be hashed.
* @param [in] hash_algo Set to ALG_SHA1 for hashing with SHA-1,
ALG_SHA256 for SHA-256, and ALG_SHA384 for SHA-384.
* @param [out] *tpm_response_buf TPM response.
* @param [out] *tpm_response_buf_size Size of tpm_response_buf.
* @return One of the listed return codes or the error code stored in the global errno system variable.
* @retval EINVAL In case of a NULL pointer.
* @retval EXIT_SUCCESS In case of success.
* @retval value of errno In case of memory allocation error.
* @retval buf_to_uint64 All error codes from buf_to_uint64.
* @retval hexstr_to_bytearray All error codes from hexstr_to_bytearray.
* @retval int_to_bytearray All error codes from int_to_bytearray.
* @retval tpmtool_transmit All error codes from tpmtool_transmit.
* @retval print_response_buf All error codes from print_response_buf
* @date 2014/06/26
*/
static int create_hash_sequence(char *data_string, hash_algo_enum hash_algo, uint8_t *tpm_response_buf, ssize_t *tpm_response_buf_size);
//-------------"command bytes"-------------
static const uint8_t tpm2_startup_clear[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0C, // commandSize
0x00, 0x00, 0x01, 0x44, // TPM_CC_Startup
0x00, 0x00 // TPM_SU_CLEAR
};
static const uint8_t tpm2_startup_state[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0C, // commandSize
0x00, 0x00, 0x01, 0x44, // TPM_CC_Startup
0x00, 0x01 // TPM_SU_STATE
};
static const uint8_t tpm_cc_shutdown_clear[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0C, // commandSize
0x00, 0x00, 0x01, 0x45, // TPM_CC_Shutdown
0x00, 0x00 // TPM_SU_CLEAR
};
static const uint8_t tpm_cc_shutdown_state[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0C, // commandSize
0x00, 0x00, 0x01, 0x45, // TPM_CC_Shutdown
0x00, 0x01 // TPM_SU_STATE
};
static const uint8_t tpm2_self_test[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0B, // commandSize
0x00, 0x00, 0x01, 0x43, // TPM_CC_SelfTest
0x00 // fullTest=No
};
static const uint8_t tpm2_self_test_full[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0B, // commandSize
0x00, 0x00, 0x01, 0x43, // TPM_CC_SelfTest
0x01 // fullTest=Yes
};
static const uint8_t tpm_cc_get_test_result[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0A, // commandSize
0x00, 0x00, 0x01, 0x7C // TPM_CC_GetTestResult
};
static const uint8_t tpm2_self_test_incremental[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x2A, // commandSize
0x00, 0x00, 0x01, 0x42, // TPM_CC_IncrementalSelfTest
0x00, 0x00, 0x00, 0x0E, // Count of Algorithm
0x00, 0x01, 0x00, 0x04, // Algorithm two per line
0x00, 0x05, 0x00, 0x06,
0x00, 0x08, 0x00, 0x0A,
0x00, 0x0B, 0x00, 0x14,
0x00, 0x15, 0x00, 0x16,
0x00, 0x17, 0x00, 0x22,
0x00, 0x25, 0x00, 0x43
};
static const uint8_t tpm2_getrandom[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0C, // commandSize
0x00, 0x00, 0x01, 0x7B, // TPM_CC_GetRandom
0x00, 0x00 // bytesRequested (will be set later)
};
static const uint8_t tpm_cc_readclock[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0A, // commandSize
0x00, 0x00, 0x01, 0x81 // TPM_CC_ReadClock
};
static const uint8_t tpm2_getcapability_fixed[] ={
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x16, // commandSize
0x00, 0x00, 0x01, 0x7A, // TPM_CC_GetCapability
0x00, 0x00, 0x00, 0x06, // TPM_CAP_TPM_PROPERTIES (Property Type: TPM_PT)
0x00, 0x00, 0x01, 0x00, // Property: TPM_PT_FAMILY_INDICATOR: PT_GROUP * 1 + 0
0x00, 0x00, 0x00, 0x66 // PropertyCount 102 (from 100 - 201)
};
static const uint8_t tpm2_getcapability_var[] ={
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x16, // commandSize
0x00, 0x00, 0x01, 0x7A, // TPM_CC_GetCapability
0x00, 0x00, 0x00, 0x06, // TPM_CAP_TPM_PROPERTIES (Property Type: TPM_PT)
0x00, 0x00, 0x02, 0x00, // Property: TPM_PT_FAMILY_INDICATOR: PT_GROUP * 2 + 0
0x00, 0x00, 0x00, 0x02 // PropertyCount 02 (from 200 - 201)
};
// Hash
static const uint8_t tpm2_hash[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0e, // commandSize
0x00, 0x00, 0x01, 0x7D, // TPM_CC_Hash
0x00, 0x00, // size (will be set later)
// buffer (will be added later)
0x00, 0x00, // hashAlg (will be added later)
0x00, 0x00, 0x00, 0x00 // hierarchy of the ticket (TPM_RH_NULL; will be added later)
};
// HashSequence
static uint8_t tpm2_hash_sequence_start[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x0e, // commandSize
0x00, 0x00, 0x01, 0x86, // TPM_CC_HashSequenceStart
0x00, 0x00, // authSize (NULL Password)
// null (indicate a NULL Password)
0x00, 0x00 // hashAlg (will be set later)
};
static uint8_t tpm2_sequence_update[] = {
0x80, 0x02, // TPM_ST_SESSIONS
0x00, 0x00, 0x00, 0x00, // commandSize (will be set later)
0x00, 0x00, 0x01, 0x5c, // TPM_CC_SequenceUpdate
0x00, 0x00, 0x00, 0x00, // sequenceHandle (will be set later)
0x00, 0x00, // authSize (NULL Password)
// null (indicate a NULL Password)
0x00, 0x09, // authSize (password authorization session)
0x40, 0x00, 0x00, 0x09, // TPM_RS_PW (indicate a password authorization session)
0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00 // size (will be set later)
// buffer (will be added later)
};
static uint8_t tpm2_sequence_complete[] = {
0x80, 0x02, // TPM_ST_SESSIONS
0x00, 0x00, 0x00, 0x21, // commandSize
0x00, 0x00, 0x01, 0x3e, // TPM_CC_SequenceComplete
0x00, 0x00, 0x00, 0x00, // sequenceHandle (will be set later)
0x00, 0x00, // authSize (NULL Password)
// null (indicate a NULL Password)
0x00, 0x09, // authSize (password authorization session)
0x40, 0x00, 0x00, 0x09, // TPM_RS_PW (indicate a password authorization session)
0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00, // size (NULL buffer)
// null (indicate an empty buffer buffer)
0x40, 0x00, 0x00, 0x07 // hierarchy of the ticket (TPM_RH_NULL)
};
static const uint8_t sha1_alg[] = {
0x00, 0x04 // command for sha1 alg
};
static const uint8_t sha256_alg[] = {
0x00, 0x0B // command for sha256 alg
};
static const uint8_t sha384_alg[] = {
0x00, 0x0C // command for sha384 alg
};
static const uint8_t tpm_cc_hash_hierarchy[] = {
0x40, 0x00, 0x00, 0x07 // hierarchy of the ticket (TPM_RH_NULL)
};
//PCR_Command
static const uint8_t tpm2_pcr_allocate[] = {
0x80, 0x02, // TPM_ST_SESSIONS
0x00, 0x00, 0x00, 0x31, // commandSize
0x00, 0x00, 0x01, 0x2B, // TPM_CC_PCR_Allocate
0x40, 0x00, 0x00, 0x0C, // TPM_RH_PLATFORM
0x00, 0x00, // authSize (NULL Password)
// null (indicate a NULL Password)
0x00, 0x09, // authSize (password authorization session)
0x40, 0x00, 0x00, 0x09, // TPM_RS_PW (indicate a password authorization session)
0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00, 0x00, 0x03, // count (TPML_PCR_SELECTION)
0x00, 0x04, // hash (TPMS_PCR_SELECTION; SHA-1)
0x03, // sizeofSelect (TPMS_PCR_SELECTION)
0x00, 0x00, 0x00, // pcrSelect (TPMS_PCR_SELECTION; will be set later)
0x00, 0x0B, // hash (TPMS_PCR_SELECTION; SHA-256)
0x03, // sizeofSelect (TPMS_PCR_SELECTION)
0x00, 0x00, 0x00, // pcrSelect (TPMS_PCR_SELECTION; will be set later)
0x00, 0x0C, // hash (TPMS_PCR_SELECTION; SHA-384)
0x03, // sizeofSelect (TPMS_PCR_SELECTION)
0x00, 0x00, 0x00 // pcrSelect (TPMS_PCR_SELECTION; will be set later)
};
static const uint8_t tpm2_pcr_read[] = {
0x80, 0x01, // TPM_ST_NO_SESSIONS
0x00, 0x00, 0x00, 0x14, // commandSize
0x00, 0x00, 0x01, 0x7E, // TPM_CC_PCR_Read
0x00, 0x00, 0x00, 0x01, // count (TPML_PCR_SELECTION)
0x00, 0x00, // hash (TPMS_PCR_SELECTION; will be set later)
0x03, // sizeofSelect (TPMS_PCR_SELECTION)
0x00, 0x00, 0x00 // pcrSelect (TPMS_PCR_SELECTION)
};
static const uint8_t tpm2_pcr_extend[] = {
0x80, 0x02, // TPM_ST_SESSIONS
0x00, 0x00, 0x00, 0x00, // commandSize (will be set later)
0x00, 0x00, 0x01, 0x82, // TPM_CC_PCR_Extend
0x00, 0x00, 0x00, 0x00, // {PCR_FIRST:PCR_LAST} (TPMI_DH_PCR)
0x00, 0x00, // authSize (NULL Password)
// null (indicate a NULL Password)
0x00, 0x09, // authSize (password authorization session)
0x40, 0x00, 0x00, 0x09, // TPM_RS_PW (indicate a password authorization session)
0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00, 0x00, 0x01, // count (TPML_DIGEST_VALUES)
0x00, 0x00 // hashAlg (TPMT_HA; will be set later)
// digest (TPMT_HA; will be added later)
};
static const uint8_t tpm2_pcr_reset[] = {
0x80, 0x02, // TPM_ST_SESSIONS
0x00, 0x00, 0x00, 0x1B, // commandSize
0x00, 0x00, 0x01, 0x3D, // TPM_CC_PCR_Reset
0x00, 0x00, 0x00, 0x00, // {PCR_FIRST:PCR_LAST} (TPMI_DH_PCR)
0x00, 0x00, // authSize (NULL Password)
// null (indicate a NULL Password)
0x00, 0x09, // authSize (password authorization session)
0x40, 0x00, 0x00, 0x09, // TPM_RS_PW (indicate a password authorization session)
0x00, 0x00, 0x01, 0x00, 0x00
};
#endif /* _ELTT2_H_ */

View File

@@ -10,15 +10,14 @@ CPU_TYPE:=cortex-a7
KERNEL_PATCHVER:=4.4
KERNEL_NAME_SUFFIX=-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016
KERNEL_QSDK_4_4:=y
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += kmod-qca-nss-dp kmod-qca-ssdk swconfig \
kmod-qca-nss-drv \
kmod-usb-phy-ipq807x kmod-usb-dwc3-of-simple \
kmod-ath11k-ahb kmod-qrtr_mproc wpad \
kmod-gpio-button-hotplug kmod-bootconfig \
qca-thermald-10.4 qca-ssdk-shell \
kmod-gpio-button-hotplug \
qca-thermald-10.4 qca-ssdk-shell kmod-qca-nss-drv-bridge-mgr \
uboot-envtools
$(eval $(call BuildTarget))

View File

@@ -40,12 +40,8 @@ liteon,wpx8324)
ucidef_set_led_netdev "wan" "wan" "blue:uplink" "eth0"
;;
hfcl,ion4xi|\
hfcl,ion4xi_wp|\
hfcl,ion4x|\
hfcl,ion4x_2|\
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
hfcl,ion4xe)
ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wifi5" "phy0tpt"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wifi2" "phy1tpt"
@@ -55,7 +51,6 @@ glinet,axt1800)
ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth0" "tx rx link"
;;
yuncore,fap650|\
yuncore,fap655|\
muxi,ap3220l)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"

View File

@@ -36,7 +36,6 @@ qcom_setup_interfaces()
indio,um-310ax-v1|\
indio,um-510axp-v1|\
indio,um-510axm-v1|\
qcom,ipq5018-mp03.1|\
qcom,ipq5018-mp03.3|\
yuncore,ax840|\
motorola,q14|\
@@ -61,30 +60,12 @@ qcom_setup_interfaces()
ucidef_set_interface_wan "eth0"
;;
cig,wf660a)
ucidef_set_interface_wan "eth0"
ucidef_set_interface_lan "eth0"
;;
cig,wf186w)
ucidef_add_switch "switch0" "4:wan" "0:lan" "1:lan" "2:lan" "3:lan" "6@eth0"
;;
cig,wf186h)
ucidef_add_switch "switch0" "4:wan" "1:lan" "2:lan" "6@eth0"
;;
yuncore,fap650)
ucidef_set_interface_lan "eth3 eth2 eth1 eth0"
ucidef_set_interface_wan "eth4"
;;
hfcl,ion4xi_wp)
ucidef_set_interface_lan "eth0 eth1 eth2 eth3"
ucidef_set_interface_wan "eth4"
;;
hfcl,ion4xi_w|\
hfcl,ion4x_w)
ucidef_set_interface_wan "eth0"
;;
hfcl,ion4xi_HMR)
ucidef_set_interface_lan "eth1"
ucidef_set_interface_wan "eth0"
;;
qcom,ipq807x-hk14)
ucidef_set_interface_lan "eth0 eth1 eth2 eth3"
ucidef_set_interface_wan "eth4"
@@ -96,15 +77,7 @@ qcom_setup_interfaces()
ucidef_set_interface_lan "eth1 eth2 eth3 eth4"
ucidef_set_interface_wan "eth0"
;;
cybertan,eww622-a1)
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch1" \
"6@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
xunison,d50-5g)
ucidef_set_interface_wan "eth0"
ucidef_set_interface_lan "eth1"
;;
cybertan,eww622-a1|\
qcom,ipq5018-mp03.1)
ucidef_set_interface_lan "eth1"
ucidef_set_interface_wan "eth0"
@@ -112,41 +85,11 @@ qcom_setup_interfaces()
ucidef_add_switch_attr "switch1" "enable" "false"
ucidef_add_switch_attr "switch1" "reset" "true"
;;
qcom,ipq5018-mp03.3)
ucidef_set_interface_lan "eth1"
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch1"
ucidef_add_switch_attr "switch1" "enable" "false"
ucidef_add_switch_attr "switch1" "reset" "true"
;;
edgecore,eap104)
ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch1" \
"6@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
cybertan,eww631-a1)
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch1"
ucidef_add_switch_attr "switch1" "enable" "false"
ucidef_add_switch_attr "switch1" "reset" "true"
;;
cybertan,eww631-b1)
ucidef_add_switch "switch0"
ucidef_set_interface_wan "eth0"
ucidef_set_interface_lan ""
ucidef_add_switch "switch1"
ucidef_add_switch_attr "switch1" "enable" "false"
ucidef_add_switch_attr "switch1" "reset" "true"
;;
wallys,dr5018)
ucidef_set_interface_lan "eth0 eth1"
ucidef_add_switch "switch1"
ucidef_add_switch_attr "switch1" "enable" "false"
ucidef_add_switch_attr "switch1" "reset" "true"
;;
yuncore,fap655)
ucidef_add_switch "switch1" \
"6@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
"6@eth1" "1:lan1" "2:lan2" "3:lan3" "4:lan4"
;;
esac
}
@@ -156,6 +99,7 @@ qcom_setup_macs()
local board="$1"
case $board in
cig,wf188n|\
cig,wf194c|\
cig,wf194c4)
mtd=$(find_mtd_chardev "0:APPSBLENV")
@@ -170,37 +114,6 @@ qcom_setup_macs()
ip link set eth1 address $wan_mac
ucidef_set_label_macaddr $wan_mac
;;
cig,wf186w)
mtd=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mtd" ] && return;
mac=$(grep BaseMacAddress= $mtd | cut -dx -f2)
[ -z "$mac" ] && return;
wan_mac=$(macaddr_canonicalize $mac)
#lan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth0 $wan_mac
# ucidef_set_network_device_mac eth1 $wan_mac
ip link set eth0 address $wan_mac
# ip link set eth1 address $wan_mac
# ucidef_set_label_macaddr $wan_mac
;;
cig,wf186h)
mtd=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mtd" ] && return;
mac=$(grep BaseMacAddress= $mtd | cut -dx -f2)
[ -z "$mac" ] && return;
wan_mac=$(macaddr_canonicalize $mac)
ucidef_set_network_device_mac eth0 $wan_mac
ip link set eth0 address $wan_mac
;;
cybertan,eww631-a1|\
cybertan,eww631-b1)
mac=$(grep -i -m 1 BaseMacAddress= /dev/`cat /proc/mtd | grep APPSBLENV | cut -d: -f1` | cut -d= -f2)
[ -z "$mac"] && mac="00:11:22:33:44:00"
wan_mac=$(macaddr_canonicalize $mac)
ucidef_set_network_device_mac eth0 $wan_mac
ucidef_set_label_macaddr $wan_mac
;;
cig,wf188n|\
cig,wf196)
mtd=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mtd" ] && return;
@@ -214,19 +127,9 @@ qcom_setup_macs()
ip link set eth1 address $lan_mac
ucidef_set_label_macaddr $wan_mac
;;
cig,wf660a)
mmc_dev=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mmc_dev" ] && mmc_dev=$(find_mmc_part "0:APPSBLENV")
[ -z "$mmc_dev" ] && return
mac=$(grep BaseMacAddress= $mmc_dev | cut -dx -f2)
[ -z "$mac" ] && return;
wan_mac=$(macaddr_canonicalize $mac)
ucidef_set_network_device_mac eth0 $wan_mac
ip link set eth0 address $wan_mac
;;
cybertan,eww622-a1)
mac=$(grep -i -m 1 mac_addr_base= /dev/`cat /proc/mtd | grep devinfo | cut -d: -f1` | cut -d= -f2)
[ -z "$mac"] && mac="00:11:22:33:44:55"
mac=$(grep -i -m 1 mac_addr_base= /dev/`cat /proc/mtd | grep devinfo | cut -d: -f1` | cut -d= -f2)
[ -z "$mac"] && mac="00:11:22:33:44:55"
wan_mac=$(macaddr_canonicalize $mac)
lan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth0 $wan_mac
@@ -244,10 +147,6 @@ qcom_setup_macs()
wan_mac=$(cat /sys/class/net/eth4/address)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
yuncore,fap655)
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
muxi,ap3220l)
wan_mac=$(mtd_get_mac_binary 0:Product_Info 0x5b)
lan_mac=$(macaddr_add "$wan_mac" 1)
@@ -260,13 +159,6 @@ qcom_setup_macs()
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
wallys,dr5018)
mac=$(grep -i -m 1 BaseMacAddress= /dev/`cat /proc/mtd | grep APPSBLENV | cut -d: -f1` | cut -d= -f2)
[ -z "$mac"] && mac="00:11:22:33:44:00"
wan_mac=$(macaddr_canonicalize $mac)
ucidef_set_network_device_mac eth0 $wan_mac
ucidef_set_label_macaddr $wan_mac
;;
esac
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac

View File

@@ -39,12 +39,11 @@ ath11k_generate_macs_wf194() {
echo -ne \\x${mac3//:/\\x} >> /lib/firmware/ath11k-macs
}
ath11k_generate_macs_ion4x() {
local dev=$(find_mtd_chardev "0:ART")
touch /lib/firmware/ath11k-macs
wifimac0=$(grep WLAN0_BASEMAC= $dev |cut -d '=' -f2)
wifimac1=$(grep WLAN1_BASEMAC= $dev |cut -d '=' -f2)
wifimac2=00:00:00:00:00:00
ath11k_generate_macs_ion4x() {
touch /lib/firmware/ath11k-macs
wifimac0=$(grep WLAN0_BASEMAC= /dev/mtd15 |cut -d '=' -f2)
wifimac1=$(grep WLAN1_BASEMAC= /dev/mtd15 |cut -d '=' -f2)
wifimac2=00:00:00:00:00:00
echo -ne \\x${wifimac0//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${wifimac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${wifimac2//:/\\x} >> /lib/firmware/ath11k-macs
@@ -59,66 +58,25 @@ ath11k_generate_macs_pax1800() {
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
}
ath11k_generate_macs_wf660a() {
touch /lib/firmware/ath11k-macs
mmc_dev=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mmc_dev" ] && mmc_dev=$(find_mmc_part "0:APPSBLENV")
[ -n "$mmc_dev" ] && mac=$(grep BaseMacAddress= $mmc_dev | cut -dx -f2)
eth=$(macaddr_canonicalize $mac)
mac1=$(macaddr_add $eth 1)
mac2=$(macaddr_add $eth 2)
mac3=$(macaddr_add $eth 3)
echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac3//:/\\x} >> /lib/firmware/ath11k-macs
}
ath11k_generate_macs_wf186w() {
touch /lib/firmware/ath11k-macs
local dev=$(find_mtd_chardev "0:APPSBLENV")
mac=$(grep BaseMacAddress= $dev | cut -dx -f2)
eth=$(macaddr_canonicalize $mac)
mac1=$(macaddr_add $eth 2)
mac2=$(macaddr_add $eth 3)
mac3=$(macaddr_add $eth 4)
echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac3//:/\\x} >> /lib/firmware/ath11k-macs
}
ath11k_generate_macs_wf186h() {
touch /lib/firmware/ath11k-macs
local dev=$(find_mtd_chardev "0:APPSBLENV")
mac=$(grep BaseMacAddress= $dev | cut -dx -f2)
eth=$(macaddr_canonicalize $mac)
mac1=$(macaddr_add $eth 2)
mac2=$(macaddr_add $eth 3)
mac3=$(macaddr_add $eth 4)
echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac3//:/\\x} >> /lib/firmware/ath11k-macs
}
caldata_die() {
echo "caldata: " "$*"
exit 1
echo "caldata: " "$*"
exit 1
}
caldata_extract() {
local part=$1
local offset=$(($2))
local count=$(($3))
local mtd
local part=$1
local offset=$(($2))
local count=$(($3))
local mtd
mtd=$(find_mtd_chardev $part)
if [ -z "$mtd" ]; then
mtd=/dev/$(echo $(find_mmc_part $part) | sed 's/^.\{5\}//')
fi
[ -n "$mtd" ] || caldata_die "no mtd device found for partition $part"
mtd=$(find_mtd_chardev $part)
if [ -z "$mtd" ]; then
mtd=/dev/$(echo $(find_mmc_part $part) | sed 's/^.\{5\}//')
fi
[ -n "$mtd" ] || caldata_die "no mtd device found for partition $part"
dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
caldata_die "failed to extract calibration data from $mtd"
dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
caldata_die "failed to extract calibration data from $mtd"
}
board=$(board_name)
@@ -139,7 +97,7 @@ case "$FIRMWARE" in
tplink,ex227|\
tplink,ex447|\
sercomm,wallaby)
caldata_extract "0:ART" 0x1000 0x20000
caldata_extract "0:ART" 0x1000 0x20000
;;
esac
;;
@@ -153,7 +111,6 @@ case "$FIRMWARE" in
hfcl,ion4x_2|\
hfcl,ion4x|\
hfcl,ion4xe|\
hfcl,ion4xi_wp|\
wallys,dr6018|\
wallys,dr6018-v4|\
meshpp,ipq6018-cp01|\
@@ -166,57 +123,35 @@ case "$FIRMWARE" in
yuncore,fap650|\
plasmacloud,pax1800-v1|\
plasmacloud,pax1800-v2)
caldata_extract "0:ART" 0x1000 0x20000
caldata_extract "0:ART" 0x1000 0x20000
;;
esac
;;
ath11k/IPQ5018/hw1.0/caldata.bin)
case "$board" in
cig,wf186w|\
cig,wf186h|\
cybertan,eww622-a1|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
wallys,dr5018|\
edgecore,eap104|\
yuncore,fap655|\
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
liteon,wpx8324|\
motorola,q14|\
muxi,ap3220l|\
xunison,d50-5g|\
qcom,ipq5018-mp03.1)
caldata_extract "0:ART" 0x1000 0x20000
caldata_extract "0:ART" 0x1000 0x20000
;;
esac
;;
ath11k/qcn6122/hw1.0/caldata_1.bin)
case "$board" in
cig,wf186w|\
cig,wf186h|\
wallys,dr5018|\
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
yuncore,fap655|\
motorola,q14)
caldata_extract "0:ART" 0x26800 0x20000
caldata_extract "0:ART" 0x26800 0x20000
;;
esac
;;
ath11k/qcn6122/hw1.0/caldata_2.bin)
case "$board" in
motorola,q14|\
wallys,dr5018|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,eap104|\
liteon,wpx8324)
caldata_extract "0:ART" 0x4c000 0x20000
caldata_extract "0:ART" 0x4c000 0x20000
;;
muxi,ap3220l)
caldata_extract "0:ART" 0x26800 0x20000
@@ -228,10 +163,9 @@ ath11k/QCN9074/hw1.0/caldata_1.bin)
cig,wf196|\
wallys,dr6018-v4|\
cybertan,eww622-a1|\
xunison,d50-5g|\
qcom,ipq5018-mp03.1|\
qcom,ipq807x-hk14)
caldata_extract "0:ART" 0x26800 0x20000
caldata_extract "0:ART" 0x26800 0x20000
;;
esac
;;
@@ -239,34 +173,29 @@ ath11k/QCN9074/hw1.0/caldata_2.bin)
case "$board" in
qcom,ipq807x-hk14|\
qcom,ipq5018-mp03.3)
caldata_extract "0:ART" 0x4C000 0x20000
caldata_extract "0:ART" 0x4C000 0x20000
;;
esac
;;
ath11k-macs)
case "$board" in
hfcl,ion4xi|\
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
hfcl,ion4xi_wp|\
hfcl,ion4x|\
hfcl,ion4x_2|\
hfcl,ion4xe)
hfcl,ion4xe)
ath11k_generate_macs_ion4x
;;
edgecore,eap101)
ath11k_generate_macs_eap101
;;
yuncore,ax840|\
yuncore,fap655|\
edgecore,eap102|\
edgecore,eap104|\
edgecore,eap106|\
indio,um-310ax-v1|\
indio,um-510axp-v1|\
indio,um-510axm-v1|\
xunison,d50-5g|\
cig,wf660a|\
cig,wf188n)
ath11k_generate_macs
;;
@@ -274,20 +203,11 @@ ath11k-macs)
cig,wf194c4|\
cig,wf196)
ath11k_generate_macs_wf194
;;
;;
plasmacloud,pax1800-v1|\
plasmacloud,pax1800-v2)
ath11k_generate_macs_pax1800
;;
cig,wf660a)
ath11k_generate_macs_wf660a
;;
cig,wf186w)
ath11k_generate_macs_wf186w
;;
cig,wf186h)
ath11k_generate_macs_wf186h
;;
esac
;;
*)

View File

@@ -1,40 +0,0 @@
#!/bin/sh
. /lib/functions.sh
debug() {
logger -t HOTPLUG-DVLAN "$*"
}
if [ "${INTERFACE:0:4}" != "wlan" ]; then
exit 0
fi
case "$(board_name)" in
"cig,wf186w")
wan_iface="eth0"
switch_dev="switch0"
switch_wan_port=4
switch_cpu_port=6
;;
*)
exit 0
esac
VSTR="$(echo $INTERFACE | egrep -o 'v([0-9]+)$')"
[ -z "$VSTR" ] && exit 0
VID="${VSTR:1}"
[ $VID -lt 1 -o $VID -gt 4096 ] && exit 0
if [ "$ACTION" = "add" ]; then
debug "[$INTERFACE] Dynamic VLAN $VID added, configuring switch"
swconfig dev ${switch_dev} vlan $VID set ports "${switch_wan_port}t ${switch_cpu_port}t"
elif [ "$ACTION" = "remove" ]; then
let cnt="$(bridge vlan show vid $VID | egrep "^wlan" | wc -l)"
debug "[$INTERFACE] Dynamic VLAN interface removed, references left = $cnt"
if [ $cnt -eq 0 ]; then
debug "[$INTERFACE] No more references, removing $VID from switch"
swconfig dev ${switch_dev} vlan $VID set ports ""
fi
fi

View File

@@ -5,12 +5,6 @@ START=99
boot() {
case "$(board_name)" in
hfcl,ion4xe|\
hfcl,ion4x|\
hfcl,ion4x_2|\
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
hfcl,ion4xi_wp|\
hfcl,ion4xi)
fw_setenv boot_count 0
;;

View File

@@ -5,19 +5,19 @@ RAMFS_COPY_BIN='fw_setenv'
RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock /tmp/downgrade'
qca_do_upgrade() {
local tar_file="$1"
local tar_file="$1"
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
board_dir=${board_dir%/}
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
board_dir=${board_dir%/}
local dev=$(find_mtd_chardev "0:HLOS")
tar Oxf $tar_file ${board_dir}/kernel | mtd write - ${dev}
tar Oxf $tar_file ${board_dir}/kernel | mtd write - ${dev}
if [ -n "$UPGRADE_BACKUP" ]; then
tar Oxf $tar_file ${board_dir}/root | mtd -j "$UPGRADE_BACKUP" write - rootfs
else
tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
fi
if [ -n "$UPGRADE_BACKUP" ]; then
tar Oxf $tar_file ${board_dir}/root | mtd -j "$UPGRADE_BACKUP" write - rootfs
else
tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
fi
}
find_mmc_part() {
@@ -38,66 +38,34 @@ do_flash_emmc() {
local emmcblock=$(find_mmc_part $2)
local board_dir=$3
local part=$4
[ -b "$emmcblock" ] || emmcblock=$(find_mmc_part $2)
[ -z "$emmcblock" ] && {
echo failed to find $2
return
}
echo erase $4 / $emmcblock
echo erase $4
dd if=/dev/zero of=${emmcblock} 2> /dev/null
echo flash $4
tar Oxf $tar_file ${board_dir}/$part | dd of=${emmcblock}
}
spi_nor_emmc_do_upgrade_bootconfig() {
local tar_file="$1"
emmc_do_upgrade_cig() {
local tar_file="$1"
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
board_dir=${board_dir%/}
[ -f /proc/boot_info/getbinary_bootconfig ] || {
echo "bootconfig does not exist"
exit
}
CI_ROOTPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
CI_KERNPART="$(cat /proc/boot_info/0:HLOS/upgradepartition)"
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
board_dir=${board_dir%/}
do_flash_emmc $tar_file '0:HLOS_1' $board_dir kernel
do_flash_emmc $tar_file 'rootfs_1' $board_dir root
[ -n "$CI_KERNPART" -a -n "$CI_ROOTPART" ] || {
echo "kernel or rootfs partition is unknown"
exit
}
local primary="0"
[ "$(cat /proc/boot_info/rootfs/primaryboot)" = "0" ] && primary="1"
echo "$primary" > /proc/boot_info/rootfs/primaryboot 2>/dev/null
echo "$primary" > /proc/boot_info/0:HLOS/primaryboot 2>/dev/null
cp /proc/boot_info/getbinary_bootconfig /tmp/bootconfig
do_flash_emmc $tar_file $CI_KERNPART $board_dir kernel
do_flash_emmc $tar_file $CI_ROOTPART $board_dir root
local emmcblock="$(find_mmc_part "rootfs_data")"
if [ -e "$emmcblock" ]; then
mkfs.ext4 -F "$emmcblock"
fi
for part in "0:BOOTCONFIG" "0:BOOTCONFIG1"; do
local mtdchar=$(echo $(find_mtd_chardev $part) | sed 's/^.\{5\}//')
if [ -n "$mtdchar" ]; then
echo start to update $mtdchar
mtd -qq write /proc/boot_info/getbinary_bootconfig "/dev/${mtdchar}" 2>/dev/null && echo update mtd $mtdchar
else
emmcblock=$(find_mmc_part $part)
echo erase ${emmcblock}
dd if=/dev/zero of=${emmcblock} 2> /dev/null
echo update $emmcblock
dd if=/tmp/bootconfig of=${emmcblock} 2> /dev/null
fi
done
local emmcblock="$(find_mmc_part "rootfs_data")"
if [ -e "$emmcblock" ]; then
mkfs.ext4 -F "$emmcblock"
fi
}
emmc_do_upgrade() {
local tar_file="$1"
@@ -107,17 +75,15 @@ emmc_do_upgrade() {
do_flash_emmc $tar_file 'rootfs' $board_dir root
local emmcblock="$(find_mmc_part "rootfs_data")"
if [ -e "$emmcblock" ]; then
mkfs.ext4 -F "$emmcblock"
fi
if [ -e "$emmcblock" ]; then
mkfs.ext4 -F "$emmcblock"
fi
}
platform_check_image() {
local magic_long="$(get_magic_long "$1")"
board=$(board_name)
case $board in
cig,wf186w|\
cig,wf186h|\
cig,wf188|\
cig,wf660a|\
cig,wf188n|\
@@ -125,14 +91,11 @@ platform_check_image() {
cig,wf194c4|\
cig,wf196|\
cybertan,eww622-a1|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
glinet,ax1800|\
glinet,axt1800|\
indio,um-310ax-v1|\
indio,um-510axp-v1|\
indio,um-510axm-v1|\
wallys,dr5018|\
wallys,dr6018|\
wallys,dr6018-v4|\
edgecore,eap101|\
@@ -141,10 +104,6 @@ platform_check_image() {
liteon,wpx8324|\
edgecore,eap106|\
hfcl,ion4xi|\
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
hfcl,ion4xi_wp|\
hfcl,ion4x|\
hfcl,ion4x_2|\
hfcl,ion4xe|\
@@ -155,14 +114,11 @@ platform_check_image() {
tplink,ex447|\
yuncore,ax840|\
yuncore,fap650|\
yuncore,fap655|\
motorola,q14|\
muxi,ap3220l|\
qcom,ipq6018-cp01|\
qcom,ipq807x-hk01|\
qcom,ipq807x-hk14|\
xunison,d50|\
xunison,d50-5g|\
qcom,ipq5018-mp03.3)
[ "$magic_long" = "73797375" ] && return 0
;;
@@ -181,7 +137,7 @@ platform_do_upgrade() {
qca_do_upgrade $1
;;
cig,wf660a)
spi_nor_emmc_do_upgrade_bootconfig $1
emmc_do_upgrade_cig $1
;;
motorola,q14)
emmc_do_upgrade $1
@@ -191,8 +147,6 @@ platform_do_upgrade() {
cig,wf194c4|\
cig,wf196|\
cybertan,eww622-a1|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
glinet,ax1800|\
glinet,axt1800|\
indio,um-310ax-v1|\
@@ -201,12 +155,10 @@ platform_do_upgrade() {
qcom,ipq6018-cp01|\
qcom,ipq807x-hk01|\
qcom,ipq807x-hk14|\
xunison,d50|\
xunison,d50-5g|\
qcom,ipq5018-mp03.3|\
wallys,dr5018|\
wallys,dr6018|\
wallys,dr6018-v4|\
yuncore,ax840|\
yuncore,fap650|\
tplink,ex447|\
tplink,ex227|\
@@ -227,21 +179,6 @@ platform_do_upgrade() {
fi
nand_upgrade_tar "$1"
;;
hfcl,ion4xi_w|\
hfcl,ion4x_w|\
hfcl,ion4xi_HMR|\
hfcl,ion4xi_wp)
wp_part=$(fw_printenv primary | cut -d = -f2)
echo "Current Primary is $wp_part"
if [[ $wp_part == 1 ]]; then
CI_UBIPART="rootfs"
CI_FWSETENV="primary 0"
else
CI_UBIPART="rootfs_1"
CI_FWSETENV="primary 1"
fi
nand_upgrade_tar "$1"
;;
edgecore,eap104|\
liteon,wpx8324|\
edgecore,eap106)
@@ -260,10 +197,10 @@ platform_do_upgrade() {
fw_setenv upgrade_available 0 || exit 1
elif grep -q rootfs1 /proc/cmdline; then
CI_UBIPART="rootfs2"
CI_FWSETENV="active 2"
fw_setenv active 2 || exit 1
else
CI_UBIPART="rootfs1"
CI_FWSETENV="active 1"
fw_setenv active 1 || exit 1
fi
fi
nand_upgrade_tar "$1"
@@ -273,15 +210,5 @@ platform_do_upgrade() {
PART_NAME="inactive"
platform_do_upgrade_dualboot_datachk "$1"
;;
cig,wf186w|\
cig,wf186h|\
yuncore,ax840|\
yuncore,fap655)
[ -f /proc/boot_info/rootfs/upgradepartition ] && {
CI_UBIPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
CI_BOOTCFG=1
}
nand_upgrade_tar "$1"
;;
esac
}

View File

@@ -75,7 +75,6 @@ CONFIG_BLK_DEV_NVME=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BOOTCONFIG_PARTITION is not set
# CONFIG_VIRTIO_BLK is not set
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -548,8 +547,8 @@ CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_STRIPPED is not set
CONFIG_PSTORE=y
CONFIG_PSTORE_RAM=y
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_PMSG=y
# CONFIG_PSTORE_CONSOLE is not set
# CONFIG_PSTORE_PMSG is not set
CONFIG_PWM=y
CONFIG_PWM_IPQ4019=y
# CONFIG_PWM_PCA9685 is not set
@@ -824,6 +823,7 @@ CONFIG_SKB_FIXED_SIZE_2K=y
CONFIG_AQ_PHY=y
CONFIG_DIAG_CHAR=y
# CONFIG_HW_RANDOM_VIRTIO is not set
# CONFIG_BOOTCONFIG_PARTITION is not set
# CONFIG_CRYPTO_DEV_QCEDEV is not set
# CONFIG_CRYPTO_DEV_QCRYPTO is not set
# CONFIG_MHI_BUS_TEST is not set

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-cig-wf186h.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-cig-wf186w.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,10 +0,0 @@
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-eww631-a1.dts"
/ {
model = "CyberTan EWW631-A1";
compatible = "cybertan,eww631-a1", "qcom,ipq5018";
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,10 +0,0 @@
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-eww631-b1.dts"
/ {
model = "CyberTan EWW631-B1";
compatible = "cybertan,eww631-b1", "qcom,ipq5018";
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-hfcl-ion4x_w.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

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@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-hfcl-ion4xi_HMR.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

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@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-hfcl-ion4xi_w.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

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@@ -1,10 +0,0 @@
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-wallys-dr5018.dts"
/ {
model = "Wallys DR5018";
compatible = "wallys,dr5018", "qcom,ipq5018";
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-xunison-d50-5g.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-xunison-d50.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,23 +0,0 @@
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq5018-yuncore-fap655.dts"
/ {
pmuv8: pmu {
compatible = "arm,cortex-a7-pmu";
};
};

View File

@@ -1,18 +0,0 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-hfcl-ion4xi_wp.dts"
#include "qcom-ipq6018.dtsi"

View File

@@ -1,965 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "CIG wf186h";
compatible = "cig,wf186h","qcom,ipq5018-mp03.3", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 8MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x40800000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* + | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 16MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C000000 | 13MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4CD00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4CE00000 | 1MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4CF00000 | 15MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4DE00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4DF00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4E000000 | 17MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4F100000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x3000000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01000000>;
};
q6_ipq5018_data: q6_ipq5018_data@4c000000 {
no-map;
reg = <0x0 0x4c000000 0x0 0xD00000>;
};
m3_dump: m3_dump@4CD00000 {
no-map;
reg = <0x0 0x4CD00000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4CE00000 {
no-map;
reg = <0x0 0x4CE00000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4CF00000 {
no-map;
reg = <0x0 0x4CF00000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4DE00000 {
no-map;
reg = <0x0 0x4DE00000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4DF00000 {
no-map;
reg = <0x0 0x4DF00000 0x0 0x100000>;
};
q6_qcn9000_region: qcn9000_pcie0@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x01100000>;
};
mhi_region1: dma_pool1@4F100000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F100000 0x0 0x01000000>;
};
#elif __IPQ_MEM_PROFILE_512_MB__
/* 512 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 16MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C000000 | 14MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4CE00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4CF00000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4D000000 | 2MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4D200000 | 16MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4E200000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4E300000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4E400000 | 5MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4E900000 | 30MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x50700000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x3900000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01000000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C000000 {
no-map;
reg = <0x0 0x4C000000 0x0 0xE00000>;
};
m3_dump: m3_dump@4CE00000 {
no-map;
reg = <0x0 0x4CE00000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4CF00000 {
no-map;
reg = <0x0 0x4CF00000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D000000 {
no-map;
reg = <0x0 0x4D000000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
q6_qcn9000_region: qcn9000_pcie0@4E900000 {
no-map;
reg = <0x0 0x4E900000 0x0 0x01E00000>;
};
mhi_region1: dma_pool1@50700000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x50700000 0x0 0x01000000>;
};
#else
/* 1G Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 16MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C000000 | 14MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4CE00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4CF00000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4D000000 | 2MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4D200000 | 16MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4E200000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4E300000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4E400000 | 5MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4E900000 | 45MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x51600000 | 24MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x3900000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01000000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C000000 {
no-map;
reg = <0x0 0x4C000000 0x0 0xE00000>;
};
m3_dump: m3_dump@4CE00000 {
no-map;
reg = <0x0 0x4CE00000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4CF00000 {
no-map;
reg = <0x0 0x4CF00000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D000000 {
no-map;
reg = <0x0 0x4D000000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
q6_qcn9000_region: qcn9000_pcie0@4E900000 {
no-map;
reg = <0x0 0x4E900000 0x0 0x02D00000>;
};
mhi_region1: dma_pool1@51600000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x51600000 0x0 0x01800000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 35 0>;
cig_clk_div = <0xff>;
ethernet-phy@0 {
reg = <0x1d>;
};
};
realtek@29{
compatible = "realtek,rtl8367s";
mii-bus = <&mdio1>;
realtek,extif0 = <0 0 10 1 1 1 1 1 2>;
switch = <&tlmm 35 0>;
phy-addr = <29>;
status = "ok";
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
wifi0: wifi@c000000 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "rst";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&phy_led_pins>;
pinctrl-names = "default";
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio31", "gpio33";
function = "blsp1_uart1";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
rst_button {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
};
pwm_pins: pwm_pinmux {
mux_1 {
pins = "gpio0";
function = "pwm10";
drive-strength = <8>;
};
mux_2 {
pins = "gpio1";
function = "pwm20";
drive-strength = <8>;
};
mux_3 {
pins = "gpio45";
function = "pwm3";
drive-strength = <8>;
};
};
};
&soc {
pwm: pwm@0x1941010 {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
used-pwm-indices = <1>, <1>, <1>, <1>;
dft-pwm-status = <1>, <0>, <0>, <0>;
status = "ok";
};
};
&usb3 {
status = "disabled";
device-power-gpio = <&tlmm 24 1>;
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "ok";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "disabled";
perst-gpio = <&tlmm 15 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x21>;
#address-cells = <0x2>;
#size-cells = <0x2>;
memory-region = <&mhi_region1>;
#if !defined(__CNSS2__)
base-addr = <0x4E900000>;
m3-dump-addr = <0x4FD00000>;
etr-addr = <0x4FE00000>;
qcom,caldb-addr = <0x4FF00000>;
qcom,tgt-mem-mode = <0x1>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
qcom,board_id = <0xa4>;
#endif
};
};
&wifi3 {
status = "ok";
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};
&qcom_q6v5_wcss {
qcom,multipd_arch;
memory-region = <&q6_mem_regions>;
qcom,share_bootargs;
qcom,bootargs_smem = <507>;
boot-args = <0x2 0x4 0x2 0x12 0x0 0x0>;
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
/* QCN6122 5G */
q6v5_wcss_userpd2 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <2>;
qca,auto-restart;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&qgic_msi_0 {
status = "ok";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
qcom,bdf-addr = <0x0 0x4C000000 0x4C000000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x0 0x4D000000 0 0 0>;
#else
qcom,caldb-addr = <0x4D000000>;
m3-dump-addr = <0x4CE00000>;
#endif
qcom,caldb-size = <0x200000>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x0 0x4D200000 0x4CF00000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x0 0x4E400000 0 0 0>;
#else
qcom,caldb-addr = <0x4E400000>;
m3-dump-addr = <0x4E200000>;
#endif
qcom,caldb-size = <0x500000>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
status = "ok";
};

View File

@@ -1,965 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "CIG wf186w";
compatible = "cig,wf186w","qcom,ipq5018-mp03.3", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 8MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x40800000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* + | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 16MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C000000 | 13MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4CD00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4CE00000 | 1MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4CF00000 | 15MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4DE00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4DF00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4E000000 | 17MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4F100000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x3000000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01000000>;
};
q6_ipq5018_data: q6_ipq5018_data@4c000000 {
no-map;
reg = <0x0 0x4c000000 0x0 0xD00000>;
};
m3_dump: m3_dump@4CD00000 {
no-map;
reg = <0x0 0x4CD00000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4CE00000 {
no-map;
reg = <0x0 0x4CE00000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4CF00000 {
no-map;
reg = <0x0 0x4CF00000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4DE00000 {
no-map;
reg = <0x0 0x4DE00000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4DF00000 {
no-map;
reg = <0x0 0x4DF00000 0x0 0x100000>;
};
q6_qcn9000_region: qcn9000_pcie0@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x01100000>;
};
mhi_region1: dma_pool1@4F100000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F100000 0x0 0x01000000>;
};
#elif __IPQ_MEM_PROFILE_512_MB__
/* 512 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 16MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C000000 | 14MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4CE00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4CF00000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4D000000 | 2MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4D200000 | 16MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4E200000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4E300000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4E400000 | 5MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4E900000 | 30MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x50700000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x3900000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01000000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C000000 {
no-map;
reg = <0x0 0x4C000000 0x0 0xE00000>;
};
m3_dump: m3_dump@4CE00000 {
no-map;
reg = <0x0 0x4CE00000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4CF00000 {
no-map;
reg = <0x0 0x4CF00000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D000000 {
no-map;
reg = <0x0 0x4D000000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
q6_qcn9000_region: qcn9000_pcie0@4E900000 {
no-map;
reg = <0x0 0x4E900000 0x0 0x01E00000>;
};
mhi_region1: dma_pool1@50700000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x50700000 0x0 0x01000000>;
};
#else
/* 1G Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 16MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C000000 | 14MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4CE00000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4CF00000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4D000000 | 2MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4D200000 | 16MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4E200000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4E300000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4E400000 | 5MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4E900000 | 45MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x51600000 | 24MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x3900000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01000000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C000000 {
no-map;
reg = <0x0 0x4C000000 0x0 0xE00000>;
};
m3_dump: m3_dump@4CE00000 {
no-map;
reg = <0x0 0x4CE00000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4CF00000 {
no-map;
reg = <0x0 0x4CF00000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D000000 {
no-map;
reg = <0x0 0x4D000000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
q6_qcn9000_region: qcn9000_pcie0@4E900000 {
no-map;
reg = <0x0 0x4E900000 0x0 0x02D00000>;
};
mhi_region1: dma_pool1@51600000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x51600000 0x0 0x01800000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 35 0>;
cig_clk_div = <0xff>;
ethernet-phy@0 {
reg = <0x1d>;
};
};
realtek@29{
compatible = "realtek,rtl8367s";
mii-bus = <&mdio1>;
realtek,extif0 = <0 0 10 1 1 1 1 1 2>;
switch = <&tlmm 35 0>;
phy-addr = <29>;
status = "ok";
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
wifi0: wifi@c000000 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "rst";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&phy_led_pins>;
pinctrl-names = "default";
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio31", "gpio33";
function = "blsp1_uart1";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
rst_button {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
};
pwm_pins: pwm_pinmux {
mux_1 {
pins = "gpio0";
function = "pwm10";
drive-strength = <8>;
};
mux_2 {
pins = "gpio1";
function = "pwm20";
drive-strength = <8>;
};
mux_3 {
pins = "gpio45";
function = "pwm3";
drive-strength = <8>;
};
};
};
&soc {
pwm: pwm@0x1941010 {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
used-pwm-indices = <1>, <1>, <1>, <1>;
dft-pwm-status = <1>, <0>, <0>, <0>;
status = "ok";
};
};
&usb3 {
status = "disabled";
device-power-gpio = <&tlmm 24 1>;
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "ok";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "disabled";
perst-gpio = <&tlmm 15 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x21>;
#address-cells = <0x2>;
#size-cells = <0x2>;
memory-region = <&mhi_region1>;
#if !defined(__CNSS2__)
base-addr = <0x4E900000>;
m3-dump-addr = <0x4FD00000>;
etr-addr = <0x4FE00000>;
qcom,caldb-addr = <0x4FF00000>;
qcom,tgt-mem-mode = <0x1>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
qcom,board_id = <0xa4>;
#endif
};
};
&wifi3 {
status = "ok";
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};
&qcom_q6v5_wcss {
qcom,multipd_arch;
memory-region = <&q6_mem_regions>;
qcom,share_bootargs;
qcom,bootargs_smem = <507>;
boot-args = <0x2 0x4 0x2 0x12 0x0 0x0>;
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
/* QCN6122 5G */
q6v5_wcss_userpd2 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <2>;
qca,auto-restart;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&qgic_msi_0 {
status = "ok";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
qcom,bdf-addr = <0x0 0x4C000000 0x4C000000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x0 0x4D000000 0 0 0>;
#else
qcom,caldb-addr = <0x4D000000>;
m3-dump-addr = <0x4CE00000>;
#endif
qcom,caldb-size = <0x200000>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x0 0x4D200000 0x4CF00000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x0 0x4E400000 0 0 0>;
#else
qcom,caldb-addr = <0x4E400000>;
m3-dump-addr = <0x4E200000>;
#endif
qcom,caldb-size = <0x500000>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
status = "ok";
};

View File

@@ -1,908 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03.5-C1";
compatible = "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "disabled";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
/*
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
*/
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
/*
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
*/
qcom,test@0 {
status = "ok";
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: blsp0_uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio23", "gpio25", "gpio24", "gpio26";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio26";
function = "audio_rxd";
drive-strength = <8>;
bias-pull-down;
};
mux_4 {
pins = "gpio27";
function = "audio_txmclk";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_6 {
pins = "gpio29";
function = "audio_txfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_7 {
pins = "gpio30";
function = "audio_txd";
drive-strength = <8>;
bias-pull-down;
};
};
leds_pins: leds_pinmux {
sys_blue {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
sys_red {
pins = "gpio36";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
sys_green {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@30 {
label = "sys:blue";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; /* GPIO_30 */
default-state="on";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
led@36 {
label = "sys:red";
gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>; /* GPIO_36 */
default-state="off";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
led@37 {
label = "sys:green";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; /* GPIO_37 */
default-state="off";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
};
};
&usb3 {
status = "disabled";
device-power-gpio = <&tlmm 24 1>;
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "disabled";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "disabled";
perst-gpio = <&tlmm 15 1>;
};
&bt {
status = "ok";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};
&qcom_q6v5_wcss {
qcom,multipd_arch;
memory-region = <&q6_mem_regions>;
qcom,share_bootargs;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
/* QCN6122 6G */
q6v5_wcss_userpd2 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <2>;
qca,auto-restart;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
/* QCN6122 5G */
q6v5_wcss_userpd3 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <3>;
qca,auto-restart;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&qgic_msi_0 {
status = "ok";
};
&qgic_msi_1 {
status = "ok";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
#else
qcom,caldb-addr = <0x4D400000>;
m3-dump-addr = <0x4D200000>;
#endif
qcom,caldb-size = <0x200000>;
status = "ok";
};
&wifi1 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
#else
qcom,caldb-addr = <0x4FF00000>;
m3-dump-addr = <0x4FD00000>;
#endif
qcom,caldb-size = <0x500000>;
status = "ok";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
#else
qcom,caldb-addr = <0x4FF00000>;
m3-dump-addr = <0x4FD00000>;
#endif
qcom,caldb-size = <0x500000>;
status = "disabled";
};

View File

@@ -1,791 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP02.1";
compatible = "qcom,ipq5018-mp02.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
MP_256;
/delete-property/ MP_512;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
//serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1";
stdout-path = "serial0";
};
/* 256 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 8MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x40800000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* + | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 20MB |
* | code/ | | |
* | data | | |
* +--------+--------------+-------------------------+
* | | | |
* |IPQ5018 | 0x4C400000 | 13MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4D100000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4D200000 | 1MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4D300000 | 15MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4E200000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4E300000 | 1MB |
* +--------+--------------+-------------------------+
* |QCN6122 | 0x4E400000 | 15MB |
* | data | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4F300000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4F400000 | 1MB |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
reserved-memory {
/delete-node/ nss@40000000;
nss@40000000 {
no-map;
reg = <0x0 0x40000000 0x0 0x0800000>;
};
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
};
soc {
serial@78af000 {
status = "ok";
};
/*
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
*/
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 38 0>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
ethernet-phy@4 {
reg = <4>;
};
};
ess-instance {
num_devices = <0x2>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
// mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "low";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x26>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap (Port 6 GMAC) */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
};
};
};
qcom_q6v5_wcss@CD00000 {
memory-region = <&q6_mem_regions>;
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
};
thermal-zones {
status = "ok";
};
};
&sdhc_1 {
status = "disabled";
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins>;
pinctrl-names = "default";
blsp0_uart_pins: blsp0_uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
/*
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx {
pins = "gpio23";
function = "blsp1_uart2";
drive-strength = <8>;
input-enable;
bias-disable;
bias-pull-up;
};
blsp1_uart_tx {
pins = "gpio25";
function = "blsp1_uart2";
drive-strength = <8>;
bias-disable;
output-high;
bias-pull-up;
};
blsp1_uart_rfr {
pins = "gpio24";
function = "blsp1_uart2";
drive-strength = <8>;
bias-disable;
output-high;
bias-pull-up;
};
blsp1_uart_cts {
pins = "gpio26";
function = "blsp1_uart2";
drive-strength = <8>;
bias-disable;
input-enable;
bias-pull-up;
};
};
*/
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
/*
phy_pins: phy_pins {
phy_intr {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
phy_reset {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
output-low;
};
};
*/
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
poe_pins: poe_pinmux {
/*
LAN port PoE output enable
H --> enable; L --> disable (Default setting to H)
*/
mux_0 {
pins = "gpio24";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
output-high;
};
mux_1 { /* PSE_INT_N */
pins = "gpio27";
function = "gpio";
bias-pull-up;
input;
};
};
leds_pins: leds_pinmux {
sys_green {
pins = "gpio1";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
sys_blue {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
sys_red {
pins = "gpio46";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@1 {
label = "sys:green";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; /* GPIO_1/ATST_QP0 */
default-state="off";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
led@30 {
label = "sys:blue";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; /* GPIO_30 */
default-state="on";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
led@46 {
label = "sys:red";
gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; /* GPIO_46 */
default-state="off";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
};
};
&usb3 {
status = "disabled";
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "disabled";
perst-gpio = <&tlmm 27 1>;
};
&pcie_x2 {
status = "disabled";
perst-gpio = <&tlmm 15 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};
&qcom_q6v5_wcss {
qcom,multipd_arch;
qcom,share_bootargs;
qcom,bootargs_smem = <507>;
/* Please refer the IPQ50xx SoC Software doc to define pcie reset pin */
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x0F 0x0 0x0>;
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
};
/* QCN6122 6G */
q6v5_wcss_userpd2 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <2>;
qca,auto-restart;
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
};
/* QCN6122 5G */
q6v5_wcss_userpd3 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <3>;
qca,auto-restart;
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "ok";
};
&qgic_msi_0 {
status = "ok";
};
&qgic_msi_1 {
status = "ok";
};
&wifi0 {
/* IPQ5018 24G*/
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,tgt-mem-mode = <2>;
qcom,board_id = <0x24>;
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000>;
qcom,caldb-size = <0x200000>;
nss-radio-priority = <0>;
m3-dump-addr = <0x4D200000>;
mem-region = <&q6_ipq5018_data>;
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,tgt-mem-mode = <2>;
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E800000>;
m3-dump-addr = <0x4E600000>;
nss-radio-priority = <1>;
mem-region = <&q6_qcn6122_data1>;
qcom,caldb-size = <0x500000>;
status = "ok";
};
&wifi2 {
status = "disabled";
};

View File

@@ -1,984 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03.5-C1";
compatible = "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
AUTO_MOUNT;
#endif
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
};
ess-instance {
num_devices = <0x2>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x27>;
switch_cpu_bmp = <0x40>;
switch_lan_bmp = <0x1e>;
switch_wan_bmp = <0x0>;
qca,ar8327-initvals = <
0x00004 0x7600000
0x00008 0x1000000
0x0000c 0x80
0x00010 0x2613a0
0x000e4 0xaa545
0x000e0 0xc74164de
0x0007c 0x4e
0x00094 0x4e
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
};
};
};
wifi0: wifi@c000000 {
qcom,bdf-addr = <0x4BA00000 0x4BA00000 0x4BA00000
0x0 0x0>;
qcom,caldb-addr = <0x4CA00000 0x4CA00000 0x4CA00000
0x0 0x0>;
qcom,caldb-size = <0x200000>;
status = "ok";
};
ess-uniphy@98000 {
status = "ok";
};
qcom,sps {
status = "ok";
};
qcom,usbbam@8B04000 {
status = "ok";
};
qcom,diag@0 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
/* qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0 1 2 3>;
mdio-bus = <&mdio1>; */
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: blsp0_uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio23", "gpio25", "gpio24", "gpio26";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio26";
function = "audio_rxd";
drive-strength = <8>;
bias-pull-down;
};
mux_4 {
pins = "gpio27";
function = "audio_txmclk";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_6 {
pins = "gpio29";
function = "audio_txfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_7 {
pins = "gpio30";
function = "audio_txd";
drive-strength = <8>;
bias-pull-down;
};
};
leds_pins: leds_pinmux {
sys_blue {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
sys_red {
pins = "gpio36";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
sys_green {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@30 {
label = "sys:blue";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; /* GPIO_30 */
default-state="on";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
led@36 {
label = "sys:red";
gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>; /* GPIO_36 */
default-state="off";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
led@37 {
label = "sys:green";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; /* GPIO_37 */
default-state="off";
/* linux,default-trigger = "timer";
active-delay = <700>;
inactive-delay = <700>;
default-state="on"; */
};
};
};
&usb3 {
status = "disabled";
device-power-gpio = <&tlmm 24 1>;
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "disabled";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "disabled";
perst-gpio = <&tlmm 15 1>;
};
&bt {
status = "ok";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};
&qcom_q6v5_wcss {
qcom,multipd_arch;
memory-region = <&q6_mem_regions>;
qcom,share_bootargs;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
/* QCN6122 6G */
q6v5_wcss_userpd2 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <2>;
qca,auto-restart;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
/* QCN6122 5G */
q6v5_wcss_userpd3 {
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <3>;
qca,auto-restart;
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&qgic_msi_0 {
status = "ok";
};
&qgic_msi_1 {
status = "ok";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
#else
qcom,caldb-addr = <0x4D400000>;
m3-dump-addr = <0x4D200000>;
#endif
qcom,caldb-size = <0x200000>;
status = "ok";
};
&wifi1 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
#else
qcom,caldb-addr = <0x4FF00000>;
m3-dump-addr = <0x4FD00000>;
#endif
qcom,caldb-size = <0x500000>;
status = "ok";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
#else
qcom,caldb-addr = <0x4FF00000>;
m3-dump-addr = <0x4FD00000>;
#endif
qcom,caldb-size = <0x500000>;
status = "disabled";
};

View File

@@ -1,995 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Xunison D50-5G";
compatible = "xunison,d50-5g", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
AUTO_MOUNT;
#endif
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp2";
ethernet1 = "/soc/dp1";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 8MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x40800000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* + | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 23MB |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C700000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4C900000 | 17MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4DA00000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01700000>;
};
m3_dump@4c700000 {
no-map;
reg = <0x0 0x4C700000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
qcn9000_pcie0@4c900000 {
no-map;
reg = <0x0 0x4C900000 0x0 0x01100000>;
};
mhi_region1: dma_pool1@4da00000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4da00000 0x0 0x01000000>;
};
#elif __IPQ_MEM_PROFILE_512_MB__
/* 512 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 24MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C900000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4CA00000 | 2MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4CC00000 | 30MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4EA00000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01800000>;
};
m3_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c900000 {
no-map;
reg = <0x0 0x4c900000 0x0 0x100000>;
};
q6_caldb_region:q6_caldb_region@4ca00000 {
no-map;
reg = <0x0 0x4ca00000 0x0 0x200000>;
};
qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x01E00000>;
};
mhi_region1: dma_pool1@4ea00000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4ea00000 0x0 0x01000000>;
};
#else
/* 1G Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 24MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C900000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4CA00000 | 2MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4CC00000 | 45MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4F900000 | 24MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01800000>;
};
m3_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c900000 {
no-map;
reg = <0x0 0x4c900000 0x0 0x100000>;
};
q6_caldb_region:q6_caldb_region@4ca00000 {
no-map;
reg = <0x0 0x4ca00000 0x0 0x200000>;
};
qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x02D00000>;
};
mhi_region1: dma_pool1@4F900000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F900000 0x0 0x01800000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
};
ess-instance {
num_devices = <0x2>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x27>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
};
};
};
wifi0: wifi@c000000 {
qcom,bdf-addr = <0x4BA00000 0x4BA00000 0x4BA00000
0x0 0x0>;
qcom,caldb-addr = <0x4CA00000 0x4CA00000 0x4CA00000
0x0 0x0>;
qcom,caldb-size = <0x200000>;
status = "ok";
};
ess-uniphy@98000 {
status = "disabled";
};
qcom,sps {
status = "ok";
};
qcom,usbbam@8B04000 {
status = "ok";
};
qcom,diag@0 {
status = "ok";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
rpm_etm0 {
status = "disabled";
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
gpio_keys {
compatible = "gpio-keys-polled";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
poll-interval = <100>;
button@0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@35 {
label = "green:4g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_5g_wifi";
default-state = "off";
};
led@30 {
label = "green:wifi";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_2g_wifi";
default-state = "off";
};
led@1 {
label = "green:internet";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_voice";
default-state = "off";
};
led@33 {
label = "green:lte";
gpios = <&tlmm 33 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_lte_g";
default-state = "off";
};
led@34 {
label = "red:lte";
gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_lte_r";
default-state = "off";
};
led@27 {
label = "green:mesh";
gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_nr_g";
default-state = "off";
};
led@28 {
label = "red:mesh";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_nr_r";
default-state = "off";
};
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: blsp0_uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio23", "gpio25", "gpio24", "gpio26";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button{
pins = "gpio22";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
wps_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pins {
led_5g_wifi {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g_wifi {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_lte_g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_lte_r {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_nr_g {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_nr_r {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_voice {
pins = "gpio1";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
audio_pins: audio_pinmux {
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio26";
function = "audio_rxd";
drive-strength = <8>;
bias-pull-down;
};
mux_4 {
pins = "gpio27";
function = "audio_txmclk";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_6 {
pins = "gpio29";
function = "audio_txfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_7 {
pins = "gpio30";
function = "audio_txd";
drive-strength = <8>;
bias-pull-down;
};
};
};
&usb3 {
qcom,multiplexed-phy;
qcom,phy-mux-regs = <&tcsr_q6_block 0x2540>;
device-power-gpio = <&tlmm 24 1>;
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "disabled";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "ok";
perst-gpio = <&tlmm 15 1>;
};
&bt {
status = "ok";
};
&wcss {
status = "ok";
};
&q6v5_wcss {
status = "disabled";
};
&q6v5_m3 {
status = "disabled";
};
&tcsr_mutex_block {
status = "ok";
};
&tcsr_mutex {
status = "ok";
};
&smem {
status = "ok";
};
&apcs_glb {
status = "ok";
};
&tcsr_q6_block {
status = "ok";
};
&qcom_q6v5_wcss {
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_region>, <&q6_etr_region>;
#else
memory-region = <&q6_region>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&dbm_1p5 {
status = "ok";
};
&msm_imem {
status = "ok";
};
&blsp1_uart1 {
status = "ok";
};
&ssuniphy_0 {
status = "ok";
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "ok";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "ok";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
#address-cells = <0x2>;
#size-cells = <0x2>;
memory-region = <&mhi_region1>;
#if !defined(__CNSS2__)
base-addr = <0x4CC00000>;
m3-dump-addr = <0x4E000000>;
etr-addr = <0x4E100000>;
qcom,caldb-addr = <0x4E200000>;
qcom,tgt-mem-mode = <0x1>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,board_id = <0x24>;
status = "ok";
};
&wifi3 {
/* QCN9000 5G */
board_id = <0xa0>;
status = "ok";
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};

View File

@@ -1,884 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Xunison D50";
compatible = "xunison,d50", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
AUTO_MOUNT;
#endif
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 8MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x40800000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* + | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 23MB |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C700000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4C900000 | 17MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4DA00000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01700000>;
};
m3_dump@4c700000 {
no-map;
reg = <0x0 0x4C700000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
qcn9000_pcie0@4c900000 {
no-map;
reg = <0x0 0x4C900000 0x0 0x01100000>;
};
mhi_region1: dma_pool1@4da00000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4da00000 0x0 0x01000000>;
};
#elif __IPQ_MEM_PROFILE_512_MB__
/* 512 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 24MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C900000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4CA00000 | 2MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4CC00000 | 30MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4EA00000 | 16MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01800000>;
};
m3_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c900000 {
no-map;
reg = <0x0 0x4c900000 0x0 0x100000>;
};
q6_caldb_region:q6_caldb_region@4ca00000 {
no-map;
reg = <0x0 0x4ca00000 0x0 0x200000>;
};
qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x01E00000>;
};
mhi_region1: dma_pool1@4ea00000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4ea00000 0x0 0x01000000>;
};
#else
/* 1G Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 24MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C900000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4CA00000 | 2MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4CC00000 | 45MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4F900000 | 24MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01800000>;
};
m3_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c900000 {
no-map;
reg = <0x0 0x4c900000 0x0 0x100000>;
};
q6_caldb_region:q6_caldb_region@4ca00000 {
no-map;
reg = <0x0 0x4ca00000 0x0 0x200000>;
};
qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x02D00000>;
};
mhi_region1: dma_pool1@4F900000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F900000 0x0 0x01800000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
};
ess-instance {
num_devices = <0x2>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x27>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
};
};
};
wifi0: wifi@c000000 {
qcom,bdf-addr = <0x4BA00000 0x4BA00000 0x4BA00000
0x0 0x0>;
qcom,caldb-addr = <0x4CA00000 0x4CA00000 0x4CA00000
0x0 0x0>;
qcom,caldb-size = <0x200000>;
status = "ok";
};
ess-uniphy@98000 {
status = "disabled";
};
qcom,sps {
status = "ok";
};
qcom,usbbam@8B04000 {
status = "ok";
};
qcom,diag@0 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
rpm_etm0 {
status = "disabled";
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: blsp0_uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio23", "gpio25", "gpio24", "gpio26";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio26";
function = "audio_rxd";
drive-strength = <8>;
bias-pull-down;
};
mux_4 {
pins = "gpio27";
function = "audio_txmclk";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_6 {
pins = "gpio29";
function = "audio_txfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_7 {
pins = "gpio30";
function = "audio_txd";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
};
&usb3 {
qcom,multiplexed-phy;
qcom,phy-mux-regs = <&tcsr_q6_block 0x2540>;
device-power-gpio = <&tlmm 24 1>;
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "disabled";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "ok";
perst-gpio = <&tlmm 15 1>;
};
&bt {
status = "ok";
};
&wcss {
status = "ok";
};
&q6v5_wcss {
status = "disabled";
};
&q6v5_m3 {
status = "disabled";
};
&tcsr_mutex_block {
status = "ok";
};
&tcsr_mutex {
status = "ok";
};
&smem {
status = "ok";
};
&apcs_glb {
status = "ok";
};
&tcsr_q6_block {
status = "ok";
};
&qcom_q6v5_wcss {
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_region>, <&q6_etr_region>;
#else
memory-region = <&q6_region>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&dbm_1p5 {
status = "ok";
};
&msm_imem {
status = "ok";
};
&blsp1_uart1 {
status = "ok";
};
&ssuniphy_0 {
status = "ok";
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "ok";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "ok";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
#address-cells = <0x2>;
#size-cells = <0x2>;
memory-region = <&mhi_region1>;
#if !defined(__CNSS2__)
base-addr = <0x4CC00000>;
m3-dump-addr = <0x4E000000>;
etr-addr = <0x4E100000>;
qcom,caldb-addr = <0x4E200000>;
qcom,tgt-mem-mode = <0x1>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,board_id = <0x24>;
status = "ok";
};
&wifi3 {
/* QCN9000 5G */
board_id = <0xa0>;
status = "ok";
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};

View File

@@ -17,7 +17,6 @@
#include "qcom-ipq6018.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
/ {
#address-cells = <0x2>;
@@ -39,11 +38,6 @@
ethernet2 = "/soc/dp3";
ethernet3 = "/soc/dp4";
ethernet4 = "/soc/dp5";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
@@ -233,6 +227,27 @@
};
};
leds_pins: leds_pins {
led_5g {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_usb0 {
pins = "gpio50";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
hsuart_pins: hsuart_pins {
mux {
pins = "gpio71", "gpio72";
@@ -283,12 +298,11 @@
};
&soc {
pwm0: pwm {
pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
used-pwm-indices = <1>, <1>, <1>, <0>;
status = "ok";
#pwm-cells = <2>;
};
extcon_usb: extcon_usb {
pinctrl-0 = <&extcon_usb_pins>;
@@ -424,34 +438,44 @@
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
linux,code = <KEY_POWER>;
gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
pwmleds {
compatible = "pwm-leds";
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_power: led1 {
label = "blue:status";
pwms = <&pwm0 0 5000>;
max-brightness = <255>;
led@35 {
label = "led_5g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led2 {
label = "green:status";
pwms = <&pwm0 1 5000>;
max-brightness = <255>;
led@37 {
label = "led_2g";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led3 {
label = "red:status";
pwms = <&pwm0 2 5000>;
max-brightness = <255>;
led@50 {
label = "led_usb0";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "usb-host";
default-state = "off";
};
};

View File

@@ -1,102 +0,0 @@
/dts-v1/;
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq6018-hfcl-ion4xi_wp.dtsi"
#include "qcom-ipq6018-rpm-regulator.dtsi"
#include "qcom-ipq6018-cpr-regulator.dtsi"
#include "qcom-ipq6018-cp-cpu.dtsi"
/ {
model = "HFCL ION4Xi_WP";
compatible = "hfcl,ion4xi_wp", "qcom,ipq6018-cp01", "qcom,ipq6018";
/*
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | 139MB |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | TZ App | 0x49B00000 | 6MB |
* +--------+--------------+-------------------------+
*
* From the available 145 MB for Linux in the first 256 MB,
* we are reserving 6 MB for TZAPP.
*
* Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi
* for memory layout.
*/
/* TZAPP is enabled in default memory profile only */
#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__)
reserved-memory {
tzapp:tzapp@49B00000 { /* TZAPPS */
no-map;
reg = <0x0 0x49B00000 0x0 0x00600000>;
};
};
#endif
};
&tlmm {
i2c_1_pins: i2c_1_pins {
mux {
pins = "gpio42", "gpio43";
function = "blsp2_i2c";
drive-strength = <8>;
bias-pull-down;
};
};
};
&i2c_1 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "ok";
lm75@48 {
compatible = "lm75";
reg = <0x48>;
status = "okay";
};
};
&sdhc_2 {
pinctrl-0 = <&sd_pins>;
pinctrl-names = "default";
cd-gpios = <&tlmm 62 1>;
sd-ldo-gpios = <&tlmm 66 0>;
vqmmc-supply = <&ipq6018_l2_corner>;
status = "ok";
};
/* TZAPP is enabled in default memory profile only */
#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__)
&qseecom {
mem-start = <0x49B00000>;
mem-size = <0x600000>;
status = "ok";
};
#endif

View File

@@ -1,535 +0,0 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq6018.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
interrupt-parent = <&intc>;
qcom,msm-id = <0x192 0x0>, <0x193 0x0>;
aliases {
serial0 = &blsp1_uart3;
serial1 = &blsp1_uart2;
sdhc2 = &sdhc_2;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
ethernet2 = "/soc/dp3";
ethernet3 = "/soc/dp4";
ethernet4 = "/soc/dp5";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
};
};
&tlmm {
pinctrl-0 = <&sd_ldo_pins>;
pinctrl-names = "default";
uart_pins: uart_pins {
mux {
pins = "gpio44", "gpio45";
function = "blsp2_uart";
drive-strength = <8>;
bias-pull-down;
};
};
sd_ldo_pins: sd_ldo_pins {
mux {
pins = "gpio66";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-low;
};
};
spi_0_pins: spi_0_pins {
mux {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
};
spi_1_pins: spi_1_pins {
mux {
pins = "gpio69", "gpio71", "gpio72";
function = "blsp1_spi";
drive-strength = <8>;
bias-pull-down;
};
spi_cs {
pins = "gpio70";
function = "blsp1_spi";
drive-strength = <8>;
bias-disable;
};
quartz_interrupt {
pins = "gpio78";
function = "gpio";
input;
bias-disable;
};
quartz_reset {
pins = "gpio79";
function = "gpio";
output-low;
bias-disable;
};
};
qpic_pins: qpic_pins {
data_0 {
pins = "gpio15";
function = "qpic_pad0";
drive-strength = <8>;
bias-pull-down;
};
data_1 {
pins = "gpio12";
function = "qpic_pad1";
drive-strength = <8>;
bias-pull-down;
};
data_2 {
pins = "gpio13";
function = "qpic_pad2";
drive-strength = <8>;
bias-pull-down;
};
data_3 {
pins = "gpio14";
function = "qpic_pad3";
drive-strength = <8>;
bias-pull-down;
};
data_4 {
pins = "gpio5";
function = "qpic_pad4";
drive-strength = <8>;
bias-pull-down;
};
data_5 {
pins = "gpio6";
function = "qpic_pad5";
drive-strength = <8>;
bias-pull-down;
};
data_6 {
pins = "gpio7";
function = "qpic_pad6";
drive-strength = <8>;
bias-pull-down;
};
data_7 {
pins = "gpio8";
function = "qpic_pad7";
drive-strength = <8>;
bias-pull-down;
};
qpic_pad {
pins = "gpio1", "gpio3", "gpio4",
"gpio10", "gpio11", "gpio17";
function = "qpic_pad";
drive-strength = <8>;
bias-pull-down;
};
};
sd_pins: sd_pins {
mux {
pins = "gpio62";
function = "sd_card";
drive-strength = <8>;
bias-pull-up;
};
};
extcon_usb_pins: extcon_usb_pins {
mux {
pins = "gpio26";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio53";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio64";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio65";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio75";
function = "gpio";
bias-pull-up;
};
mux_3 {
pins = "gpio77";
function = "gpio";
bias-pull-up;
};
};
leds_pins: leds_pins {
led_5g {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio37";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_usb0 {
pins = "gpio50";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
hsuart_pins: hsuart_pins {
mux {
pins = "gpio71", "gpio72", "gpio69", "gpio70";
function = "blsp1_uart";
drive-strength = <8>;
bias-disable;
};
};
btcoex_pins: btcoex_pins {
mux_0 {
pins = "gpio51";
function = "pta1_1";
drive-strength = <6>;
bias-pull-down;
};
mux_2 {
pins = "gpio52";
function = "pta1_2";
drive-strength = <6>;
bias-pull-down;
};
};
};
&soc {
extcon_usb: extcon_usb {
pinctrl-0 = <&extcon_usb_pins>;
pinctrl-names = "default";
id-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>;
status = "ok";
};
mdio: mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>;
status = "ok";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <0x18>;
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
};
dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
};
dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
};
dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <24>;
phy-mode = "sgmii";
};
nss-macsec0 {
compatible = "qcom,nss-macsec";
phy_addr = <0x18>;
phy_access_mode = <0>;
mdiobus = <&mdio>;
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x20>; /* wan port bitmap */
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <0x18>;
port_mac_sel = "QGMAC_PORT";
};
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@35 {
label = "led_5g";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led@37 {
label = "led_2g";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led@50 {
label = "led_usb0";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "usb-host";
default-state = "off";
};
};
};
&blsp1_uart3 {
pinctrl-0 = <&uart_pins>;
pinctrl-names = "default";
status = "ok";
};
&spi_0 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
&blsp1_uart2 {
pinctrl-0 = <&hsuart_pins &btcoex_pins>;
pinctrl-names = "default";
dmas = <&blsp_dma 2>,
<&blsp_dma 3>;
dma-names = "tx", "rx";
status = "ok";
};
&spi_1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_1_pins>;
pinctrl-names = "default";
cs-select = <0>;
quartz-reset-gpio = <&tlmm 79 1>;
status = "disabled";
spidev1: spi@1 {
compatible = "qca,spidev";
reg = <0>;
spi-max-frequency = <24000000>;
};
};
&qpic_bam {
status = "ok";
};
&nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "ok";
};
&ssphy_0 {
status = "ok";
};
&qusb_phy_0 {
status = "ok";
};
&qusb_phy_1 {
status = "ok";
};
&usb2 {
status = "ok";
};
&usb3 {
status = "ok";
};
&nss_crypto {
status = "ok";
};
&pcie_phy {
status = "disabled";
};
&pcie0 {
#if defined(__CNSS2__)
status = "disabled";
#endif
};
&qpic_lcd {
status = "ok";
};
&qpic_lcd_panel {
status = "ok";
};

View File

@@ -1,42 +1,5 @@
KERNEL_LOADADDR := 0x41208000
define Device/FitImage
KERNEL_SUFFIX := -uImage.itb
KERNEL = kernel-bin | libdeflate-gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitImageLzma
KERNEL_SUFFIX := -uImage.itb
KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/UbiFit
KERNEL_IN_UBI := 1
IMAGES := factory.ubi sysupgrade.bin
IMAGE/factory.ubi := append-ubi
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/cig_wf186w
DEVICE_TITLE := Cigtech WF-186w
DEVICE_DTS := qcom-ipq5018-cig-wf186w
SUPPORTED_DEVICES := cig,wf186w
DEVICE_PACKAGES := ath11k-wifi-cig-wf186w ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += cig_wf186w
define Device/cig_wf186h
DEVICE_TITLE := Cigtech WF-186h
DEVICE_DTS := qcom-ipq5018-cig-wf186h
SUPPORTED_DEVICES := cig,wf186h
DEVICE_PACKAGES := ath11k-wifi-cig-wf186h ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += cig_wf186h
define Device/cybertan_eww622_a1
DEVICE_TITLE := CyberTan EWW622-A1
DEVICE_DTS := qcom-ipq5018-eww622-a1
@@ -46,33 +9,6 @@ define Device/cybertan_eww622_a1
endef
TARGET_DEVICES += cybertan_eww622_a1
define Device/cybertan_eww631_a1
DEVICE_TITLE := CyberTan EWW631-A1
DEVICE_DTS := qcom-ipq5018-eww631-a1
SUPPORTED_DEVICES := cybertan,eww631-a1
DEVICE_PACKAGES := ath11k-wifi-cybertan-eww631-a1 ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += cybertan_eww631_a1
define Device/wallys_dr5018
DEVICE_TITLE := Wallys DR5018
DEVICE_DTS := qcom-ipq5018-wallys-dr5018
SUPPORTED_DEVICES := wallys,dr5018
DEVICE_PACKAGES := ath11k-wifi-wallys-dr5018 ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += wallys_dr5018
define Device/cybertan_eww631_b1
DEVICE_TITLE := CyberTan EWW631-B1
DEVICE_DTS := qcom-ipq5018-eww631-b1
SUPPORTED_DEVICES := cybertan,eww631-b1
DEVICE_PACKAGES := ath11k-wifi-cybertan-eww631-b1 ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp02.1
endef
TARGET_DEVICES += cybertan_eww631_b1
define Device/edgecore_eap104
DEVICE_TITLE := EdgeCore EAP104
DEVICE_DTS := qcom-ipq5018-eap104
@@ -128,66 +64,3 @@ define Device/qcom_mp03_3
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += qcom_mp03_3
define Device/hfcl_ion4xi_w
DEVICE_TITLE := HFCL ION4xi_w
DEVICE_DTS := qcom-ipq5018-hfcl-ion4xi_w
SUPPORTED_DEVICES := hfcl,ion4xi_w
DEVICE_PACKAGES := ath11k-wifi-hfcl-ion4xi_w ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += hfcl_ion4xi_w
define Device/hfcl_ion4x_w
DEVICE_TITLE := HFCL ION4x_w
DEVICE_DTS := qcom-ipq5018-hfcl-ion4x_w
SUPPORTED_DEVICES := hfcl,ion4x_w
DEVICE_PACKAGES := ath11k-wifi-hfcl-ion4x_w ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += hfcl_ion4x_w
define Device/hfcl_ion4xi_HMR
DEVICE_TITLE := HFCL ION4xi_HMR
DEVICE_DTS := qcom-ipq5018-hfcl-ion4xi_HMR
SUPPORTED_DEVICES := hfcl,ion4xi_HMR
DEVICE_PACKAGES := ath11k-wifi-hfcl-ion4xi_HMR ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += hfcl_ion4xi_HMR
define Device/yuncore_fap655
DEVICE_TITLE := Yuncore FAP650
DEVICE_DTS := qcom-ipq5018-yuncore-fap655
SUPPORTED_DEVICES := yuncore,fap655
DEVICE_PACKAGES := ath11k-wifi-yuncore-fap655 ath11k-firmware-ipq50xx-map-spruce -kmod-usb-dwc3-of-simple kmod-usb-dwc3-qcom kmod-usb3
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += yuncore_fap655
define Device/xunison_d50-5g
DEVICE_TITLE := Xunison D50-5G
DEVICE_DTS := qcom-ipq5018-xunison-d50-5g
SUPPORTED_DEVICES := xunison,d50_5g
DEVICE_PACKAGES := ath11k-wifi-xunison-d50 ath11k-firmware-ipq50xx ath11k-firmware-qcn9000
DEVICE_DTS_CONFIG := config@mp03.1
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
IMAGE/nand-factory.ubi := append-ubi
endef
TARGET_DEVICES += xunison_d50-5g
define Device/xunison_d50
DEVICE_TITLE := Xunison D50
DEVICE_DTS := qcom-ipq5018-xunison-d50
SUPPORTED_DEVICES := xunison,d50
DEVICE_PACKAGES := ath11k-wifi-xunison-d50 ath11k-firmware-ipq50xx ath11k-firmware-qcn9000 ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.1
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
IMAGE/factory.ubi := append-ubi | qsdk-ipq-factory-nand
IMAGE/nand-factory.ubi := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += xunison_d50

View File

@@ -13,23 +13,14 @@ define Device/cig_wf660a
endef
TARGET_DEVICES += cig_wf660a
define Device/cig_wf188n-ca
define Device/cig_wf188n
DEVICE_TITLE := Cigtech WF-188n
DEVICE_DTS := qcom-ipq6018-cig-wf188n
DEVICE_DTS_CONFIG := config@cp03-c1
SUPPORTED_DEVICES := cig,wf188n
DEVICE_PACKAGES := ath11k-wifi-cig-wf188n-ca uboot-env
DEVICE_PACKAGES := ath11k-wifi-cig-wf188n uboot-env
endef
TARGET_DEVICES += cig_wf188n-ca
define Device/cig_wf188n-us
DEVICE_TITLE := Cigtech WF-188n
DEVICE_DTS := qcom-ipq6018-cig-wf188n
DEVICE_DTS_CONFIG := config@cp03-c1
SUPPORTED_DEVICES := cig,wf188n
DEVICE_PACKAGES := ath11k-wifi-cig-wf188n-us uboot-env
endef
TARGET_DEVICES += cig_wf188n-us
TARGET_DEVICES += cig_wf188n
define Device/hfcl_ion4xe
DEVICE_TITLE := HFCL ION4Xe
@@ -67,15 +58,6 @@ define Device/hfcl_ion4xi
endef
TARGET_DEVICES += hfcl_ion4xi
define Device/hfcl_ion4xi_wp
DEVICE_TITLE := HFCL ION4Xi_WP
DEVICE_DTS := qcom-ipq6018-hfcl-ion4xi_wp
DEVICE_DTS_CONFIG := config@cp01-c1
SUPPORTED_DEVICES := hfcl,ion4xi_wp
DEVICE_PACKAGES := ath11k-wifi-hfcl-ion4xi_wp uboot-envtools
endef
TARGET_DEVICES += hfcl_ion4xi_wp
define Device/edgecore_eap101
DEVICE_TITLE := EdgeCore EAP101
DEVICE_DTS := qcom-ipq6018-edgecore-eap101

View File

@@ -82,7 +82,7 @@ CONFIG_MIGRATION=y
CONFIG_MPILIB=y
CONFIG_MSM_SECURE_BUFFER=y
CONFIG_NEED_SG_DMA_LENGTH=y
# CONFIG_NET_SWITCHDEV is not set
CONFIG_NET_SWITCHDEV=y
CONFIG_NUM_ALT_PARTITION=16
CONFIG_OF_IOMMU=y
CONFIG_OID_REGISTRY=y

View File

@@ -4,7 +4,7 @@ CONFIG_ARCH_IPQ807x=y
CONFIG_IPQ_ADSS_807x=y
CONFIG_IPQ_APSS_807x=y
CONFIG_IPQ_GCC_807x=y
# CONFIG_NET_SWITCHDEV is not set
CONFIG_NET_SWITCHDEV=y
CONFIG_NUM_ALT_PARTITION=16
CONFIG_PINCTRL_IPQ807x=y
# CONFIG_IPC_LOGGING is not set

View File

@@ -130,17 +130,3 @@ endef
$(eval $(call KernelPackage,usb-dwc3-qcom))
define KernelPackage/bootconfig
SUBMENU:=Other modules
TITLE:=Bootconfig partition for failsafe
KCONFIG:=CONFIG_BOOTCONFIG_PARTITION
FILES:=$(LINUX_DIR)/drivers/platform/ipq/bootconfig.ko@ge4.4
AUTOLOAD:=$(call AutoLoad,56,bootconfig,1)
endef
define KernelPackage/bootconfig/description
Bootconfig partition for failsafe
endef
$(eval $(call KernelPackage,bootconfig))

View File

@@ -45,7 +45,7 @@ Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/fs/pstore/ram.
===================================================================
--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/fs/pstore/ram.c
+++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/fs/pstore/ram.c
@@ -466,15 +466,48 @@ static int ramoops_init_prz(struct devic
@@ -466,15 +466,46 @@ static int ramoops_init_prz(struct devic
return 0;
}
@@ -67,8 +67,6 @@ Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/fs/pstore/ram.
+ pdata->mem_address = res->start;
+ pdata->dump_oops = true;
+ pdata->record_size = 0x1000;
+ pdata->pmsg_size = 0x1000;
+ pdata->console_size = 0x1000;
+ return 0;
+}
+
@@ -94,7 +92,7 @@ Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/fs/pstore/ram.
/* Only a single ramoops area allowed at a time, so fail extra
* probes.
*/
@@ -603,11 +635,17 @@ static int ramoops_remove(struct platfor
@@ -603,11 +634,17 @@ static int ramoops_remove(struct platfor
return 0;
}

View File

@@ -1,14 +0,0 @@
Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/mtd/nand/nand_ids.c
===================================================================
--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/drivers/mtd/nand/nand_ids.c
+++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/mtd/nand/nand_ids.c
@@ -67,6 +67,9 @@ struct nand_flash_dev nand_flash_ids[] =
{ .id = {0xc8, 0x5a, 0x90, 0x04} },
SZ_2K, SZ_256, SZ_128K, 0, 4, 128, NAND_ECC_INFO(8, SZ_512) },
+ {"DS35M1GA SPI NAND 1G 1.8V",
+ { .id = {0xe5, 0x21} },
+ SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512) },
LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),

View File

@@ -1,16 +0,0 @@
diff -Naur linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/drivers/mtd/nand/qcom_nandc.c linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/mtd/nand/qcom_nandc.c
--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/drivers/mtd/nand/qcom_nandc.c 2022-07-26 10:43:12.428432000 +0800
+++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/mtd/nand/qcom_nandc.c 2022-07-26 13:46:35.283160000 +0800
@@ -405,6 +405,12 @@
{"MX35UF1GE4AC SPI NAND 1G 1.8V",
{ .id = {0xc2, 0x92} },
SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512), 0},
+ {"MX35UF1GE4AD SPI NAND 1G 1.8V",
+ { .id = {0xc2, 0x96} },
+ SZ_2K, SZ_128, SZ_128K, 0, 2, 128, NAND_ECC_INFO(8, SZ_512), 0},
+ {"MX35UF2GE4AD SPI NAND 2G 1.8V",
+ { .id = {0xc2, 0xa6} },
+ SZ_2K, SZ_256, SZ_128K, 0, 2, 128, NAND_ECC_INFO(8, SZ_512), 0},
{"W25N01GW SPI NAND 1.8V 1G-BIT",
{ .id = {0xef, 0xba} },
SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512), 0},

View File

@@ -1,13 +0,0 @@
Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/usb/dwc3/dwc3-qcom.c
===================================================================
--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/drivers/usb/dwc3/dwc3-qcom.c
+++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/usb/dwc3/dwc3-qcom.c
@@ -669,7 +669,7 @@ static int dwc3_qcom_probe(struct platfo
/* enable vbus override for device mode */
if (qcom->mode == USB_DR_MODE_PERIPHERAL)
dwc3_qcom_vbus_overrride_enable(qcom, true);
- else if (qcom->device_power_gpio)
+ else if (!IS_ERR(qcom->device_power_gpio))
gpiod_set_value(qcom->device_power_gpio, 0);
#if defined(CONFIG_IPQ_DWC3_QTI_EXTCON)

View File

@@ -1,14 +0,0 @@
Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/net/bridge/br_input.c
===================================================================
--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/net/bridge/br_input.c
+++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/net/bridge/br_input.c
@@ -125,7 +125,8 @@ static void br_do_proxy_arp(struct sk_bu
f = __br_fdb_get(br, n->ha, vid);
if (f && ((p->flags & BR_PROXYARP) ||
- (f->dst && (f->dst->flags & BR_PROXYARP_WIFI)))) {
+ (f->dst && (f->dst->flags & BR_PROXYARP_WIFI)))
+ && memcmp(sha, n->ha, 6)) {
arp_send(ARPOP_REPLY, ETH_P_ARP, sip, skb->dev, tip,
sha, n->ha, sha);
BR_INPUT_SKB_CB(skb)->proxyarp_replied = true;

View File

@@ -1,421 +0,0 @@
From: Amir Vadai <amir@vadai.me>
Date: Tue, 7 Feb 2017 09:56:07 +0200
Subject: [PATCH] net/act_pedit: Support using offset relative to the
conventional network headers
Extend pedit to enable the user setting offset relative to network
headers. This change would enable to work with more complex header
schemes (vs the simple IPv4 case) where setting a fixed offset relative
to the network header is not enough.
After this patch, the action has information about the exact header type
and field inside this header. This information could be used later on
for hardware offloading of pedit.
Backward compatibility was being kept:
1. Old kernel <-> new userspace
2. New kernel <-> old userspace
3. add rule using new userspace <-> dump using old userspace
4. add rule using old userspace <-> dump using new userspace
When using the extended api, new netlink attributes are being used. This
way, operation will fail in (1) and (3) - and no malformed rule be added
or dumped. Of course, new user space that doesn't need the new
functionality can use the old netlink attributes and operation will
succeed.
Since action can support both api's, (2) should work, and it is easy to
write the new user space to have (4) work.
The action is having a strict check that only header types and commands
it can handle are accepted. This way future additions will be much
easier.
Usage example:
$ tc filter add dev enp0s9 protocol ip parent ffff: \
flower \
ip_proto tcp \
dst_port 80 \
action pedit munge tcp dport set 8080 pipe \
action mirred egress redirect dev veth0
Will forward tcp port whose original dest port is 80, while modifying
the destination port to 8080.
Signed-off-by: Amir Vadai <amir@vadai.me>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
--- a/net/sched/act_pedit.c
+++ b/net/sched/act_pedit.c
@@ -22,22 +22,117 @@
#include <net/pkt_sched.h>
#include <linux/tc_act/tc_pedit.h>
#include <net/tc_act/tc_pedit.h>
+#include <uapi/linux/tc_act/tc_pedit.h>
#define PEDIT_TAB_MASK 15
static const struct nla_policy pedit_policy[TCA_PEDIT_MAX + 1] = {
[TCA_PEDIT_PARMS] = { .len = sizeof(struct tc_pedit) },
+ [TCA_PEDIT_KEYS_EX] = { .type = NLA_NESTED },
};
+static const struct nla_policy pedit_key_ex_policy[TCA_PEDIT_KEY_EX_MAX + 1] = {
+ [TCA_PEDIT_KEY_EX_HTYPE] = { .type = NLA_U16 },
+};
+
+static struct tcf_pedit_key_ex *tcf_pedit_keys_ex_parse(struct nlattr *nla,
+ u8 n)
+{
+ struct tcf_pedit_key_ex *keys_ex;
+ struct tcf_pedit_key_ex *k;
+ const struct nlattr *ka;
+ int err = -EINVAL;
+ int rem;
+
+ if (!nla || !n)
+ return NULL;
+
+ keys_ex = kcalloc(n, sizeof(*k), GFP_KERNEL);
+ if (!keys_ex)
+ return ERR_PTR(-ENOMEM);
+
+ k = keys_ex;
+
+ nla_for_each_nested(ka, nla, rem) {
+ struct nlattr *tb[TCA_PEDIT_KEY_EX_MAX + 1];
+
+ if (!n) {
+ err = -EINVAL;
+ goto err_out;
+ }
+ n--;
+
+ if (nla_type(ka) != TCA_PEDIT_KEY_EX) {
+ err = -EINVAL;
+ goto err_out;
+ }
+
+ err = nla_parse_nested(tb, TCA_PEDIT_KEY_EX_MAX, ka,
+ pedit_key_ex_policy);
+ if (err)
+ goto err_out;
+
+ if (!tb[TCA_PEDIT_KEY_EX_HTYPE]) {
+ err = -EINVAL;
+ goto err_out;
+ }
+
+ k->htype = nla_get_u16(tb[TCA_PEDIT_KEY_EX_HTYPE]);
+
+ if (k->htype > TCA_PEDIT_HDR_TYPE_MAX) {
+ err = -EINVAL;
+ goto err_out;
+ }
+
+ k++;
+ }
+
+ if (n)
+ goto err_out;
+
+ return keys_ex;
+
+err_out:
+ kfree(keys_ex);
+ return ERR_PTR(err);
+}
+
+static int tcf_pedit_key_ex_dump(struct sk_buff *skb,
+ struct tcf_pedit_key_ex *keys_ex, int n)
+{
+ struct nlattr *keys_start = nla_nest_start(skb, TCA_PEDIT_KEYS_EX);
+
+ for (; n > 0; n--) {
+ struct nlattr *key_start;
+
+ key_start = nla_nest_start(skb, TCA_PEDIT_KEY_EX);
+
+ if (nla_put_u16(skb, TCA_PEDIT_KEY_EX_HTYPE, keys_ex->htype)) {
+ nlmsg_trim(skb, keys_start);
+ return -EINVAL;
+ }
+
+ nla_nest_end(skb, key_start);
+
+ keys_ex++;
+ }
+
+ nla_nest_end(skb, keys_start);
+
+ return 0;
+}
+
static int tcf_pedit_init(struct net *net, struct nlattr *nla,
struct nlattr *est, struct tc_action *a,
int ovr, int bind)
{
struct nlattr *tb[TCA_PEDIT_MAX + 1];
+ struct nlattr *pattr;
struct tc_pedit *parm;
int ret = 0, err;
struct tcf_pedit *p;
struct tc_pedit_key *keys = NULL;
+ struct tcf_pedit_key_ex *keys_ex;
int ksize;
if (nla == NULL)
@@ -47,13 +142,21 @@ static int tcf_pedit_init(struct net *ne
if (err < 0)
return err;
- if (tb[TCA_PEDIT_PARMS] == NULL)
+ pattr = tb[TCA_PEDIT_PARMS];
+ if (!pattr)
+ pattr = tb[TCA_PEDIT_PARMS_EX];
+ if (!pattr)
return -EINVAL;
- parm = nla_data(tb[TCA_PEDIT_PARMS]);
+
+ parm = nla_data(pattr);
ksize = parm->nkeys * sizeof(struct tc_pedit_key);
- if (nla_len(tb[TCA_PEDIT_PARMS]) < sizeof(*parm) + ksize)
+ if (nla_len(pattr) < sizeof(*parm) + ksize)
return -EINVAL;
+ keys_ex = tcf_pedit_keys_ex_parse(tb[TCA_PEDIT_KEYS_EX], parm->nkeys);
+ if (IS_ERR(keys_ex))
+ return PTR_ERR(keys_ex);
+
if (!tcf_hash_check(parm->index, a, bind)) {
if (!parm->nkeys)
return -EINVAL;
@@ -65,6 +168,7 @@ static int tcf_pedit_init(struct net *ne
keys = kmalloc(ksize, GFP_KERNEL);
if (keys == NULL) {
tcf_hash_cleanup(a, est);
+ kfree(keys_ex);
return -ENOMEM;
}
ret = ACT_P_CREATED;
@@ -77,8 +181,10 @@ static int tcf_pedit_init(struct net *ne
p = to_pedit(a);
if (p->tcfp_nkeys && p->tcfp_nkeys != parm->nkeys) {
keys = kmalloc(ksize, GFP_KERNEL);
- if (keys == NULL)
+ if (!keys) {
+ kfree(keys_ex);
return -ENOMEM;
+ }
}
}
@@ -91,6 +197,10 @@ static int tcf_pedit_init(struct net *ne
p->tcfp_nkeys = parm->nkeys;
}
memcpy(p->tcfp_keys, parm->keys, ksize);
+
+ kfree(p->tcfp_keys_ex);
+ p->tcfp_keys_ex = keys_ex;
+
spin_unlock_bh(&p->tcf_lock);
if (ret == ACT_P_CREATED)
tcf_hash_insert(a);
@@ -102,6 +212,7 @@ static void tcf_pedit_cleanup(struct tc_
struct tcf_pedit *p = a->priv;
struct tc_pedit_key *keys = p->tcfp_keys;
kfree(keys);
+ kfree(p->tcfp_keys_ex);
}
static bool offset_valid(struct sk_buff *skb, int offset)
@@ -115,38 +226,84 @@ static bool offset_valid(struct sk_buff
return true;
}
+static int pedit_skb_hdr_offset(struct sk_buff *skb,
+ enum pedit_header_type htype, int *hoffset)
+{
+ int ret = -EINVAL;
+
+ switch (htype) {
+ case TCA_PEDIT_KEY_EX_HDR_TYPE_ETH:
+ if (skb_mac_header_was_set(skb)) {
+ *hoffset = skb_mac_header(skb) - skb->data;
+ ret = 0;
+ }
+ break;
+ case TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK:
+ case TCA_PEDIT_KEY_EX_HDR_TYPE_IP4:
+ case TCA_PEDIT_KEY_EX_HDR_TYPE_IP6:
+ *hoffset = skb_network_offset(skb);
+ ret = 0;
+ break;
+ case TCA_PEDIT_KEY_EX_HDR_TYPE_TCP:
+ case TCA_PEDIT_KEY_EX_HDR_TYPE_UDP:
+ if (skb_transport_header_was_set(skb)) {
+ *hoffset = skb_transport_offset(skb);
+ ret = 0;
+ }
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ };
+
+ return ret;
+}
+
static int tcf_pedit(struct sk_buff *skb, const struct tc_action *a,
struct tcf_result *res)
{
struct tcf_pedit *p = a->priv;
int i;
- unsigned int off;
if (skb_unclone(skb, GFP_ATOMIC))
return p->tcf_action;
- off = skb_network_offset(skb);
-
spin_lock(&p->tcf_lock);
p->tcf_tm.lastuse = jiffies;
if (p->tcfp_nkeys > 0) {
struct tc_pedit_key *tkey = p->tcfp_keys;
+ struct tcf_pedit_key_ex *tkey_ex = p->tcfp_keys_ex;
+ enum pedit_header_type htype = TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK;
for (i = p->tcfp_nkeys; i > 0; i--, tkey++) {
u32 *ptr, _data;
int offset = tkey->off;
+ int hoffset;
+ int rc;
+
+ if (tkey_ex) {
+ htype = tkey_ex->htype;
+ tkey_ex++;
+ }
+
+ rc = pedit_skb_hdr_offset(skb, htype, &hoffset);
+ if (rc) {
+ pr_info("tc filter pedit bad header type specified (0x%x)\n",
+ htype);
+ goto bad;
+ }
if (tkey->offmask) {
char *d, _d;
- if (!offset_valid(skb, off + tkey->at)) {
+ if (!offset_valid(skb, hoffset + tkey->at)) {
pr_info("tc filter pedit 'at' offset %d out of bounds\n",
- off + tkey->at);
+ hoffset + tkey->at);
goto bad;
}
- d = skb_header_pointer(skb, off + tkey->at, 1,
+ d = skb_header_pointer(skb, hoffset + tkey->at, 1,
&_d);
if (!d)
goto bad;
@@ -159,19 +316,19 @@ static int tcf_pedit(struct sk_buff *skb
goto bad;
}
- if (!offset_valid(skb, off + offset)) {
+ if (!offset_valid(skb, hoffset + offset)) {
pr_info("tc filter pedit offset %d out of bounds\n",
- offset);
+ hoffset + offset);
goto bad;
}
- ptr = skb_header_pointer(skb, off + offset, 4, &_data);
+ ptr = skb_header_pointer(skb, hoffset + offset, 4, &_data);
if (!ptr)
goto bad;
/* just do it, baby */
*ptr = ((*ptr & tkey->mask) ^ tkey->val);
if (ptr == &_data)
- skb_store_bits(skb, off + offset, ptr, 4);
+ skb_store_bits(skb, hoffset + offset, ptr, 4);
}
goto done;
@@ -211,8 +368,15 @@ static int tcf_pedit_dump(struct sk_buff
opt->refcnt = p->tcf_refcnt - ref;
opt->bindcnt = p->tcf_bindcnt - bind;
- if (nla_put(skb, TCA_PEDIT_PARMS, s, opt))
- goto nla_put_failure;
+ if (p->tcfp_keys_ex) {
+ tcf_pedit_key_ex_dump(skb, p->tcfp_keys_ex, p->tcfp_nkeys);
+
+ if (nla_put(skb, TCA_PEDIT_PARMS_EX, s, opt))
+ goto nla_put_failure;
+ } else {
+ if (nla_put(skb, TCA_PEDIT_PARMS, s, opt))
+ goto nla_put_failure;
+ }
t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install);
t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse);
t.expires = jiffies_to_clock_t(p->tcf_tm.expires);
--- a/include/net/tc_act/tc_pedit.h
+++ b/include/net/tc_act/tc_pedit.h
@@ -3,11 +3,16 @@
#include <net/act_api.h>
+struct tcf_pedit_key_ex {
+ enum pedit_header_type htype;
+};
+
struct tcf_pedit {
struct tcf_common common;
unsigned char tcfp_nkeys;
unsigned char tcfp_flags;
struct tc_pedit_key *tcfp_keys;
+ struct tcf_pedit_key_ex *tcfp_keys_ex;
};
#define to_pedit(a) \
container_of(a->priv, struct tcf_pedit, common)
--- a/include/uapi/linux/tc_act/tc_pedit.h
+++ b/include/uapi/linux/tc_act/tc_pedit.h
@@ -10,10 +10,34 @@ enum {
TCA_PEDIT_UNSPEC,
TCA_PEDIT_TM,
TCA_PEDIT_PARMS,
+ TCA_PEDIT_PAD,
+ TCA_PEDIT_PARMS_EX,
+ TCA_PEDIT_KEYS_EX,
+ TCA_PEDIT_KEY_EX,
__TCA_PEDIT_MAX
};
#define TCA_PEDIT_MAX (__TCA_PEDIT_MAX - 1)
+enum {
+ TCA_PEDIT_KEY_EX_HTYPE = 1,
+ __TCA_PEDIT_KEY_EX_MAX
+};
+#define TCA_PEDIT_KEY_EX_MAX (__TCA_PEDIT_KEY_EX_MAX - 1)
+
+ /* TCA_PEDIT_KEY_EX_HDR_TYPE_NETWROK is a special case for legacy users. It
+ * means no specific header type - offset is relative to the network layer
+ */
+enum pedit_header_type {
+ TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK = 0,
+ TCA_PEDIT_KEY_EX_HDR_TYPE_ETH = 1,
+ TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 = 2,
+ TCA_PEDIT_KEY_EX_HDR_TYPE_IP6 = 3,
+ TCA_PEDIT_KEY_EX_HDR_TYPE_TCP = 4,
+ TCA_PEDIT_KEY_EX_HDR_TYPE_UDP = 5,
+ __PEDIT_HDR_TYPE_MAX,
+};
+#define TCA_PEDIT_HDR_TYPE_MAX (__PEDIT_HDR_TYPE_MAX - 1)
+
struct tc_pedit_key {
__u32 mask; /* AND */
__u32 val; /*XOR */

View File

@@ -1,136 +0,0 @@
From: Amir Vadai <amir@vadai.me>
Date: Tue, 7 Feb 2017 09:56:08 +0200
Subject: [PATCH] net/act_pedit: Introduce 'add' operation
This command could be useful to inc/dec fields.
For example, to forward any TCP packet and decrease its TTL:
$ tc filter add dev enp0s9 protocol ip parent ffff: \
flower ip_proto tcp \
action pedit munge ip ttl add 0xff pipe \
action mirred egress redirect dev veth0
In the example above, adding 0xff to this u8 field is actually
decreasing it by one, since the operation is masked.
Signed-off-by: Amir Vadai <amir@vadai.me>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
--- a/include/net/tc_act/tc_pedit.h
+++ b/include/net/tc_act/tc_pedit.h
@@ -5,6 +5,7 @@
struct tcf_pedit_key_ex {
enum pedit_header_type htype;
+ enum pedit_cmd cmd;
};
struct tcf_pedit {
--- a/include/uapi/linux/tc_act/tc_pedit.h
+++ b/include/uapi/linux/tc_act/tc_pedit.h
@@ -20,6 +20,7 @@ enum {
enum {
TCA_PEDIT_KEY_EX_HTYPE = 1,
+ TCA_PEDIT_KEY_EX_CMD = 2,
__TCA_PEDIT_KEY_EX_MAX
};
#define TCA_PEDIT_KEY_EX_MAX (__TCA_PEDIT_KEY_EX_MAX - 1)
@@ -38,6 +39,13 @@ enum pedit_header_type {
};
#define TCA_PEDIT_HDR_TYPE_MAX (__PEDIT_HDR_TYPE_MAX - 1)
+enum pedit_cmd {
+ TCA_PEDIT_KEY_EX_CMD_SET = 0,
+ TCA_PEDIT_KEY_EX_CMD_ADD = 1,
+ __PEDIT_CMD_MAX,
+};
+#define TCA_PEDIT_CMD_MAX (__PEDIT_CMD_MAX - 1)
+
struct tc_pedit_key {
__u32 mask; /* AND */
__u32 val; /*XOR */
--- a/net/sched/act_pedit.c
+++ b/net/sched/act_pedit.c
@@ -33,6 +33,7 @@ static const struct nla_policy pedit_pol
static const struct nla_policy pedit_key_ex_policy[TCA_PEDIT_KEY_EX_MAX + 1] = {
[TCA_PEDIT_KEY_EX_HTYPE] = { .type = NLA_U16 },
+ [TCA_PEDIT_KEY_EX_CMD] = { .type = NLA_U16 },
};
static struct tcf_pedit_key_ex *tcf_pedit_keys_ex_parse(struct nlattr *nla,
@@ -72,14 +73,17 @@ static struct tcf_pedit_key_ex *tcf_pedi
if (err)
goto err_out;
- if (!tb[TCA_PEDIT_KEY_EX_HTYPE]) {
+ if (!tb[TCA_PEDIT_KEY_EX_HTYPE] ||
+ !tb[TCA_PEDIT_KEY_EX_CMD]) {
err = -EINVAL;
goto err_out;
}
k->htype = nla_get_u16(tb[TCA_PEDIT_KEY_EX_HTYPE]);
+ k->cmd = nla_get_u16(tb[TCA_PEDIT_KEY_EX_CMD]);
- if (k->htype > TCA_PEDIT_HDR_TYPE_MAX) {
+ if (k->htype > TCA_PEDIT_HDR_TYPE_MAX ||
+ k->cmd > TCA_PEDIT_CMD_MAX) {
err = -EINVAL;
goto err_out;
}
@@ -107,7 +111,8 @@ static int tcf_pedit_key_ex_dump(struct
key_start = nla_nest_start(skb, TCA_PEDIT_KEY_EX);
- if (nla_put_u16(skb, TCA_PEDIT_KEY_EX_HTYPE, keys_ex->htype)) {
+ if (nla_put_u16(skb, TCA_PEDIT_KEY_EX_HTYPE, keys_ex->htype) ||
+ nla_put_u16(skb, TCA_PEDIT_KEY_EX_CMD, keys_ex->cmd)) {
nlmsg_trim(skb, keys_start);
return -EINVAL;
}
@@ -276,15 +281,19 @@ static int tcf_pedit(struct sk_buff *skb
struct tc_pedit_key *tkey = p->tcfp_keys;
struct tcf_pedit_key_ex *tkey_ex = p->tcfp_keys_ex;
enum pedit_header_type htype = TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK;
+ enum pedit_cmd cmd = TCA_PEDIT_KEY_EX_CMD_SET;
for (i = p->tcfp_nkeys; i > 0; i--, tkey++) {
u32 *ptr, _data;
int offset = tkey->off;
int hoffset;
+ u32 val;
int rc;
if (tkey_ex) {
htype = tkey_ex->htype;
+ cmd = tkey_ex->cmd;
+
tkey_ex++;
}
@@ -326,7 +335,20 @@ static int tcf_pedit(struct sk_buff *skb
if (!ptr)
goto bad;
/* just do it, baby */
- *ptr = ((*ptr & tkey->mask) ^ tkey->val);
+ switch (cmd) {
+ case TCA_PEDIT_KEY_EX_CMD_SET:
+ val = tkey->val;
+ break;
+ case TCA_PEDIT_KEY_EX_CMD_ADD:
+ val = (*ptr + tkey->val) & ~tkey->mask;
+ break;
+ default:
+ pr_info("tc filter pedit bad command (%d)\n",
+ cmd);
+ goto bad;
+ }
+
+ *ptr = ((*ptr & tkey->mask) ^ val);
if (ptr == &_data)
skb_store_bits(skb, hoffset + offset, ptr, 4);
}

View File

@@ -1,67 +0,0 @@
From: Andy Ren <andy.ren@getcruise.com>
Date: Mon, 7 Nov 2022 09:42:42 -0800
Subject: [PATCH] net/core: Allow live renaming when an interface is up
Allow a network interface to be renamed when the interface
is up.
As described in the netconsole documentation [1], when netconsole is
used as a built-in, it will bring up the specified interface as soon as
possible. As a result, user space will not be able to rename the
interface since the kernel disallows renaming of interfaces that are
administratively up unless the 'IFF_LIVE_RENAME_OK' private flag was set
by the kernel.
The original solution [2] to this problem was to add a new parameter to
the netconsole configuration parameters that allows renaming of
the interface used by netconsole while it is administratively up.
However, during the discussion that followed, it became apparent that we
have no reason to keep the current restriction and instead we should
allow user space to rename interfaces regardless of their administrative
state:
1. The restriction was put in place over 20 years ago when renaming was
only possible via IOCTL and before rtnetlink started notifying user
space about such changes like it does today.
2. The 'IFF_LIVE_RENAME_OK' flag was added over 3 years ago in version
5.2 and no regressions were reported.
3. In-kernel listeners to 'NETDEV_CHANGENAME' do not seem to care about
the administrative state of interface.
Therefore, allow user space to rename running interfaces by removing the
restriction and the associated 'IFF_LIVE_RENAME_OK' flag. Help in
possible triage by emitting a message to the kernel log that an
interface was renamed while UP.
[1] https://www.kernel.org/doc/Documentation/networking/netconsole.rst
[2] https://lore.kernel.org/netdev/20221102002420.2613004-1-andy.ren@getcruise.com/
Signed-off-by: Andy Ren <andy.ren@getcruise.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: David Ahern <dsahern@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1152,8 +1152,6 @@ int dev_change_name(struct net_device *d
BUG_ON(!dev_net(dev));
net = dev_net(dev);
- if (dev->flags & IFF_UP)
- return -EBUSY;
write_seqcount_begin(&devnet_rename_seq);
@@ -1171,7 +1169,8 @@ int dev_change_name(struct net_device *d
}
if (oldname[0] && !strchr(oldname, '%'))
- netdev_info(dev, "renamed from %s\n", oldname);
+ netdev_info(dev, "renamed from %s%s\n", oldname,
+ dev->flags & IFF_UP ? " (while UP)" : "");
old_assign_type = dev->name_assign_type;
dev->name_assign_type = NET_NAME_RENAMED;

File diff suppressed because it is too large Load Diff

View File

@@ -1,20 +0,0 @@
Index: qca-nss-dp/nss_dp_main.c
===================================================================
--- qca-nss-dp.orig/nss_dp_main.c
+++ qca-nss-dp/nss_dp_main.c
@@ -32,6 +32,7 @@
#include <net/switchdev.h>
#include "nss_dp_hal.h"
+#include "fal/fal_port_ctrl.h"
/*
* Number of TX/RX queue supported is based on the number of host CPU
@@ -293,6 +294,7 @@ static int nss_dp_open(struct net_device
phy_start(dp_priv->phydev);
phy_start_aneg(dp_priv->phydev);
}
+ fal_port_power_on(0, dp_priv->macid);
return 0;
}

View File

@@ -1,13 +0,0 @@
Index: qca-ssdk/include/init/ssdk_plat.h
===================================================================
--- qca-ssdk.orig/include/init/ssdk_plat.h
+++ qca-ssdk/include/init/ssdk_plat.h
@@ -160,7 +160,7 @@
#define AR8327_NUM_PHYS 5
#define AR8327_PORT_CPU 0
#define AR8327_NUM_PORTS 7
-#define AR8327_MAX_VLANS 128
+#define AR8327_MAX_VLANS 4095
#define MII_PHYADDR_C45 (1<<30)

View File

@@ -35,8 +35,6 @@ define Package/qca-thermald-10.4/install
$(INSTALL_BIN) $(PKG_BUILD_DIR)/install/etc/thermal/ipq-thermald-8064.conf $(1)/etc/thermal
$(INSTALL_BIN) $(PKG_BUILD_DIR)/install/etc/thermal/ipq-thermald-8066.conf $(1)/etc/thermal
$(INSTALL_BIN) $(PKG_BUILD_DIR)/install/etc/thermal/ipq-thermald-8069.conf $(1)/etc/thermal
$(INSTALL_BIN) $(PKG_BUILD_DIR)/install/etc/thermal/ipq-thermald-cybertan-eww631-a1.conf $(1)/etc/thermal
$(INSTALL_BIN) $(PKG_BUILD_DIR)/install/etc/thermal/ipq-thermald-cybertan-eww631-b1.conf $(1)/etc/thermal
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/thermal.init $(1)/etc/init.d/thermal
$(INSTALL_DIR) $(1)/etc/config

View File

@@ -5,8 +5,6 @@ START=98
SERVICE_WRITE_PID=1
SERVICE_DAEMONIZE=1
board=$(board_name)
start() {
. /lib/functions.sh
@@ -16,19 +14,10 @@ start() {
config_get_bool enabled config 'Enabled' '0'
[ "$enabled" -gt 0 ] || return 1
case "$board" in
cybertan,eww631-a1)
service_start /usr/sbin/thermald -c /etc/thermal/ipq-thermald-cybertan-eww631-a1.conf
;;
cybertan,eww631-b1)
service_start /usr/sbin/thermald -c /etc/thermal/ipq-thermald-cybertan-eww631-b1.conf
;;
*)
service_start /usr/sbin/thermald
;;
esac
service_start /usr/sbin/thermald
}
stop() {
service_stop /usr/sbin/thermald
}
}

View File

@@ -18,9 +18,6 @@ endif
export CC = $(CROSS)gcc
export CFLAGS += -O2 -Wall -DIPQ_806x -c
ifeq ($(SoC),$(filter $(SoC),ipq50xx ipq50xx_64))
export CFLAGS += -DIPQ_5000
endif
export STRIP = $(CROSS)strip
export SOURCES= \
thermal.c \
@@ -66,7 +63,6 @@ install: local
cp -a -f $(ALL) $(INSTALL_ROOT)/usr/sbin/
mkdir -p $(INSTALL_ROOT)/etc/thermal
cp -a -f ipq-thermald-806?.conf $(INSTALL_ROOT)/etc/thermal/
cp -a -f ipq-thermald-cybertan-eww631-*.conf $(INSTALL_ROOT)/etc/thermal/
@echo Installed outputs from `pwd`
# Remove all generated files

View File

@@ -1,15 +0,0 @@
sampling 5000
[tsens_tz_sensor1]
sampling 5000
thresholds 105 110 115 119 120
thresholds_clr 0 100 105 110 115
actions cooling cooling cooling cooling shutdown
action_info 35 35 50 70 800000
[tsens_tz_sensor4]
sampling 5000
thresholds 105 107 112 119 120
thresholds_clr 0 100 105 110 115
actions cooling cooling cooling cooling shutdown
action_info 0 20 30 50 800000

View File

@@ -1,15 +0,0 @@
sampling 5000
[tsens_tz_sensor1]
sampling 5000
thresholds 70 80 90 105 115 120
thresholds_clr 0 75 85 100 110 113
actions cooling cooling cooling cooling cooling shutdown
action_info 0 25 45 65 90 800000
[tsens_tz_sensor4]
sampling 5000
thresholds 70 80 90 105 115 120
thresholds_clr 0 75 85 100 110 113
actions cooling cooling cooling cooling cooling shutdown
action_info 0 15 25 45 60 800000

View File

@@ -138,14 +138,7 @@ enum therm_msm_id {
THERM_IPQ_6018,
THERM_IPQ_6028,
THERM_IPQ_6000,
THERM_IPQ_6010,
THERM_IPQ_6005,
THERM_IPQ_5010,
THERM_IPQ_5018,
THERM_IPQ_5028,
THERM_IPQ_5000,
THERM_IPQ_0509,
THERM_IPQ_0518
THERM_IPQ_6010
};
enum therm_msm_id therm_get_msm_id(void);
@@ -165,9 +158,6 @@ enum {
#ifdef IPQ_806x
POWERSAVE,
NSS_FREQ,
#ifdef IPQ_5000
COOLING,
#endif
#else
REPORT,
LCD,
@@ -321,9 +311,6 @@ int cpufreq_request(int cpu, int requester, int temperature, int frequency);
int powersave_request( int enable );
int nssfreq_request( int frequency );
int powerctl_restart(int reset_max);
#ifdef IPQ_5000
int cooling_request( int requester, int temperature, int percentage );
#endif
#else
int report_action(int requester, int temperature, int level, int is_trigger);
int lcd_brightness_request(int requester, int temperature, int value);

View File

@@ -45,7 +45,7 @@
#define NUM_US_IN_MS (1000)
#define CPU_BUF_MAX (50)
#define HOTPLUG_BUF_MAX (1024)
#define SHUTDOWN_BUF_MAX (100)
enum {
MITIGATION_ENABLE = 0,
MITIGATION_DISABLE = 1
@@ -116,8 +116,6 @@ int shutdown_action(int requester, int temperature, int delay)
{
static int shutdown_requested = 0;
int ret = 0;
int fd;
char buf[SHUTDOWN_BUF_MAX] = {0};
if (requester < 0 ||
requester >= SENSOR_IDX_MAX) {
@@ -136,15 +134,6 @@ int shutdown_action(int requester, int temperature, int delay)
"with %d millisecond delay\n",
SENSOR(requester), temperature, delay);
fd = open("/dev/console", O_RDWR, 0);
if (fd >= 0)
{
snprintf(buf, SHUTDOWN_BUF_MAX, "THERMAL SHUTDOWN: "
"%s reached temperature %d with %d mSec Delay \n",
SENSOR(requester), temperature, delay);
write(fd,buf,SHUTDOWN_BUF_MAX);
close(fd);
}
usleep(delay * NUM_US_IN_MS);
/* commit buffers to disk and shutdown */
@@ -414,7 +403,7 @@ int cpufreq_init()
return -1;
}
info("Number of cpus :%d\n", num_cpus);
memset(online, 0, MAX_CPUS * sizeof(int));
memset(online, 0, MAX_CPUS);
for (cpu = 0; cpu < num_cpus; cpu++) {
snprintf(finfo_buf, MAX_PATH, CPU_SYSFS(FMAX_INFO_NODE), cpu);
@@ -1395,99 +1384,6 @@ int nssfreq_request(int frequency)
pthread_mutex_unlock(&nssfreq_set_mtx);
return ret;
}
#ifdef IPQ_5000
/*===========================================================================
FUNCTION cooling_request
Action function to request wlan throttling action
ARGUMENTS
percentage => duty cycle of tx queues suspending
RETURN VALUE
0 on success, -1 on failure.
===========================================================================*/
static int cooling_req[2];
#define COOLING_24G_MITIGATION_SYSFS "/sys/class/thermal/cooling_device0/cur_state"
#define COOLING_5G_MITIGATION_SYSFS "/sys/class/thermal/cooling_device1/cur_state"
#define MAX_COOLING_MITIGATION_PERCENTAGE (90)
static pthread_mutex_t cooling_mtx = PTHREAD_MUTEX_INITIALIZER;
int cooling_request(int requester, int temperature, int percentage )
{
int ret = -1;
char buf[UINT_BUF_MAX] = {0};
static int current_24g_percentage, current_5g_percentage;
char * end_ptr;
if ((NULL == COOLING_24G_MITIGATION_SYSFS) || (NULL == COOLING_5G_MITIGATION_SYSFS)) {
msg("%s: Unsupported action on current target", __func__);
return -1;
}
temperature = RCONV(temperature);
if (percentage < 0)
percentage = 0;
if (percentage > MAX_COOLING_MITIGATION_PERCENTAGE)
percentage = MAX_COOLING_MITIGATION_PERCENTAGE;
pthread_mutex_lock(&cooling_mtx);
if (requester == 1) {
/* get current cooling percentage */
if (read_line_from_file(COOLING_24G_MITIGATION_SYSFS, buf, UINT_BUF_MAX) > 0) {
current_24g_percentage = strtol(buf, &end_ptr, 10);
dbgmsg("current 2g cooling percentage(%d)\n", current_24g_percentage);
}
/* Aggregate cooling throttling percentage for 24g */
cooling_req[requester] = percentage;
if (percentage != current_24g_percentage) {
snprintf(buf, UINT_BUF_MAX, "%d", percentage);
if (write_to_file(COOLING_24G_MITIGATION_SYSFS, buf, strlen(buf)) > 0) {
info("ACTION: COOLING - "
"Setting 24G COOLING mitigation to %d\n", percentage);
ret = 0;
} else {
msg("Unable to set COOLING mitigation to %d\n", percentage);
}
} else {
dbgmsg("COOLING mitigation already at %d percentage\n", percentage);
ret = 0;
}
}
else if (requester == 4) {
/* get current 5g cooling percentage */
if (read_line_from_file(COOLING_5G_MITIGATION_SYSFS, buf, UINT_BUF_MAX) > 0) {
current_5g_percentage = strtol(buf, &end_ptr, 10);
dbgmsg("current 5g cooling percentage(%d)\n", current_5g_percentage);
}
/* Aggregate cooling throttling percentage for 5g */
cooling_req[requester] = percentage;
if (percentage != current_5g_percentage) {
snprintf(buf, UINT_BUF_MAX, "%d", percentage);
if (write_to_file(COOLING_5G_MITIGATION_SYSFS, buf, strlen(buf)) > 0) {
info("ACTION: COOLING - "
"Setting 5G COOLING mitigation to %d\n", percentage);
ret = 0;
} else {
msg("Unable to set COOLING mitigation to %d\n", percentage);
}
} else {
dbgmsg("COOLING mitigation already at %d percentage\n", percentage);
ret = 0;
}
}
pthread_mutex_unlock(&cooling_mtx);
return ret;
}
#endif
/*===========================================================================
FUNCTION set_mitigation_level

View File

@@ -43,9 +43,6 @@ static char *action_names[] = {
#ifdef IPQ_806x
"powersave",
"nss",
#ifdef IPQ_5000
"cooling"
#endif
#else
"report",
"lcd",
@@ -340,41 +337,6 @@ def_sensor_setting_t def_cp_setting = {
.sensors = def_sensor_cp
};
/* TODO: Fix desc, id, lvl_trig, lvl_clr */
sensor_setting_t def_sensor_mp[] = {
{
.desc = "tsens_tz_sensor4",
.id = 4,
.disabled = 0, /* Sensor enabled */
.sampling_period_us = 1000,
.num_thresholds = 1, /* No. of threshold levels */
.t = {
{
.lvl_trig = 120,
.num_actions = 1,
.actions = {
{
.action = SHUTDOWN,
.info = 1000
}
}
}
},
/* Internal variables initialized with threshold count */
._n_thresholds = 1,
._n_to_clear = 1,
._n_actions = 1,
._n_action_info = 1
},
};
def_sensor_setting_t def_mp_setting = {
.sensor_count = 1,
.sensors = def_sensor_mp
};
/* IPQ806x */
sensor_setting_t def_ipq8064[] = {
{
@@ -676,19 +638,9 @@ void update_def_sensor_settings(thermal_setting_t *settings)
case THERM_IPQ_6028:
case THERM_IPQ_6000:
case THERM_IPQ_6010:
case THERM_IPQ_6005:
msg("==== IPQ60xx ====\n");
def_sensor_setting = &def_cp_setting;
break;
case THERM_IPQ_5010:
case THERM_IPQ_5018:
case THERM_IPQ_5028:
case THERM_IPQ_5000:
case THERM_IPQ_0509:
case THERM_IPQ_0518:
msg("==== IPQ50xx ====\n");
def_sensor_setting = &def_mp_setting;
break;
default:
msg("==== DEFAULT ===\n");
def_sensor_setting = &def_hk_setting;
@@ -899,13 +851,6 @@ int parse_config(thermal_setting_t *settings, int fd)
|| settings->soc_id == THERM_IPQ_6000
|| settings->soc_id == THERM_IPQ_6010)
i = TSENS_TZ_SENSOR4;
else if ( settings->soc_id == THERM_IPQ_5010
|| settings->soc_id == THERM_IPQ_5018
|| settings->soc_id == THERM_IPQ_5028
|| settings->soc_id == THERM_IPQ_5000
|| settings->soc_id == THERM_IPQ_0509
|| settings->soc_id == THERM_IPQ_0518)
i = TSENS_TZ_SENSOR1;
else
i = TSENS_TZ_SENSOR0;

View File

@@ -73,11 +73,6 @@ static void clear_all_alarms(sensor_setting_t *sensor, int sensor_temp)
case NSS_FREQ:
nssfreq_request(-1);
break;
#ifdef IPQ_5000
case COOLING:
cooling_request(sensor->id, sensor_temp, 0);
break;
#endif
#endif
}
}
@@ -191,11 +186,6 @@ void *sensor_monitor(void *vsensor)
case NSS_FREQ:
nssfreq_request(sensor->t[i].actions[j].info);
break;
#ifdef IPQ_5000
case COOLING:
cooling_request(sensor->id, sensor_temp, sensor->t[i].actions[j].info);
break;
#endif
#else
case REPORT:
if (alarm_raised)

View File

@@ -93,14 +93,6 @@ static therm_msm_soc_type msm_soc_table[] = {
{THERM_IPQ_6028, 403},
{THERM_IPQ_6000, 421},
{THERM_IPQ_6010, 422},
{THERM_IPQ_6005, 453},
/* MP variants */
{THERM_IPQ_5010, 446},
{THERM_IPQ_5018, 447},
{THERM_IPQ_5028, 448},
{THERM_IPQ_5000, 503},
{THERM_IPQ_0509, 504},
{THERM_IPQ_0518, 505},
};
int read_id_from_binary_file(char *path, size_t size) {

View File

@@ -1,55 +0,0 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=aq-fw-download
PKG_BRANCH:=master
PKG_VERSION:=1.0
PKG_RELEASE:=1
PKG_BUILD_DIR:=$(BUILD_DIR)/aq-fw-download
include $(INCLUDE_DIR)/package.mk
define AquantiaUtil
define Package/aq-fw-download
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:=@TARGET_ipq806x||TARGET_ipq||TARGET_ipq40xx||TARGET_ipq807x_32||TARGET_ipq807x
TITLE:=Aquantia FW downloader utitlity
endef
define Package/aq-fw-download/description
Aquantia FW downloader utitlity
endef
TARGET_CPPFLAGS := \
-D_GNU_SOURCE \
-I$(LINUX_SRC_DIR)/include \
-I$(LINUX_SRC_DIR)/arch/$(LINUX_KARCH)/include \
-I$(PKG_BUILD_DIR) \
$(TARGET_CPPFLAGS)
define Build/Prepare
mkdir -p $(PKG_BUILD_DIR)
$(CP) ./src/* $(PKG_BUILD_DIR)/
endef
define Build/Compile
CFLAGS="$(TARGET_CPPFLAGS) $(TARGET_CFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS)" \
$(MAKE) -C $(PKG_BUILD_DIR) \
$(TARGET_CONFIGURE_OPTS)
endef
define Package/aq-fw-download/install
$(INSTALL_DIR) $$(1)/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/aq-fw-download $$(1)/sbin/aq-fw-download
endef
$$(eval $$(call BuildPackage,aq-fw-download))
endef
#Build/Compile=true
$(eval $(call AquantiaUtil))

View File

@@ -1,14 +0,0 @@
ifndef CFLAGS
CFLAGS = -O2 -g
endif
INCLUDES=-Iinclude -Iinclude/registerMap \
-Iinclude/registerMap/APPIA \
-Iinclude/registerMap/HHD
all: aq-fw-download
%.o: %.c
$(CC) $(INCLUDES) $(CFLAGS) -c -o $@ $^
aq-fw-download: mdioBootLoadCLD.o src/AQ_PhyInterface.o src/AQ_API.o
$(CC) $(LDFLAGS) -o $@ $^ $(LIBS)

View File

@@ -1,246 +0,0 @@
/*
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*! \file
This file contains the AQ_API function and datatype declarations. */
#ifndef AQ_API_TOKEN
#define AQ_API_TOKEN
#include <stdint.h>
#include "AQ_User.h"
#include "AQ_ReturnCodes.h"
/*******************************************************************
General
*******************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/*! This typedef defines the bool datatype which takes the values
true and false.*/
typedef enum {False = 0, True = 1} AQ_boolean;
/*@}*/
/*******************************************************************
Device Identity
*******************************************************************/
/*! \defgroup deviceIdentity Device Identity
All AQ_API functions accept a parameter identifying the target PHY that
should be acted upon. */
/*@{*/
/*! This enumeration is used to describe the different types of
Aquantia PHY.*/
typedef enum
{
/*! 1/2/4-port package, 40nm architechture.*/
AQ_DEVICE_APPIA,
/*! 1/2/4-port package, 28nm architechture.*/
AQ_DEVICE_HHD
} AQ_API_Device;
/*! This structure is used to specify a particular Aquantia PHY port
within the system.*/
typedef struct
{
/*! The type of Aquantia PHY*/
AQ_API_Device device;
/*! Uniquely identifies the port within the system. AQ_Port must be
defined to whatever data type is suitable for the platform.
AQ_API functions will never do anything with PHY_ID other than
pass it down to the platform's PHY register read/write
functions.*/
AQ_Port PHY_ID;
} AQ_API_Port;
/*@}*/
/*! This function boot-loads the instruction and data memory (IRAM and
DRAM) of a set of Aquantia PHYs from a .cld format image file (the
same image file used to burn the FLASH). During boot-load of each
Aquantia PHY, the processor is halted, and after programming is
complete the processor is released. Note that calling this
function leaves the daisy-chain disabled to prevent RAM over-
write. To exit MDIO boot-load mode, use the function
AQ_API_EnableDaisyChain.
Unlike most of the other functions in this API, this function can
operate on a group of PHYs simultaneously. This is referred to as
gang-loading. To facilitate this, this function takes as
parameters 3 parallel arrays: PHY_IDs, provisioningAddresses, and
resultCodes. The length of these arrays must be identical, and is
specified by the num_PHY_IDs parameter.
In order to check the integrity of the boot-load operation, a
CRC-16 value is calculated over the IRAM and DRAM. After the image
has been loaded, this value is directly compared against each
PHY's Mailbox CRC-16 in 1E.0201.
The value of register 1E.C441 must be the same for all the boot-
loaded PHYs. This will be checked before the boot-load is
performed, and if a non-uniform value is read from any of the
PHYs, the function will fail before any writes are performed.
A separate result code is returned for each of the boot-loaded
PHYs, in the OUT parameter, resultCodes.
Individual Port Return codes:
AQ_RET_BOOTLOAD_PROVADDR_OOR: The specified provisioning address
was outside of the permitted range.
AQ_RET_BOOTLOAD_NONUNIFORM_REGVALS: The values of the register(s)
that must be uniform across the ports being bootloaded were not
uniform.
AQ_RET_BOOTLOAD_CRC_MISMATCH: The image was completely loaded into
memory, but the after the port exited bootload the running
checksum that was read from the uP memory mailbox was not the
expected value. This indicates that the memory has potentially
been corrupted, and the PHY should be reset before trying the
bootload again.
Overall Return codes (the return value from the function call):
AQ_RET_OK: all ports were successfully bootloaded.
AQ_RET_ERROR: One or more ports were not successfully bootloaded.
*/
AQ_Retcode AQ_API_WriteBootLoadImage
(
/*! An array identifying the target PHY ports.*/
AQ_API_Port** ports,
/*! The length of the arrays ports, provisioningAddresses, and
resultCodes. These are parallel arrays, and must all be of the
same length.*/
unsigned int numPorts,
/*! The provisioning addresses of each of the PHYs specified in
ports. This can range from 0 through 47, and is also known as
the daisy-chain address or the hop-count. If the PHYs are
connected to a FLASH using the daisy-chain, this is the distance
from the PHY to the FLASH, and is used to identify customized
provisioning for each PHY from the provisioning data within the
image. Otherwise, it is an arbitrary number. The length of this
array must match the length of ports.*/
unsigned int* provisioningAddresses,
/*! OUT: The result code indicating success or failure of boot-
loading each of the PHYs specified in ports.*/
AQ_Retcode* resultCodes,
/*! A pointer to the size of the image (in bytes) that is being
loaded into the Aquantia PHY.*/
uint32_t* imageSizePointer,
/*! The image being loaded into the Aquantia PHY. This is the same
regardless of whether the target is internal RAM or FLASH.*/
uint8_t* image,
/*! The 5-bit address to be used during the gang-loading operation.
During the boot-loading process, each of the PHYs specified in
ports will be changed such that they are addressed on the MDIO
bus at gangloadAddress. This allows all the PHYs to be loaded
simultaneously. Before returning, each PHY will be moved back to
its original MDIO address. If ports contains only a single
element, callers will probably want to use the PHY's original
MDIO address for this parameter.*/
uint8_t gangload_MDIO_address,
/*! The address of the PHYs while in gangload mode. This is
ultimately some combination of the system address and the
gangload MDIO address, specified by gangload_MDIO_address. For
most platforms, gangload_MDIO_address and gangload_PHY_ID should
have the same value.*/
AQ_API_Port* gangloadPort
);
/*! This function boot-loads the instruction and data memory (IRAM and
DRAM) of a set of Aquantia PHYs from a .cld format image file (the
same image file used to burn the FLASH), as well as a separately
provided provisioning table image file.The provisioning table
image allows additional provisioning to be provided, beyond what
is built in to the .cld image. If provTableSizePointer or
provTableImage are NULL, this function behaves like
AQ_API_WriteBootLoadImage.
Aside from the additional provisioing table, this function behaves
exactly the same as AQ_API_WriteBootLoadImage. For additional
documentation and information on return codes, refer to
AQ_API_WriteBootLoadImage.
Individual Port Return codes (same as AQ_API_WriteBootLoadImage,
plus):
AQ_RET_BOOTLOAD_PROVTABLE_TOO_LARGE: The supplied provisioning
table image does not fit within the alloted space.*/
AQ_Retcode AQ_API_WriteBootLoadImageWithProvTable
(
/*! An array identifying the target PHY ports.*/
AQ_API_Port** ports,
/*! The length of the arrays ports, provisioningAddresses, and
resultCodes. These are parallel arrays, and must all be of the
same length.*/
unsigned int numPorts,
/*! The provisioning addresses of each of the PHYs specified in
ports. This can range from 0 through 47, and is also known as
the daisy-chain address or the hop-count. If the PHYs are
connected to a FLASH using the daisy-chain, this is the distance
from the PHY to the FLASH, and is used to identify customized
provisioning for each PHY from the provisioning data within the
image. Otherwise, it is an arbitrary number. The length of this
array must match the length of ports.*/
unsigned int* provisioningAddresses,
/*! OUT: The result code indicating success or failure of boot-
loading each of the PHYs specified in ports.*/
AQ_Retcode* resultCodes,
/*! A pointer to the size of the image (in bytes) that is being
loaded into the Aquantia PHY.*/
uint32_t* imageSizePointer,
/*! The image being loaded into the Aquantia PHY. This is the same
regardless of whether the target is internal RAM or FLASH.*/
uint8_t* image,
/*! The 5-bit address to be used during the gang-loading operation.
During the boot-loading process, each of the PHYs specified in
ports will be changed such that they are addressed on the MDIO
bus at gangloadAddress. This allows all the PHYs to be loaded
simultaneously. Before returning, each PHY will be moved back to
its original MDIO address. If ports contains only a single
element, callers will probably want to use the PHY's original
MDIO address for this parameter.*/
uint8_t gangload_MDIO_address,
/*! The address of the PHYs while in gangload mode. This is
ultimately some combination of the system address and the
gangload MDIO address, specified by gangload_MDIO_address. For
most platforms, gangload_MDIO_address and gangload_PHY_ID should
have the same value.*/
AQ_API_Port* gangloadPort,
/*! A pointer to the size of the provTableImage (in bytes) that is
being loaded into the Aquantia PHY.*/
uint32_t* provTableSizePointer,
/*! The additional provisioning table image being loaded into the
Aquantia PHY.*/
uint8_t* provTableImage
);
/*! Calling this function disables boot-loading and enables the daisy-
chain. This would typically be called after using MDIO boot-
loading on a daisy-chain enabled PHY. Re-enabling the daisy-chain
after performing an MDIO bootload will cause the PHY to reboot
from FLASH.*/
AQ_Retcode AQ_API_EnableDaisyChain
(
/*! The target PHY port.*/
AQ_API_Port* port
);
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,171 +0,0 @@
/* AQ_PhyInterface.h */
/***********************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* Declares the base PHY register read and write functions that are
* called by the API functions. The platform integrator must provide
* the implementation of these routines.
*
***********************************************************************/
/*! \file
* Declares the base PHY register read and write functions that are
* called by the API functions. The platform integrator must provide
* the implementation of these routines. */
#ifndef AQ_PHY_INTERFACE_TOKEN
#define AQ_PHY_INTERFACE_TOKEN
#include "AQ_API.h"
#include "AQ_User.h"
#ifdef __cplusplus
extern "C" {
#endif
/*******************************************************************
MDIO Access Functions
*******************************************************************/
/*! \defgroup mdioAccessFunctions MDIO Access Functions
The MDIO access functions are required by the API to access the register space
of each Aquantia PHY deployed in a system. The body of these functions needs to
be written by the system designer, as the method of accessing the PHY will
be unique to the target system. They are designed to be generic read and
write access functions, as the MDIO addressing scheme relies on each
MMD to maintain a 16 bit address pointer that determines the register where
the next read or write is coming from. Consequently, various levels of
optimization of the MDIO interface are possible: from re-writing the MMD
address pointer on every transaction, to storing shadow copies of the MMD
address pointers and only updating the MMD address pointer as necessary.
Thus these functions leave the MDIO optimization to the system engineer.
*/
/*@{*/
/*! Provides generic synchronous PHY register write functionality. It is the
* responsibility of the system designer to provide the specific MDIO address
* pointer updates, etc. in order to accomplish this write operation.
* It will be assumed that the write has been completed by the time this
* function returns.*/
void AQ_API_MDIO_Write
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being written. */
unsigned int address,
/*! The 16-bits of data to write to the specified PHY register. */
unsigned int data
);
/*! Provides generic synchronous PHY register read functionality. It is the
* responsibility of the system designer to provide the specific MDIO address
* pointer updates, etc. in order to accomplish this read operation.*/
unsigned int AQ_API_MDIO_Read
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being read. */
unsigned int address
);
#ifdef AQ_PHY_SUPPORTS_BLOCK_READ_WRITE
/*! Provides generic asynchronous/buffered PHY register write functionality.
* It is the responsibility of the system designer to provide the specific
* MDIO address pointer updates, etc. in order to accomplish this write
* operation. The write need not necessarily have been completed by the time
* this function returns. All register reads and writes to a particular PHY_ID
* that are requested by calling AQ_API_MDIO_BlockWrite or AQ_API_MDIO_BlockRead
* MUST be performed in the order that the calls are made. */
void AQ_API_MDIO_BlockWrite
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being written. */
unsigned int address,
/*! The 16-bits of data to write to the specified PHY register. */
unsigned int data
);
/*! Provides generic asynchronous/buffered PHY register read functionality.
* It is the responsibility of the system designer to provide the specific
* MDIO address pointer updates, etc. in order to accomplish this read
* operation. All register reads and writes to a particular PHY_ID that
* are requested by calling AQ_API_MDIO_BlockWrite or AQ_API_MDIO_BlockRead
* MUST be performed in the order that the calls are made. The register value
* may subsequently be fetched by calling AQ_API_MDIO_BlockOperationExecute.*/
void AQ_API_MDIO_BlockRead
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID,
/*! The address of the MMD within the target PHY. */
unsigned int MMD,
/*! The 16-bit address of the PHY register being read. */
unsigned int address
);
/* Retrieve the results of all PHY register reads to PHY_ID previously
* requested via calls to AQ_API_MDIO_BlockRead. The read and write
* operations previously performed by calls to AQ_API_MDIO_BlockRead and
* AQ_API_MDIO_BlockRead must have all been completed by the time this
* function returns, in the order that the calls were performed. The
* return value is an array representing the fetched results of all
* pending calls to AQ_API_MDIO_BlockRead, in the order that the calls
* were performed. Callers should track the number of pending block
* reads to determine the size of the returned array. */
unsigned int * AQ_API_MDIO_BlockOperationExecute
(
/*! Uniquely identifies the port within the system. AQ_Port must be
* defined to a whatever data type is suitable for the platform.*/
AQ_Port PHY_ID
);
/* Returns the maximum number of asynchronous/buffered PHY register
* read/write operations. Callers will call AQ_API_MDIO_BlockOperationExecute
* before issuing additional calls to AQ_API_MDIO_BlockWrite or
* AQ_API_MDIO_BlockRead to avoid a buffer overflow. */
unsigned int AQ_API_MDIO_MaxBlockOperations
(
);
#endif
/*@}*/
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,71 +0,0 @@
/*AQ_PlatformRoutines.h*/
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* Declares the platform interface functions that will be called by AQ_API
* functions. The platform integrator must provide the implementation of
* these functions.
*
************************************************************************************/
/*! \file
* Declares the platform interface functions that will be called by AQ_API
* functions. The platform integrator must provide the implementation of
* these functions. */
#ifndef AQ_PHY_PLATFORMROUTINES_TOKEN
#define AQ_PHY_PLATFORMROUTINES_TOKEN
#include <stdint.h>
#include "AQ_API.h"
#include "AQ_User.h"
#include "AQ_ReturnCodes.h"
#ifdef __cplusplus
extern "C" {
#endif
/*******************************************************************
Time Delay
*******************************************************************/
/*! \defgroup delay Time Delay
@{
*/
/*! Returns after at least milliseconds have elapsed. This must be implemented
* in a platform-approriate way. AQ_API functions will call this function to
* block for the specified period of time. If necessary, PHY register reads
* may be performed on port to busy-wait. */
void AQ_API_Wait
(
uint32_t milliseconds, /*!< The delay in milliseconds */
AQ_API_Port* port /*!< The PHY to use if delay reads are necessary*/
);
/*@}*/
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,323 +0,0 @@
/* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*! \file
This file contains macros for accessing the AQ PHYs' registers
using the device-specific register map data structures and definitions.
*/
#ifndef AQ_REG_MACRO_TOKEN
#define AQ_REG_MACRO_TOKEN
#include "AQ_PhyInterface.h"
#define AQ_API_ReadRegister(id,reg,wd) AQ_API_ReadRegister_DeviceRestricted(APPIA_HHD,id,reg,wd)
#define AQ_API_ReadRegister_DeviceRestricted(devices,id,reg,wd) AQ_API_ReadRegister_Devs_ ## devices(id,reg,wd)
#define AQ_API_ReadRegister_Devs_APPIA(id,reg,wd) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Read (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
(0))
#define AQ_API_ReadRegister_Devs_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Read (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
(0))
#define AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Read (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Read (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
(0)))
#define AQ_API_ReadRegister_Devs_HHD_APPIA(id,reg,wd) AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,wd)
#define AQ_API_WriteRegister(id,reg,wd,value) AQ_API_WriteRegister_DeviceRestricted(APPIA_HHD,id,reg,wd,value)
#define AQ_API_WriteRegister_DeviceRestricted(devices,id,reg,wd,value) AQ_API_WriteRegister_Devs_ ## devices(id,reg,wd,value)
#define AQ_API_WriteRegister_Devs_APPIA(id,reg,wd,value) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Write (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_WriteRegister_Devs_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Write (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_Write (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_Write (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0)))
#define AQ_API_WriteRegister_Devs_HHD_APPIA(id,reg,wd,value) AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,wd,value)
#ifdef AQ_PHY_SUPPORTS_BLOCK_READ_WRITE
#define AQ_API_BlockReadRegister(id,reg,wd) AQ_API_BlockReadRegister_DeviceRestricted(APPIA_HHD,id,reg,wd)
#define AQ_API_BlockReadRegister_DeviceRestricted(devices,id,reg,wd) AQ_API_BlockReadRegister_Devs_ ## devices(id,reg,wd)
#define AQ_API_BlockReadRegister_Devs_APPIA(id,reg,wd) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockRead (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
((void)0))
#define AQ_API_BlockReadRegister_Devs_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockRead (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
((void)0))
#define AQ_API_BlockReadRegister_Devs_APPIA_HHD(id,reg,wd) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockRead (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd)) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockRead (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd)) : \
((void)0)))
#define AQ_API_BlockReadRegister_Devs_HHD_APPIA(id,reg,wd) AQ_API_BlockReadRegister_Devs_APPIA_HHD(id,reg,wd)
#define AQ_API_BlockWriteRegister(id,reg,wd,value) AQ_API_BlockWriteRegister_DeviceRestricted(APPIA_HHD,id,reg,wd,value)
#define AQ_API_BlockWriteRegister_DeviceRestricted(devices,id,reg,wd,value) AQ_API_BlockWriteRegister_Devs_ ## devices(id,reg,wd,value)
#define AQ_API_BlockWriteRegister_Devs_APPIA(id,reg,wd,value) \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockWrite (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_BlockWriteRegister_Devs_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockWrite (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((void)0))
#define AQ_API_BlockWriteRegister_Devs_APPIA_HHD(id,reg,wd,value) \
((port->device == AQ_DEVICE_HHD) ? AQ_API_MDIO_BlockWrite (id,reg ## _HHD_mmdAddress,(reg ## _HHD_baseRegisterAddress + wd),value) : \
((port->device == AQ_DEVICE_APPIA) ? AQ_API_MDIO_BlockWrite (id,reg ## _APPIA_mmdAddress,(reg ## _APPIA_baseRegisterAddress + wd),value) : \
((void)0)))
#define AQ_API_BlockWriteRegister_Devs_HHD_APPIA(id,reg,wd,value) AQ_API_BlockWriteRegister_Devs_APPIA_HHD(id,reg,wd,value)
#endif
#define AQ_API_Variable(reg) AQ_API_Variable_DeviceRestricted(APPIA_HHD,reg)
#define AQ_API_Variable_DeviceRestricted(devices,reg) AQ_API_Variable_Devs_ ## devices(reg)
#define AQ_API_Variable_Devs_APPIA(reg) uint8_t _local ## reg ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* _local ## reg ## _APPIA = (reg ## _APPIA*) _local ## reg ## _space; \
#define AQ_API_Variable_Devs_HHD(reg) uint8_t _local ## reg ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _HHD* _local ## reg ## _HHD = (reg ## _HHD*) _local ## reg ## _space; \
#define AQ_API_Variable_Devs_APPIA_HHD(reg) uint8_t _local ## reg ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* _local ## reg ## _APPIA = (reg ## _APPIA*) _local ## reg ## _space; \
reg ## _HHD* _local ## reg ## _HHD = (reg ## _HHD*) _local ## reg ## _space; \
#define AQ_API_Variable_Devs_HHD_APPIA(reg) AQ_API_Variable_Devs_APPIA_HHD(reg)
#define AQ_API_DeclareLocalStruct(reg,localvar) AQ_API_DeclareLocalStruct_DeviceRestricted(APPIA_HHD,reg,localvar)
#define AQ_API_DeclareLocalStruct_DeviceRestricted(devices,reg,localvar) AQ_API_DeclareLocalStruct_Devs_ ## devices(reg,localvar)
#define AQ_API_DeclareLocalStruct_Devs_APPIA(reg,localvar) uint8_t localvar ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* localvar ## _APPIA = (reg ## _APPIA*) localvar ## _space; \
#define AQ_API_DeclareLocalStruct_Devs_HHD(reg,localvar) uint8_t localvar ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _HHD* localvar ## _HHD = (reg ## _HHD*) localvar ## _space; \
#define AQ_API_DeclareLocalStruct_Devs_APPIA_HHD(reg,localvar) uint8_t localvar ## _space[ sizeof(reg ## _BiggestVersion) ];\
reg ## _APPIA* localvar ## _APPIA = (reg ## _APPIA*) localvar ## _space; \
reg ## _HHD* localvar ## _HHD = (reg ## _HHD*) localvar ## _space; \
#define AQ_API_DeclareLocalStruct_Devs_HHD_APPIA(reg,localvar) AQ_API_DeclareLocalStruct_Devs_APPIA_HHD(reg,localvar)
#define AQ_API_Set(id,reg,field,value) AQ_API_Set_DeviceRestricted(APPIA_HHD,id,reg,field,value)
#define AQ_API_Set_DeviceRestricted(devices,id,reg,field,value) AQ_API_Set_Devs_ ## devices(id,reg,field,value)
#define AQ_API_Set_Devs_APPIA(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA(id,reg,reg ## _APPIA_ ## field); \
if (_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field != value) \
{ \
_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field = value; \
AQ_API_WriteRegister_Devs_APPIA(id,reg,reg ## _APPIA_ ## field,_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field); \
} \
break; \
default: break; \
} \
}
#define AQ_API_Set_Devs_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_HHD(id,reg,reg ## _HHD_ ## field); \
if (_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field != value) \
{ \
_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field = value; \
AQ_API_WriteRegister_Devs_HHD(id,reg,reg ## _HHD_ ## field,_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field); \
} \
break; \
default: break; \
} \
}
#define AQ_API_Set_Devs_APPIA_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _APPIA_ ## field); \
if (_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field != value) \
{ \
_local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field = value; \
AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,reg ## _APPIA_ ## field,_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field); \
} \
break; \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _HHD_ ## field); \
if (_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field != value) \
{ \
_local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field = value; \
AQ_API_WriteRegister_Devs_APPIA_HHD(id,reg,reg ## _HHD_ ## field,_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field); \
} \
break; \
default: break; \
} \
}
#define AQ_API_Set_Devs_HHD_APPIA(id,reg,field,value) AQ_API_Set_Devs_APPIA_HHD(id,reg,field,value)
#define AQ_API_Get(id,reg,field,value) AQ_API_Get_DeviceRestricted(APPIA_HHD,id,reg,field,value)
#define AQ_API_Get_DeviceRestricted(devices,id,reg,field,value) AQ_API_Get_Devs_ ## devices(id,reg,field,value)
#define AQ_API_Get_Devs_APPIA(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA(id,reg,reg ## _APPIA_ ## field); \
value = _local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field; \
break; \
default: value = 0; break; \
} \
}
#define AQ_API_Get_Devs_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_HHD(id,reg,reg ## _HHD_ ## field); \
value = _local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field; \
break; \
default: value = 0; break; \
} \
}
#define AQ_API_Get_Devs_APPIA_HHD(id,reg,field,value) { \
switch (port->device) { \
case AQ_DEVICE_APPIA: \
_local ## reg ## _APPIA->word_ ## reg ## _APPIA_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _APPIA_ ## field); \
value = _local ## reg ## _APPIA->bits_ ## reg ## _APPIA_ ## field.field; \
break; \
case AQ_DEVICE_HHD: \
_local ## reg ## _HHD->word_ ## reg ## _HHD_ ## field = AQ_API_ReadRegister_Devs_APPIA_HHD(id,reg,reg ## _HHD_ ## field); \
value = _local ## reg ## _HHD->bits_ ## reg ## _HHD_ ## field.field; \
break; \
default: value = 0; break; \
} \
}
#define AQ_API_Get_Devs_HHD_APPIA(id,reg,field,value) AQ_API_Get_Devs_APPIA_HHD(id,reg,field,value)
#define AQ_API_BitfieldOfLocalStruct(reg,localvar,field) AQ_API_BitfieldOfLocalStruct_DeviceRestricted(APPIA_HHD,reg,localvar,field)
#define AQ_API_BitfieldOfLocalStruct_DeviceRestricted(devices,reg,localvar,field) AQ_API_BitfieldOfLocalStruct_Devs_ ## devices(reg,localvar,field)
#define AQ_API_BitfieldOfLocalStruct_Devs_APPIA(reg,localvar,field) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field) : \
(0))
#define AQ_API_BitfieldOfLocalStruct_Devs_HHD(reg,localvar,field) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field) : \
(0))
#define AQ_API_BitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field) : \
(0)))
#define AQ_API_BitfieldOfLocalStruct_Devs_HHD_APPIA(reg,localvar,field) AQ_API_BitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field)
#define AQ_API_AssignBitfieldOfLocalStruct(reg,localvar,field,value) AQ_API_AssignBitfieldOfLocalStruct_DeviceRestricted(APPIA_HHD,reg,localvar,field,value)
#define AQ_API_AssignBitfieldOfLocalStruct_DeviceRestricted(devices,reg,localvar,field,value) AQ_API_AssignBitfieldOfLocalStruct_Devs_ ## devices(reg,localvar,field,value)
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_APPIA(reg,localvar,field,value) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field = value) : \
(0))
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_HHD(reg,localvar,field,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field = value) : \
(0))
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->bits_ ## reg ## _HHD ## _ ## field.field = value) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->bits_ ## reg ## _APPIA ## _ ## field.field = value) : \
(0)))
#define AQ_API_AssignBitfieldOfLocalStruct_Devs_HHD_APPIA(reg,localvar,field,value) AQ_API_AssignBitfieldOfLocalStruct_Devs_APPIA_HHD(reg,localvar,field,value)
#define AQ_API_WordOfLocalStruct(localvar,wd) AQ_API_WordOfLocalStruct_DeviceRestricted(APPIA_HHD,localvar,wd)
#define AQ_API_WordOfLocalStruct_DeviceRestricted(devices,localvar,wd) AQ_API_WordOfLocalStruct_Devs_ ## devices(localvar,wd)
#define AQ_API_WordOfLocalStruct_Devs_APPIA(localvar,wd) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd) : \
(0))
#define AQ_API_WordOfLocalStruct_Devs_HHD(localvar,wd) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd) : \
(0))
#define AQ_API_WordOfLocalStruct_Devs_APPIA_HHD(localvar,wd) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd) : \
(0)))
#define AQ_API_WordOfLocalStruct_Devs_HHD_APPIA(localvar,wd) AQ_API_WordOfLocalStruct_Devs_APPIA_HHD(localvar,wd)
#define AQ_API_AssignWordOfLocalStruct(localvar,wd,value) AQ_API_AssignWordOfLocalStruct_DeviceRestricted(APPIA_HHD,localvar,wd,value)
#define AQ_API_AssignWordOfLocalStruct_DeviceRestricted(devices,localvar,wd,value) AQ_API_AssignWordOfLocalStruct_Devs_ ## devices(localvar,wd,value)
#define AQ_API_AssignWordOfLocalStruct_Devs_APPIA(localvar,wd,value) \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd = value) : \
(0))
#define AQ_API_AssignWordOfLocalStruct_Devs_HHD(localvar,wd,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd = value) : \
(0))
#define AQ_API_AssignWordOfLocalStruct_Devs_APPIA_HHD(localvar,wd,value) \
((port->device == AQ_DEVICE_HHD) ? ((localvar ## _HHD)->u ## wd.word_ ## wd = value) : \
((port->device == AQ_DEVICE_APPIA) ? ((localvar ## _APPIA)->u ## wd.word_ ## wd = value) : \
(0)))
#define AQ_API_AssignWordOfLocalStruct_Devs_HHD_APPIA(localvar,wd,value) AQ_API_AssignWordOfLocalStruct_Devs_APPIA_HHD(localvar,wd,value)
#endif

View File

@@ -1,113 +0,0 @@
/* AQ_ReturnCodes.h */
/************************************************************************************
* Copyright (c) 2015, Aquantia
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* Description:
*
* This file defines the AQ_API functions' integral return codes.
*
*
************************************************************************************/
/*! \file
This file defines the AQ_API functions' integral return codes.
*/
#ifndef AQ_RETURNCODES_TOKEN
#define AQ_RETURNCODES_TOKEN
/*! \defgroup ReturnCodes
@{
*/
/*! Most AQ_API functions return AQ_Retcode to report success or failure.
* The values used are defined as preprocessor symbols in AQ_ReturnCodes.h.
* Callers should prefer to test the return values by equivalence to these
* symbols, rather than using the integer values directly, as these may
* not be stable across releases. The set of possible return codes that may
* be returned by a particular API function can be found in the function's
* documentation, as well as information on how to interpret each of the
* possible return codes. */
typedef unsigned int AQ_Retcode;
/*! \defgroup Success
@{ */
#define AQ_RET_OK 0
/*@}*/
/*! \defgroup GeneralErrors
@{ */
#define AQ_RET_ERROR 100
#define AQ_RET_UP_BUSY_TIMEOUT 101
/*@}*/
/*! \defgroup FunctionSpecificResults
@{ */
#define AQ_RET_FLASH_READY 200
#define AQ_RET_FLASH_READINESS_TIMEOUT 204
#define AQ_RET_FLASHINTF_READY 201
#define AQ_RET_FLASHINTF_NOTREADY 202
#define AQ_RET_FLASHINTF_READINESS_TIMEOUT 203
#define AQ_RET_FLASH_TYPE_UNKNOWN 205
#define AQ_RET_FLASH_TYPE_BAD 206
#define AQ_RET_FLASH_IMAGE_CORRUPT 207
#define AQ_RET_FLASH_IMAGE_TOO_LARGE 208
#define AQ_RET_FLASH_IMAGE_MISMATCH 209
#define AQ_RET_FLASH_PAGE_SIZE_CHANGED 210
#define AQ_RET_BOOTLOAD_PROVADDR_OOR 211
#define AQ_RET_BOOTLOAD_NONUNIFORM_REGVALS 212
#define AQ_RET_BOOTLOAD_CRC_MISMATCH 213
#define AQ_RET_BOOTLOAD_PROVTABLE_TOO_LARGE 228
#define AQ_RET_LOOPBACK_BAD_ENTRY_STATE 214
#define AQ_RET_DEBUGTRACE_FREEZE_TIMEOUT 215
#define AQ_RET_DEBUGTRACE_UNFREEZE_TIMEOUT 216
#define AQ_RET_CABLEDIAG_ALREADY_RUNNING 217
#define AQ_RET_CABLEDIAG_STILL_RUNNING 218
#define AQ_RET_CABLEDIAG_BAD_PAIRSTATUS 219
#define AQ_RET_CABLEDIAG_RESULTS_ALREDY_COLLECTED 220
#define AQ_RET_CABLEDIAG_BAD_NUM_SAMPLES 221
#define AQ_RET_CABLEDIAG_REPORTEDPAIR_MISMATCH 222
#define AQ_RET_CABLEDIAG_REPORTEDPAIR_OOR 223
#define AQ_RET_CABLEDIAG_STARTED_PAIR_B 224
#define AQ_RET_CABLEDIAG_STARTED_PAIR_C 225
#define AQ_RET_CABLEDIAG_STARTED_PAIR_D 226
#define AQ_RET_CABLEDIAG_TXENABLE_MISMATCH 227
#define AQ_RET_SERDESEYE_BAD_SERDES_MODE 229
#define AQ_RET_SERDESEYE_BAD_MEAS_COUNT 230
#define AQ_RET_SERDESEYE_MEAS_TIMEOUT 231
#define AQ_RET_SERDESEYE_LANE_OOR 232
#define AQ_RET_SERDESEYE_COORD_OOR 233
#define AQ_RET_PIFMAILBOX_ERROR 234
#define AQ_RET_PIFMAILBOX_TIMEOUT 235
#define AQ_RET_SEC_TABLE_INDEX_OOR 236
/*@}*/
/*@}*/
#endif

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