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Author SHA1 Message Date
Kumiko18
4704fe6ae4 WIFI-15125: Support multiple upstream
Support multiple ssid <-> upstream bindings

Signed-off-by: Kumiko18 <alex18_huang@accton.com>
2025-09-15 07:34:57 +00:00
47 changed files with 123 additions and 2213 deletions

View File

@@ -1,14 +0,0 @@
--- a/hostapd/ctrl_iface.c 2025-09-24 14:15:25.135668867 +0800
+++ b/hostapd/ctrl_iface.c 2025-09-24 15:32:46.082317382 +0800
@@ -2657,6 +2657,11 @@ static int hostapd_ctrl_iface_chan_switc
break;
}
+ /* Initialize HT/VHT/HE parameters */
+ settings.freq_params.ht_enabled = iface->conf->ieee80211n;
+ settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
+ settings.freq_params.he_enabled = iface->conf->ieee80211ax;
+
if (settings.freq_params.center_freq1)
dfs_range += hostapd_is_dfs_overlap(
iface, bandwidth, settings.freq_params.center_freq1);

View File

@@ -48,9 +48,7 @@ ALLWIFIBOARDS:= \
indio-um-510axp-v1 \
indio-um-510axm-v1 \
indio-um-325ax-v2 \
indio-um-335ax \
indio-um-525axp \
indio-um-525axm \
muxi-ap3220l \
plasmacloud-pax1800 \
wallys-dr5018 \
@@ -446,9 +444,7 @@ $(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-325ax-v2,Indio UM-325AX V2))
$(eval $(call generate-ath11k-wifi-package,indio-um-335ax,Indio UM-335AX))
$(eval $(call generate-ath11k-wifi-package,indio-um-525axp,Indio UM-525AXP))
$(eval $(call generate-ath11k-wifi-package,indio-um-525axm,Indio UM-525AXM))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G))

View File

@@ -17,12 +17,11 @@ edgecore,eap104)
ucidef_set_led_default "power" "POWER" "green:power" "on"
;;
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "led_2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "led_5g" "phy1tpt"
ucidef_set_led_default "power" "POWER" "led_sys" "on"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"
ucidef_set_led_netdev "wan" "wan" "yellow:uplink" "eth0"
ucidef_set_led_default "power" "POWER" "green:power" "on"
;;
cig,wf186h|\
cig,wf186w)

View File

@@ -49,8 +49,6 @@ qcom_setup_interfaces()
"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp)
ucidef_set_interface_wan "eth1"
ucidef_set_interface_lan "eth0"

View File

@@ -143,8 +143,6 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp|\
optimcloud,d60|\
optimcloud,d60-5g|\
@@ -188,7 +186,6 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
ath11k/qcn6122/hw1.0/caldata_2.bin)
case "$board" in
indio,um-325ax-v2|\
indio,um-525axm|\
indio,um-525axp|\
wallys,dr5018|\
edgecore,eap104|\
@@ -208,7 +205,6 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
;;
ath11k/QCN9074/hw1.0/caldata_1.bin)
case "$board" in
indio,um-335ax|\
optimcloud,d60|\
optimcloud,d60-5g|\
optimcloud,d50|\
@@ -244,7 +240,6 @@ ath11k-macs)
edgecore,oap101e-6e|\
indio,um-325ax-v2|\
indio,um-525axp|\
indio,um-525axm|\
optimcloud,d60|\
optimcloud,d60-5g|\
optimcloud,d50|\

View File

@@ -82,9 +82,7 @@ platform_check_image() {
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axp|\
indio,um-525axm|\
optimcloud,d60|\
optimcloud,d60-5g|\
optimcloud,d50|\
@@ -112,9 +110,7 @@ platform_do_upgrade() {
board=$(board_name)
case $board in
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axp|\
indio,um-525axm|\
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\

View File

@@ -1,731 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-335AX";
compatible = "indio,um-335ax", "qcom,ipq5018-ap-mp03.1", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
led-boot = &led_red;
led-failsafe = &led_red;
led-running = &led_red;
led-upgrade = &led_red;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
reserved-memory {
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1800000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4C800000 {
no-map;
reg = <0x0 0x4C800000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4C900000 {
no-map;
reg = <0x0 0x4C900000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4CA00000 {
no-map;
reg = <0x0 0x4CA00000 0x0 0x200000>;
};
qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x2600000>;
};
#if defined(__CNSS2__)
mhi_region1: dma_pool1@4F200000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F200000 0x0 0x900000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_blue: led_5g {
label = "led_5g";
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green: led_2g {
label = "led_2g";
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red: led_sys {
label = "led_sys";
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@33 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led@34 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "on";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
// status = "disabled";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&blsp1_uart1 {
status = "ok";
};
&ssuniphy_0 {
status = "ok";
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
status = "ok";
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&wcss {
status = "ok";
};
&pcie_x2phy {
status = "ok";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "ok";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
qti,disable-rddm-prealloc;
qti,rddm-seg-len = <0x1000>;
#address-cells = <0x2>;
#size-cells = <0x2>;
#if defined(__CNSS2__)
memory-region = <0>,<&mhi_region1>;
#else
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4DF00000>;
etr-addr = <0x4E000000>;
qcom,caldb-addr = <0x4E100000>;
pageable-addr = <0x4E900000>;
qcom,tgt-mem-mode = <0x1>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,tgt-mem-mode = <1>;
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi3 {
/* QCN9000 5G */
board_id = <0xa0>;
hremote_node = <&qcn9000_pcie0>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* QCN9000 tgt-mem-mode=2 layout - 17MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4C900000 | 11MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4D400000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4D500000 | 1MB |
* +---------+--------------+---------+
* | Pageable| 0x4D600000 | 4MB |
* +==================================+
*/
base-addr = <0x4C900000>;
m3-dump-addr = <0x4D400000>;
etr-addr = <0x4D500000>;
caldb-addr = <0>;
pageable-addr = <0x4D600000>;
caldb-size = <0>;
hremote-size = <0xB00000>;
tgt-mem-mode = <0x2>;
pageable-size = <0x400000>;
#elif __IPQ_MEM_PROFILE_512_MB__
/* QCN9000 tgt-mem-mode=1 layout - 26MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4CB00000 | 12MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4D700000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4D800000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x4D900000 | 8MB |
* +---------+--------------+---------+
* | Pageable| 0x4E100000 | 4MB |
* +==================================+
*/
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4D700000>;
etr-addr = <0x4D800000>;
caldb-addr = <0x4D900000>;
pageable-addr = <0x4E100000>;
caldb-size = <0x800000>;
hremote-size = <0xC00000>;
tgt-mem-mode = <0x1>;
pageable-size = <0x400000>;
#else
/* QCN9000 tgt-mem-mode=0 layout - 53MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4CB00000 | 35MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4EE00000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4EF00000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x4F000000 | 8MB |
* +---------+--------------+---------+
* | Pageable| 0x4F800000 | 8MB |
* +==================================+
*/
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4EE00000>;
etr-addr = <0x4EF00000>;
caldb-addr = <0x4F000000>;
pageable-addr = <0x4F800000>;
hremote-size = <0x2300000>;
caldb-size = <0x800000>;
tgt-mem-mode = <0x0>;
pageable-size = <0x800000>;
#endif
status = "ok";
};

View File

@@ -1,941 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-525AXM";
compatible = "indio,um-525axm", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
//led-failsafe = &led_red;
//led-running = &led_green;
//led-upgrade = &led_green;
//led-gateway = &led_blue;
//led-factory = &led_blue;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_blue: led@34 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led_green: led@33 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led_red: led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "off";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "disabled";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
status = "ok";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
#status = "disabled";
#perst-gpio = <&tlmm 18 1>;
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
#status = "disabled";
#perst-gpio = <&tlmm 15 1>;
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -102,15 +102,6 @@ define Device/indio_um-325ax-v2
endef
TARGET_DEVICES += indio_um-325ax-v2
define Device/indio_um-335ax
DEVICE_TITLE := Indio UM-335ax
DEVICE_DTS := qcom-ipq5018-indio-um-335ax
SUPPORTED_DEVICES := indio,um-335ax
DEVICE_PACKAGES := ath11k-wifi-indio-um-335ax ath11k-firmware-qcn9000 ath11k-firmware-ipq50xx-spruce
DEVICE_DTS_CONFIG := config@mp03.1
endef
TARGET_DEVICES += indio_um-335ax
define Device/indio_um-525axp
DEVICE_TITLE := Indio UM-525axp
DEVICE_DTS := qcom-ipq5018-indio-um-525axp
@@ -120,15 +111,6 @@ define Device/indio_um-525axp
endef
TARGET_DEVICES += indio_um-525axp
define Device/indio_um-525axm
DEVICE_TITLE := Indio UM-525axm
DEVICE_DTS := qcom-ipq5018-indio-um-525axm
SUPPORTED_DEVICES := indio,um-525axm
DEVICE_PACKAGES := ath11k-wifi-indio-um-525axm ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += indio_um-525axm
define Device/udaya_a6_id2
DEVICE_TITLE := Udaya A6 - ID2
DEVICE_DTS := qcom-ipq5018-udaya-a6-id2

View File

@@ -1,34 +0,0 @@
Index: backports-5.15.81-1/net/mac80211/scan.c
===================================================================
--- backports-5.15.81-1.orig/net/mac80211/scan.c
+++ backports-5.15.81-1/net/mac80211/scan.c
@@ -29,6 +29,9 @@
#define IEEE80211_CHANNEL_TIME (HZ / 33)
#define IEEE80211_PASSIVE_CHANNEL_TIME (HZ / 9)
+/* Additional time used for passive SW scaning */
+#define IEEE80211_PASSIVE_MIN_CHANNEL_TIME (HZ / 13)
+
void ieee80211_rx_bss_put(struct ieee80211_local *local,
struct ieee80211_bss *bss)
{
@@ -1014,10 +1017,15 @@ set_channel:
*/
if ((chan->flags & (IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_RADAR)) ||
!scan_req->n_ssids) {
- *next_delay = msecs_to_jiffies(scan_req->duration) >
- IEEE80211_PASSIVE_CHANNEL_TIME ?
- msecs_to_jiffies(scan_req->duration) :
- IEEE80211_PASSIVE_CHANNEL_TIME;
+ if (msecs_to_jiffies(scan_req->duration) > IEEE80211_PASSIVE_CHANNEL_TIME) {
+ *next_delay = msecs_to_jiffies(scan_req->duration);
+ } else if (scan_req->duration > 0) {
+ *next_delay = scan_req->duration > IEEE80211_PASSIVE_MIN_CHANNEL_TIME ?
+ msecs_to_jiffies(scan_req->duration - IEEE80211_PASSIVE_MIN_CHANNEL_TIME) :
+ 0;
+ } else {
+ *next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
+ }
local->next_scan_state = SCAN_DECISION;
if (scan_req->n_ssids)
set_bit(SCAN_BEACON_WAIT, &local->scanning);

View File

@@ -169,8 +169,7 @@
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "sgmii";
phy-handle = <&phy30>;
phy-handle2 = <&phy1>;
phy-handle = <&phy1>; // add phy handler
mtd-mac-address = <&factory 0x24>;
};
@@ -194,16 +193,6 @@
nvmem-cell-names = "phy-cal-data";
};
phy30: ethernet-phy@30 { // AN8801SB
compatible = "ethernet-phy-idc0ff.0421";
reg = <30>; //0x1e
phy-mode = "sgmii";
full-duplex;
pause;
airoha,surge = <0>;
airoha,polarity = <2>;
};
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9471";
reg = <24>; // set phy address to 0x18
@@ -211,8 +200,9 @@
reset-assert-us = <600>;
reset-deassert-us = <20000>;
phy-mode = "sgmii";
};
};
};
};
};
&hnat {

View File

@@ -259,13 +259,8 @@ const phy_proto = {
addr[0] ^= idx << 2;
break;
case "b5":
if (mbssid) {
let b5 = addr[5];
addr[5] = addr[3];
addr[3] = b5;
addr[5] &= ~0xf;
if (mbssid)
addr[0] |= 2;
}
addr[5] ^= idx;
break;
default:

View File

@@ -14,12 +14,9 @@ ipq53xx_setup_interfaces()
;;
cig,wf189|\
edgecore,eap105|\
sercomm,ap72tip)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
sercomm,ap72tip|\
sonicfi,rap750w-311a)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan" "1:lan"
;;
sonicfi,rap7110c-341x|\
sonicfi,rap750e-h|\

View File

@@ -1180,7 +1180,7 @@ CONFIG_QTI_LICENSE_MANAGER=y
# CONFIG_SYMBOLIC_ERRNAME is not set
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
# CONFIG_LEDS_CLASS_MULTICOLOR is not set
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set

View File

@@ -1,33 +0,0 @@
From f7b27331b915477cd289c37b56efb0d28b2d6f38 Mon Sep 17 00:00:00 2001
From: Antonio Wu <antonio.wu@cybertan.com.tw>
Date: Tue, 5 Aug 2025 10:39:58 +0000
Subject: [PATCH] Add IPQ_MEM_PROFILE in arm64 kconfig
---
arch/arm64/Kconfig | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 702a289..7864e79 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2143,6 +2143,16 @@ config STACKPROTECTOR_PER_TASK
def_bool y
depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_SYSREG
+config IPQ_MEM_PROFILE
+ int "Select Memory Profile"
+ range 0 1024
+ default 0
+ help
+ This option select memory profile to be used, which defines
+ the reserved memory configuration used in device tree.
+
+ If unsure, say 0
+
# The GPIO number here must be sorted by descending number. In case of
# a multiplatform kernel, we just want the highest value required by the
# selected platforms.
--
2.17.1

View File

@@ -1,63 +0,0 @@
Index: backports-6.5-rc3/drivers/net/wireless/ath/ath12k/thermal.h
===================================================================
--- backports-6.5-rc3.orig/drivers/net/wireless/ath/ath12k/thermal.h
+++ backports-6.5-rc3/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,35 +13,35 @@
/* Below temperatures are in celsius */
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 115
+#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 125
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 110
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 30
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 50
+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 70
-#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE 0
+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE 20
+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE 40
+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE 80
+#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE 100
#define THERMAL_CONFIG_POUT0 0
#define THERMAL_CONFIG_POUT1 12

View File

@@ -1,57 +0,0 @@
--- a/drivers/net/wireless/ath/ath12k/thermal.h
+++ b/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,34 +13,34 @@
/* Below temperatures are in celsius */
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 110
#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 110
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 30
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 50
+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 70
#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
#define THERMAL_CONFIG_POUT0 0

View File

@@ -0,0 +1,47 @@
From 7fa9e9b683f1c573c58a14755347988919bc7d06 Mon Sep 17 00:00:00 2001
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
Date: Wed, 14 May 2025 13:47:06 +0800
Subject: [PATCH] pinctrl: make the switch LED works
Enable switch LED pin definition for LED0/LED1/LED2 control
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
---
src/init/ssdk_mht_pinctrl.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/init/ssdk_mht_pinctrl.c b/src/init/ssdk_mht_pinctrl.c
index 2debe59..1ae0002 100755
--- a/src/init/ssdk_mht_pinctrl.c
+++ b/src/init/ssdk_mht_pinctrl.c
@@ -33,11 +33,17 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
/*PINs default MUX Setting*/
MHT_PIN_SETTING_MUX(0, MHT_PIN_FUNC_INTN_WOL),
MHT_PIN_SETTING_MUX(1, MHT_PIN_FUNC_INTN),
-#if 0
+#if 1
MHT_PIN_SETTING_MUX(2, MHT_PIN_FUNC_P0_LED_0),
MHT_PIN_SETTING_MUX(3, MHT_PIN_FUNC_P1_LED_0),
MHT_PIN_SETTING_MUX(4, MHT_PIN_FUNC_P2_LED_0),
MHT_PIN_SETTING_MUX(5, MHT_PIN_FUNC_P3_LED_0),
+ MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_P0_LED_2),
+ MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_P1_LED_2),
+ MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_P2_LED_2),
+ MHT_PIN_SETTING_MUX(9, MHT_PIN_FUNC_P3_LED_2),
+#endif
+#if 0
MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_PPS_IN),
MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_TOD_IN),
MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_RTC_REFCLK_IN),
@@ -49,7 +55,7 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
MHT_PIN_SETTING_MUX(13, MHT_PIN_FUNC_P0_TOD_OUT),
MHT_PIN_SETTING_MUX(14, MHT_PIN_FUNC_P0_CLK125_TDI),
MHT_PIN_SETTING_MUX(15, MHT_PIN_FUNC_P0_SYNC_CLKO_PTP),
-#if 0
+#if 1
MHT_PIN_SETTING_MUX(16, MHT_PIN_FUNC_P0_LED_1),
MHT_PIN_SETTING_MUX(17, MHT_PIN_FUNC_P1_LED_1),
MHT_PIN_SETTING_MUX(18, MHT_PIN_FUNC_P2_LED_1),
--
2.34.1

View File

@@ -25,11 +25,6 @@ copy_certificates() {
}
boot() {
case "$(board_name)" in
sonicfi,rap6*)
touch /tmp/squashfs
;;
esac
[ -f /etc/ucentral/key.pem ] && return
/usr/bin/mount_certs
copy_certificates

View File

@@ -37,16 +37,13 @@ sonicfi,rap7*)
mtd=$(find_mtd_index certificates)
[ -n "$mtd" ] && mount -t ext4 /dev/mtdblock$mtd /certificates
fi
;;
sonicfi,rap6*)
mtd=$(find_mtd_index certificates)
if [ "$(head -c 4 /dev/mtd$mtd)" == "hsqs" ]; then
mount -t squashfs /dev/mtdblock$mtd /mnt
cp /mnt/* /certificates
umount /mnt
if [ ! -f /certificates/cert.pem ] || [ ! -f /certificates/key.pem ]; then
part=$(tar_part_lookup "0:BOOTCONFIG" "0:BOOTCONFIG1")
if [ -n "part" ]; then
mmc_dev=$(echo $(find_mmc_part "$part") | sed 's/^.\{5\}//')
[ -n "$mmc_dev" ] && tar xf /dev/$mmc_dev -C /certificates
fi
fi
mtd=$(find_mtd_index devinfo)
[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
;;
udaya,a5-id2|\
yuncore,ax820)
@@ -62,6 +59,19 @@ yuncore,ax820)
[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
fi
;;
sonicfi,rap6*)
mtd=$(find_mtd_index certificates)
if [ "$(head -c 4 /dev/mtd$mtd)" == "hsqs" ]; then
mount -t squashfs /dev/mtdblock$mtd /mnt
cp /mnt/* /certificates
umount /mnt
fi
part=$(tar_part_lookup "devinfo" "certificates")
if [ -n "$part" ]; then
mtd=$(find_mtd_index $part)
[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
fi
;;
*)
mtd=$(find_mtd_index certificates)

View File

@@ -14,6 +14,13 @@ tar_part_lookup() {
. /lib/functions.sh
case "$(board_name)" in
sonicfi,rap7110c-341x)
cd /certificates
tar cf /tmp/certs.tar .
part=$(tar_part_lookup "0:BOOTCONFIG" "0:BOOTCONFIG1")
mmc_dev=$(echo $(find_mmc_part $part) | sed 's/^.\{5\}//')
dd if=/tmp/certs.tar of=/dev/$mmc_dev
;;
udaya,a5-id2|\
yuncore,ax820)
cd /certificates
@@ -26,7 +33,8 @@ sonicfi,rap6*)
if [ "$(fw_printenv -n store_certs_disabled)" != "1" ]; then
cd /certificates
tar cf /tmp/certs.tar .
mtd=$(find_mtd_index devinfo)
part=$(tar_part_lookup "devinfo" "certificates")
mtd=$(find_mtd_index $part)
block_size=$(cat /sys/class/mtd/mtd$mtd/size)
dd if=/tmp/certs.tar of=/tmp/certs_pad.tar bs=$block_size conv=sync
mtd write /tmp/certs_pad.tar /dev/mtd$mtd

View File

@@ -23,7 +23,6 @@ let ubus = libubus.connect();
let uci = libuci.cursor();
let state = DISCOVER;
let discovery_method = "";
let discovery_block_list = [];
let validate_time;
let offline_time;
let orphan_time;
@@ -103,9 +102,6 @@ function gateway_load() {
}
function discovery_state_write() {
if (length(discovery_method) == 0)
return;
let discovery_state = {
"type": discovery_method,
"updated": time()
@@ -159,7 +155,6 @@ function set_state(set) {
ulog(LOG_INFO, 'Wait for validation\n');
validate_time = time();
state = VALIDATING;
push(discovery_block_list, discovery_method);
break;
case ONLINE:
@@ -168,7 +163,6 @@ function set_state(set) {
ulog(LOG_INFO, 'Setting cloud controller to validated\n');
gateway_write({ valid: true });
discovery_state_write();
discovery_block_list = [];
}
break;
@@ -237,13 +231,6 @@ function time_is_valid() {
return valid;
}
function is_discover_method_blacked() {
if (discovery_method in discovery_block_list)
return true;
return false;
}
function interval_handler() {
printf(`State ${state}\n`);
switch(state) {
@@ -273,21 +260,19 @@ function interval_handler() {
if (!time_is_valid())
return;
discovery_method = DISCOVER_DHCP;
if (discover_dhcp())
return;
if (system('/usr/bin/est_client enroll'))
return;
discovery_method = DISCOVER_DHCP;
if (!is_discover_method_blacked() && discover_dhcp())
return;
discovery_method = DISCOVER_FLASH;
if (!is_discover_method_blacked() && !discover_flash())
if (!discover_flash())
return;
discovery_method = DISCOVER_LOOKUP;
redirector_lookup();
discovery_block_list = [];
break;
case VALIDATING:

View File

@@ -5,8 +5,8 @@ import * as fs from 'fs';
let cmd = ARGV[0];
let ifname = getenv("interface");
let opt138 = fs.readfile('/tmp/dhcp-option-138');
let opt224 = fs.readfile('/tmp/dhcp-option-224');
let opt138 = getenv("opt138");
let opt224 = getenv("opt224");
if (cmd != 'bound' && cmd != 'renew')
exit(0);
@@ -23,14 +23,14 @@ let cloud = {
lease: true,
};
if (opt138) {
let dhcp = opt138;
let dhcp = hexdec(opt138);
dhcp = split(dhcp, ':');
cloud.dhcp_server = dhcp[0];
cloud.dhcp_port = dhcp[1] ?? 15002;
cloud.no_validation = true;
}
if (opt224) {
let dhcp = opt224;
let dhcp = hexdec(opt224);
dhcp = split(dhcp, ':');
cloud.dhcp_server = dhcp[0];
cloud.dhcp_port = dhcp[1] ?? 15002;

View File

@@ -4,7 +4,6 @@ PKG_NAME:=ucentral-client
PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git
PKG_MIRROR_HASH:=2935998d6074f0c290d9b96c2988c89aae6f405608f12a0063fa7215498bae9a
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-08-11
PKG_SOURCE_VERSION:=549e84e5fea7230c5471d6a3dbddcc7d3152f665

View File

@@ -2,8 +2,6 @@
'use strict';
push(REQUIRE_SEARCH_PATH, '/usr/share/ucentral/*.uc');
import * as libubus from 'ubus';
import * as libuci from 'uci';
import * as uloop from 'uloop';
@@ -38,7 +36,6 @@ let ucentral_running = false;
let pending_events = [];
let relay = {};
let net_config = {};
let vlan_refcount = {};
function config_load() {
@@ -55,20 +52,6 @@ function config_load() {
net_config = {};
}
function vlan_refcount_init() {
let stations = require('wifi.station');
vlan_refcount = {};
for (let k, v in stations) {
let vlan = split(k, '-v')[1];
let count = length(v);
if (vlan && count > 0) {
vlan_refcount[vlan] = count;
}
}
}
function match(object, type, list) {
if (object in list || type in list)
return true;
@@ -275,13 +258,6 @@ handlers = {
},
vlan_add: function(notify) {
let vlan_id = `${notify.data.vlan_id}`;
vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 0) + 1;
if (vlan_refcount[vlan_id] > 1) {
return;
}
if (config.config.swconfig)
return handlers.vlan_add_swconfig(notify);
@@ -304,14 +280,6 @@ handlers = {
},
vlan_remove: function(notify) {
let vlan_id = `${notify.data.vlan_id}`;
vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 1) - 1;
if (vlan_refcount[vlan_id] > 0) {
return;
}
delete vlan_refcount[vlan_id];
if (config.config.swconfig)
return;
for (let wan in wan_ports) {
@@ -656,7 +624,6 @@ let ubus_methods = {
};
config_load();
vlan_refcount_init();
hapd_subscriber = ubus.subscriber(hapd_subscriber_notify_cb, hapd_subscriber_remove_cb);
dhcp_subscriber = ubus.subscriber(dhcp_subscriber_notify_cb, dhcp_subscriber_remove_cb);

View File

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-schema
PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git
PKG_MIRROR_HASH:=f72d2e5b01ecb7a488d50d860da63664d992e50c7e046fed866be6733bab3c1c
PKG_MIRROR_HASH:=dd37ce95e77af90424d4792f1d292e90242d66ebf5c6552afdf364fd33c58af8
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-09-29
PKG_SOURCE_VERSION:=676e1550c53b7d48a54aa759f65d341168627c5e
PKG_SOURCE_DATE:=2025-08-12
PKG_SOURCE_VERSION:=a1e7571a07ad309301954149884b13f71fbf74be
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=BSD-3-Clause

View File

@@ -1,10 +1,7 @@
#!/usr/bin/ucode
import { readfile } from "fs";
let nl = require("nl80211");
let def = nl.const;
let board_name = rtrim(readfile('/tmp/sysinfo/board_name'), '\n');
let phy_index = 0;
function phy_get() {
let res = nl.request(def.NL80211_CMD_GET_WIPHY, def.NLM_F_DUMP, { split_wiphy_dump: true });
@@ -15,11 +12,5 @@ function phy_get() {
return res;
}
switch(board_name) {
case 'edgecore,eap112':
phy_index = 1;
break;
}
let phys = phy_get();
printf("%d\n", phys[phy_index].max_ap_assoc || 32);
printf("%d\n", phys[0].max_ap_assoc || 32);

View File

@@ -1,22 +1,16 @@
From 937c4ba769b4d3a0b5cb804e54fd8bece8efac47 Mon Sep 17 00:00:00 2001
From: Shubham Vishwakarma <shubhamvis98@fossfrog.in>
Date: Mon, 29 Sep 2025 10:35:54 +0530
Subject: [PATCH 58/68] ramips: mt7621: add mt7621 indio um-305ax
From ec135e7aefac08806fbabb0634a2bd88a169dfc6 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 15 Jul 2023 15:25:59 +0200
Subject: [PATCH 58/68] ramips: add mt7621_indio_um-305ax
Changelog:
- Fix MAC address assignment for Ethernet ports
- Fix Ethernet port configuration (was not working in the current DTS
because GPIOs 23 and 24, used for LEDs, are RGMII2 pins)
- Add package kmod-7915-firmware to enable Wi-Fi
Signed-off-by: Shubham Vishwakarma <shubhamvis98@fossfrog.in>
Signed-off-by: John Crispin <john@phrozen.org>
---
target/linux/ath79/image/generic.mk | 22 +--
.../ramips/dts/mt7621_indio_um-305ax.dts | 168 ++++++++++++++++++
.../ramips/dts/mt7621_indio_um-305ax.dts | 146 ++++++++++++++++++
target/linux/ramips/image/mt7621.mk | 11 ++
.../mt7621/base-files/etc/board.d/02_network | 6 +
.../etc/hotplug.d/ieee80211/10_fix_wifi_mac | 6 +
5 files changed, 202 insertions(+), 11 deletions(-)
5 files changed, 180 insertions(+), 11 deletions(-)
create mode 100644 target/linux/ramips/dts/mt7621_indio_um-305ax.dts
diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
@@ -61,30 +55,27 @@ index 5882feafcb..a98a5e816f 100644
DEVICE_VENDOR := YunCore
diff --git a/target/linux/ramips/dts/mt7621_indio_um-305ax.dts b/target/linux/ramips/dts/mt7621_indio_um-305ax.dts
new file mode 100644
index 0000000000..42837dd9fe
index 0000000000..79cffbdec2
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_indio_um-305ax.dts
@@ -0,0 +1,168 @@
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>
+ */
+
+/dts-v1/;
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "indio,um-305ax", "mediatek,mt7621-soc";
+ model = "Indio UM-305AX";
+ model = "INDIO UM-305AX";
+
+ aliases {
+ led-boot = &led_green;
+ led-failsafe = &led_green;
+ led-running = &led_green;
+ led-upgrade = &led_green;
+ led-failsafe = &led_red;
+ led-running = &led_blue;
+ led-upgrade = &led_red;
+ label-mac-device = &wan_port;
+ };
+
+ chosen {
@@ -93,11 +84,6 @@ index 0000000000..42837dd9fe
+ };
+
+ leds {
+ /*
+ * GPIO 23 and 24 LEDs wont work because these pins are part of the RGMII2 pin group.
+ * To make the LEDs work, we need to change the &state_default nodes group variable
+ * to "rgmii2", which restores LED functionality but disables the Ethernet ports.
+ */
+ compatible = "gpio-leds";
+
+ led_blue: blue {
@@ -133,7 +119,7 @@ index 0000000000..42837dd9fe
+
+&state_default {
+ gpio {
+ groups = "jtag", "wdt";
+ groups = "rgmii2";
+ function = "gpio";
+ };
+};
@@ -150,19 +136,15 @@ index 0000000000..42837dd9fe
+};
+
+&gmac0 {
+ status = "okay";
+ nvmem-cells = <&macaddr_offset>;
+ nvmem-cell-names = "mac-address";
+ mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+ ports {
+ port@0 {
+ wan_port: port@0 {
+ status = "okay";
+ label = "wan";
+ nvmem-cells = <&macaddr_offset>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <1>;
+ mtd-mac-address = <&factory 0x28>;
+ };
+
+ port@1 {
@@ -223,16 +205,6 @@ index 0000000000..42837dd9fe
+ };
+};
+
+&factory {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_offset: macaddr@4 {
+ reg = <0x4 0x6>;
+ };
+};
+
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 962d7ef440..8790a2fa50 100644
--- a/target/linux/ramips/image/mt7621.mk
@@ -297,5 +269,5 @@ index 3467e783f0..d5bd50fdf7 100644
[ "$PHYNBR" = "1" ] && \
macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1 > /sys${DEVPATH}/macaddress
--
2.47.3
2.34.1

View File

@@ -1,25 +0,0 @@
From 40894005e2c114664a44abb0ffadb1cb945a88e2 Mon Sep 17 00:00:00 2001
From: Antonio Wu <antonio.wu@cybertan.com.tw>
Date: Mon, 4 Aug 2025 05:10:41 +0000
Subject: [PATCH] add KERNEL_IPQ_MEM_PROFILE for IPQ53XX
---
config/Config-kernel.in | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/config/Config-kernel.in b/config/Config-kernel.in
index 3529696559..b7f13eccbe 100644
--- a/config/Config-kernel.in
+++ b/config/Config-kernel.in
@@ -6,7 +6,7 @@ config KERNEL_IPQ_MEM_PROFILE
int "Different memory profile "
range 0 1024
default 512
- depends on TARGET_ipq807x || TARGET_ipq60xx || TARGET_ipq50xx || TARGET_ipq95xx
+ depends on TARGET_ipq807x || TARGET_ipq60xx || TARGET_ipq50xx || TARGET_ipq95xx || TARGET_ipq53xx
help
This option select memory profile to be used,which defines
the reserved memory configuration used in device tree.
--
2.17.1

View File

@@ -1,68 +0,0 @@
From ba5c63cc0cbbacd952a5c2cfd873439bf5adc86a Mon Sep 17 00:00:00 2001
From: Tanya Singh <tanya_singh@accton.com>
Date: Thu, 18 Sep 2025 13:21:38 +0800
Subject: [PATCH] netifd: Support DHCP option 138 and DHCP option 224
---
.../netifd/files/lib/netifd/dhcp.script | 10 ++++++++++
.../patches/601-dhcp_opt138_opt224.patch | 20 +++++++++++++++++++
2 files changed, 30 insertions(+)
create mode 100644 package/utils/busybox/patches/601-dhcp_opt138_opt224.patch
diff --git a/package/network/config/netifd/files/lib/netifd/dhcp.script b/package/network/config/netifd/files/lib/netifd/dhcp.script
index 6fcf139beb..9c4366f48b 100755
--- a/package/network/config/netifd/files/lib/netifd/dhcp.script
+++ b/package/network/config/netifd/files/lib/netifd/dhcp.script
@@ -4,6 +4,8 @@
. /lib/functions.sh
. /lib/netifd/netifd-proto.sh
+rm -rf /tmp/dhcp-option-*
+
set_classless_routes() {
local max=128
while [ -n "$1" -a -n "$2" -a $max -gt 0 ]; do
@@ -111,6 +113,14 @@ case "$1" in
;;
esac
+if [ -n "${opt138}" ]; then
+ echo -n "${opt138}" > /tmp/dhcp-option-138
+fi
+
+if [ -n "${opt224}" ]; then
+ echo -n "${opt224}" > /tmp/dhcp-option-224
+fi
+
# user rules
[ -f /etc/udhcpc.user ] && . /etc/udhcpc.user "$@"
for f in /etc/udhcpc.user.d/*; do
diff --git a/package/utils/busybox/patches/601-dhcp_opt138_opt224.patch b/package/utils/busybox/patches/601-dhcp_opt138_opt224.patch
new file mode 100644
index 0000000000..38e53be78c
--- /dev/null
+++ b/package/utils/busybox/patches/601-dhcp_opt138_opt224.patch
@@ -0,0 +1,20 @@
+--- a/networking/udhcp/common.c 2025-09-18 13:15:38.313248300 +0800
++++ b/networking/udhcp/common.c 2025-09-18 13:17:50.078418978 +0800
+@@ -55,6 +55,8 @@ const struct dhcp_optflag dhcp_optflags[
+ { OPTION_STRING , 0x43 }, /* DHCP_BOOT_FILE */
+ //TODO: not a string, but a set of LASCII strings:
+ // { OPTION_STRING , 0x4D }, /* DHCP_USER_CLASS */
++ { OPTION_IP , 0x8A }, /* DHCP_OPT138 */
++ { OPTION_STRING , 0xE0 }, /* DHCP_OPT224 */
+ { OPTION_STRING , 0x64 }, /* DHCP_PCODE */
+ { OPTION_STRING , 0x65 }, /* DHCP_TCODE */
+ #if ENABLE_FEATURE_UDHCP_RFC3397
+@@ -124,6 +126,8 @@ const char dhcp_option_strings[] ALIGN1
+ "tftp" "\0" /* DHCP_TFTP_SERVER_NAME*/
+ "bootfile" "\0" /* DHCP_BOOT_FILE */
+ // "userclass" "\0" /* DHCP_USER_CLASS */
++ "opt138" "\0" /* DHCP_OPT138 */
++ "opt224" "\0" /* DHCP_OPT224 */
+ "tzstr" "\0" /* DHCP_PCODE */
+ "tzdbstr" "\0" /* DHCP_TCODE */
+ #if ENABLE_FEATURE_UDHCP_RFC3397
--
2.34.1

View File

@@ -15,6 +15,4 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
- kmod-cig-poe-judgment

View File

@@ -14,6 +14,4 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
- kmod-cig-poe-judgment

View File

@@ -14,6 +14,4 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
- kmod-cig-poe-judgment

View File

@@ -24,6 +24,5 @@ packages:
- kmod-iio-ilps22qs
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

View File

@@ -12,5 +12,3 @@ include:
packages:
- ipq53xx
- qca-ssdk-shell
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0

View File

@@ -1,18 +0,0 @@
---
profile: indio_um-335ax
target: ipq50xx
subtarget: generic
description: Build image for the Indio um-335ax
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-indio_um-335ax-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq50xx
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

View File

@@ -1,17 +0,0 @@
---
profile: indio_um-525axm
target: ipq50xx
subtarget: generic
description: Build image for the Indio um-525axm
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-indio_um-525axm-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq50xx
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

View File

@@ -13,5 +13,3 @@ packages:
- ipq53xx
- qca-ssdk-shell
- e2fsprogs
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0

View File

@@ -87,7 +87,7 @@ def setup_tree():
for patch in patches:
run(["git", "am", "-3", str(base_dir / patch)], check=True)
run(
["ln", "-rs", profiles, "profiles"], check=True,
["ln", "-s", profiles, "profiles"], check=True,
)
print("### Patches done")
except: