wifi_max_user: read data from correct phy index for EAP112

Signed-off-by: Arif Alam <arif.alam@netexperience.com>

feeds/hostapd/hostapd/patches/zzzz-002-initialize-mode-for-hostapd-cli-chan-switch.patch

@@ -0,0 +1,14 @@
+--- a/hostapd/ctrl_iface.c	2025-09-24 14:15:25.135668867 +0800
++++ b/hostapd/ctrl_iface.c	2025-09-24 15:32:46.082317382 +0800
+@@ -2657,6 +2657,11 @@ static int hostapd_ctrl_iface_chan_switc
+ 		break;
+ 	}
+ 
++    /* Initialize HT/VHT/HE parameters */
++    settings.freq_params.ht_enabled = iface->conf->ieee80211n;
++    settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
++    settings.freq_params.he_enabled = iface->conf->ieee80211ax;
++
+ 	if (settings.freq_params.center_freq1)
+ 		dfs_range += hostapd_is_dfs_overlap(
+ 			iface, bandwidth, settings.freq_params.center_freq1);

feeds/ipq807x_v5.4/ath11k-wifi/Makefile

@@ -48,6 +48,7 @@ ALLWIFIBOARDS:= \
 	indio-um-510axp-v1 \
 	indio-um-510axm-v1 \
 	indio-um-325ax-v2 \
+	indio-um-335ax \
 	indio-um-525axp \
 	muxi-ap3220l \
 	plasmacloud-pax1800 \
@@ -444,6 +445,7 @@ $(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-325ax-v2,Indio UM-325AX V2))
+$(eval $(call generate-ath11k-wifi-package,indio-um-335ax,Indio UM-335AX))
 $(eval $(call generate-ath11k-wifi-package,indio-um-525axp,Indio UM-525AXP))
 $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
 $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/board.d/01_leds

@@ -17,11 +17,11 @@ edgecore,eap104)
         ucidef_set_led_default "power" "POWER" "green:power" "on"
 	;;
 indio,um-325ax-v2|\
+indio,um-335ax|\
 indio,um-525axp)
-	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
-	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"
-	ucidef_set_led_netdev "wan" "wan" "yellow:uplink" "eth0"
-        ucidef_set_led_default "power" "POWER" "green:power" "on"
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "led_2g" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "led_5g" "phy1tpt"
+	ucidef_set_led_default "power" "POWER" "led_sys" "on"
 	;;
 cig,wf186h|\
 cig,wf186w)

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/board.d/02_network

@@ -49,6 +49,7 @@ qcom_setup_interfaces()
 			"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
 		;;
 	indio,um-325ax-v2|\
+	indio,um-335ax|\
 	indio,um-525axp)
 		ucidef_set_interface_wan "eth1"
 		ucidef_set_interface_lan "eth0"

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/hotplug.d/firmware/10-ath11k-caldata

@@ -143,6 +143,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
 	hfcl,ion4x_w|\
 	hfcl,ion4xi_w|\
 	indio,um-325ax-v2|\
+	indio,um-335ax|\
 	indio,um-525axp|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
@@ -205,6 +206,7 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
 	;;
 ath11k/QCN9074/hw1.0/caldata_1.bin)
 	case "$board" in
+	indio,um-335ax|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
 	optimcloud,d50|\

feeds/ipq807x_v5.4/ipq50xx/base-files/lib/upgrade/platform.sh

@@ -82,6 +82,7 @@ platform_check_image() {
 	hfcl,ion4x_w|\
 	hfcl,ion4xi_w|\
 	indio,um-325ax-v2|\
+	indio,um-335ax|\
 	indio,um-525axp|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
@@ -110,6 +111,7 @@ platform_do_upgrade() {
 	board=$(board_name)
 	case $board in
 	indio,um-325ax-v2|\
+	indio,um-335ax|\
 	indio,um-525axp|\
 	edgecore,oap101|\
 	edgecore,oap101-6e|\

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-indio-um-335ax.dts

@@ -0,0 +1,731 @@
+/dts-v1/;
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-335AX";
+	compatible = "indio,um-335ax", "qcom,ipq5018-ap-mp03.1", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+		led-boot = &led_red;
+		led-failsafe = &led_red;
+		led-running = &led_red;
+		led-upgrade = &led_red;
+
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+		stdout-path = "serial0";
+	};
+
+	gpio-watchdog {
+		compatible = "linux,wdt-gpio";
+		gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
+		hw_algo = "toggle";
+		hw_margin_ms = <5000>;
+		always-running;
+	};
+
+	reserved-memory {
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1800000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xE00000>;
+		};
+
+		m3_dump: m3_dump@4C800000 {
+			no-map;
+			reg = <0x0 0x4C800000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4C900000 {
+			no-map;
+			reg = <0x0 0x4C900000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4CA00000 {
+			no-map;
+			reg = <0x0 0x4CA00000 0x0 0x200000>;
+		};
+
+		qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
+			no-map;
+			reg = <0x0 0x4CC00000 0x0 0x2600000>;
+		};
+
+	#if defined(__CNSS2__)
+		mhi_region1: dma_pool1@4F200000 {
+			compatible = "shared-dma-pool";
+			no-map;
+			reg = <0x0 0x4F200000 0x0 0x900000>;
+		};
+	#endif
+	};
+
+	soc {
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 39 0>;
+
+			ethernet-phy@0 {
+				reg = <28>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x1>;
+			ess-switch@0x39c00000 {
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <0x1c>;
+						mdiobus = <&mdio1>;
+						port_mac_sel = "QGMAC_PORT";
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+				ess-switch1@1 {
+				compatible = "qcom,ess-switch-qca83xx";
+				device_id = <1>;
+				switch_access_mode = "mdio";
+				mdio-bus = <&mdio1>;
+				reset_gpio = <0x28>;
+				switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x1e>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				qca,ar8327-initvals = <
+						0x00004 0x7600000   /* PAD0_MODE */
+						0x00008 0x1000000   /* PAD5_MODE */
+						0x0000c 0x80        /* PAD6_MODE */
+						0x00010 0x2613a0    /* PORT6 FORCE MODE*/
+						0x000e4 0xaa545     /* MAC_POWER_SEL */
+						0x000e0 0xc74164de  /* SGMII_CTRL */
+						0x0007c 0x4e        /* PORT0_STATUS */
+						0x00094 0x4e        /* PORT6_STATUS */
+				>;
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <28>;
+					};
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		qcom,test@0 {
+			status = "ok";
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+
+		lpass: lpass@0xA000000{
+			status = "disabled";
+		};
+
+		pcm: pcm@0xA3C0000{
+			pinctrl-0 = <&audio_pins>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		pcm_lb: pcm_lb@0 {
+			status = "disabled";
+		};
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio22", "gpio24", "gpio23", "gpio25";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_0 {
+			pins = "gpio7";
+			function = "qspi0";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_1 {
+			pins = "gpio6";
+			function = "qspi1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_2 {
+			pins = "gpio5";
+			function = "qspi2";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_3 {
+			pins = "gpio4";
+			function = "qspi3";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	phy_led_pins: phy_led_pins {
+		gephy_led_pin {
+			pins = "gpio46";
+			function = "led0";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	i2c_pins: i2c_pins {
+		i2c_scl {
+			pins = "gpio25";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		i2c_sda {
+			pins = "gpio26";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		reset_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	audio_pins: audio_pinmux {
+	};
+
+	leds_pins: leds_pins {
+		led_blue: led_5g {
+			label = "led_5g";
+			pins = "gpio34";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_green: led_2g {
+			label = "led_2g";
+			pins = "gpio33";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_red: led_sys {
+			label = "led_sys";
+			pins = "gpio26";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_onekey {
+			pins = "gpio28";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		button@1 {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&leds_pins>;
+		pinctrl-names = "default";
+
+		led@33 {
+			label = "led_5g";
+			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_5g";
+			default-state = "off";
+		};
+		led@34 {
+			label = "led_2g";
+			gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_2g";
+			default-state = "off";
+		};
+		led@26 {
+			label = "led_sys";
+			gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_sys";
+			default-state = "on";
+		};
+		led@28 {
+			label = "led_onekey";
+			gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_onekey";
+			default-state = "off";
+		};
+	};
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+			<&q6_caldb_region>;
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	};
+};
+
+&i2c_0 {
+	pinctrl-0 = <&i2c_pins>;
+	pinctrl-names = "default";
+	// status = "disabled";
+};
+
+&usb3 {
+	status = "ok";
+	device-power-gpio = <&tlmm 24 1>;
+};
+
+&dwc_0 {
+	/delete-property/ #phy-cells;
+	/delete-property/ phys;
+	/delete-property/ phy-names;
+};
+
+&blsp1_uart1 {
+	status = "ok";
+};
+
+&ssuniphy_0 {
+	status = "ok";
+};
+
+&hs_m31phy_0 {
+	status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	status = "ok";
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&wcss {
+	status = "ok";
+};
+
+&pcie_x2phy {
+	status = "ok";
+};
+
+&pcie_x1_rp {
+	status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+	status = "ok";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+		qrtr_instance_id = <0x20>;
+		qti,disable-rddm-prealloc;
+		qti,rddm-seg-len = <0x1000>;
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+#if defined(__CNSS2__)
+		memory-region = <0>,<&mhi_region1>;
+#else
+		base-addr = <0x4CB00000>;
+		m3-dump-addr = <0x4DF00000>;
+		etr-addr = <0x4E000000>;
+		qcom,caldb-addr = <0x4E100000>;
+		pageable-addr = <0x4E900000>;
+		qcom,tgt-mem-mode = <0x1>;
+#endif
+	};
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+	qcom,tgt-mem-mode = <1>;
+	qcom,board_id = <0x24>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi3 {
+	/* QCN9000 5G */
+	board_id = <0xa0>;
+	hremote_node = <&qcn9000_pcie0>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/* QCN9000 tgt-mem-mode=2 layout - 17MB
+	 * +=========+==============+=========+
+	 * |  Region | Start Offset |   Size  |
+	 * +---------+--------------+---------+
+	 * | HREMOTE |  0x4C900000  |   11MB  |
+	 * +---------+--------------+---------+
+	 * | M3 Dump |  0x4D400000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |   ETR   |  0x4D500000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * | Pageable|  0x4D600000  |   4MB   |
+	 * +==================================+
+	 */
+	base-addr = <0x4C900000>;
+	m3-dump-addr = <0x4D400000>;
+	etr-addr = <0x4D500000>;
+	caldb-addr = <0>;
+	pageable-addr = <0x4D600000>;
+	caldb-size = <0>;
+	hremote-size = <0xB00000>;
+	tgt-mem-mode = <0x2>;
+	pageable-size = <0x400000>;
+#elif __IPQ_MEM_PROFILE_512_MB__
+	/* QCN9000 tgt-mem-mode=1 layout - 26MB
+	 * +=========+==============+=========+
+	 * |  Region | Start Offset |   Size  |
+	 * +---------+--------------+---------+
+	 * | HREMOTE |  0x4CB00000  |   12MB  |
+	 * +---------+--------------+---------+
+	 * | M3 Dump |  0x4D700000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |   ETR   |  0x4D800000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |  Caldb  |  0x4D900000  |   8MB   |
+	 * +---------+--------------+---------+
+	 * | Pageable|  0x4E100000  |   4MB   |
+	 * +==================================+
+	 */
+	base-addr = <0x4CB00000>;
+	m3-dump-addr = <0x4D700000>;
+	etr-addr = <0x4D800000>;
+	caldb-addr = <0x4D900000>;
+	pageable-addr = <0x4E100000>;
+	caldb-size = <0x800000>;
+	hremote-size = <0xC00000>;
+	tgt-mem-mode = <0x1>;
+	pageable-size = <0x400000>;
+#else
+	/* QCN9000 tgt-mem-mode=0 layout - 53MB
+	 * +=========+==============+=========+
+	 * |  Region | Start Offset |   Size  |
+	 * +---------+--------------+---------+
+	 * | HREMOTE |  0x4CB00000  |   35MB  |
+	 * +---------+--------------+---------+
+	 * | M3 Dump |  0x4EE00000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |   ETR   |  0x4EF00000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |  Caldb  |  0x4F000000  |   8MB   |
+	 * +---------+--------------+---------+
+	 * | Pageable|  0x4F800000  |   8MB   |
+	 * +==================================+
+	 */
+	base-addr = <0x4CB00000>;
+	m3-dump-addr = <0x4EE00000>;
+	etr-addr = <0x4EF00000>;
+	caldb-addr = <0x4F000000>;
+	pageable-addr = <0x4F800000>;
+	hremote-size = <0x2300000>;
+	caldb-size = <0x800000>;
+	tgt-mem-mode = <0x0>;
+	pageable-size = <0x800000>;
+#endif
+	status = "ok";
+};

feeds/ipq807x_v5.4/ipq50xx/image/ipq50xx.mk

@@ -102,6 +102,15 @@ define Device/indio_um-325ax-v2
 endef
 TARGET_DEVICES += indio_um-325ax-v2
 
+define Device/indio_um-335ax
+  DEVICE_TITLE := Indio UM-335ax
+  DEVICE_DTS := qcom-ipq5018-indio-um-335ax
+  SUPPORTED_DEVICES := indio,um-335ax
+  DEVICE_PACKAGES := ath11k-wifi-indio-um-335ax ath11k-firmware-qcn9000 ath11k-firmware-ipq50xx-spruce
+  DEVICE_DTS_CONFIG := config@mp03.1
+endef
+TARGET_DEVICES += indio_um-335ax
+
 define Device/indio_um-525axp
   DEVICE_TITLE := Indio UM-525axp
   DEVICE_DTS := qcom-ipq5018-indio-um-525axp

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-edgecore-eap112.dts

@@ -169,7 +169,8 @@
 		compatible = "mediatek,eth-mac";
 		reg = <0>;
 		phy-mode = "sgmii";
-		phy-handle = <&phy1>;      // add phy handler
+		phy-handle = <&phy30>;
+		phy-handle2 = <&phy1>;
 		mtd-mac-address = <&factory 0x24>;
 	};
 
@@ -193,6 +194,16 @@
 			nvmem-cell-names = "phy-cal-data";
 		};
 
+		phy30: ethernet-phy@30 { // AN8801SB
+			compatible = "ethernet-phy-idc0ff.0421";
+			reg = <30>; //0x1e
+			phy-mode = "sgmii";
+			full-duplex;
+			pause;
+			airoha,surge = <0>;
+			airoha,polarity = <2>;
+		};
+
 		phy1: ethernet-phy@1 {
 			compatible = "ethernet-phy-id03a2.9471";
 			reg = <24>;            // set phy address to 0x18
@@ -200,9 +211,8 @@
 			reset-assert-us = <600>;
 			reset-deassert-us = <20000>;
 			phy-mode = "sgmii";
-    };
-
-        };
+		};
+	};
 };
 
 &hnat {

feeds/qca-wifi-7/qca-ssdk-qca/patches-zyxel_nwa50be/0001-pinctrl-make-the-switch-LED-works.patch

@@ -1,47 +0,0 @@
-From 7fa9e9b683f1c573c58a14755347988919bc7d06 Mon Sep 17 00:00:00 2001
-From: YenLin Pan <yenlin.pan@zyxel.com.tw>
-Date: Wed, 14 May 2025 13:47:06 +0800
-Subject: [PATCH] pinctrl: make the switch LED works
-
-Enable switch LED pin definition for LED0/LED1/LED2 control
-
-Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
----
- src/init/ssdk_mht_pinctrl.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
-diff --git a/src/init/ssdk_mht_pinctrl.c b/src/init/ssdk_mht_pinctrl.c
-index 2debe59..1ae0002 100755
---- a/src/init/ssdk_mht_pinctrl.c
-+++ b/src/init/ssdk_mht_pinctrl.c
-@@ -33,11 +33,17 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
-     /*PINs default MUX Setting*/
-     MHT_PIN_SETTING_MUX(0,  MHT_PIN_FUNC_INTN_WOL),
-     MHT_PIN_SETTING_MUX(1,  MHT_PIN_FUNC_INTN),
--#if 0
-+#if 1
-     MHT_PIN_SETTING_MUX(2,  MHT_PIN_FUNC_P0_LED_0),
-     MHT_PIN_SETTING_MUX(3,  MHT_PIN_FUNC_P1_LED_0),
-     MHT_PIN_SETTING_MUX(4,  MHT_PIN_FUNC_P2_LED_0),
-     MHT_PIN_SETTING_MUX(5,  MHT_PIN_FUNC_P3_LED_0),
-+    MHT_PIN_SETTING_MUX(6,  MHT_PIN_FUNC_P0_LED_2),
-+    MHT_PIN_SETTING_MUX(7,  MHT_PIN_FUNC_P1_LED_2),
-+    MHT_PIN_SETTING_MUX(8,  MHT_PIN_FUNC_P2_LED_2),
-+    MHT_PIN_SETTING_MUX(9,  MHT_PIN_FUNC_P3_LED_2),
-+#endif
-+#if 0
-     MHT_PIN_SETTING_MUX(6,  MHT_PIN_FUNC_PPS_IN),
-     MHT_PIN_SETTING_MUX(7,  MHT_PIN_FUNC_TOD_IN),
-     MHT_PIN_SETTING_MUX(8,  MHT_PIN_FUNC_RTC_REFCLK_IN),
-@@ -49,7 +55,7 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
-     MHT_PIN_SETTING_MUX(13, MHT_PIN_FUNC_P0_TOD_OUT),
-     MHT_PIN_SETTING_MUX(14, MHT_PIN_FUNC_P0_CLK125_TDI),
-     MHT_PIN_SETTING_MUX(15, MHT_PIN_FUNC_P0_SYNC_CLKO_PTP),
--#if 0
-+#if 1
-     MHT_PIN_SETTING_MUX(16, MHT_PIN_FUNC_P0_LED_1),
-     MHT_PIN_SETTING_MUX(17, MHT_PIN_FUNC_P1_LED_1),
-     MHT_PIN_SETTING_MUX(18, MHT_PIN_FUNC_P2_LED_1),
--- 
-2.34.1
-

feeds/tip/cloud_discovery/files/usr/bin/cloud_discovery

@@ -23,6 +23,7 @@ let ubus = libubus.connect();
 let uci = libuci.cursor();
 let state = DISCOVER;
 let discovery_method = "";
+let discovery_block_list = [];
 let validate_time;
 let offline_time;
 let orphan_time;
@@ -102,6 +103,9 @@ function gateway_load() {
 }
 
 function discovery_state_write() {
+	if (length(discovery_method) == 0)
+		return;
+
 	let discovery_state = {
 		"type": discovery_method,
 		"updated": time()
@@ -155,6 +159,7 @@ function set_state(set) {
 		ulog(LOG_INFO, 'Wait for validation\n');
 		validate_time = time();
 		state = VALIDATING;
+		push(discovery_block_list, discovery_method);
 		break;
 
 	case ONLINE:
@@ -163,6 +168,7 @@ function set_state(set) {
 			ulog(LOG_INFO, 'Setting cloud controller to validated\n');
 			gateway_write({ valid: true });
 			discovery_state_write();
+			discovery_block_list = [];
 		}
 		break;
 
@@ -231,6 +237,13 @@ function time_is_valid() {
 	return valid;
 }
 
+function is_discover_method_blacked() {
+	if (discovery_method in discovery_block_list)
+		return true;
+
+	return false;
+}
+
 function interval_handler() {
 	printf(`State ${state}\n`);
 	switch(state) {
@@ -260,19 +273,21 @@ function interval_handler() {
 		if (!time_is_valid())
 			return;
 
-		discovery_method = DISCOVER_DHCP;
-		if (discover_dhcp())
-			return;
-
 		if (system('/usr/bin/est_client enroll'))
 			return;
 
+		discovery_method = DISCOVER_DHCP;
+		if (!is_discover_method_blacked() && discover_dhcp())
+			return;
+
 		discovery_method = DISCOVER_FLASH;
-		if (!discover_flash())
+		if (!is_discover_method_blacked() && !discover_flash())
 			return;
 
 		discovery_method = DISCOVER_LOOKUP;
 		redirector_lookup();
+
+		discovery_block_list = [];
 		break;
 
 	case VALIDATING:

feeds/ucentral/ucentral-client/Makefile

@@ -4,6 +4,7 @@ PKG_NAME:=ucentral-client
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git
+PKG_MIRROR_HASH:=2935998d6074f0c290d9b96c2988c89aae6f405608f12a0063fa7215498bae9a
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_DATE:=2025-08-11
 PKG_SOURCE_VERSION:=549e84e5fea7230c5471d6a3dbddcc7d3152f665

feeds/ucentral/ucentral-schema/Makefile

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-schema
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git
-PKG_MIRROR_HASH:=dd37ce95e77af90424d4792f1d292e90242d66ebf5c6552afdf364fd33c58af8
+PKG_MIRROR_HASH:=d36e17c47d793fb3b0181ed92411e31a2be8e0ff6f9fad89d9704146f9f251cb
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-08-12
-PKG_SOURCE_VERSION:=a1e7571a07ad309301954149884b13f71fbf74be
+PKG_SOURCE_DATE:=2025-09-24
+PKG_SOURCE_VERSION:=100c045af16bc13db7af936a4cf6f675eb651974
 PKG_MAINTAINER:=John Crispin <john@phrozen.org>
 PKG_LICENSE:=BSD-3-Clause
 

feeds/ucentral/ucentral-schema/files/usr/share/ucentral/wifi_max_user.uc

@@ -1,7 +1,10 @@
 #!/usr/bin/ucode 
+import { readfile } from "fs";
 
 let nl = require("nl80211");
 let def = nl.const;
+let board_name = rtrim(readfile('/tmp/sysinfo/board_name'), '\n');
+let phy_index = 0;
 
 function phy_get() {
 	let res = nl.request(def.NL80211_CMD_GET_WIPHY, def.NLM_F_DUMP, { split_wiphy_dump: true });
@@ -12,5 +15,11 @@ function phy_get() {
 	return res;
 }
 
+switch(board_name) {
+case 'edgecore,eap112':
+        phy_index = 1;
+        break;
+}
+
 let phys = phy_get();
-printf("%d\n", phys[0].max_ap_assoc || 32);
+printf("%d\n", phys[phy_index].max_ap_assoc || 32);

profiles/cig_wf189.yml

@@ -15,4 +15,6 @@ packages:
   - qca-ssdk-shell
   - iperf3
   - sysstat
-  - kmod-cig-poe-judgment 
+  - kmod-cig-poe-judgment
+diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=0 

profiles/cig_wf189h.yml

@@ -14,4 +14,6 @@ packages:
   - qca-ssdk-shell
   - iperf3
   - sysstat
-  - kmod-cig-poe-judgment 
+  - kmod-cig-poe-judgment
+diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=0

profiles/cig_wf189w.yml

@@ -14,4 +14,6 @@ packages:
   - qca-ssdk-shell
   - iperf3
   - sysstat
-  - kmod-cig-poe-judgment 
+  - kmod-cig-poe-judgment
+diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=0 

profiles/cig_wf672.yml

@@ -24,5 +24,6 @@ packages:
   - kmod-iio-ilps22qs
   - kmod-cig-poe-judgment 
 diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=0
   CONFIG_BUSYBOX_CUSTOM=y
   CONFIG_BUSYBOX_CONFIG_STTY=y

profiles/edgecore_eap105.yml

@@ -12,3 +12,5 @@ include:
 packages:
   - ipq53xx
   - qca-ssdk-shell
+diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=0

profiles/indio_um-335ax.yml

@@ -0,0 +1,18 @@
+---
+profile: indio_um-335ax
+target: ipq50xx
+subtarget: generic
+description: Build image for the Indio um-335ax
+image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-indio_um-335ax-squashfs-sysupgrade.tar
+feeds:
+  - name: ipq807x
+    path: ../../feeds/ipq807x_v5.4
+include:
+  - ucentral-ap
+packages:
+  - ipq50xx
+diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=512
+  CONFIG_BUSYBOX_CUSTOM=y
+  CONFIG_BUSYBOX_CONFIG_STTY=y
+

profiles/sonicfi_rap7110c-341x.yml

@@ -13,3 +13,5 @@ packages:
   - ipq53xx
   - qca-ssdk-shell
   - e2fsprogs
+diffconfig: |
+  CONFIG_KERNEL_IPQ_MEM_PROFILE=0