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apollolake: ignore PLTRST# from SOC unless RSMRST# to soc is deasserted

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signals output from SOC should be considered invalid until EC has de-asserted
RSMRST# to SOC.

BUG=none
BRANCH=none
TEST=make buildall, able to boot to OS on amenia

Change-Id: I15aee314263e3f1b41c45fb719249cd2579a6bc7
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/331654
Reviewed-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Kevin K Wong
2016-02-09 16:57:26 -08:00
committed by chrome-bot
parent f7ae91a590
commit 290ae152c1
1 changed files with 8 additions and 0 deletions
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8
chip/npcx/lpc.c
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@@ -756,6 +756,14 @@ void lpc_lreset_pltrst_handler(void)
/* Clear pending bit of WUI */
SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7);
#ifdef GPIO_PCH_RSMRST_L
/* Ignore PLTRST# from SOC unless RSMRST# to soc is deasserted */
if (!gpio_get_level(GPIO_PCH_RSMRST_L))
return;
#endif
ccprintf("[%T PLTRST deasserted]\n");
/*
* Once LRESET is de-asserted (low -> high), we need to intialize lpc
* settings once. If RSTCTL_LRESET_PLTRST_MODE is active, LPC registers