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stm32f0: fix UART clock source for console on UART2

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Bug fix. Recently changed to use HSI 8MHz clock as clock source
for console UART, but the clock register was set incorrectly
for the case that the console UART is UART2.

BUG=chrome-os-partner:32170
BRANCH=none
TEST=Tested on fruitpie which is using UART2 for console.
Verified that console works.

Change-Id: Ied629eb3828e5fab911acb6a8e5f4087563ddb32
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219312
Reviewed-by: Vic Yang <victoryang@chromium.org>
This commit is contained in:
Alec Berg
2014-09-22 09:10:13 -07:00
committed by chrome-internal-fetch
parent 3bfb7ee2a1
commit 33fe8c5b5f
1 changed files with 2 additions and 2 deletions
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4
chip/stm32/uart.c
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@@ -238,9 +238,9 @@ void uart_init(void)
/* Enable USART clock */
#ifdef CHIP_FAMILY_STM32F0
#if (UARTN == 1)
STM32_RCC_CFGR3 |= 0x0003; /* USART1 clock source from HSI(8MHz) */
STM32_RCC_CFGR3 |= 0x0003; /* USART1 clock source from HSI(8MHz) */
#elif (UARTN == 2)
STM32_RCC_CFGR3 |= 0x0300; /* USART2 clock source from HSI(8MHz) */
STM32_RCC_CFGR3 |= 0x030000; /* USART2 clock source from HSI(8MHz) */
#endif /* UARTN */
#endif /* CHIP_FAMILY_STM32F0 */