scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2026-01-08 16:41:55 +00:00
Code Issues Packages Projects Releases Wiki Activity

haswell: move 5V rail enable/disable actions

Browse Source 
The 5V rail should be enabled on S5->S3 transitions and
disabled on S3->S5 transitions.

BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transitions: S0,S3,S5,G3

Change-Id: If9fd7ef16f015136238dd18f64602ecf33d9ec4a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51359
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Aaron Durbin
2013-05-15 14:22:30 -07:00
committed by ChromeBot
parent 6b814ddf52
commit 3bcc4af4b6
1 changed files with 11 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
common/x86_power_haswell.c
View File

@@ -499,13 +499,6 @@ void chipset_task(void)
break;
case X86_G3S5:
gpio_set_level(GPIO_PP5000_EN, 1);
if (wait_in_signals(IN_PGOOD_PP5000)) {
chipset_force_shutdown();
state = X86_G3;
break;
}
/*
* Wait 10ms after +3VALW good, since that powers
* VccDSW and VccSUS.
@@ -537,6 +530,14 @@ void chipset_task(void)
break;
case X86_S5S3:
/* Enable PP5000 (5V) rail. */
gpio_set_level(GPIO_PP5000_EN, 1);
if (wait_in_signals(IN_PGOOD_PP5000)) {
chipset_force_shutdown();
state = X86_G3;
break;
}
/* Wait for the always-on rails to be good */
if (wait_in_signals(IN_PGOOD_ALWAYS_ON)) {
chipset_force_shutdown();
@@ -640,6 +641,9 @@ void chipset_task(void)
/* Turn off power to RAM */
gpio_set_level(GPIO_PP1350_EN, 0);
/* Disable PP5000 (5V) rail. */
gpio_set_level(GPIO_PP5000_EN, 0);
state = X86_S5;
break;
@@ -648,7 +652,6 @@ void chipset_task(void)
gpio_set_level(GPIO_PCH_DPWROK, 0);
gpio_set_level(GPIO_PCH_RSMRST_L, 0);
gpio_set_level(GPIO_PP5000_EN, 0);
gpio_set_level(GPIO_SUSP_VR_EN, 0);
/* Record the time we go into G3 */