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gma: Limit HDMI pixel rate
Given that current Intel chips only support 4K@30Hz over HDMI, it's
actually no surprise that older chips had even lower limits. For a
24bpp mode, it's 225MHz for Nehalem, Sandy and Ivy Bridge and 300MHz
for everything newer.
To keep the code most simple we keep the display's native resolution
and just limit the clock if we encouter an unsupported mode.
TEST=Booted T420 with a DELL U3415W attached over DP-to-HDMI and
DVI-to-HDMI adapters. The display came up with 3440x1440@42Hz
(instead of a garbled picture at 1720x1440@60Hz).
Change-Id: I5386386c648db267a49ed1f62750d2a5fdb2d934
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/17499
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
@@ -248,4 +248,9 @@ is
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Secondary => 4096,
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Tertiary => 4096));
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----------------------------------------------------------------------------
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HDMI_Max_Clock_24bpp : constant Frequency_Type :=
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(if CPU >= Haswell then 300_000_000 else 225_000_000);
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end HW.GFX.GMA.Config;
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@@ -237,6 +237,23 @@ is
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if Port_Cfg.Mode.BPC = Auto_BPC then
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Port_Cfg.Mode.BPC := Connector_Info.Default_BPC (Port_Cfg);
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end if;
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if Port_Cfg.Display = HDMI then
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declare
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pragma Assert (Config.HDMI_Max_Clock_24bpp * 8
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/ Port_Cfg.Mode.BPC >= Frequency_Type'First);
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Max_Dotclock : constant Frequency_Type :=
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Config.HDMI_Max_Clock_24bpp * 8 / Port_Cfg.Mode.BPC;
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begin
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if Port_Cfg.Mode.Dotclock > Max_Dotclock then
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pragma Debug (Debug.Put ("Dotclock "));
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pragma Debug (Debug.Put_Int64 (Port_Cfg.Mode.Dotclock));
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pragma Debug (Debug.Put (" too high, limiting to "));
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pragma Debug (Debug.Put_Int64 (Max_Dotclock));
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pragma Debug (Debug.Put_Line ("."));
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Port_Cfg.Mode.Dotclock := Max_Dotclock;
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end if;
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end;
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end if;
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end;
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else
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Port_Cfg := Port_Config'
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