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oak: revise suspend gpio setting for rev4

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Revise gpio setting of suspend signal for rev4 hardware.

BUG=chrome-os-partner:46579
TEST=run "make BOARD=oak -j" and enable SW sync in bootloader
  EC SW sync works fine.

Change-Id: I8864dfaa8ae7ef9a47d0a08499d88eb8999160c5
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/308351
Reviewed-by: Rong Chang <rongchang@chromium.org>
This commit is contained in:
YH Huang
2015-10-23 17:43:57 +08:00
committed by chrome-bot
parent c5f9f00dfb
commit accc98d7c3
1 changed files with 4 additions and 0 deletions
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4
board/oak/gpio.inc
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@@ -9,7 +9,11 @@
GPIO_INT(AC_PRESENT, PIN(C, 6), GPIO_INT_BOTH, extpower_interrupt)
GPIO_INT(POWER_BUTTON_L, PIN(B, 5), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
GPIO_INT(LID_OPEN, PIN(C, 13), GPIO_INT_BOTH, lid_interrupt) /* LID switch detection */
#if BOARD_REV <= OAK_REV3
GPIO_INT(SUSPEND_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) /* AP suspend/resume state */
#else
GPIO_INT(SUSPEND_L, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) /* AP suspend/resume state */
#endif
GPIO_INT(PD_MCU_INT, PIN(E, 0), GPIO_INT_FALLING, pd_mcu_interrupt) /* Signal from PD MCU, external pull-up */
GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INT_BOTH | GPIO_PULL_UP, spi_event) /* SPI Chip Select */