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it8380dev: change PNPCFG base address to 4E/4F

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Always reserved 2E/2F for super I/O.
This can avoid conflict with super I/O base address.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=make buildall -j

Change-Id: I67a37355e320e289fb1f58c7356a1592f7645d21
Reviewed-on: https://chromium-review.googlesource.com/290087
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
This commit is contained in:
Dino Li
2015-08-04 10:32:03 +08:00
committed by ChromeOS Commit Bot
parent 9495f669d5
commit afae611999
1 changed files with 2 additions and 2 deletions
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4
chip/it83xx/lpc.c
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@@ -528,8 +528,8 @@ static void lpc_init(void)
IT83XX_GPIO_GCR = 0x06;
/* The register pair to access PNPCFG is 002Eh and 002Fh */
IT83XX_GCTRL_BADRSEL = 0x00;
/* The register pair to access PNPCFG is 004Eh and 004Fh */
IT83XX_GCTRL_BADRSEL = 0x01;
/* Disable KBC IRQ */
IT83XX_KBC_KBIRQR = 0x00;