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cr50: configure GPIOs properly

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The SPS GPIOs are hard wired, so there is no need to configure the
mux, but the default mode of pin operation is "output". The three SPS
input pins (CLK, CS, and MOSI) need to be explicitly configured as
such.

BRANCH=none
BUG=chrome-os-partner:50141
TEST=spiraw and TPM tests now pass

Change-Id: Ie8f6c6c3cd09420aab831113a1456227d2b3c44b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/327064
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This commit is contained in:
Vadim Bendebury
2016-02-09 14:58:18 -08:00
committed by chrome-bot
parent cd5745f99c
commit d5e598646d
2 changed files with 8 additions and 10 deletions
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8
board/cr50/board.c
View File

@@ -136,6 +136,14 @@ static void board_init(void)
init_interrupts();
init_trng();
init_runlevel(PERMISSION_MEDIUM);
/*
* SPS is hardwired, all we need to do is enable input mode on the
* appropriate pins.
*/
GWRITE_FIELD(PINMUX, DIOA2_CTL, IE, 1); /* MOSI */
GWRITE_FIELD(PINMUX, DIOA6_CTL, IE, 1); /* CLK */
GWRITE_FIELD(PINMUX, DIOA12_CTL, IE, 1); /* CS */
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);

10
board/cr50/gpio.inc
View File

@@ -58,16 +58,6 @@ ALTERNATE(PIN_MASK(SW_E_, DIO(M3)), 0, MODULE_GPIO, 0)
/* Outputs - also mark as inputs so we can read back from the driven pin */
ALTERNATE(PIN_MASK(LED_2, DIO(A9)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_3, DIO(A10)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_4, DIO(A11)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_5, DIO(A12)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_6, DIO(A13)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_7, DIO(A14)), 0, MODULE_GPIO, DIO_INPUT)
/* SPS IOs This is not needed for the FPGA, it is hardwired
* TODO_FPGA (might have to be modified for a new version)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPICLK), DIO(A2)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPIMOSI), DIO(A3)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPICSB), DIO(A4)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPIMISO), DIO(A5)), 0, MODULE_GPIO, DIO_OUTPUT)
*/